lib1funcs.S revision 1.1.1.2
1 1.1 mrg ; libgcc1 routines for Synopsys DesignWare ARC cpu. 2 1.1 mrg 3 1.1.1.2 mrg /* Copyright (C) 1995-2016 Free Software Foundation, Inc. 4 1.1 mrg Contributor: Joern Rennecke <joern.rennecke (at) embecosm.com> 5 1.1 mrg on behalf of Synopsys Inc. 6 1.1 mrg 7 1.1 mrg This file is part of GCC. 8 1.1 mrg 9 1.1 mrg GCC is free software; you can redistribute it and/or modify it under 10 1.1 mrg the terms of the GNU General Public License as published by the Free 11 1.1 mrg Software Foundation; either version 3, or (at your option) any later 12 1.1 mrg version. 13 1.1 mrg 14 1.1 mrg GCC is distributed in the hope that it will be useful, but WITHOUT ANY 15 1.1 mrg WARRANTY; without even the implied warranty of MERCHANTABILITY or 16 1.1 mrg FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 17 1.1 mrg for more details. 18 1.1 mrg 19 1.1 mrg Under Section 7 of GPL version 3, you are granted additional 20 1.1 mrg permissions described in the GCC Runtime Library Exception, version 21 1.1 mrg 3.1, as published by the Free Software Foundation. 22 1.1 mrg 23 1.1 mrg You should have received a copy of the GNU General Public License and 24 1.1 mrg a copy of the GCC Runtime Library Exception along with this program; 25 1.1 mrg see the files COPYING3 and COPYING.RUNTIME respectively. If not, see 26 1.1 mrg <http://www.gnu.org/licenses/>. */ 27 1.1 mrg 28 1.1 mrg /* As a special exception, if you link this library with other files, 29 1.1 mrg some of which are compiled with GCC, to produce an executable, 30 1.1 mrg this library does not by itself cause the resulting executable 31 1.1 mrg to be covered by the GNU General Public License. 32 1.1 mrg This exception does not however invalidate any other reasons why 33 1.1 mrg the executable file might be covered by the GNU General Public License. */ 34 1.1 mrg 35 1.1 mrg 36 1.1 mrg /* ANSI concatenation macros. */ 37 1.1 mrg 38 1.1 mrg #define CONCAT1(a, b) CONCAT2(a, b) 39 1.1 mrg #define CONCAT2(a, b) a ## b 40 1.1 mrg 41 1.1 mrg /* Use the right prefix for global labels. */ 42 1.1 mrg 43 1.1 mrg #define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x) 44 1.1 mrg 45 1.1 mrg #ifndef WORKING_ASSEMBLER 46 1.1 mrg #define abs_l abs 47 1.1 mrg #define asl_l asl 48 1.1 mrg #define mov_l mov 49 1.1 mrg #endif 50 1.1 mrg 51 1.1 mrg #define FUNC(X) .type SYM(X),@function 52 1.1 mrg #define HIDDEN_FUNC(X) FUNC(X)` .hidden X 53 1.1 mrg #define ENDFUNC0(X) .Lfe_##X: .size X,.Lfe_##X-X 54 1.1 mrg #define ENDFUNC(X) ENDFUNC0(X) 55 1.1 mrg 56 1.1 mrg 57 1.1 mrg 58 1.1 mrg #ifdef L_mulsi3 59 1.1 mrg .section .text 60 1.1 mrg .align 4 61 1.1 mrg 62 1.1 mrg .global SYM(__mulsi3) 63 1.1 mrg SYM(__mulsi3): 64 1.1 mrg 65 1.1 mrg /* This the simple version. 66 1.1 mrg 67 1.1 mrg while (a) 68 1.1 mrg { 69 1.1 mrg if (a & 1) 70 1.1 mrg r += b; 71 1.1 mrg a >>= 1; 72 1.1 mrg b <<= 1; 73 1.1 mrg } 74 1.1 mrg */ 75 1.1 mrg 76 1.1 mrg #if defined (__ARC_MUL64__) 77 1.1 mrg FUNC(__mulsi3) 78 1.1 mrg mulu64 r0,r1 79 1.1 mrg j_s.d [blink] 80 1.1 mrg mov_s r0,mlo 81 1.1 mrg ENDFUNC(__mulsi3) 82 1.1.1.2 mrg #elif defined (__ARC700__) || defined (__HS__) 83 1.1 mrg HIDDEN_FUNC(__mulsi3) 84 1.1 mrg mpyu r0,r0,r1 85 1.1 mrg nop_s 86 1.1 mrg j_s [blink] 87 1.1 mrg ENDFUNC(__mulsi3) 88 1.1 mrg #elif defined (__ARC_NORM__) 89 1.1 mrg FUNC(__mulsi3) 90 1.1 mrg norm.f r2,r0 91 1.1 mrg rsub lp_count,r2,31 92 1.1 mrg mov.mi lp_count,32 93 1.1 mrg mov_s r2,r0 94 1.1 mrg mov_s r0,0 95 1.1 mrg lpnz @.Lend ; loop is aligned 96 1.1 mrg lsr.f r2,r2 97 1.1 mrg add.cs r0,r0,r1 98 1.1 mrg add_s r1,r1,r1 99 1.1 mrg .Lend: j_s [blink] 100 1.1 mrg ENDFUNC(__mulsi3) 101 1.1 mrg #elif !defined (__OPTIMIZE_SIZE__) && !defined(__ARC601__) 102 1.1 mrg /* Up to 3.5 times faster than the simpler code below, but larger. */ 103 1.1 mrg FUNC(__mulsi3) 104 1.1 mrg ror.f r2,r0,4 105 1.1 mrg mov_s r0,0 106 1.1 mrg add3.mi r0,r0,r1 107 1.1 mrg asl.f r2,r2,2 108 1.1 mrg add2.cs r0,r0,r1 109 1.1 mrg jeq_s [blink] 110 1.1 mrg .Loop: 111 1.1 mrg add1.mi r0,r0,r1 112 1.1 mrg asl.f r2,r2,2 113 1.1 mrg add.cs r0,r0,r1 114 1.1 mrg asl_s r1,r1,4 115 1.1 mrg ror.f r2,r2,8 116 1.1 mrg add3.mi r0,r0,r1 117 1.1 mrg asl.f r2,r2,2 118 1.1 mrg bne.d .Loop 119 1.1 mrg add2.cs r0,r0,r1 120 1.1 mrg j_s [blink] 121 1.1 mrg ENDFUNC(__mulsi3) 122 1.1 mrg #elif !defined (__OPTIMIZE_SIZE__) /* __ARC601__ */ 123 1.1 mrg FUNC(__mulsi3) 124 1.1 mrg lsr.f r2,r0 125 1.1 mrg mov_s r0,0 126 1.1 mrg mov_s r3,0 127 1.1 mrg add.cs r0,r0,r1 128 1.1 mrg .Loop: 129 1.1 mrg lsr.f r2,r2 130 1.1 mrg add1.cs r0,r0,r1 131 1.1 mrg lsr.f r2,r2 132 1.1 mrg add2.cs r0,r0,r1 133 1.1 mrg lsr.f r2,r2 134 1.1 mrg add3.cs r0,r0,r1 135 1.1 mrg bne.d .Loop 136 1.1 mrg add3 r1,r3,r1 137 1.1 mrg j_s [blink] 138 1.1 mrg ENDFUNC(__mulsi3) 139 1.1 mrg #else 140 1.1 mrg /********************************************************/ 141 1.1 mrg FUNC(__mulsi3) 142 1.1 mrg mov_s r2,0 ; Accumulate result here. 143 1.1 mrg .Lloop: 144 1.1 mrg bbit0 r0,0,@.Ly 145 1.1 mrg add_s r2,r2,r1 ; r += b 146 1.1 mrg .Ly: 147 1.1 mrg lsr_s r0,r0 ; a >>= 1 148 1.1 mrg asl_s r1,r1 ; b <<= 1 149 1.1 mrg brne_s r0,0,@.Lloop 150 1.1 mrg .Ldone: 151 1.1 mrg j_s.d [blink] 152 1.1 mrg mov_s r0,r2 153 1.1 mrg ENDFUNC(__mulsi3) 154 1.1 mrg /********************************************************/ 155 1.1 mrg #endif 156 1.1 mrg 157 1.1 mrg #endif /* L_mulsi3 */ 158 1.1 mrg 159 1.1 mrg #ifdef L_umulsidi3 160 1.1 mrg .section .text 161 1.1 mrg .align 4 162 1.1 mrg 163 1.1 mrg .global SYM(__umulsidi3) 164 1.1 mrg SYM(__umulsidi3): 165 1.1 mrg HIDDEN_FUNC(__umulsidi3) 166 1.1 mrg /* We need ARC700 /ARC_MUL64 definitions of __umulsidi3 / __umulsi3_highpart 167 1.1 mrg in case some code has been compiled without multiply support enabled, 168 1.1 mrg but linked with the multiply-support enabled libraries. 169 1.1 mrg For ARC601 (i.e. without a barrel shifter), we also use umuldisi3 as our 170 1.1 mrg umulsi3_highpart implementation; the use of the latter label doesn't 171 1.1 mrg actually benefit ARC601 platforms, but is useful when ARC601 code is linked 172 1.1 mrg against other libraries. */ 173 1.1 mrg #if defined (__ARC700__) || defined (__ARC_MUL64__) || defined (__ARC601__) 174 1.1 mrg .global SYM(__umulsi3_highpart) 175 1.1 mrg SYM(__umulsi3_highpart): 176 1.1 mrg HIDDEN_FUNC(__umulsi3_highpart) 177 1.1 mrg #endif 178 1.1 mrg 179 1.1 mrg /* This the simple version. 180 1.1 mrg 181 1.1 mrg while (a) 182 1.1 mrg { 183 1.1 mrg if (a & 1) 184 1.1 mrg r += b; 185 1.1 mrg a >>= 1; 186 1.1 mrg b <<= 1; 187 1.1 mrg } 188 1.1 mrg */ 189 1.1 mrg #include "ieee-754/arc-ieee-754.h" 190 1.1 mrg 191 1.1 mrg #ifdef __ARC700__ 192 1.1 mrg mov_s r12,DBL0L 193 1.1 mrg mpyu DBL0L,r12,DBL0H 194 1.1 mrg j_s.d [blink] 195 1.1 mrg mpyhu DBL0H,r12,DBL0H 196 1.1 mrg #elif defined (__ARC_MUL64__) 197 1.1 mrg /* Likewise for __ARC_MUL64__ */ 198 1.1 mrg mulu64 r0,r1 199 1.1 mrg mov_s DBL0L,mlo 200 1.1 mrg j_s.d [blink] 201 1.1 mrg mov_s DBL0H,mhi 202 1.1 mrg #else /* !__ARC700__ && !__ARC_MUL64__ */ 203 1.1 mrg /* Although it might look tempting to extend this to handle muldi3, 204 1.1 mrg using mulsi3 twice with 2.25 cycles per 32 bit add is faster 205 1.1 mrg than one loop with 3 or four cycles per 32 bit add. */ 206 1.1 mrg asl.f r12,0 ; Top part of b. 207 1.1 mrg mov_s r2,0 ; Accumulate result here. 208 1.1 mrg bbit1.d r0,0,@.Ladd 209 1.1 mrg mov_s r3,0 210 1.1 mrg .Llooptst: 211 1.1 mrg rlc r12,r12 212 1.1 mrg breq r0,0,@.Ldone ; while (a) 213 1.1 mrg .Lloop: 214 1.1 mrg asl.f r1,r1 ; b <<= 1 215 1.1 mrg bbit0.d r0,1,@.Llooptst 216 1.1 mrg lsr r0,r0 ; a >>= 1 217 1.1 mrg rlc r12,r12 218 1.1 mrg .Ladd: 219 1.1 mrg add.f r3,r3,r1 ; r += b 220 1.1 mrg brne.d r0,0,@.Lloop ; while (a); 221 1.1 mrg adc r2,r2,r12 222 1.1 mrg .Ldone: 223 1.1 mrg mov_s DBL0L,r3 224 1.1 mrg j_s.d [blink] 225 1.1 mrg mov DBL0H,r2 226 1.1 mrg #endif /* !__ARC700__*/ 227 1.1 mrg ENDFUNC(__umulsidi3) 228 1.1 mrg #if defined (__ARC700__) || defined (__ARC_MUL64__) || defined (__ARC601__) 229 1.1 mrg ENDFUNC(__umulsi3_highpart) 230 1.1 mrg #endif 231 1.1 mrg #endif /* L_umulsidi3 */ 232 1.1 mrg 233 1.1 mrg #ifdef L_umulsi3_highpart 234 1.1 mrg #include "ieee-754/arc-ieee-754.h" 235 1.1 mrg /* For use without a barrel shifter, and for ARC700 / ARC_MUL64, the 236 1.1 mrg mulsidi3 algorithms above look better, so for these, there is an 237 1.1 mrg extra label up there. */ 238 1.1 mrg #if !defined (__ARC700__) && !defined (__ARC_MUL64__) && !defined (__ARC601__) 239 1.1 mrg .global SYM(__umulsi3_highpart) 240 1.1 mrg SYM(__umulsi3_highpart): 241 1.1 mrg HIDDEN_FUNC(__umulsi3_highpart) 242 1.1 mrg mov_s r2,0 243 1.1 mrg mov_s r3,32 244 1.1 mrg .Loop: 245 1.1 mrg lsr.f r0,r0 246 1.1 mrg add.cs.f r2,r2,r1 247 1.1 mrg sub_s r3,r3,1 248 1.1 mrg brne.d r0,0,.Loop 249 1.1 mrg rrc r2,r2 250 1.1 mrg j_s.d [blink] 251 1.1 mrg /* Make the result register peephole-compatible with mulsidi3. */ 252 1.1 mrg lsr DBL0H,r2,r3 253 1.1 mrg ENDFUNC(__umulsi3_highpart) 254 1.1 mrg #endif /* !__ARC700__ && !__ARC601__ */ 255 1.1 mrg #endif /* L_umulsi3_highpart */ 256 1.1 mrg 257 1.1 mrg #ifdef L_divmod_tools 258 1.1 mrg 259 1.1 mrg ; Utilities used by all routines. 260 1.1 mrg 261 1.1 mrg .section .text 262 1.1 mrg 263 1.1 mrg /* 264 1.1 mrg unsigned long 265 1.1 mrg udivmodsi4(int modwanted, unsigned long num, unsigned long den) 266 1.1 mrg { 267 1.1 mrg unsigned long bit = 1; 268 1.1 mrg unsigned long res = 0; 269 1.1 mrg 270 1.1 mrg while (den < num && bit && !(den & (1L<<31))) 271 1.1 mrg { 272 1.1 mrg den <<=1; 273 1.1 mrg bit <<=1; 274 1.1 mrg } 275 1.1 mrg while (bit) 276 1.1 mrg { 277 1.1 mrg if (num >= den) 278 1.1 mrg { 279 1.1 mrg num -= den; 280 1.1 mrg res |= bit; 281 1.1 mrg } 282 1.1 mrg bit >>=1; 283 1.1 mrg den >>=1; 284 1.1 mrg } 285 1.1 mrg if (modwanted) return num; 286 1.1 mrg return res; 287 1.1 mrg } 288 1.1 mrg */ 289 1.1 mrg 290 1.1 mrg ; inputs: r0 = numerator, r1 = denominator 291 1.1 mrg ; outputs: r0 = quotient, r1 = remainder, r2/r3 trashed 292 1.1 mrg 293 1.1 mrg .balign 4 294 1.1 mrg .global SYM(__udivmodsi4) 295 1.1 mrg FUNC(__udivmodsi4) 296 1.1 mrg SYM(__udivmodsi4): 297 1.1 mrg 298 1.1 mrg #if defined (__ARC700__) 299 1.1 mrg /* Normalize divisor and divident, and then use the appropriate number of 300 1.1 mrg divaw (the number of result bits, or one more) to produce the result. 301 1.1 mrg There are some special conditions that need to be tested: 302 1.1 mrg - We can only directly normalize unsigned numbers that fit in 31 bit. For 303 1.1 mrg the divisor, we test early on that it is not 'negative'. 304 1.1 mrg - divaw can't corrrectly process a divident that is larger than the divisor. 305 1.1 mrg We handle this be checking that the divident prior to normalization is 306 1.1 mrg not larger than the normalized divisor. As we then already know then 307 1.1 mrg that the divisor fits 31 bit, this check also makes sure that the 308 1.1 mrg divident fits. 309 1.1 mrg - ordinary normalization of the divident could make it larger than the 310 1.1 mrg normalized divisor, which again would be unsuitable for divaw. 311 1.1 mrg Thus, we want to shift left the divident by one less, except that we 312 1.1 mrg want to leave it alone if it is already 31 bit. To this end, we 313 1.1 mrg double the input to norm with adds. 314 1.1 mrg - If the divident has less bits than the divisor, that would leave us 315 1.1 mrg with a negative number of divaw to execute. Although we could use a 316 1.1 mrg conditional loop to avoid excess divaw, and then the quotient could 317 1.1 mrg be extracted correctly as there'd be more than enough zero bits, the 318 1.1 mrg remainder would be shifted left too far, requiring a conditional shift 319 1.1 mrg right. The cost of that shift and the possible mispredict on the 320 1.1 mrg conditional loop cost as much as putting in an early check for a zero 321 1.1 mrg result. */ 322 1.1 mrg bmsk r3,r0,29 323 1.1 mrg brne.d r3,r0,.Large_dividend 324 1.1 mrg norm.f r2,r1 325 1.1 mrg brlo r0,r1,.Lret0 326 1.1 mrg norm r3,r0 327 1.1 mrg asl_s r1,r1,r2 328 1.1 mrg sub_s r3,r3,1 329 1.1 mrg asl_l r0,r0,r3 ; not short to keep loop aligned 330 1.1 mrg sub lp_count,r2,r3 331 1.1 mrg lp .Ldiv_end 332 1.1 mrg divaw r0,r0,r1 333 1.1 mrg .Ldiv_end:sub_s r3,r2,1 334 1.1 mrg lsr r1,r0,r2 335 1.1 mrg j_s.d [blink] 336 1.1 mrg bmsk r0,r0,r3 337 1.1 mrg 338 1.1 mrg .balign 4 339 1.1 mrg .Large_dividend: 340 1.1 mrg bmi .Ltrivial 341 1.1 mrg asl_s r1,r1,r2 342 1.1 mrg mov_s r3,0 343 1.1 mrg sub1.f r4,r0,r1 344 1.1 mrg mov.lo r4,r0 345 1.1 mrg mov.hs r3,2 346 1.1 mrg cmp r4,r1 347 1.1 mrg sub.hs r4,r4,r1 348 1.1 mrg add.hs r3,r3,1 349 1.1 mrg mov.f lp_count,r2 350 1.1 mrg lpne .Ldiv_end2 351 1.1 mrg divaw r4,r4,r1 352 1.1 mrg .Ldiv_end2:asl r0,r3,r2 353 1.1 mrg lsr r1,r4,r2 354 1.1 mrg sub_s r2,r2,1 355 1.1 mrg bmsk r4,r4,r2 356 1.1 mrg j_s.d [blink] 357 1.1 mrg or.ne r0,r0,r4 358 1.1 mrg 359 1.1 mrg .Lret0: 360 1.1 mrg mov_s r1,r0 361 1.1 mrg j_s.d [blink] 362 1.1 mrg mov_l r0,0 363 1.1 mrg .balign 4 364 1.1 mrg .Ltrivial: 365 1.1 mrg sub.f r1,r0,r1 366 1.1 mrg mov.c r1,r0 367 1.1 mrg mov_s r0,1 368 1.1 mrg j_s.d [blink] 369 1.1 mrg mov.c r0,0 370 1.1 mrg #elif !defined (__OPTIMIZE_SIZE__) 371 1.1 mrg #ifdef __ARC_NORM__ 372 1.1 mrg lsr_s r2,r0 373 1.1 mrg brhs.d r1,r2,.Lret0_3 374 1.1 mrg norm r2,r2 375 1.1 mrg norm r3,r1 376 1.1 mrg sub_s r3,r3,r2 377 1.1 mrg asl_s r1,r1,r3 378 1.1 mrg sub1.f 0,r0,r1 379 1.1 mrg lsr.cs r1,r1,1 380 1.1 mrg sbc r2,r3,0 381 1.1 mrg sub1 r0,r0,r1 382 1.1 mrg cmp_s r0,r1 383 1.1 mrg mov.f lp_count,r2 384 1.1 mrg #else /* ! __ARC_NORM__ */ 385 1.1 mrg lsr_s r2,r0 386 1.1 mrg brhs.d r1,r2,.Lret0_3 387 1.1 mrg mov lp_count,32 388 1.1 mrg .Lloop1: 389 1.1 mrg asl_s r1,r1 ; den <<= 1 390 1.1 mrg brls.d r1,r2,@.Lloop1 391 1.1 mrg sub lp_count,lp_count,1 392 1.1 mrg sub_s r0,r0,r1 393 1.1 mrg lsr_s r1,r1 394 1.1 mrg cmp_s r0,r1 395 1.1 mrg xor.f r2,lp_count,31 396 1.1.1.2 mrg #if !defined (__EM__) 397 1.1 mrg mov_s lp_count,r2 398 1.1.1.2 mrg #else 399 1.1.1.2 mrg mov lp_count,r2 400 1.1.1.2 mrg nop_s 401 1.1.1.2 mrg #endif /* !__EM__ */ 402 1.1 mrg #endif /* !__ARC_NORM__ */ 403 1.1 mrg sub.cc r0,r0,r1 404 1.1 mrg mov_s r3,3 405 1.1 mrg sbc r3,r3,0 406 1.1 mrg #ifndef __ARC601__ 407 1.1 mrg asl_s r3,r3,r2 408 1.1 mrg rsub r1,r1,1 409 1.1 mrg lpne @.Lloop2_end 410 1.1 mrg add1.f r0,r1,r0 411 1.1 mrg sub.cc r0,r0,r1 412 1.1 mrg .Lloop2_end: 413 1.1 mrg lsr r1,r0,r2 414 1.1 mrg #else 415 1.1 mrg rsub r1,r1,1 416 1.1 mrg lpne @.Lloop2_end 417 1.1 mrg asl_s r3,r3 418 1.1 mrg add1.f r0,r1,r0 419 1.1 mrg sub.cc r0,r0,r1 420 1.1 mrg .Lloop2_end: 421 1.1 mrg lsr_s r1,r0 422 1.1 mrg lsr.f lp_count,r2 423 1.1 mrg mov.cc r1,r0 424 1.1 mrg lpnz 1f 425 1.1 mrg lsr_s r1,r1 426 1.1 mrg lsr_s r1,r1 427 1.1 mrg 1: 428 1.1 mrg #endif 429 1.1 mrg bmsk r0,r0,r2 430 1.1 mrg bclr r0,r0,r2 431 1.1 mrg j_s.d [blink] 432 1.1 mrg or_s r0,r0,r3 433 1.1 mrg .Lret0_3: 434 1.1 mrg #if 0 /* Slightly shorter, but slower. */ 435 1.1 mrg lp .Loop3_end 436 1.1 mrg brhi.d r1,r0,.Loop3_end 437 1.1 mrg sub_s r0,r0,r1 438 1.1 mrg .Loop3_end 439 1.1 mrg add_s r1,r1,r0 440 1.1 mrg j_s.d [blink] 441 1.1 mrg rsub r0,lp_count,32-1 442 1.1 mrg #else 443 1.1 mrg mov_s r4,r1 444 1.1 mrg sub.f r1,r0,r1 445 1.1 mrg sbc r0,r0,r0 446 1.1 mrg sub.cc.f r1,r1,r4 447 1.1 mrg sbc r0,r0,0 448 1.1 mrg sub.cc.f r1,r1,r4 449 1.1 mrg sbc r0,r0,-3 450 1.1 mrg j_s.d [blink] 451 1.1 mrg add.cs r1,r1,r4 452 1.1 mrg #endif 453 1.1 mrg #else /* Arctangent-A5 */ 454 1.1 mrg breq_s r1,0,@.Ldivmodend 455 1.1 mrg mov_s r2,1 ; bit = 1 456 1.1 mrg mov_s r3,0 ; res = 0 457 1.1 mrg .Lloop1: 458 1.1 mrg brhs r1,r0,@.Lloop2 459 1.1 mrg bbit1 r1,31,@.Lloop2 460 1.1 mrg asl_s r1,r1 ; den <<= 1 461 1.1 mrg b.d @.Lloop1 462 1.1 mrg asl_s r2,r2 ; bit <<= 1 463 1.1 mrg .Lloop2: 464 1.1 mrg brlo r0,r1,@.Lshiftdown 465 1.1 mrg sub_s r0,r0,r1 ; num -= den 466 1.1 mrg or_s r3,r3,r2 ; res |= bit 467 1.1 mrg .Lshiftdown: 468 1.1 mrg lsr_s r2,r2 ; bit >>= 1 469 1.1 mrg lsr_s r1,r1 ; den >>= 1 470 1.1 mrg brne_s r2,0,@.Lloop2 471 1.1 mrg .Ldivmodend: 472 1.1 mrg mov_s r1,r0 ; r1 = mod 473 1.1 mrg j.d [blink] 474 1.1 mrg mov_s r0,r3 ; r0 = res 475 1.1 mrg /******************************************************/ 476 1.1 mrg #endif 477 1.1 mrg ENDFUNC(__udivmodsi4) 478 1.1 mrg 479 1.1 mrg #endif 480 1.1 mrg 481 1.1 mrg #ifdef L_udivsi3 482 1.1 mrg .section .text 483 1.1 mrg .align 4 484 1.1 mrg 485 1.1 mrg .global SYM(__udivsi3) 486 1.1 mrg FUNC(__udivsi3) 487 1.1 mrg SYM(__udivsi3): 488 1.1 mrg b @SYM(__udivmodsi4) 489 1.1 mrg ENDFUNC(__udivsi3) 490 1.1 mrg #if 0 /* interferes with linux loader */ 491 1.1 mrg .section .__arc_profile_forward, "a" 492 1.1 mrg .long SYM(__udivsi3) 493 1.1 mrg .long SYM(__udivmodsi4) 494 1.1 mrg .long 65536 495 1.1 mrg #endif 496 1.1 mrg 497 1.1 mrg #endif /* L_udivsi3 */ 498 1.1 mrg 499 1.1 mrg #ifdef L_divsi3 500 1.1 mrg .section .text 501 1.1 mrg .align 4 502 1.1 mrg 503 1.1 mrg .global SYM(__divsi3) 504 1.1 mrg FUNC(__divsi3) 505 1.1 mrg 506 1.1 mrg #ifndef __ARC700__ 507 1.1 mrg SYM(__divsi3): 508 1.1 mrg /* A5 / ARC60? */ 509 1.1 mrg mov r7,blink 510 1.1 mrg xor r6,r0,r1 511 1.1 mrg abs_s r0,r0 512 1.1 mrg bl.d @SYM(__udivmodsi4) 513 1.1 mrg abs_s r1,r1 514 1.1 mrg tst r6,r6 515 1.1 mrg j.d [r7] 516 1.1 mrg neg.mi r0,r0 517 1.1 mrg #else /* !ifndef __ARC700__ */ 518 1.1 mrg ;; We can use the abs, norm, divaw and mpy instructions for ARC700 519 1.1 mrg #define MULDIV 520 1.1 mrg #ifdef MULDIV 521 1.1 mrg /* This table has been generated by divtab-arc700.c. */ 522 1.1 mrg /* 1/512 .. 1/256, normalized. There is a leading 1 in bit 31. 523 1.1 mrg For powers of two, we list unnormalized numbers instead. The values 524 1.1 mrg for powers of 2 are loaded, but not used. The value for 1 is actually 525 1.1 mrg the first instruction after .Lmuldiv. */ 526 1.1 mrg .balign 4 527 1.1 mrg .Ldivtab: 528 1.1 mrg 529 1.1 mrg .long 0x1000000 530 1.1 mrg .long 0x80808081 531 1.1 mrg .long 0x81020409 532 1.1 mrg .long 0x81848DA9 533 1.1 mrg .long 0x82082083 534 1.1 mrg .long 0x828CBFBF 535 1.1 mrg .long 0x83126E98 536 1.1 mrg .long 0x83993053 537 1.1 mrg .long 0x84210843 538 1.1 mrg .long 0x84A9F9C9 539 1.1 mrg .long 0x85340854 540 1.1 mrg .long 0x85BF3762 541 1.1 mrg .long 0x864B8A7E 542 1.1 mrg .long 0x86D90545 543 1.1 mrg .long 0x8767AB60 544 1.1 mrg .long 0x87F78088 545 1.1 mrg .long 0x88888889 546 1.1 mrg .long 0x891AC73B 547 1.1 mrg .long 0x89AE408A 548 1.1 mrg .long 0x8A42F871 549 1.1 mrg .long 0x8AD8F2FC 550 1.1 mrg .long 0x8B70344B 551 1.1 mrg .long 0x8C08C08D 552 1.1 mrg .long 0x8CA29C05 553 1.1 mrg .long 0x8D3DCB09 554 1.1 mrg .long 0x8DDA5203 555 1.1 mrg .long 0x8E78356E 556 1.1 mrg .long 0x8F1779DA 557 1.1 mrg .long 0x8FB823EF 558 1.1 mrg .long 0x905A3864 559 1.1 mrg .long 0x90FDBC0A 560 1.1 mrg .long 0x91A2B3C5 561 1.1 mrg .long 0x92492493 562 1.1 mrg .long 0x92F11385 563 1.1 mrg .long 0x939A85C5 564 1.1 mrg .long 0x94458095 565 1.1 mrg .long 0x94F20950 566 1.1 mrg .long 0x95A02569 567 1.1 mrg .long 0x964FDA6D 568 1.1 mrg .long 0x97012E03 569 1.1 mrg .long 0x97B425EE 570 1.1 mrg .long 0x9868C80A 571 1.1 mrg .long 0x991F1A52 572 1.1 mrg .long 0x99D722DB 573 1.1 mrg .long 0x9A90E7DA 574 1.1 mrg .long 0x9B4C6F9F 575 1.1 mrg .long 0x9C09C09D 576 1.1 mrg .long 0x9CC8E161 577 1.1 mrg .long 0x9D89D89E 578 1.1 mrg .long 0x9E4CAD24 579 1.1 mrg .long 0x9F1165E8 580 1.1 mrg .long 0x9FD809FE 581 1.1 mrg .long 0xA0A0A0A1 582 1.1 mrg .long 0xA16B312F 583 1.1 mrg .long 0xA237C32C 584 1.1 mrg .long 0xA3065E40 585 1.1 mrg .long 0xA3D70A3E 586 1.1 mrg .long 0xA4A9CF1E 587 1.1 mrg .long 0xA57EB503 588 1.1 mrg .long 0xA655C43A 589 1.1 mrg .long 0xA72F053A 590 1.1 mrg .long 0xA80A80A9 591 1.1 mrg .long 0xA8E83F58 592 1.1 mrg .long 0xA9C84A48 593 1.1 mrg .long 0xAAAAAAAB 594 1.1 mrg .long 0xAB8F69E3 595 1.1 mrg .long 0xAC769185 596 1.1 mrg .long 0xAD602B59 597 1.1 mrg .long 0xAE4C415D 598 1.1 mrg .long 0xAF3ADDC7 599 1.1 mrg .long 0xB02C0B03 600 1.1 mrg .long 0xB11FD3B9 601 1.1 mrg .long 0xB21642C9 602 1.1 mrg .long 0xB30F6353 603 1.1 mrg .long 0xB40B40B5 604 1.1 mrg .long 0xB509E68B 605 1.1 mrg .long 0xB60B60B7 606 1.1 mrg .long 0xB70FBB5B 607 1.1 mrg .long 0xB81702E1 608 1.1 mrg .long 0xB92143FB 609 1.1 mrg .long 0xBA2E8BA3 610 1.1 mrg .long 0xBB3EE722 611 1.1 mrg .long 0xBC52640C 612 1.1 mrg .long 0xBD691048 613 1.1 mrg .long 0xBE82FA0C 614 1.1 mrg .long 0xBFA02FE9 615 1.1 mrg .long 0xC0C0C0C1 616 1.1 mrg .long 0xC1E4BBD6 617 1.1 mrg .long 0xC30C30C4 618 1.1 mrg .long 0xC4372F86 619 1.1 mrg .long 0xC565C87C 620 1.1 mrg .long 0xC6980C6A 621 1.1 mrg .long 0xC7CE0C7D 622 1.1 mrg .long 0xC907DA4F 623 1.1 mrg .long 0xCA4587E7 624 1.1 mrg .long 0xCB8727C1 625 1.1 mrg .long 0xCCCCCCCD 626 1.1 mrg .long 0xCE168A78 627 1.1 mrg .long 0xCF6474A9 628 1.1 mrg .long 0xD0B69FCC 629 1.1 mrg .long 0xD20D20D3 630 1.1 mrg .long 0xD3680D37 631 1.1 mrg .long 0xD4C77B04 632 1.1 mrg .long 0xD62B80D7 633 1.1 mrg .long 0xD79435E6 634 1.1 mrg .long 0xD901B204 635 1.1 mrg .long 0xDA740DA8 636 1.1 mrg .long 0xDBEB61EF 637 1.1 mrg .long 0xDD67C8A7 638 1.1 mrg .long 0xDEE95C4D 639 1.1 mrg .long 0xE070381D 640 1.1 mrg .long 0xE1FC780F 641 1.1 mrg .long 0xE38E38E4 642 1.1 mrg .long 0xE525982B 643 1.1 mrg .long 0xE6C2B449 644 1.1 mrg .long 0xE865AC7C 645 1.1 mrg .long 0xEA0EA0EB 646 1.1 mrg .long 0xEBBDB2A6 647 1.1 mrg .long 0xED7303B6 648 1.1 mrg .long 0xEF2EB720 649 1.1 mrg .long 0xF0F0F0F1 650 1.1 mrg .long 0xF2B9D649 651 1.1 mrg .long 0xF4898D60 652 1.1 mrg .long 0xF6603D99 653 1.1 mrg .long 0xF83E0F84 654 1.1 mrg .long 0xFA232CF3 655 1.1 mrg .long 0xFC0FC0FD 656 1.1 mrg .long 0xFE03F810 657 1.1 mrg .long 0x2000000 658 1.1 mrg .long 0x81020409 659 1.1 mrg .long 0x82082083 660 1.1 mrg .long 0x83126E98 661 1.1 mrg .long 0x84210843 662 1.1 mrg .long 0x85340854 663 1.1 mrg .long 0x864B8A7E 664 1.1 mrg .long 0x8767AB60 665 1.1 mrg .long 0x88888889 666 1.1 mrg .long 0x89AE408A 667 1.1 mrg .long 0x8AD8F2FC 668 1.1 mrg .long 0x8C08C08D 669 1.1 mrg .long 0x8D3DCB09 670 1.1 mrg .long 0x8E78356E 671 1.1 mrg .long 0x8FB823EF 672 1.1 mrg .long 0x90FDBC0A 673 1.1 mrg .long 0x92492493 674 1.1 mrg .long 0x939A85C5 675 1.1 mrg .long 0x94F20950 676 1.1 mrg .long 0x964FDA6D 677 1.1 mrg .long 0x97B425EE 678 1.1 mrg .long 0x991F1A52 679 1.1 mrg .long 0x9A90E7DA 680 1.1 mrg .long 0x9C09C09D 681 1.1 mrg .long 0x9D89D89E 682 1.1 mrg .long 0x9F1165E8 683 1.1 mrg .long 0xA0A0A0A1 684 1.1 mrg .long 0xA237C32C 685 1.1 mrg .long 0xA3D70A3E 686 1.1 mrg .long 0xA57EB503 687 1.1 mrg .long 0xA72F053A 688 1.1 mrg .long 0xA8E83F58 689 1.1 mrg .long 0xAAAAAAAB 690 1.1 mrg .long 0xAC769185 691 1.1 mrg .long 0xAE4C415D 692 1.1 mrg .long 0xB02C0B03 693 1.1 mrg .long 0xB21642C9 694 1.1 mrg .long 0xB40B40B5 695 1.1 mrg .long 0xB60B60B7 696 1.1 mrg .long 0xB81702E1 697 1.1 mrg .long 0xBA2E8BA3 698 1.1 mrg .long 0xBC52640C 699 1.1 mrg .long 0xBE82FA0C 700 1.1 mrg .long 0xC0C0C0C1 701 1.1 mrg .long 0xC30C30C4 702 1.1 mrg .long 0xC565C87C 703 1.1 mrg .long 0xC7CE0C7D 704 1.1 mrg .long 0xCA4587E7 705 1.1 mrg .long 0xCCCCCCCD 706 1.1 mrg .long 0xCF6474A9 707 1.1 mrg .long 0xD20D20D3 708 1.1 mrg .long 0xD4C77B04 709 1.1 mrg .long 0xD79435E6 710 1.1 mrg .long 0xDA740DA8 711 1.1 mrg .long 0xDD67C8A7 712 1.1 mrg .long 0xE070381D 713 1.1 mrg .long 0xE38E38E4 714 1.1 mrg .long 0xE6C2B449 715 1.1 mrg .long 0xEA0EA0EB 716 1.1 mrg .long 0xED7303B6 717 1.1 mrg .long 0xF0F0F0F1 718 1.1 mrg .long 0xF4898D60 719 1.1 mrg .long 0xF83E0F84 720 1.1 mrg .long 0xFC0FC0FD 721 1.1 mrg .long 0x4000000 722 1.1 mrg .long 0x82082083 723 1.1 mrg .long 0x84210843 724 1.1 mrg .long 0x864B8A7E 725 1.1 mrg .long 0x88888889 726 1.1 mrg .long 0x8AD8F2FC 727 1.1 mrg .long 0x8D3DCB09 728 1.1 mrg .long 0x8FB823EF 729 1.1 mrg .long 0x92492493 730 1.1 mrg .long 0x94F20950 731 1.1 mrg .long 0x97B425EE 732 1.1 mrg .long 0x9A90E7DA 733 1.1 mrg .long 0x9D89D89E 734 1.1 mrg .long 0xA0A0A0A1 735 1.1 mrg .long 0xA3D70A3E 736 1.1 mrg .long 0xA72F053A 737 1.1 mrg .long 0xAAAAAAAB 738 1.1 mrg .long 0xAE4C415D 739 1.1 mrg .long 0xB21642C9 740 1.1 mrg .long 0xB60B60B7 741 1.1 mrg .long 0xBA2E8BA3 742 1.1 mrg .long 0xBE82FA0C 743 1.1 mrg .long 0xC30C30C4 744 1.1 mrg .long 0xC7CE0C7D 745 1.1 mrg .long 0xCCCCCCCD 746 1.1 mrg .long 0xD20D20D3 747 1.1 mrg .long 0xD79435E6 748 1.1 mrg .long 0xDD67C8A7 749 1.1 mrg .long 0xE38E38E4 750 1.1 mrg .long 0xEA0EA0EB 751 1.1 mrg .long 0xF0F0F0F1 752 1.1 mrg .long 0xF83E0F84 753 1.1 mrg .long 0x8000000 754 1.1 mrg .long 0x84210843 755 1.1 mrg .long 0x88888889 756 1.1 mrg .long 0x8D3DCB09 757 1.1 mrg .long 0x92492493 758 1.1 mrg .long 0x97B425EE 759 1.1 mrg .long 0x9D89D89E 760 1.1 mrg .long 0xA3D70A3E 761 1.1 mrg .long 0xAAAAAAAB 762 1.1 mrg .long 0xB21642C9 763 1.1 mrg .long 0xBA2E8BA3 764 1.1 mrg .long 0xC30C30C4 765 1.1 mrg .long 0xCCCCCCCD 766 1.1 mrg .long 0xD79435E6 767 1.1 mrg .long 0xE38E38E4 768 1.1 mrg .long 0xF0F0F0F1 769 1.1 mrg .long 0x10000000 770 1.1 mrg .long 0x88888889 771 1.1 mrg .long 0x92492493 772 1.1 mrg .long 0x9D89D89E 773 1.1 mrg .long 0xAAAAAAAB 774 1.1 mrg .long 0xBA2E8BA3 775 1.1 mrg .long 0xCCCCCCCD 776 1.1 mrg .long 0xE38E38E4 777 1.1 mrg .long 0x20000000 778 1.1 mrg .long 0x92492493 779 1.1 mrg .long 0xAAAAAAAB 780 1.1 mrg .long 0xCCCCCCCD 781 1.1 mrg .long 0x40000000 782 1.1 mrg .long 0xAAAAAAAB 783 1.1 mrg .long 0x80000000 784 1.1 mrg __muldiv: 785 1.1 mrg neg r4,r2 786 1.1 mrg ld.as r5,[pcl,r4] 787 1.1 mrg abs_s r12,r0 788 1.1 mrg bic.f 0,r2,r4 789 1.1 mrg mpyhu.ne r12,r12,r5 790 1.1 mrg norm r3,r2 791 1.1 mrg xor.f 0,r0,r1 792 1.1 mrg ; write port allocation stall 793 1.1 mrg rsub r3,r3,30 794 1.1 mrg lsr r0,r12,r3 795 1.1 mrg j_s.d [blink] 796 1.1 mrg neg.mi r0,r0 797 1.1 mrg 798 1.1 mrg .balign 4 799 1.1 mrg SYM(__divsi3): 800 1.1 mrg norm r3,r1 801 1.1 mrg abs_s r2,r1 802 1.1 mrg brhs r3,23,__muldiv 803 1.1 mrg norm r4,r0 804 1.1 mrg abs_l r12,r0 805 1.1 mrg brhs r4,r3,.Lonebit 806 1.1 mrg asl_s r2,r2,r3 807 1.1 mrg asl r12,r12,r4 808 1.1 mrg sub lp_count,r3,r4 809 1.1 mrg sub.f r12,r12,r2 810 1.1 mrg brge.d r12,r2,.Lsbit 811 1.1 mrg sub r4,r3,r4 812 1.1 mrg add.lo r12,r12,r2 813 1.1 mrg lp .Ldivend 814 1.1 mrg .Ldivstart:divaw r12,r12,r2 815 1.1 mrg .Ldivend:xor_s r1,r1,r0 816 1.1 mrg sub r0,r4,1 817 1.1 mrg bmsk r0,r12,r0 818 1.1 mrg bset.hs r0,r0,r4 819 1.1 mrg tst_s r1,r1 820 1.1 mrg j_s.d [blink] 821 1.1 mrg neg.mi r0,r0 822 1.1 mrg .Lonebit: 823 1.1 mrg xor_s r1,r1,r0 824 1.1 mrg asr_s r1,r1,31 825 1.1 mrg sub1.f 0,r12,r2 ; special case: -2**(n+1) / 2**n 826 1.1 mrg or r0,r1,1 827 1.1 mrg add.eq r0,r0,r0 828 1.1 mrg cmp_s r12,r2 829 1.1 mrg j_s.d [blink] 830 1.1 mrg mov.lo r0,0 831 1.1 mrg .Lsbit: 832 1.1 mrg ; Need to handle special cases involving negative powers of two: 833 1.1 mrg ; r12,r2 are normalized dividend / divisor; 834 1.1 mrg ; divide anything by 0x80000000, or divide 0x80000000 by 0x40000000 835 1.1 mrg add_s r12,r12,r2 836 1.1 mrg xor_s r1,r1,r0 837 1.1 mrg rsub r4,r4,-1 838 1.1 mrg ror r0,r12,r4 839 1.1 mrg tst_s r2,r2 840 1.1 mrg bmsk r0,r0,r3 841 1.1 mrg add.pl r0,r0,r0 842 1.1 mrg tst_s r1,r1 843 1.1 mrg j_s.d [blink] 844 1.1 mrg neg.mi r0,r0 845 1.1 mrg #else /* !MULDIV */ 846 1.1 mrg /* This version requires that divaw works with a divisor of 0x80000000U */ 847 1.1 mrg abs_s r2,r1 848 1.1 mrg norm r4,r0 849 1.1 mrg neg_s r3,r2 850 1.1 mrg norm r3,r3 851 1.1 mrg abs_s r12,r0 852 1.1 mrg brhs r4,r3,.Lonebit 853 1.1 mrg asl_s r2,r2,r3 854 1.1 mrg asl r12,r12,r4 855 1.1 mrg sub lp_count,r3,r4 856 1.1 mrg cmp_s r12,r2 857 1.1 mrg sub.hs r12,r12,r2 858 1.1 mrg lp .Ldivend 859 1.1 mrg .Ldivstart:divaw r12,r12,r2 860 1.1 mrg .Ldivend:xor_s r1,r1,r0 861 1.1 mrg sub_s r0,r3,1 862 1.1 mrg bmsk r0,r12,r0 863 1.1 mrg bset.hs r0,r0,r3 864 1.1 mrg tst_s r1,r1 865 1.1 mrg j_s.d [blink] 866 1.1 mrg negmi r0,r0 867 1.1 mrg .Lonebit: 868 1.1 mrg xor_s r1,r1,r0 869 1.1 mrg asr_s r1,r1,31 870 1.1 mrg cmp_s r12,r2 871 1.1 mrg mov_s r0,0 872 1.1 mrg j_s.d [blink] 873 1.1 mrg orhs r0,r1,1 874 1.1 mrg #endif /* MULDIV */ 875 1.1 mrg 876 1.1 mrg #endif /* ifndef __ARC700__ */ 877 1.1 mrg ENDFUNC(__divsi3) 878 1.1 mrg 879 1.1 mrg 880 1.1 mrg #endif /* L_divsi3 */ 881 1.1 mrg 882 1.1 mrg #ifdef L_umodsi3 883 1.1 mrg .section .text 884 1.1 mrg .align 4 885 1.1 mrg 886 1.1 mrg .global SYM(__umodsi3) 887 1.1 mrg FUNC(__umodsi3) 888 1.1 mrg SYM(__umodsi3): 889 1.1 mrg mov r7,blink 890 1.1 mrg bl.nd @SYM(__udivmodsi4) 891 1.1 mrg j.d [r7] 892 1.1 mrg mov r0,r1 893 1.1 mrg ENDFUNC(__umodsi3) 894 1.1 mrg #if 0 /* interferes with linux loader */ 895 1.1 mrg .section .__arc_profile_forward, "a" 896 1.1 mrg .long SYM(__umodsi3) 897 1.1 mrg .long SYM(__udivmodsi4) 898 1.1 mrg .long 65536 899 1.1 mrg #endif 900 1.1 mrg 901 1.1 mrg #endif /* L_umodsi3 */ 902 1.1 mrg 903 1.1 mrg #ifdef L_modsi3 904 1.1 mrg .section .text 905 1.1 mrg .align 4 906 1.1 mrg 907 1.1 mrg .global SYM (__modsi3) 908 1.1 mrg FUNC(__modsi3) 909 1.1 mrg SYM(__modsi3): 910 1.1 mrg #ifndef __ARC700__ 911 1.1 mrg /* A5 / ARC60? */ 912 1.1 mrg mov_s r12,blink 913 1.1 mrg mov_s r6,r0 914 1.1 mrg abs_s r0,r0 915 1.1 mrg bl.d @SYM(__udivmodsi4) 916 1.1 mrg abs_s r1,r1 917 1.1 mrg tst r6,r6 918 1.1 mrg neg_s r0,r1 919 1.1 mrg j_s.d [r12] 920 1.1 mrg mov.pl r0,r1 921 1.1 mrg #else /* __ARC700__ */ 922 1.1 mrg abs_s r2,r1 923 1.1 mrg norm.f r4,r0 924 1.1 mrg neg r5,r2 925 1.1 mrg norm r3,r5 926 1.1 mrg abs_l r12,r0 927 1.1 mrg brhs r4,r3,.Lonebit 928 1.1 mrg asl_s r2,r2,r3 929 1.1 mrg asl r12,r12,r4 930 1.1 mrg sub lp_count,r3,r4 931 1.1 mrg cmp_s r12,r2 932 1.1 mrg sub.hs r12,r12,r2 933 1.1 mrg tst_s r0,r0 934 1.1 mrg lp .Ldivend 935 1.1 mrg .Ldivstart:divaw r12,r12,r2 936 1.1 mrg .Ldivend: 937 1.1 mrg lsr r0,r12,r3 938 1.1 mrg j_s.d [blink] 939 1.1 mrg neg.mi r0,r0 940 1.1 mrg .balign 4 941 1.1 mrg .Lonebit:neg.pl r5,r5 942 1.1 mrg cmp_s r12,r2 943 1.1 mrg j_s.d [blink] 944 1.1 mrg sub.hs r0,r0,r5 945 1.1 mrg #endif /* __ARC700__ */ 946 1.1 mrg ENDFUNC(__modsi3) 947 1.1 mrg 948 1.1 mrg #endif /* L_modsi3 */ 949 1.1 mrg 950 1.1 mrg #ifdef L_clzsi2 951 1.1 mrg .section .text 952 1.1 mrg .align 4 953 1.1 mrg .global SYM (__clzsi2) 954 1.1 mrg SYM(__clzsi2): 955 1.1 mrg #ifdef __ARC_NORM__ 956 1.1 mrg HIDDEN_FUNC(__clzsi2) 957 1.1 mrg norm.f r0,r0 958 1.1 mrg mov.n r0,0 959 1.1 mrg j_s.d [blink] 960 1.1 mrg add.pl r0,r0,1 961 1.1 mrg ENDFUNC(__clzsi2) 962 1.1 mrg #elif defined (__ARC601__) 963 1.1 mrg FUNC(__clzsi2) 964 1.1 mrg mov lp_count,10 965 1.1 mrg mov_l r1,0 966 1.1 mrg bset r2,r1,29 967 1.1 mrg lp .Loop_end 968 1.1 mrg brhs r0,r2,.Loop_end 969 1.1 mrg add3 r0,r1,r0 970 1.1 mrg .Loop_end: 971 1.1 mrg asl.f 0,r0 972 1.1 mrg sub2 r0,lp_count,lp_count 973 1.1 mrg sub.cs.f r0,r0,1 974 1.1 mrg add r0,r0,31 975 1.1 mrg j_s.d [blink] 976 1.1 mrg add.pl r0,r0,1 977 1.1 mrg ENDFUNC(__clzsi2) 978 1.1 mrg #else 979 1.1 mrg FUNC(__clzsi2) 980 1.1 mrg asl.f 0,r0,2 981 1.1 mrg mov r1,-1 982 1.1 mrg .Lcheck: 983 1.1 mrg bbit1.d r0,31,.Ldone 984 1.1 mrg asl.pl r0,r0,3 985 1.1 mrg bcs.d .Ldone_1 986 1.1 mrg add_s r1,r1,3 987 1.1 mrg bpnz.d .Lcheck 988 1.1 mrg asl.f 0,r0,2 989 1.1 mrg mov_s r0,32 990 1.1 mrg j_s.d [blink] 991 1.1 mrg mov.ne r0,r1 992 1.1 mrg .Ldone: 993 1.1 mrg j_s.d [blink] 994 1.1 mrg add_s r0,r1,1 995 1.1 mrg .Ldone_1: 996 1.1 mrg j_s.d [blink] 997 1.1 mrg sub_s r0,r1,1 998 1.1 mrg ENDFUNC(__clzsi2) 999 1.1 mrg #endif 1000 1.1 mrg #endif /* L_clzsi2 */ 1001 1.1 mrg .section .text 1002 1.1 mrg 1003 1.1 mrg 1004 1.1 mrg ;;; MILLICODE THUNK LIB ;*************** 1005 1.1 mrg 1006 1.1 mrg ;;; .macro push_regs from, to, offset 1007 1.1 mrg ;;; st_s "\from", [sp, \offset] 1008 1.1 mrg ;;; .if \to-\from 1009 1.1 mrg ;;; push_regs "(\from+1)", \to, "(\offset+4)" 1010 1.1 mrg ;;; .endif 1011 1.1 mrg ;;; .endm 1012 1.1 mrg ;;; push_regs 13, 18, 0 1013 1.1 mrg ;;; 1014 1.1 mrg 1015 1.1 mrg ;;;; .macro sum from, to, three 1016 1.1 mrg ;;;; .long \from 1017 1.1 mrg ;;;; .long \three 1018 1.1 mrg ;;;; .local regno 1019 1.1 mrg ;;;; .set regno, \from+1 1020 1.1 mrg ;;;; .set shift, 32 1021 1.1 mrg ;;;; .set shift, shift - 1 1022 1.1 mrg ;;;; # st_s %shift @3 lsl #shift 1023 1.1 mrg ;;;; .if \to-\from 1024 1.1 mrg ;;;; sum "(\from+1)", \to, "(\three)" 1025 1.1 mrg ;;;; .endif 1026 1.1 mrg ;;;; .endm 1027 1.1 mrg ;;;; 1028 1.1 mrg ;;;; SUM 0,5, 9 1029 1.1 mrg ;;;; 1030 1.1 mrg ; .altmacro 1031 1.1 mrg ;; .macro push_regs from=0, to=3, offset 1032 1.1 mrg ;; st_s r\from, [sp, \offset] 1033 1.1 mrg ;; .if \to-\from 1034 1.1 mrg ;; push_regs "\from+1 ",\to,"(\offset+4)" 1035 1.1 mrg ;; .endif 1036 1.1 mrg ;; .endm 1037 1.1 mrg ;; 1038 1.1 mrg ;; .macro expand_to_push from=13, to 1039 1.1 mrg ;; ; .section .text 1040 1.1 mrg ;; ; .align 4 1041 1.1 mrg ;; ; .global st_ 1042 1.1 mrg ;; ; .type foo, 1043 1.1 mrg ;; st_13_to_25: 1044 1.1 mrg ;; ; push_regs \from, \to, 0 1045 1.1 mrg ;; push_regs 0,3 ; 1046 1.1 mrg ;; .endm 1047 1.1 mrg ;; 1048 1.1 mrg ;; expand_to_push 13,18 1049 1.1 mrg ;; 1050 1.1 mrg ;#endif 1051 1.1 mrg 1052 1.1 mrg #ifdef L_millicodethunk_st 1053 1.1 mrg .section .text 1054 1.1 mrg .align 4 1055 1.1 mrg .global SYM(__st_r13_to_r15) 1056 1.1 mrg .global SYM(__st_r13_to_r16) 1057 1.1 mrg .global SYM(__st_r13_to_r17) 1058 1.1 mrg .global SYM(__st_r13_to_r18) 1059 1.1 mrg .global SYM(__st_r13_to_r19) 1060 1.1 mrg .global SYM(__st_r13_to_r20) 1061 1.1 mrg .global SYM(__st_r13_to_r21) 1062 1.1 mrg .global SYM(__st_r13_to_r22) 1063 1.1 mrg .global SYM(__st_r13_to_r23) 1064 1.1 mrg .global SYM(__st_r13_to_r24) 1065 1.1 mrg .global SYM(__st_r13_to_r25) 1066 1.1 mrg HIDDEN_FUNC(__st_r13_to_r15) 1067 1.1 mrg HIDDEN_FUNC(__st_r13_to_r16) 1068 1.1 mrg HIDDEN_FUNC(__st_r13_to_r17) 1069 1.1 mrg HIDDEN_FUNC(__st_r13_to_r18) 1070 1.1 mrg HIDDEN_FUNC(__st_r13_to_r19) 1071 1.1 mrg HIDDEN_FUNC(__st_r13_to_r20) 1072 1.1 mrg HIDDEN_FUNC(__st_r13_to_r21) 1073 1.1 mrg HIDDEN_FUNC(__st_r13_to_r22) 1074 1.1 mrg HIDDEN_FUNC(__st_r13_to_r23) 1075 1.1 mrg HIDDEN_FUNC(__st_r13_to_r24) 1076 1.1 mrg HIDDEN_FUNC(__st_r13_to_r25) 1077 1.1 mrg .align 4 1078 1.1 mrg SYM(__st_r13_to_r25): 1079 1.1 mrg st r25, [sp,48] 1080 1.1 mrg SYM(__st_r13_to_r24): 1081 1.1 mrg st r24, [sp,44] 1082 1.1 mrg SYM(__st_r13_to_r23): 1083 1.1 mrg st r23, [sp,40] 1084 1.1 mrg SYM(__st_r13_to_r22): 1085 1.1 mrg st r22, [sp,36] 1086 1.1 mrg SYM(__st_r13_to_r21): 1087 1.1 mrg st r21, [sp,32] 1088 1.1 mrg SYM(__st_r13_to_r20): 1089 1.1 mrg st r20, [sp,28] 1090 1.1 mrg SYM(__st_r13_to_r19): 1091 1.1 mrg st r19, [sp,24] 1092 1.1 mrg SYM(__st_r13_to_r18): 1093 1.1 mrg st r18, [sp,20] 1094 1.1 mrg SYM(__st_r13_to_r17): 1095 1.1 mrg st r17, [sp,16] 1096 1.1 mrg SYM(__st_r13_to_r16): 1097 1.1 mrg st r16, [sp,12] 1098 1.1 mrg SYM(__st_r13_to_r15): 1099 1.1 mrg #ifdef __ARC700__ 1100 1.1 mrg st r15, [sp,8] ; minimum function size to avoid stall: 6 bytes. 1101 1.1 mrg #else 1102 1.1 mrg st_s r15, [sp,8] 1103 1.1 mrg #endif 1104 1.1 mrg st_s r14, [sp,4] 1105 1.1 mrg j_s.d [%blink] 1106 1.1 mrg st_s r13, [sp,0] 1107 1.1 mrg ENDFUNC(__st_r13_to_r15) 1108 1.1 mrg ENDFUNC(__st_r13_to_r16) 1109 1.1 mrg ENDFUNC(__st_r13_to_r17) 1110 1.1 mrg ENDFUNC(__st_r13_to_r18) 1111 1.1 mrg ENDFUNC(__st_r13_to_r19) 1112 1.1 mrg ENDFUNC(__st_r13_to_r20) 1113 1.1 mrg ENDFUNC(__st_r13_to_r21) 1114 1.1 mrg ENDFUNC(__st_r13_to_r22) 1115 1.1 mrg ENDFUNC(__st_r13_to_r23) 1116 1.1 mrg ENDFUNC(__st_r13_to_r24) 1117 1.1 mrg ENDFUNC(__st_r13_to_r25) 1118 1.1 mrg #endif /* L_millicodethunk_st */ 1119 1.1 mrg 1120 1.1 mrg 1121 1.1 mrg #ifdef L_millicodethunk_ld 1122 1.1 mrg .section .text 1123 1.1 mrg .align 4 1124 1.1 mrg ; ================================== 1125 1.1 mrg ; the loads 1126 1.1 mrg 1127 1.1 mrg .global SYM(__ld_r13_to_r15) 1128 1.1 mrg .global SYM(__ld_r13_to_r16) 1129 1.1 mrg .global SYM(__ld_r13_to_r17) 1130 1.1 mrg .global SYM(__ld_r13_to_r18) 1131 1.1 mrg .global SYM(__ld_r13_to_r19) 1132 1.1 mrg .global SYM(__ld_r13_to_r20) 1133 1.1 mrg .global SYM(__ld_r13_to_r21) 1134 1.1 mrg .global SYM(__ld_r13_to_r22) 1135 1.1 mrg .global SYM(__ld_r13_to_r23) 1136 1.1 mrg .global SYM(__ld_r13_to_r24) 1137 1.1 mrg .global SYM(__ld_r13_to_r25) 1138 1.1 mrg HIDDEN_FUNC(__ld_r13_to_r15) 1139 1.1 mrg HIDDEN_FUNC(__ld_r13_to_r16) 1140 1.1 mrg HIDDEN_FUNC(__ld_r13_to_r17) 1141 1.1 mrg HIDDEN_FUNC(__ld_r13_to_r18) 1142 1.1 mrg HIDDEN_FUNC(__ld_r13_to_r19) 1143 1.1 mrg HIDDEN_FUNC(__ld_r13_to_r20) 1144 1.1 mrg HIDDEN_FUNC(__ld_r13_to_r21) 1145 1.1 mrg HIDDEN_FUNC(__ld_r13_to_r22) 1146 1.1 mrg HIDDEN_FUNC(__ld_r13_to_r23) 1147 1.1 mrg HIDDEN_FUNC(__ld_r13_to_r24) 1148 1.1 mrg HIDDEN_FUNC(__ld_r13_to_r25) 1149 1.1 mrg SYM(__ld_r13_to_r25): 1150 1.1 mrg ld r25, [sp,48] 1151 1.1 mrg SYM(__ld_r13_to_r24): 1152 1.1 mrg ld r24, [sp,44] 1153 1.1 mrg SYM(__ld_r13_to_r23): 1154 1.1 mrg ld r23, [sp,40] 1155 1.1 mrg SYM(__ld_r13_to_r22): 1156 1.1 mrg ld r22, [sp,36] 1157 1.1 mrg SYM(__ld_r13_to_r21): 1158 1.1 mrg ld r21, [sp,32] 1159 1.1 mrg SYM(__ld_r13_to_r20): 1160 1.1 mrg ld r20, [sp,28] 1161 1.1 mrg SYM(__ld_r13_to_r19): 1162 1.1 mrg ld r19, [sp,24] 1163 1.1 mrg SYM(__ld_r13_to_r18): 1164 1.1 mrg ld r18, [sp,20] 1165 1.1 mrg SYM(__ld_r13_to_r17): 1166 1.1 mrg ld r17, [sp,16] 1167 1.1 mrg SYM(__ld_r13_to_r16): 1168 1.1 mrg ld r16, [sp,12] 1169 1.1 mrg SYM(__ld_r13_to_r15): 1170 1.1 mrg #ifdef __ARC700__ 1171 1.1 mrg ld r15, [sp,8] ; minimum function size to avoid stall: 6 bytes. 1172 1.1 mrg #else 1173 1.1 mrg ld_s r15, [sp,8] 1174 1.1 mrg #endif 1175 1.1 mrg ld_s r14, [sp,4] 1176 1.1 mrg j_s.d [%blink] 1177 1.1 mrg ld_s r13, [sp,0] 1178 1.1 mrg ENDFUNC(__ld_r13_to_r15) 1179 1.1 mrg ENDFUNC(__ld_r13_to_r16) 1180 1.1 mrg ENDFUNC(__ld_r13_to_r17) 1181 1.1 mrg ENDFUNC(__ld_r13_to_r18) 1182 1.1 mrg ENDFUNC(__ld_r13_to_r19) 1183 1.1 mrg ENDFUNC(__ld_r13_to_r20) 1184 1.1 mrg ENDFUNC(__ld_r13_to_r21) 1185 1.1 mrg ENDFUNC(__ld_r13_to_r22) 1186 1.1 mrg ENDFUNC(__ld_r13_to_r23) 1187 1.1 mrg ENDFUNC(__ld_r13_to_r24) 1188 1.1 mrg ENDFUNC(__ld_r13_to_r25) 1189 1.1 mrg 1190 1.1 mrg #endif /* L_millicodethunk_ld */ 1191 1.1 mrg #ifdef L_millicodethunk_ret 1192 1.1 mrg .global SYM(__ld_r13_to_r14_ret) 1193 1.1 mrg .global SYM(__ld_r13_to_r15_ret) 1194 1.1 mrg .global SYM(__ld_r13_to_r16_ret) 1195 1.1 mrg .global SYM(__ld_r13_to_r17_ret) 1196 1.1 mrg .global SYM(__ld_r13_to_r18_ret) 1197 1.1 mrg .global SYM(__ld_r13_to_r19_ret) 1198 1.1 mrg .global SYM(__ld_r13_to_r20_ret) 1199 1.1 mrg .global SYM(__ld_r13_to_r21_ret) 1200 1.1 mrg .global SYM(__ld_r13_to_r22_ret) 1201 1.1 mrg .global SYM(__ld_r13_to_r23_ret) 1202 1.1 mrg .global SYM(__ld_r13_to_r24_ret) 1203 1.1 mrg .global SYM(__ld_r13_to_r25_ret) 1204 1.1 mrg HIDDEN_FUNC(__ld_r13_to_r14_ret) 1205 1.1 mrg HIDDEN_FUNC(__ld_r13_to_r15_ret) 1206 1.1 mrg HIDDEN_FUNC(__ld_r13_to_r16_ret) 1207 1.1 mrg HIDDEN_FUNC(__ld_r13_to_r17_ret) 1208 1.1 mrg HIDDEN_FUNC(__ld_r13_to_r18_ret) 1209 1.1 mrg HIDDEN_FUNC(__ld_r13_to_r19_ret) 1210 1.1 mrg HIDDEN_FUNC(__ld_r13_to_r20_ret) 1211 1.1 mrg HIDDEN_FUNC(__ld_r13_to_r21_ret) 1212 1.1 mrg HIDDEN_FUNC(__ld_r13_to_r22_ret) 1213 1.1 mrg HIDDEN_FUNC(__ld_r13_to_r23_ret) 1214 1.1 mrg HIDDEN_FUNC(__ld_r13_to_r24_ret) 1215 1.1 mrg HIDDEN_FUNC(__ld_r13_to_r25_ret) 1216 1.1 mrg .section .text 1217 1.1 mrg .align 4 1218 1.1 mrg SYM(__ld_r13_to_r25_ret): 1219 1.1 mrg ld r25, [sp,48] 1220 1.1 mrg SYM(__ld_r13_to_r24_ret): 1221 1.1 mrg ld r24, [sp,44] 1222 1.1 mrg SYM(__ld_r13_to_r23_ret): 1223 1.1 mrg ld r23, [sp,40] 1224 1.1 mrg SYM(__ld_r13_to_r22_ret): 1225 1.1 mrg ld r22, [sp,36] 1226 1.1 mrg SYM(__ld_r13_to_r21_ret): 1227 1.1 mrg ld r21, [sp,32] 1228 1.1 mrg SYM(__ld_r13_to_r20_ret): 1229 1.1 mrg ld r20, [sp,28] 1230 1.1 mrg SYM(__ld_r13_to_r19_ret): 1231 1.1 mrg ld r19, [sp,24] 1232 1.1 mrg SYM(__ld_r13_to_r18_ret): 1233 1.1 mrg ld r18, [sp,20] 1234 1.1 mrg SYM(__ld_r13_to_r17_ret): 1235 1.1 mrg ld r17, [sp,16] 1236 1.1 mrg SYM(__ld_r13_to_r16_ret): 1237 1.1 mrg ld r16, [sp,12] 1238 1.1 mrg SYM(__ld_r13_to_r15_ret): 1239 1.1 mrg ld r15, [sp,8] 1240 1.1 mrg SYM(__ld_r13_to_r14_ret): 1241 1.1 mrg ld blink,[sp,r12] 1242 1.1 mrg ld_s r14, [sp,4] 1243 1.1 mrg ld.ab r13, [sp,r12] 1244 1.1 mrg j_s.d [%blink] 1245 1.1 mrg add_s sp,sp,4 1246 1.1 mrg ENDFUNC(__ld_r13_to_r14_ret) 1247 1.1 mrg ENDFUNC(__ld_r13_to_r15_ret) 1248 1.1 mrg ENDFUNC(__ld_r13_to_r16_ret) 1249 1.1 mrg ENDFUNC(__ld_r13_to_r17_ret) 1250 1.1 mrg ENDFUNC(__ld_r13_to_r18_ret) 1251 1.1 mrg ENDFUNC(__ld_r13_to_r19_ret) 1252 1.1 mrg ENDFUNC(__ld_r13_to_r20_ret) 1253 1.1 mrg ENDFUNC(__ld_r13_to_r21_ret) 1254 1.1 mrg ENDFUNC(__ld_r13_to_r22_ret) 1255 1.1 mrg ENDFUNC(__ld_r13_to_r23_ret) 1256 1.1 mrg ENDFUNC(__ld_r13_to_r24_ret) 1257 1.1 mrg ENDFUNC(__ld_r13_to_r25_ret) 1258 1.1 mrg 1259 1.1 mrg #endif /* L_millicodethunk_ret */ 1260 1.1 mrg 1261 1.1 mrg #ifdef L_adddf3 1262 1.1 mrg #ifdef __ARC_NORM__ 1263 1.1 mrg #include "ieee-754/adddf3.S" 1264 1.1 mrg #endif 1265 1.1 mrg #endif 1266 1.1 mrg 1267 1.1 mrg #ifdef L_muldf3 1268 1.1.1.2 mrg #if defined (__ARC700__) || defined (__HS__) 1269 1.1 mrg #include "ieee-754/muldf3.S" 1270 1.1 mrg #elif defined (__ARC_NORM__) && defined(__ARC_MUL64__) 1271 1.1 mrg #include "ieee-754/arc600-mul64/muldf3.S" 1272 1.1 mrg #elif defined (__ARC_NORM__) && defined(__ARC_MUL32BY16__) 1273 1.1 mrg #include "ieee-754/arc600-dsp/muldf3.S" 1274 1.1 mrg #endif 1275 1.1 mrg #endif 1276 1.1 mrg 1277 1.1 mrg #ifdef L_addsf3 1278 1.1 mrg #ifdef __ARC_NORM__ 1279 1.1 mrg #include "ieee-754/addsf3.S" 1280 1.1 mrg #endif 1281 1.1 mrg #endif 1282 1.1 mrg 1283 1.1 mrg #ifdef L_mulsf3 1284 1.1.1.2 mrg #if defined (__ARC700__) || defined (__HS__) 1285 1.1 mrg #include "ieee-754/mulsf3.S" 1286 1.1 mrg #elif defined (__ARC_NORM__) && defined(__ARC_MUL64__) 1287 1.1 mrg #include "ieee-754/arc600-mul64/mulsf3.S" 1288 1.1 mrg #elif defined (__ARC_NORM__) && defined(__ARC_MUL32BY16__) 1289 1.1 mrg #include "ieee-754/arc600-dsp/mulsf3.S" 1290 1.1 mrg #elif defined (__ARC_NORM__) 1291 1.1 mrg #include "ieee-754/arc600/mulsf3.S" 1292 1.1 mrg #endif 1293 1.1 mrg #endif 1294 1.1 mrg 1295 1.1 mrg #ifdef L_divdf3 1296 1.1.1.2 mrg #if defined (__ARC700__) || defined (__HS__) 1297 1.1 mrg #include "ieee-754/divdf3.S" 1298 1.1 mrg #elif defined (__ARC_NORM__) && defined(__ARC_MUL64__) 1299 1.1 mrg #include "ieee-754/arc600-mul64/divdf3.S" 1300 1.1 mrg #elif defined (__ARC_NORM__) && defined(__ARC_MUL32BY16__) 1301 1.1 mrg #include "ieee-754/arc600-dsp/divdf3.S" 1302 1.1 mrg #endif 1303 1.1 mrg #endif 1304 1.1 mrg 1305 1.1 mrg #ifdef L_divsf3 1306 1.1.1.2 mrg #if defined (__ARC700__) || defined (__HS__) 1307 1.1 mrg #include "ieee-754/divsf3-stdmul.S" 1308 1.1 mrg #elif defined (__ARC_NORM__) && defined(__ARC_MUL64__) 1309 1.1 mrg #include "ieee-754/arc600-mul64/divsf3.S" 1310 1.1 mrg #elif defined (__ARC_NORM__) && defined(__ARC_MUL32BY16__) 1311 1.1 mrg #include "ieee-754/arc600-dsp/divsf3.S" 1312 1.1 mrg #elif defined (__ARC_NORM__) 1313 1.1 mrg #include "ieee-754/arc600/divsf3.S" 1314 1.1 mrg #endif 1315 1.1 mrg #endif 1316 1.1 mrg 1317 1.1 mrg #ifdef L_extendsfdf2 1318 1.1 mrg #ifdef __ARC_NORM__ 1319 1.1 mrg #include "ieee-754/extendsfdf2.S" 1320 1.1 mrg #endif 1321 1.1 mrg #endif 1322 1.1 mrg 1323 1.1 mrg #ifdef L_truncdfsf2 1324 1.1 mrg #ifdef __ARC_NORM__ 1325 1.1 mrg #include "ieee-754/truncdfsf2.S" 1326 1.1 mrg #endif 1327 1.1 mrg #endif 1328 1.1 mrg 1329 1.1 mrg #ifdef L_floatsidf 1330 1.1 mrg #ifdef __ARC_NORM__ 1331 1.1 mrg #include "ieee-754/floatsidf.S" 1332 1.1 mrg #endif 1333 1.1 mrg #endif 1334 1.1 mrg 1335 1.1 mrg #ifdef L_floatsisf 1336 1.1 mrg #ifdef __ARC_NORM__ 1337 1.1 mrg #include "ieee-754/floatsisf.S" 1338 1.1 mrg #endif 1339 1.1 mrg #endif 1340 1.1 mrg 1341 1.1 mrg #ifdef L_floatunsidf 1342 1.1 mrg #ifdef __ARC_NORM__ 1343 1.1 mrg #include "ieee-754/floatunsidf.S" 1344 1.1 mrg #endif 1345 1.1 mrg #endif 1346 1.1 mrg 1347 1.1 mrg #ifdef L_fixdfsi 1348 1.1 mrg #ifdef __ARC_NORM__ 1349 1.1 mrg #include "ieee-754/fixdfsi.S" 1350 1.1 mrg #endif 1351 1.1 mrg #endif 1352 1.1 mrg 1353 1.1 mrg #ifdef L_fixsfsi 1354 1.1 mrg #ifdef __ARC_NORM__ 1355 1.1 mrg #include "ieee-754/fixsfsi.S" 1356 1.1 mrg #endif 1357 1.1 mrg #endif 1358 1.1 mrg 1359 1.1 mrg #ifdef L_fixunsdfsi 1360 1.1 mrg #ifdef __ARC_NORM__ 1361 1.1 mrg #include "ieee-754/fixunsdfsi.S" 1362 1.1 mrg #endif 1363 1.1 mrg #endif 1364 1.1 mrg 1365 1.1 mrg #ifdef L_eqdf2 1366 1.1 mrg #ifdef __ARC_NORM__ 1367 1.1 mrg #include "ieee-754/eqdf2.S" 1368 1.1 mrg #endif 1369 1.1 mrg #endif 1370 1.1 mrg 1371 1.1 mrg #ifdef L_eqsf2 1372 1.1 mrg #ifdef __ARC_NORM__ 1373 1.1 mrg #include "ieee-754/eqsf2.S" 1374 1.1 mrg #endif 1375 1.1 mrg #endif 1376 1.1 mrg 1377 1.1 mrg #ifdef L_gtdf2 1378 1.1 mrg #ifdef __ARC_NORM__ 1379 1.1 mrg #include "ieee-754/gtdf2.S" 1380 1.1 mrg #endif 1381 1.1 mrg #endif 1382 1.1 mrg 1383 1.1 mrg #ifdef L_gtsf2 1384 1.1 mrg #ifdef __ARC_NORM__ 1385 1.1 mrg #include "ieee-754/gtsf2.S" 1386 1.1 mrg #endif 1387 1.1 mrg #endif 1388 1.1 mrg 1389 1.1 mrg #ifdef L_gedf2 1390 1.1 mrg #ifdef __ARC_NORM__ 1391 1.1 mrg #include "ieee-754/gedf2.S" 1392 1.1 mrg #endif 1393 1.1 mrg #endif 1394 1.1 mrg 1395 1.1 mrg #ifdef L_gesf2 1396 1.1 mrg #ifdef __ARC_NORM__ 1397 1.1 mrg #include "ieee-754/gesf2.S" 1398 1.1 mrg #endif 1399 1.1 mrg #endif 1400 1.1 mrg 1401 1.1 mrg #ifdef L_uneqdf2 1402 1.1 mrg #ifdef __ARC_NORM__ 1403 1.1 mrg #include "ieee-754/uneqdf2.S" 1404 1.1 mrg #endif 1405 1.1 mrg #endif 1406 1.1 mrg 1407 1.1 mrg #ifdef L_uneqsf2 1408 1.1 mrg #ifdef __ARC_NORM__ 1409 1.1 mrg #include "ieee-754/uneqsf2.S" 1410 1.1 mrg #endif 1411 1.1 mrg #endif 1412 1.1 mrg 1413 1.1 mrg #ifdef L_orddf2 1414 1.1 mrg #ifdef __ARC_NORM__ 1415 1.1 mrg #include "ieee-754/orddf2.S" 1416 1.1 mrg #endif 1417 1.1 mrg #endif 1418 1.1 mrg 1419 1.1 mrg #ifdef L_ordsf2 1420 1.1 mrg #ifdef __ARC_NORM__ 1421 1.1 mrg #include "ieee-754/ordsf2.S" 1422 1.1 mrg #endif 1423 1.1 mrg #endif 1424
Indexes created Sun Mar 01 05:31:48 UTC 2026