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      1  1.1.1.5  mrg ;   Copyright (C) 2017-2024 Free Software Foundation, Inc.
      2      1.1  mrg ;   Contributed by Sebastian Perta.
      3      1.1  mrg ;
      4      1.1  mrg ; This file is free software; you can redistribute it and/or modify it
      5      1.1  mrg ; under the terms of the GNU General Public License as published by the
      6      1.1  mrg ; Free Software Foundation; either version 3, or (at your option) any
      7      1.1  mrg ; later version.
      8      1.1  mrg ;
      9      1.1  mrg ; This file is distributed in the hope that it will be useful, but
     10      1.1  mrg ; WITHOUT ANY WARRANTY; without even the implied warranty of
     11      1.1  mrg ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
     12      1.1  mrg ; General Public License for more details.
     13      1.1  mrg ;
     14      1.1  mrg ; Under Section 7 of GPL version 3, you are granted additional
     15      1.1  mrg ; permissions described in the GCC Runtime Library Exception, version
     16      1.1  mrg ; 3.1, as published by the Free Software Foundation.
     17      1.1  mrg ;
     18      1.1  mrg ; You should have received a copy of the GNU General Public License and
     19      1.1  mrg ; a copy of the GCC Runtime Library Exception along with this program;
     20      1.1  mrg ; see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
     21      1.1  mrg ; <http://www.gnu.org/licenses/>.
     22      1.1  mrg 
     23      1.1  mrg 
     24      1.1  mrg #include "vregs.h"
     25      1.1  mrg 
     26      1.1  mrg     .text
     27      1.1  mrg 
     28      1.1  mrg START_FUNC ___adddi3
     29      1.1  mrg 
     30      1.1  mrg     movw  hl, sp       ; use HL-based addressing (allows for direct addw)
     31      1.1  mrg 
     32      1.1  mrg     movw  ax, [hl+4]
     33      1.1  mrg     addw  ax, [hl+12]
     34      1.1  mrg     movw  r8, ax
     35      1.1  mrg 
     36      1.1  mrg     mov   a, [hl+6]    ; middle bytes of the result are determined using 8-bit
     37      1.1  mrg     addc  a, [hl+14]   ; ADDC insns which both account for and update the carry bit
     38      1.1  mrg     mov   r10, a       ; (no ADDWC instruction is available)
     39      1.1  mrg     mov   a, [hl+7]
     40      1.1  mrg     addc  a, [hl+15]
     41      1.1  mrg     mov   r11, a
     42      1.1  mrg 
     43      1.1  mrg     mov   a, [hl+8]
     44      1.1  mrg     addc  a, [hl+16]
     45      1.1  mrg     mov   r12, a
     46      1.1  mrg     mov   a, [hl+9]
     47      1.1  mrg     addc  a, [hl+17]
     48      1.1  mrg     mov   r13, a
     49      1.1  mrg 
     50      1.1  mrg     movw  ax, [hl+10]
     51      1.1  mrg     sknc               ; account for the possible carry from the
     52      1.1  mrg     incw  ax           ; latest 8-bit operation
     53      1.1  mrg     addw  ax, [hl+18]
     54      1.1  mrg     movw  r14, ax
     55      1.1  mrg 
     56      1.1  mrg     ret
     57      1.1  mrg 
     58      1.1  mrg END_FUNC ___adddi3
     59