elf32-rl78.c revision 1.1.1.2
1 /* Renesas RL78 specific support for 32-bit ELF. 2 Copyright (C) 2011-2015 Free Software Foundation, Inc. 3 4 This file is part of BFD, the Binary File Descriptor library. 5 6 This program is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3 of the License, or 9 (at your option) any later version. 10 11 This program is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with this program; if not, write to the Free Software 18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ 19 20 #include "sysdep.h" 21 #include "bfd.h" 22 #include "bfd_stdint.h" 23 #include "libbfd.h" 24 #include "elf-bfd.h" 25 #include "elf/rl78.h" 26 #include "libiberty.h" 27 28 #define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000) 29 30 #define RL78REL(n,sz,bit,shift,complain,pcrel) \ 31 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \ 32 bfd_elf_generic_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE) 33 34 /* Note that the relocations around 0x7f are internal to this file; 35 feel free to move them as needed to avoid conflicts with published 36 relocation numbers. */ 37 38 static reloc_howto_type rl78_elf_howto_table [] = 39 { 40 RL78REL (NONE, 0, 0, 0, dont, FALSE), 41 RL78REL (DIR32, 2, 32, 0, signed, FALSE), 42 RL78REL (DIR24S, 2, 24, 0, signed, FALSE), 43 RL78REL (DIR16, 1, 16, 0, dont, FALSE), 44 RL78REL (DIR16U, 1, 16, 0, unsigned, FALSE), 45 RL78REL (DIR16S, 1, 16, 0, signed, FALSE), 46 RL78REL (DIR8, 0, 8, 0, dont, FALSE), 47 RL78REL (DIR8U, 0, 8, 0, unsigned, FALSE), 48 RL78REL (DIR8S, 0, 8, 0, signed, FALSE), 49 RL78REL (DIR24S_PCREL, 2, 24, 0, signed, TRUE), 50 RL78REL (DIR16S_PCREL, 1, 16, 0, signed, TRUE), 51 RL78REL (DIR8S_PCREL, 0, 8, 0, signed, TRUE), 52 RL78REL (DIR16UL, 1, 16, 2, unsigned, FALSE), 53 RL78REL (DIR16UW, 1, 16, 1, unsigned, FALSE), 54 RL78REL (DIR8UL, 0, 8, 2, unsigned, FALSE), 55 RL78REL (DIR8UW, 0, 8, 1, unsigned, FALSE), 56 RL78REL (DIR32_REV, 1, 16, 0, dont, FALSE), 57 RL78REL (DIR16_REV, 1, 16, 0, dont, FALSE), 58 RL78REL (DIR3U_PCREL, 0, 3, 0, dont, TRUE), 59 60 EMPTY_HOWTO (0x13), 61 EMPTY_HOWTO (0x14), 62 EMPTY_HOWTO (0x15), 63 EMPTY_HOWTO (0x16), 64 EMPTY_HOWTO (0x17), 65 EMPTY_HOWTO (0x18), 66 EMPTY_HOWTO (0x19), 67 EMPTY_HOWTO (0x1a), 68 EMPTY_HOWTO (0x1b), 69 EMPTY_HOWTO (0x1c), 70 EMPTY_HOWTO (0x1d), 71 EMPTY_HOWTO (0x1e), 72 EMPTY_HOWTO (0x1f), 73 74 EMPTY_HOWTO (0x20), 75 EMPTY_HOWTO (0x21), 76 EMPTY_HOWTO (0x22), 77 EMPTY_HOWTO (0x23), 78 EMPTY_HOWTO (0x24), 79 EMPTY_HOWTO (0x25), 80 EMPTY_HOWTO (0x26), 81 EMPTY_HOWTO (0x27), 82 EMPTY_HOWTO (0x28), 83 EMPTY_HOWTO (0x29), 84 EMPTY_HOWTO (0x2a), 85 EMPTY_HOWTO (0x2b), 86 EMPTY_HOWTO (0x2c), 87 RL78REL (RH_RELAX, 0, 0, 0, dont, FALSE), 88 89 EMPTY_HOWTO (0x2e), 90 EMPTY_HOWTO (0x2f), 91 EMPTY_HOWTO (0x30), 92 EMPTY_HOWTO (0x31), 93 EMPTY_HOWTO (0x32), 94 EMPTY_HOWTO (0x33), 95 EMPTY_HOWTO (0x34), 96 EMPTY_HOWTO (0x35), 97 EMPTY_HOWTO (0x36), 98 EMPTY_HOWTO (0x37), 99 EMPTY_HOWTO (0x38), 100 EMPTY_HOWTO (0x39), 101 EMPTY_HOWTO (0x3a), 102 EMPTY_HOWTO (0x3b), 103 EMPTY_HOWTO (0x3c), 104 EMPTY_HOWTO (0x3d), 105 EMPTY_HOWTO (0x3e), 106 EMPTY_HOWTO (0x3f), 107 EMPTY_HOWTO (0x40), 108 109 RL78REL (ABS32, 2, 32, 0, dont, FALSE), 110 RL78REL (ABS24S, 2, 24, 0, signed, FALSE), 111 RL78REL (ABS16, 1, 16, 0, dont, FALSE), 112 RL78REL (ABS16U, 1, 16, 0, unsigned, FALSE), 113 RL78REL (ABS16S, 1, 16, 0, signed, FALSE), 114 RL78REL (ABS8, 0, 8, 0, dont, FALSE), 115 RL78REL (ABS8U, 0, 8, 0, unsigned, FALSE), 116 RL78REL (ABS8S, 0, 8, 0, signed, FALSE), 117 RL78REL (ABS24S_PCREL, 2, 24, 0, signed, TRUE), 118 RL78REL (ABS16S_PCREL, 1, 16, 0, signed, TRUE), 119 RL78REL (ABS8S_PCREL, 0, 8, 0, signed, TRUE), 120 RL78REL (ABS16UL, 1, 16, 0, unsigned, FALSE), 121 RL78REL (ABS16UW, 1, 16, 0, unsigned, FALSE), 122 RL78REL (ABS8UL, 0, 8, 0, unsigned, FALSE), 123 RL78REL (ABS8UW, 0, 8, 0, unsigned, FALSE), 124 RL78REL (ABS32_REV, 2, 32, 0, dont, FALSE), 125 RL78REL (ABS16_REV, 1, 16, 0, dont, FALSE), 126 127 #define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32) 128 129 EMPTY_HOWTO (0x52), 130 EMPTY_HOWTO (0x53), 131 EMPTY_HOWTO (0x54), 132 EMPTY_HOWTO (0x55), 133 EMPTY_HOWTO (0x56), 134 EMPTY_HOWTO (0x57), 135 EMPTY_HOWTO (0x58), 136 EMPTY_HOWTO (0x59), 137 EMPTY_HOWTO (0x5a), 138 EMPTY_HOWTO (0x5b), 139 EMPTY_HOWTO (0x5c), 140 EMPTY_HOWTO (0x5d), 141 EMPTY_HOWTO (0x5e), 142 EMPTY_HOWTO (0x5f), 143 EMPTY_HOWTO (0x60), 144 EMPTY_HOWTO (0x61), 145 EMPTY_HOWTO (0x62), 146 EMPTY_HOWTO (0x63), 147 EMPTY_HOWTO (0x64), 148 EMPTY_HOWTO (0x65), 149 EMPTY_HOWTO (0x66), 150 EMPTY_HOWTO (0x67), 151 EMPTY_HOWTO (0x68), 152 EMPTY_HOWTO (0x69), 153 EMPTY_HOWTO (0x6a), 154 EMPTY_HOWTO (0x6b), 155 EMPTY_HOWTO (0x6c), 156 EMPTY_HOWTO (0x6d), 157 EMPTY_HOWTO (0x6e), 158 EMPTY_HOWTO (0x6f), 159 EMPTY_HOWTO (0x70), 160 EMPTY_HOWTO (0x71), 161 EMPTY_HOWTO (0x72), 162 EMPTY_HOWTO (0x73), 163 EMPTY_HOWTO (0x74), 164 EMPTY_HOWTO (0x75), 165 EMPTY_HOWTO (0x76), 166 EMPTY_HOWTO (0x77), 167 168 EMPTY_HOWTO (0x78), 169 EMPTY_HOWTO (0x79), 170 EMPTY_HOWTO (0x7a), 171 EMPTY_HOWTO (0x7b), 172 EMPTY_HOWTO (0x7c), 173 EMPTY_HOWTO (0x7d), 174 EMPTY_HOWTO (0x7e), 175 EMPTY_HOWTO (0x7f), 176 177 RL78REL (SYM, 2, 32, 0, dont, FALSE), 178 RL78REL (OPneg, 2, 32, 0, dont, FALSE), 179 RL78REL (OPadd, 2, 32, 0, dont, FALSE), 180 RL78REL (OPsub, 2, 32, 0, dont, FALSE), 181 RL78REL (OPmul, 2, 32, 0, dont, FALSE), 182 RL78REL (OPdiv, 2, 32, 0, dont, FALSE), 183 RL78REL (OPshla, 2, 32, 0, dont, FALSE), 184 RL78REL (OPshra, 2, 32, 0, dont, FALSE), 185 RL78REL (OPsctsize, 2, 32, 0, dont, FALSE), 186 EMPTY_HOWTO (0x89), 187 EMPTY_HOWTO (0x8a), 188 EMPTY_HOWTO (0x8b), 189 EMPTY_HOWTO (0x8c), 190 RL78REL (OPscttop, 2, 32, 0, dont, FALSE), 191 EMPTY_HOWTO (0x8e), 192 EMPTY_HOWTO (0x8f), 193 RL78REL (OPand, 2, 32, 0, dont, FALSE), 194 RL78REL (OPor, 2, 32, 0, dont, FALSE), 195 RL78REL (OPxor, 2, 32, 0, dont, FALSE), 196 RL78REL (OPnot, 2, 32, 0, dont, FALSE), 197 RL78REL (OPmod, 2, 32, 0, dont, FALSE), 198 RL78REL (OPromtop, 2, 32, 0, dont, FALSE), 199 RL78REL (OPramtop, 2, 32, 0, dont, FALSE) 200 }; 201 202 /* Map BFD reloc types to RL78 ELF reloc types. */ 204 205 struct rl78_reloc_map 206 { 207 bfd_reloc_code_real_type bfd_reloc_val; 208 unsigned int rl78_reloc_val; 209 }; 210 211 static const struct rl78_reloc_map rl78_reloc_map [] = 212 { 213 { BFD_RELOC_NONE, R_RL78_NONE }, 214 { BFD_RELOC_8, R_RL78_DIR8S }, 215 { BFD_RELOC_16, R_RL78_DIR16S }, 216 { BFD_RELOC_24, R_RL78_DIR24S }, 217 { BFD_RELOC_32, R_RL78_DIR32 }, 218 { BFD_RELOC_RL78_16_OP, R_RL78_DIR16 }, 219 { BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL }, 220 { BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL }, 221 { BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL }, 222 { BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL }, 223 { BFD_RELOC_RL78_8U, R_RL78_DIR8U }, 224 { BFD_RELOC_RL78_16U, R_RL78_DIR16U }, 225 { BFD_RELOC_RL78_SYM, R_RL78_SYM }, 226 { BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub }, 227 { BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg }, 228 { BFD_RELOC_RL78_OP_AND, R_RL78_OPand }, 229 { BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra }, 230 { BFD_RELOC_RL78_ABS8, R_RL78_ABS8 }, 231 { BFD_RELOC_RL78_ABS16, R_RL78_ABS16 }, 232 { BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV }, 233 { BFD_RELOC_RL78_ABS32, R_RL78_ABS32 }, 234 { BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV }, 235 { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL }, 236 { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW }, 237 { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U }, 238 { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX } 239 }; 240 241 static reloc_howto_type * 242 rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, 243 bfd_reloc_code_real_type code) 244 { 245 unsigned int i; 246 247 if (code == BFD_RELOC_RL78_32_OP) 248 return rl78_elf_howto_table + R_RL78_DIR32; 249 250 for (i = ARRAY_SIZE (rl78_reloc_map); --i;) 251 if (rl78_reloc_map [i].bfd_reloc_val == code) 252 return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val; 253 254 return NULL; 255 } 256 257 static reloc_howto_type * 258 rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name) 259 { 260 unsigned int i; 261 262 for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++) 263 if (rl78_elf_howto_table[i].name != NULL 264 && strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0) 265 return rl78_elf_howto_table + i; 266 267 return NULL; 268 } 269 270 /* Set the howto pointer for an RL78 ELF reloc. */ 271 272 static void 273 rl78_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED, 274 arelent * cache_ptr, 275 Elf_Internal_Rela * dst) 276 { 277 unsigned int r_type; 278 279 r_type = ELF32_R_TYPE (dst->r_info); 280 if (r_type >= (unsigned int) R_RL78_max) 281 { 282 _bfd_error_handler (_("%A: invalid RL78 reloc number: %d"), abfd, r_type); 283 r_type = 0; 284 } 285 cache_ptr->howto = rl78_elf_howto_table + r_type; 286 } 287 288 static bfd_vma 290 get_symbol_value (const char * name, 291 bfd_reloc_status_type * status, 292 struct bfd_link_info * info, 293 bfd * input_bfd, 294 asection * input_section, 295 int offset) 296 { 297 bfd_vma value = 0; 298 struct bfd_link_hash_entry * h; 299 300 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE); 301 302 if (h == NULL 303 || (h->type != bfd_link_hash_defined 304 && h->type != bfd_link_hash_defweak)) 305 * status = info->callbacks->undefined_symbol 306 (info, name, input_bfd, input_section, offset, TRUE); 307 else 308 value = (h->u.def.value 309 + h->u.def.section->output_section->vma 310 + h->u.def.section->output_offset); 311 312 return value; 313 } 314 315 static bfd_vma 316 get_romstart (bfd_reloc_status_type * status, 317 struct bfd_link_info * info, 318 bfd * abfd, 319 asection * sec, 320 int offset) 321 { 322 static bfd_boolean cached = FALSE; 323 static bfd_vma cached_value = 0; 324 325 if (!cached) 326 { 327 cached_value = get_symbol_value ("_start", status, info, abfd, sec, offset); 328 cached = TRUE; 329 } 330 return cached_value; 331 } 332 333 static bfd_vma 334 get_ramstart (bfd_reloc_status_type * status, 335 struct bfd_link_info * info, 336 bfd * abfd, 337 asection * sec, 338 int offset) 339 { 340 static bfd_boolean cached = FALSE; 341 static bfd_vma cached_value = 0; 342 343 if (!cached) 344 { 345 cached_value = get_symbol_value ("__datastart", status, info, abfd, sec, offset); 346 cached = TRUE; 347 } 348 return cached_value; 349 } 350 351 #define NUM_STACK_ENTRIES 16 352 static int32_t rl78_stack [ NUM_STACK_ENTRIES ]; 353 static unsigned int rl78_stack_top; 354 355 #define RL78_STACK_PUSH(val) \ 356 do \ 357 { \ 358 if (rl78_stack_top < NUM_STACK_ENTRIES) \ 359 rl78_stack [rl78_stack_top ++] = (val); \ 360 else \ 361 r = bfd_reloc_dangerous; \ 362 } \ 363 while (0) 364 365 #define RL78_STACK_POP(dest) \ 366 do \ 367 { \ 368 if (rl78_stack_top > 0) \ 369 (dest) = rl78_stack [-- rl78_stack_top]; \ 370 else \ 371 (dest) = 0, r = bfd_reloc_dangerous; \ 372 } \ 373 while (0) 374 375 /* Relocate an RL78 ELF section. 376 There is some attempt to make this function usable for many architectures, 377 both USE_REL and USE_RELA ['twould be nice if such a critter existed], 378 if only to serve as a learning tool. 379 380 The RELOCATE_SECTION function is called by the new ELF backend linker 381 to handle the relocations for a section. 382 383 The relocs are always passed as Rela structures; if the section 384 actually uses Rel structures, the r_addend field will always be 385 zero. 386 387 This function is responsible for adjusting the section contents as 388 necessary, and (if using Rela relocs and generating a relocatable 389 output file) adjusting the reloc addend as necessary. 390 391 This function does not have to worry about setting the reloc 392 address or the reloc symbol index. 393 394 LOCAL_SYMS is a pointer to the swapped in local symbols. 395 396 LOCAL_SECTIONS is an array giving the section in the input file 397 corresponding to the st_shndx field of each local symbol. 398 399 The global hash table entry for the global symbols can be found 400 via elf_sym_hashes (input_bfd). 401 402 When generating relocatable output, this function must handle 403 STB_LOCAL/STT_SECTION symbols specially. The output symbol is 404 going to be the section symbol corresponding to the output 405 section, which means that the addend must be adjusted 406 accordingly. */ 407 408 static bfd_boolean 409 rl78_elf_relocate_section 410 (bfd * output_bfd, 411 struct bfd_link_info * info, 412 bfd * input_bfd, 413 asection * input_section, 414 bfd_byte * contents, 415 Elf_Internal_Rela * relocs, 416 Elf_Internal_Sym * local_syms, 417 asection ** local_sections) 418 { 419 Elf_Internal_Shdr * symtab_hdr; 420 struct elf_link_hash_entry ** sym_hashes; 421 Elf_Internal_Rela * rel; 422 Elf_Internal_Rela * relend; 423 bfd *dynobj; 424 asection *splt; 425 426 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr; 427 sym_hashes = elf_sym_hashes (input_bfd); 428 relend = relocs + input_section->reloc_count; 429 430 dynobj = elf_hash_table (info)->dynobj; 431 splt = NULL; 432 if (dynobj != NULL) 433 splt = bfd_get_linker_section (dynobj, ".plt"); 434 435 for (rel = relocs; rel < relend; rel ++) 436 { 437 reloc_howto_type * howto; 438 unsigned long r_symndx; 439 Elf_Internal_Sym * sym; 440 asection * sec; 441 struct elf_link_hash_entry * h; 442 bfd_vma relocation; 443 bfd_reloc_status_type r; 444 const char * name = NULL; 445 bfd_boolean unresolved_reloc = TRUE; 446 int r_type; 447 448 r_type = ELF32_R_TYPE (rel->r_info); 449 r_symndx = ELF32_R_SYM (rel->r_info); 450 451 howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info); 452 h = NULL; 453 sym = NULL; 454 sec = NULL; 455 relocation = 0; 456 457 if (r_symndx < symtab_hdr->sh_info) 458 { 459 sym = local_syms + r_symndx; 460 sec = local_sections [r_symndx]; 461 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel); 462 463 name = bfd_elf_string_from_elf_section 464 (input_bfd, symtab_hdr->sh_link, sym->st_name); 465 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name; 466 } 467 else 468 { 469 bfd_boolean warned ATTRIBUTE_UNUSED; 470 bfd_boolean ignored ATTRIBUTE_UNUSED; 471 472 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, 473 r_symndx, symtab_hdr, sym_hashes, h, 474 sec, relocation, unresolved_reloc, 475 warned, ignored); 476 477 name = h->root.root.string; 478 } 479 480 if (sec != NULL && discarded_section (sec)) 481 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, 482 rel, 1, relend, howto, 0, contents); 483 484 if (info->relocatable) 485 { 486 /* This is a relocatable link. We don't have to change 487 anything, unless the reloc is against a section symbol, 488 in which case we have to adjust according to where the 489 section symbol winds up in the output section. */ 490 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION) 491 rel->r_addend += sec->output_offset; 492 continue; 493 } 494 495 switch (ELF32_R_TYPE (rel->r_info)) 496 { 497 case R_RL78_DIR16S: 498 { 499 bfd_vma *plt_offset; 500 501 if (h != NULL) 502 plt_offset = &h->plt.offset; 503 else 504 plt_offset = elf_local_got_offsets (input_bfd) + r_symndx; 505 506 if (! valid_16bit_address (relocation)) 507 { 508 /* If this is the first time we've processed this symbol, 509 fill in the plt entry with the correct symbol address. */ 510 if ((*plt_offset & 1) == 0) 511 { 512 unsigned int x; 513 514 x = 0x000000ec; /* br !!abs24 */ 515 x |= (relocation << 8) & 0xffffff00; 516 bfd_put_32 (input_bfd, x, splt->contents + *plt_offset); 517 *plt_offset |= 1; 518 } 519 520 relocation = (splt->output_section->vma 521 + splt->output_offset 522 + (*plt_offset & -2)); 523 if (name) 524 { 525 char *newname = bfd_malloc (strlen(name)+5); 526 strcpy (newname, name); 527 strcat(newname, ".plt"); 528 _bfd_generic_link_add_one_symbol (info, 529 input_bfd, 530 newname, 531 BSF_FUNCTION | BSF_WEAK, 532 splt, 533 (*plt_offset & -2), 534 0, 535 1, 536 0, 537 0); 538 } 539 } 540 } 541 break; 542 } 543 544 if (h != NULL && h->root.type == bfd_link_hash_undefweak) 545 /* If the symbol is undefined and weak 546 then the relocation resolves to zero. */ 547 relocation = 0; 548 else 549 { 550 if (howto->pc_relative) 551 { 552 relocation -= (input_section->output_section->vma 553 + input_section->output_offset 554 + rel->r_offset); 555 relocation -= bfd_get_reloc_size (howto); 556 } 557 558 relocation += rel->r_addend; 559 } 560 561 r = bfd_reloc_ok; 562 563 #define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow 564 #define ALIGN(m) if (relocation & m) r = bfd_reloc_other; 565 #define OP(i) (contents[rel->r_offset + (i)]) 566 567 /* Opcode relocs are always big endian. Data relocs are bi-endian. */ 568 switch (r_type) 569 { 570 case R_RL78_NONE: 571 break; 572 573 case R_RL78_RH_RELAX: 574 break; 575 576 case R_RL78_DIR8S_PCREL: 577 RANGE (-128, 127); 578 OP (0) = relocation; 579 break; 580 581 case R_RL78_DIR8S: 582 RANGE (-128, 255); 583 OP (0) = relocation; 584 break; 585 586 case R_RL78_DIR8U: 587 RANGE (0, 255); 588 OP (0) = relocation; 589 break; 590 591 case R_RL78_DIR16S_PCREL: 592 RANGE (-32768, 32767); 593 OP (0) = relocation; 594 OP (1) = relocation >> 8; 595 break; 596 597 case R_RL78_DIR16S: 598 if ((relocation & 0xf0000) == 0xf0000) 599 relocation &= 0xffff; 600 RANGE (-32768, 65535); 601 OP (0) = relocation; 602 OP (1) = relocation >> 8; 603 break; 604 605 case R_RL78_DIR16U: 606 RANGE (0, 65536); 607 OP (0) = relocation; 608 OP (1) = relocation >> 8; 609 break; 610 611 case R_RL78_DIR16: 612 RANGE (-32768, 65536); 613 OP (0) = relocation; 614 OP (1) = relocation >> 8; 615 break; 616 617 case R_RL78_DIR16_REV: 618 RANGE (-32768, 65536); 619 OP (1) = relocation; 620 OP (0) = relocation >> 8; 621 break; 622 623 case R_RL78_DIR3U_PCREL: 624 RANGE (3, 10); 625 OP (0) &= 0xf8; 626 OP (0) |= relocation & 0x07; 627 break; 628 629 case R_RL78_DIR24S_PCREL: 630 RANGE (-0x800000, 0x7fffff); 631 OP (0) = relocation; 632 OP (1) = relocation >> 8; 633 OP (2) = relocation >> 16; 634 break; 635 636 case R_RL78_DIR24S: 637 RANGE (-0x800000, 0x7fffff); 638 OP (0) = relocation; 639 OP (1) = relocation >> 8; 640 OP (2) = relocation >> 16; 641 break; 642 643 case R_RL78_DIR32: 644 OP (0) = relocation; 645 OP (1) = relocation >> 8; 646 OP (2) = relocation >> 16; 647 OP (3) = relocation >> 24; 648 break; 649 650 case R_RL78_DIR32_REV: 651 OP (3) = relocation; 652 OP (2) = relocation >> 8; 653 OP (1) = relocation >> 16; 654 OP (0) = relocation >> 24; 655 break; 656 657 case R_RL78_RH_SFR: 658 RANGE (0xfff00, 0xfffff); 659 OP (0) = relocation & 0xff; 660 break; 661 662 case R_RL78_RH_SADDR: 663 RANGE (0xffe20, 0xfff1f); 664 OP (0) = relocation & 0xff; 665 break; 666 667 /* Complex reloc handling: */ 668 669 case R_RL78_ABS32: 670 RL78_STACK_POP (relocation); 671 OP (0) = relocation; 672 OP (1) = relocation >> 8; 673 OP (2) = relocation >> 16; 674 OP (3) = relocation >> 24; 675 break; 676 677 case R_RL78_ABS32_REV: 678 RL78_STACK_POP (relocation); 679 OP (3) = relocation; 680 OP (2) = relocation >> 8; 681 OP (1) = relocation >> 16; 682 OP (0) = relocation >> 24; 683 break; 684 685 case R_RL78_ABS24S_PCREL: 686 case R_RL78_ABS24S: 687 RL78_STACK_POP (relocation); 688 RANGE (-0x800000, 0x7fffff); 689 OP (0) = relocation; 690 OP (1) = relocation >> 8; 691 OP (2) = relocation >> 16; 692 break; 693 694 case R_RL78_ABS16: 695 RL78_STACK_POP (relocation); 696 RANGE (-32768, 65535); 697 OP (0) = relocation; 698 OP (1) = relocation >> 8; 699 break; 700 701 case R_RL78_ABS16_REV: 702 RL78_STACK_POP (relocation); 703 RANGE (-32768, 65535); 704 OP (1) = relocation; 705 OP (0) = relocation >> 8; 706 break; 707 708 case R_RL78_ABS16S_PCREL: 709 case R_RL78_ABS16S: 710 RL78_STACK_POP (relocation); 711 RANGE (-32768, 32767); 712 OP (0) = relocation; 713 OP (1) = relocation >> 8; 714 break; 715 716 case R_RL78_ABS16U: 717 RL78_STACK_POP (relocation); 718 RANGE (0, 65536); 719 OP (0) = relocation; 720 OP (1) = relocation >> 8; 721 break; 722 723 case R_RL78_ABS16UL: 724 RL78_STACK_POP (relocation); 725 relocation >>= 2; 726 RANGE (0, 65536); 727 OP (0) = relocation; 728 OP (1) = relocation >> 8; 729 break; 730 731 case R_RL78_ABS16UW: 732 RL78_STACK_POP (relocation); 733 relocation >>= 1; 734 RANGE (0, 65536); 735 OP (0) = relocation; 736 OP (1) = relocation >> 8; 737 break; 738 739 case R_RL78_ABS8: 740 RL78_STACK_POP (relocation); 741 RANGE (-128, 255); 742 OP (0) = relocation; 743 break; 744 745 case R_RL78_ABS8U: 746 RL78_STACK_POP (relocation); 747 RANGE (0, 255); 748 OP (0) = relocation; 749 break; 750 751 case R_RL78_ABS8UL: 752 RL78_STACK_POP (relocation); 753 relocation >>= 2; 754 RANGE (0, 255); 755 OP (0) = relocation; 756 break; 757 758 case R_RL78_ABS8UW: 759 RL78_STACK_POP (relocation); 760 relocation >>= 1; 761 RANGE (0, 255); 762 OP (0) = relocation; 763 break; 764 765 case R_RL78_ABS8S_PCREL: 766 case R_RL78_ABS8S: 767 RL78_STACK_POP (relocation); 768 RANGE (-128, 127); 769 OP (0) = relocation; 770 break; 771 772 case R_RL78_SYM: 773 if (r_symndx < symtab_hdr->sh_info) 774 RL78_STACK_PUSH (sec->output_section->vma 775 + sec->output_offset 776 + sym->st_value 777 + rel->r_addend); 778 else 779 { 780 if (h != NULL 781 && (h->root.type == bfd_link_hash_defined 782 || h->root.type == bfd_link_hash_defweak)) 783 RL78_STACK_PUSH (h->root.u.def.value 784 + sec->output_section->vma 785 + sec->output_offset 786 + rel->r_addend); 787 else if (h->root.type == bfd_link_hash_undefweak) 788 RL78_STACK_PUSH (0); 789 else 790 _bfd_error_handler (_("Warning: RL78_SYM reloc with an unknown symbol")); 791 } 792 break; 793 794 case R_RL78_OPneg: 795 { 796 int32_t tmp; 797 798 RL78_STACK_POP (tmp); 799 tmp = - tmp; 800 RL78_STACK_PUSH (tmp); 801 } 802 break; 803 804 case R_RL78_OPadd: 805 { 806 int32_t tmp1, tmp2; 807 808 RL78_STACK_POP (tmp2); 809 RL78_STACK_POP (tmp1); 810 tmp1 += tmp2; 811 RL78_STACK_PUSH (tmp1); 812 } 813 break; 814 815 case R_RL78_OPsub: 816 { 817 int32_t tmp1, tmp2; 818 819 /* For the expression "A - B", the assembler pushes A, 820 then B, then OPSUB. So the first op we pop is B, not 821 A. */ 822 RL78_STACK_POP (tmp2); /* B */ 823 RL78_STACK_POP (tmp1); /* A */ 824 tmp1 -= tmp2; /* A - B */ 825 RL78_STACK_PUSH (tmp1); 826 } 827 break; 828 829 case R_RL78_OPmul: 830 { 831 int32_t tmp1, tmp2; 832 833 RL78_STACK_POP (tmp2); 834 RL78_STACK_POP (tmp1); 835 tmp1 *= tmp2; 836 RL78_STACK_PUSH (tmp1); 837 } 838 break; 839 840 case R_RL78_OPdiv: 841 { 842 int32_t tmp1, tmp2; 843 844 RL78_STACK_POP (tmp2); 845 RL78_STACK_POP (tmp1); 846 tmp1 /= tmp2; 847 RL78_STACK_PUSH (tmp1); 848 } 849 break; 850 851 case R_RL78_OPshla: 852 { 853 int32_t tmp1, tmp2; 854 855 RL78_STACK_POP (tmp2); 856 RL78_STACK_POP (tmp1); 857 tmp1 <<= tmp2; 858 RL78_STACK_PUSH (tmp1); 859 } 860 break; 861 862 case R_RL78_OPshra: 863 { 864 int32_t tmp1, tmp2; 865 866 RL78_STACK_POP (tmp2); 867 RL78_STACK_POP (tmp1); 868 tmp1 >>= tmp2; 869 RL78_STACK_PUSH (tmp1); 870 } 871 break; 872 873 case R_RL78_OPsctsize: 874 RL78_STACK_PUSH (input_section->size); 875 break; 876 877 case R_RL78_OPscttop: 878 RL78_STACK_PUSH (input_section->output_section->vma); 879 break; 880 881 case R_RL78_OPand: 882 { 883 int32_t tmp1, tmp2; 884 885 RL78_STACK_POP (tmp2); 886 RL78_STACK_POP (tmp1); 887 tmp1 &= tmp2; 888 RL78_STACK_PUSH (tmp1); 889 } 890 break; 891 892 case R_RL78_OPor: 893 { 894 int32_t tmp1, tmp2; 895 896 RL78_STACK_POP (tmp2); 897 RL78_STACK_POP (tmp1); 898 tmp1 |= tmp2; 899 RL78_STACK_PUSH (tmp1); 900 } 901 break; 902 903 case R_RL78_OPxor: 904 { 905 int32_t tmp1, tmp2; 906 907 RL78_STACK_POP (tmp2); 908 RL78_STACK_POP (tmp1); 909 tmp1 ^= tmp2; 910 RL78_STACK_PUSH (tmp1); 911 } 912 break; 913 914 case R_RL78_OPnot: 915 { 916 int32_t tmp; 917 918 RL78_STACK_POP (tmp); 919 tmp = ~ tmp; 920 RL78_STACK_PUSH (tmp); 921 } 922 break; 923 924 case R_RL78_OPmod: 925 { 926 int32_t tmp1, tmp2; 927 928 RL78_STACK_POP (tmp2); 929 RL78_STACK_POP (tmp1); 930 tmp1 %= tmp2; 931 RL78_STACK_PUSH (tmp1); 932 } 933 break; 934 935 case R_RL78_OPromtop: 936 RL78_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset)); 937 break; 938 939 case R_RL78_OPramtop: 940 RL78_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset)); 941 break; 942 943 default: 944 r = bfd_reloc_notsupported; 945 break; 946 } 947 948 if (r != bfd_reloc_ok) 949 { 950 const char * msg = NULL; 951 952 switch (r) 953 { 954 case bfd_reloc_overflow: 955 /* Catch the case of a missing function declaration 956 and emit a more helpful error message. */ 957 if (r_type == R_RL78_DIR24S_PCREL) 958 msg = _("%B(%A): error: call to undefined function '%s'"); 959 else 960 r = info->callbacks->reloc_overflow 961 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0, 962 input_bfd, input_section, rel->r_offset); 963 break; 964 965 case bfd_reloc_undefined: 966 r = info->callbacks->undefined_symbol 967 (info, name, input_bfd, input_section, rel->r_offset, 968 TRUE); 969 break; 970 971 case bfd_reloc_other: 972 msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area"); 973 break; 974 975 case bfd_reloc_outofrange: 976 msg = _("%B(%A): internal error: out of range error"); 977 break; 978 979 case bfd_reloc_notsupported: 980 msg = _("%B(%A): internal error: unsupported relocation error"); 981 break; 982 983 case bfd_reloc_dangerous: 984 msg = _("%B(%A): internal error: dangerous relocation"); 985 break; 986 987 default: 988 msg = _("%B(%A): internal error: unknown error"); 989 break; 990 } 991 992 if (msg) 993 _bfd_error_handler (msg, input_bfd, input_section, name); 994 995 if (! r) 996 return FALSE; 997 } 998 } 999 1000 return TRUE; 1001 } 1002 1003 /* Function to set the ELF flag bits. */ 1005 1006 static bfd_boolean 1007 rl78_elf_set_private_flags (bfd * abfd, flagword flags) 1008 { 1009 elf_elfheader (abfd)->e_flags = flags; 1010 elf_flags_init (abfd) = TRUE; 1011 return TRUE; 1012 } 1013 1014 static bfd_boolean no_warn_mismatch = FALSE; 1015 1016 void bfd_elf32_rl78_set_target_flags (bfd_boolean); 1017 1018 void 1019 bfd_elf32_rl78_set_target_flags (bfd_boolean user_no_warn_mismatch) 1020 { 1021 no_warn_mismatch = user_no_warn_mismatch; 1022 } 1023 1024 /* Merge backend specific data from an object file to the output 1025 object file when linking. */ 1026 1027 static bfd_boolean 1028 rl78_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd) 1029 { 1030 flagword new_flags; 1031 flagword old_flags; 1032 bfd_boolean error = FALSE; 1033 1034 new_flags = elf_elfheader (ibfd)->e_flags; 1035 old_flags = elf_elfheader (obfd)->e_flags; 1036 1037 if (!elf_flags_init (obfd)) 1038 { 1039 /* First call, no flags set. */ 1040 elf_flags_init (obfd) = TRUE; 1041 elf_elfheader (obfd)->e_flags = new_flags; 1042 } 1043 else if (old_flags != new_flags) 1044 { 1045 flagword changed_flags = old_flags ^ new_flags; 1046 1047 if (changed_flags & E_FLAG_RL78_G10) 1048 { 1049 (*_bfd_error_handler) 1050 (_("RL78/G10 ABI conflict: cannot link G10 and non-G10 objects together")); 1051 1052 if (old_flags & E_FLAG_RL78_G10) 1053 (*_bfd_error_handler) (_("- %s is G10, %s is not"), 1054 bfd_get_filename (obfd), bfd_get_filename (ibfd)); 1055 else 1056 (*_bfd_error_handler) (_("- %s is G10, %s is not"), 1057 bfd_get_filename (ibfd), bfd_get_filename (obfd)); 1058 } 1059 1060 if (changed_flags & E_FLAG_RL78_64BIT_DOUBLES) 1061 { 1062 (*_bfd_error_handler) 1063 (_("RL78 merge conflict: cannot link 32-bit and 64-bit objects together")); 1064 1065 if (old_flags & E_FLAG_RL78_64BIT_DOUBLES) 1066 (*_bfd_error_handler) (_("- %s is 64-bit, %s is not"), 1067 bfd_get_filename (obfd), bfd_get_filename (ibfd)); 1068 else 1069 (*_bfd_error_handler) (_("- %s is 64-bit, %s is not"), 1070 bfd_get_filename (ibfd), bfd_get_filename (obfd)); 1071 } 1072 } 1073 1074 return !error; 1075 } 1076 1077 static bfd_boolean 1079 rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr) 1080 { 1081 FILE * file = (FILE *) ptr; 1082 flagword flags; 1083 1084 BFD_ASSERT (abfd != NULL && ptr != NULL); 1085 1086 /* Print normal ELF private data. */ 1087 _bfd_elf_print_private_bfd_data (abfd, ptr); 1088 1089 flags = elf_elfheader (abfd)->e_flags; 1090 fprintf (file, _("private flags = 0x%lx:"), (long) flags); 1091 1092 if (flags & E_FLAG_RL78_G10) 1093 fprintf (file, _(" [G10]")); 1094 1095 if (flags & E_FLAG_RL78_64BIT_DOUBLES) 1096 fprintf (file, _(" [64-bit doubles]")); 1097 1098 fputc ('\n', file); 1099 return TRUE; 1100 } 1101 1102 /* Return the MACH for an e_flags value. */ 1103 1104 static int 1105 elf32_rl78_machine (bfd * abfd) 1106 { 1107 if ((elf_elfheader (abfd)->e_flags & EF_RL78_CPU_MASK) == EF_RL78_CPU_RL78) 1108 return bfd_mach_rl78; 1109 1110 return 0; 1111 } 1112 1113 static bfd_boolean 1114 rl78_elf_object_p (bfd * abfd) 1115 { 1116 bfd_default_set_arch_mach (abfd, bfd_arch_rl78, 1117 elf32_rl78_machine (abfd)); 1118 return TRUE; 1119 } 1120 1121 /* support PLT for 16-bit references to 24-bit functions. */ 1123 1124 /* We support 16-bit pointers to code above 64k by generating a thunk 1125 below 64k containing a JMP instruction to the final address. */ 1126 1127 static bfd_boolean 1128 rl78_elf_check_relocs 1129 (bfd * abfd, 1130 struct bfd_link_info * info, 1131 asection * sec, 1132 const Elf_Internal_Rela * relocs) 1133 { 1134 Elf_Internal_Shdr * symtab_hdr; 1135 struct elf_link_hash_entry ** sym_hashes; 1136 const Elf_Internal_Rela * rel; 1137 const Elf_Internal_Rela * rel_end; 1138 bfd_vma *local_plt_offsets; 1139 asection *splt; 1140 bfd *dynobj; 1141 1142 if (info->relocatable) 1143 return TRUE; 1144 1145 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 1146 sym_hashes = elf_sym_hashes (abfd); 1147 local_plt_offsets = elf_local_got_offsets (abfd); 1148 splt = NULL; 1149 dynobj = elf_hash_table(info)->dynobj; 1150 1151 rel_end = relocs + sec->reloc_count; 1152 for (rel = relocs; rel < rel_end; rel++) 1153 { 1154 struct elf_link_hash_entry *h; 1155 unsigned long r_symndx; 1156 bfd_vma *offset; 1157 1158 r_symndx = ELF32_R_SYM (rel->r_info); 1159 if (r_symndx < symtab_hdr->sh_info) 1160 h = NULL; 1161 else 1162 { 1163 h = sym_hashes[r_symndx - symtab_hdr->sh_info]; 1164 while (h->root.type == bfd_link_hash_indirect 1165 || h->root.type == bfd_link_hash_warning) 1166 h = (struct elf_link_hash_entry *) h->root.u.i.link; 1167 1168 /* PR15323, ref flags aren't set for references in the same 1169 object. */ 1170 h->root.non_ir_ref = 1; 1171 } 1172 1173 switch (ELF32_R_TYPE (rel->r_info)) 1174 { 1175 /* This relocation describes a 16-bit pointer to a function. 1176 We may need to allocate a thunk in low memory; reserve memory 1177 for it now. */ 1178 case R_RL78_DIR16S: 1179 if (dynobj == NULL) 1180 elf_hash_table (info)->dynobj = dynobj = abfd; 1181 if (splt == NULL) 1182 { 1183 splt = bfd_get_linker_section (dynobj, ".plt"); 1184 if (splt == NULL) 1185 { 1186 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS 1187 | SEC_IN_MEMORY | SEC_LINKER_CREATED 1188 | SEC_READONLY | SEC_CODE); 1189 splt = bfd_make_section_anyway_with_flags (dynobj, ".plt", 1190 flags); 1191 if (splt == NULL 1192 || ! bfd_set_section_alignment (dynobj, splt, 1)) 1193 return FALSE; 1194 } 1195 } 1196 1197 if (h != NULL) 1198 offset = &h->plt.offset; 1199 else 1200 { 1201 if (local_plt_offsets == NULL) 1202 { 1203 size_t size; 1204 unsigned int i; 1205 1206 size = symtab_hdr->sh_info * sizeof (bfd_vma); 1207 local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size); 1208 if (local_plt_offsets == NULL) 1209 return FALSE; 1210 elf_local_got_offsets (abfd) = local_plt_offsets; 1211 1212 for (i = 0; i < symtab_hdr->sh_info; i++) 1213 local_plt_offsets[i] = (bfd_vma) -1; 1214 } 1215 offset = &local_plt_offsets[r_symndx]; 1216 } 1217 1218 if (*offset == (bfd_vma) -1) 1219 { 1220 *offset = splt->size; 1221 splt->size += 4; 1222 } 1223 break; 1224 } 1225 } 1226 1227 return TRUE; 1228 } 1229 1230 /* This must exist if dynobj is ever set. */ 1231 1232 static bfd_boolean 1233 rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED, 1234 struct bfd_link_info *info) 1235 { 1236 bfd *dynobj; 1237 asection *splt; 1238 1239 if (!elf_hash_table (info)->dynamic_sections_created) 1240 return TRUE; 1241 1242 /* As an extra sanity check, verify that all plt entries have been 1243 filled in. However, relaxing might have changed the relocs so 1244 that some plt entries don't get filled in, so we have to skip 1245 this check if we're relaxing. Unfortunately, check_relocs is 1246 called before relaxation. */ 1247 1248 if (info->relax_trip > 0) 1249 return TRUE; 1250 1251 if ((dynobj = elf_hash_table (info)->dynobj) != NULL 1252 && (splt = bfd_get_linker_section (dynobj, ".plt")) != NULL) 1253 { 1254 bfd_byte *contents = splt->contents; 1255 unsigned int i, size = splt->size; 1256 1257 for (i = 0; i < size; i += 4) 1258 { 1259 unsigned int x = bfd_get_32 (dynobj, contents + i); 1260 BFD_ASSERT (x != 0); 1261 } 1262 } 1263 1264 return TRUE; 1265 } 1266 1267 static bfd_boolean 1268 rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, 1269 struct bfd_link_info *info) 1270 { 1271 bfd *dynobj; 1272 asection *splt; 1273 1274 if (info->relocatable) 1275 return TRUE; 1276 1277 dynobj = elf_hash_table (info)->dynobj; 1278 if (dynobj == NULL) 1279 return TRUE; 1280 1281 splt = bfd_get_linker_section (dynobj, ".plt"); 1282 BFD_ASSERT (splt != NULL); 1283 1284 splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size); 1285 if (splt->contents == NULL) 1286 return FALSE; 1287 1288 return TRUE; 1289 } 1290 1291 1292 1294 /* Handle relaxing. */ 1295 1296 /* A subroutine of rl78_elf_relax_section. If the global symbol H 1297 is within the low 64k, remove any entry for it in the plt. */ 1298 1299 struct relax_plt_data 1300 { 1301 asection *splt; 1302 bfd_boolean *again; 1303 }; 1304 1305 static bfd_boolean 1306 rl78_relax_plt_check (struct elf_link_hash_entry *h, void * xdata) 1307 { 1308 struct relax_plt_data *data = (struct relax_plt_data *) xdata; 1309 1310 if (h->plt.offset != (bfd_vma) -1) 1311 { 1312 bfd_vma address; 1313 1314 if (h->root.type == bfd_link_hash_undefined 1315 || h->root.type == bfd_link_hash_undefweak) 1316 address = 0; 1317 else 1318 address = (h->root.u.def.section->output_section->vma 1319 + h->root.u.def.section->output_offset 1320 + h->root.u.def.value); 1321 1322 if (valid_16bit_address (address)) 1323 { 1324 h->plt.offset = -1; 1325 data->splt->size -= 4; 1326 *data->again = TRUE; 1327 } 1328 } 1329 1330 return TRUE; 1331 } 1332 1333 /* A subroutine of rl78_elf_relax_section. If the global symbol H 1334 previously had a plt entry, give it a new entry offset. */ 1335 1336 static bfd_boolean 1337 rl78_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata) 1338 { 1339 bfd_vma *entry = (bfd_vma *) xdata; 1340 1341 if (h->plt.offset != (bfd_vma) -1) 1342 { 1343 h->plt.offset = *entry; 1344 *entry += 4; 1345 } 1346 1347 return TRUE; 1348 } 1349 1350 static bfd_boolean 1351 rl78_elf_relax_plt_section (bfd *dynobj, 1352 asection *splt, 1353 struct bfd_link_info *info, 1354 bfd_boolean *again) 1355 { 1356 struct relax_plt_data relax_plt_data; 1357 bfd *ibfd; 1358 1359 /* Assume nothing changes. */ 1360 *again = FALSE; 1361 1362 if (info->relocatable) 1363 return TRUE; 1364 1365 /* We only relax the .plt section at the moment. */ 1366 if (dynobj != elf_hash_table (info)->dynobj 1367 || strcmp (splt->name, ".plt") != 0) 1368 return TRUE; 1369 1370 /* Quick check for an empty plt. */ 1371 if (splt->size == 0) 1372 return TRUE; 1373 1374 /* Map across all global symbols; see which ones happen to 1375 fall in the low 64k. */ 1376 relax_plt_data.splt = splt; 1377 relax_plt_data.again = again; 1378 elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check, 1379 &relax_plt_data); 1380 1381 /* Likewise for local symbols, though that's somewhat less convenient 1382 as we have to walk the list of input bfds and swap in symbol data. */ 1383 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next) 1384 { 1385 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd); 1386 Elf_Internal_Shdr *symtab_hdr; 1387 Elf_Internal_Sym *isymbuf = NULL; 1388 unsigned int idx; 1389 1390 if (! local_plt_offsets) 1391 continue; 1392 1393 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr; 1394 if (symtab_hdr->sh_info != 0) 1395 { 1396 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; 1397 if (isymbuf == NULL) 1398 isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr, 1399 symtab_hdr->sh_info, 0, 1400 NULL, NULL, NULL); 1401 if (isymbuf == NULL) 1402 return FALSE; 1403 } 1404 1405 for (idx = 0; idx < symtab_hdr->sh_info; ++idx) 1406 { 1407 Elf_Internal_Sym *isym; 1408 asection *tsec; 1409 bfd_vma address; 1410 1411 if (local_plt_offsets[idx] == (bfd_vma) -1) 1412 continue; 1413 1414 isym = &isymbuf[idx]; 1415 if (isym->st_shndx == SHN_UNDEF) 1416 continue; 1417 else if (isym->st_shndx == SHN_ABS) 1418 tsec = bfd_abs_section_ptr; 1419 else if (isym->st_shndx == SHN_COMMON) 1420 tsec = bfd_com_section_ptr; 1421 else 1422 tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx); 1423 1424 address = (tsec->output_section->vma 1425 + tsec->output_offset 1426 + isym->st_value); 1427 if (valid_16bit_address (address)) 1428 { 1429 local_plt_offsets[idx] = -1; 1430 splt->size -= 4; 1431 *again = TRUE; 1432 } 1433 } 1434 1435 if (isymbuf != NULL 1436 && symtab_hdr->contents != (unsigned char *) isymbuf) 1437 { 1438 if (! info->keep_memory) 1439 free (isymbuf); 1440 else 1441 { 1442 /* Cache the symbols for elf_link_input_bfd. */ 1443 symtab_hdr->contents = (unsigned char *) isymbuf; 1444 } 1445 } 1446 } 1447 1448 /* If we changed anything, walk the symbols again to reallocate 1449 .plt entry addresses. */ 1450 if (*again && splt->size > 0) 1451 { 1452 bfd_vma entry = 0; 1453 1454 elf_link_hash_traverse (elf_hash_table (info), 1455 rl78_relax_plt_realloc, &entry); 1456 1457 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next) 1458 { 1459 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd); 1460 unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info; 1461 unsigned int idx; 1462 1463 if (! local_plt_offsets) 1464 continue; 1465 1466 for (idx = 0; idx < nlocals; ++idx) 1467 if (local_plt_offsets[idx] != (bfd_vma) -1) 1468 { 1469 local_plt_offsets[idx] = entry; 1470 entry += 4; 1471 } 1472 } 1473 } 1474 1475 return TRUE; 1476 } 1477 1478 /* Delete some bytes from a section while relaxing. */ 1479 1480 static bfd_boolean 1481 elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count, 1482 Elf_Internal_Rela *alignment_rel, int force_snip) 1483 { 1484 Elf_Internal_Shdr * symtab_hdr; 1485 unsigned int sec_shndx; 1486 bfd_byte * contents; 1487 Elf_Internal_Rela * irel; 1488 Elf_Internal_Rela * irelend; 1489 Elf_Internal_Sym * isym; 1490 Elf_Internal_Sym * isymend; 1491 bfd_vma toaddr; 1492 unsigned int symcount; 1493 struct elf_link_hash_entry ** sym_hashes; 1494 struct elf_link_hash_entry ** end_hashes; 1495 1496 if (!alignment_rel) 1497 force_snip = 1; 1498 1499 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); 1500 1501 contents = elf_section_data (sec)->this_hdr.contents; 1502 1503 /* The deletion must stop at the next alignment boundary, if 1504 ALIGNMENT_REL is non-NULL. */ 1505 toaddr = sec->size; 1506 if (alignment_rel) 1507 toaddr = alignment_rel->r_offset; 1508 1509 irel = elf_section_data (sec)->relocs; 1510 if (irel == NULL) 1511 { 1512 _bfd_elf_link_read_relocs (sec->owner, sec, NULL, NULL, TRUE); 1513 irel = elf_section_data (sec)->relocs; 1514 } 1515 1516 irelend = irel + sec->reloc_count; 1517 1518 /* Actually delete the bytes. */ 1519 memmove (contents + addr, contents + addr + count, 1520 (size_t) (toaddr - addr - count)); 1521 1522 /* If we don't have an alignment marker to worry about, we can just 1523 shrink the section. Otherwise, we have to fill in the newly 1524 created gap with NOP insns (0x03). */ 1525 if (force_snip) 1526 sec->size -= count; 1527 else 1528 memset (contents + toaddr - count, 0x03, count); 1529 1530 /* Adjust all the relocs. */ 1531 for (; irel && irel < irelend; irel++) 1532 { 1533 /* Get the new reloc address. */ 1534 if (irel->r_offset > addr 1535 && (irel->r_offset < toaddr 1536 || (force_snip && irel->r_offset == toaddr))) 1537 irel->r_offset -= count; 1538 1539 /* If we see an ALIGN marker at the end of the gap, we move it 1540 to the beginning of the gap, since marking these gaps is what 1541 they're for. */ 1542 if (irel->r_offset == toaddr 1543 && ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX 1544 && irel->r_addend & RL78_RELAXA_ALIGN) 1545 irel->r_offset -= count; 1546 } 1547 1548 /* Adjust the local symbols defined in this section. */ 1549 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 1550 isym = (Elf_Internal_Sym *) symtab_hdr->contents; 1551 isymend = isym + symtab_hdr->sh_info; 1552 1553 for (; isym < isymend; isym++) 1554 { 1555 /* If the symbol is in the range of memory we just moved, we 1556 have to adjust its value. */ 1557 if (isym->st_shndx == sec_shndx 1558 && isym->st_value > addr 1559 && isym->st_value < toaddr) 1560 isym->st_value -= count; 1561 1562 /* If the symbol *spans* the bytes we just deleted (i.e. it's 1563 *end* is in the moved bytes but it's *start* isn't), then we 1564 must adjust its size. */ 1565 if (isym->st_shndx == sec_shndx 1566 && isym->st_value < addr 1567 && isym->st_value + isym->st_size > addr 1568 && isym->st_value + isym->st_size < toaddr) 1569 isym->st_size -= count; 1570 } 1571 1572 /* Now adjust the global symbols defined in this section. */ 1573 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) 1574 - symtab_hdr->sh_info); 1575 sym_hashes = elf_sym_hashes (abfd); 1576 end_hashes = sym_hashes + symcount; 1577 1578 for (; sym_hashes < end_hashes; sym_hashes++) 1579 { 1580 struct elf_link_hash_entry *sym_hash = *sym_hashes; 1581 1582 if ((sym_hash->root.type == bfd_link_hash_defined 1583 || sym_hash->root.type == bfd_link_hash_defweak) 1584 && sym_hash->root.u.def.section == sec) 1585 { 1586 /* As above, adjust the value if needed. */ 1587 if (sym_hash->root.u.def.value > addr 1588 && sym_hash->root.u.def.value < toaddr) 1589 sym_hash->root.u.def.value -= count; 1590 1591 /* As above, adjust the size if needed. */ 1592 if (sym_hash->root.u.def.value < addr 1593 && sym_hash->root.u.def.value + sym_hash->size > addr 1594 && sym_hash->root.u.def.value + sym_hash->size < toaddr) 1595 sym_hash->size -= count; 1596 } 1597 } 1598 1599 return TRUE; 1600 } 1601 1602 /* Used to sort relocs by address. If relocs have the same address, 1603 we maintain their relative order, except that R_RL78_RH_RELAX 1604 alignment relocs must be the first reloc for any given address. */ 1605 1606 static void 1607 reloc_bubblesort (Elf_Internal_Rela * r, int count) 1608 { 1609 int i; 1610 bfd_boolean again; 1611 bfd_boolean swappit; 1612 1613 /* This is almost a classic bubblesort. It's the slowest sort, but 1614 we're taking advantage of the fact that the relocations are 1615 mostly in order already (the assembler emits them that way) and 1616 we need relocs with the same address to remain in the same 1617 relative order. */ 1618 again = TRUE; 1619 while (again) 1620 { 1621 again = FALSE; 1622 for (i = 0; i < count - 1; i ++) 1623 { 1624 if (r[i].r_offset > r[i + 1].r_offset) 1625 swappit = TRUE; 1626 else if (r[i].r_offset < r[i + 1].r_offset) 1627 swappit = FALSE; 1628 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX 1629 && (r[i + 1].r_addend & RL78_RELAXA_ALIGN)) 1630 swappit = TRUE; 1631 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX 1632 && (r[i + 1].r_addend & RL78_RELAXA_ELIGN) 1633 && !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX 1634 && (r[i].r_addend & RL78_RELAXA_ALIGN))) 1635 swappit = TRUE; 1636 else 1637 swappit = FALSE; 1638 1639 if (swappit) 1640 { 1641 Elf_Internal_Rela tmp; 1642 1643 tmp = r[i]; 1644 r[i] = r[i + 1]; 1645 r[i + 1] = tmp; 1646 /* If we do move a reloc back, re-scan to see if it 1647 needs to be moved even further back. This avoids 1648 most of the O(n^2) behavior for our cases. */ 1649 if (i > 0) 1650 i -= 2; 1651 again = TRUE; 1652 } 1653 } 1654 } 1655 } 1656 1657 1658 #define OFFSET_FOR_RELOC(rel, lrel, scale) \ 1659 rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \ 1660 lrel, abfd, sec, link_info, scale) 1661 1662 static bfd_vma 1663 rl78_offset_for_reloc (bfd * abfd, 1664 Elf_Internal_Rela * rel, 1665 Elf_Internal_Shdr * symtab_hdr, 1666 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED, 1667 Elf_Internal_Sym * intsyms, 1668 Elf_Internal_Rela ** lrel, 1669 bfd * input_bfd, 1670 asection * input_section, 1671 struct bfd_link_info * info, 1672 int * scale) 1673 { 1674 bfd_vma symval; 1675 bfd_reloc_status_type r; 1676 1677 *scale = 1; 1678 1679 /* REL is the first of 1..N relocations. We compute the symbol 1680 value for each relocation, then combine them if needed. LREL 1681 gets a pointer to the last relocation used. */ 1682 while (1) 1683 { 1684 int32_t tmp1, tmp2; 1685 1686 /* Get the value of the symbol referred to by the reloc. */ 1687 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info) 1688 { 1689 /* A local symbol. */ 1690 Elf_Internal_Sym *isym; 1691 asection *ssec; 1692 1693 isym = intsyms + ELF32_R_SYM (rel->r_info); 1694 1695 if (isym->st_shndx == SHN_UNDEF) 1696 ssec = bfd_und_section_ptr; 1697 else if (isym->st_shndx == SHN_ABS) 1698 ssec = bfd_abs_section_ptr; 1699 else if (isym->st_shndx == SHN_COMMON) 1700 ssec = bfd_com_section_ptr; 1701 else 1702 ssec = bfd_section_from_elf_index (abfd, 1703 isym->st_shndx); 1704 1705 /* Initial symbol value. */ 1706 symval = isym->st_value; 1707 1708 /* GAS may have made this symbol relative to a section, in 1709 which case, we have to add the addend to find the 1710 symbol. */ 1711 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION) 1712 symval += rel->r_addend; 1713 1714 if (ssec) 1715 { 1716 if ((ssec->flags & SEC_MERGE) 1717 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE) 1718 symval = _bfd_merged_section_offset (abfd, & ssec, 1719 elf_section_data (ssec)->sec_info, 1720 symval); 1721 } 1722 1723 /* Now make the offset relative to where the linker is putting it. */ 1724 if (ssec) 1725 symval += 1726 ssec->output_section->vma + ssec->output_offset; 1727 1728 symval += rel->r_addend; 1729 } 1730 else 1731 { 1732 unsigned long indx; 1733 struct elf_link_hash_entry * h; 1734 1735 /* An external symbol. */ 1736 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info; 1737 h = elf_sym_hashes (abfd)[indx]; 1738 BFD_ASSERT (h != NULL); 1739 1740 if (h->root.type != bfd_link_hash_defined 1741 && h->root.type != bfd_link_hash_defweak) 1742 { 1743 /* This appears to be a reference to an undefined 1744 symbol. Just ignore it--it will be caught by the 1745 regular reloc processing. */ 1746 if (lrel) 1747 *lrel = rel; 1748 return 0; 1749 } 1750 1751 symval = (h->root.u.def.value 1752 + h->root.u.def.section->output_section->vma 1753 + h->root.u.def.section->output_offset); 1754 1755 symval += rel->r_addend; 1756 } 1757 1758 switch (ELF32_R_TYPE (rel->r_info)) 1759 { 1760 case R_RL78_SYM: 1761 RL78_STACK_PUSH (symval); 1762 break; 1763 1764 case R_RL78_OPneg: 1765 RL78_STACK_POP (tmp1); 1766 tmp1 = - tmp1; 1767 RL78_STACK_PUSH (tmp1); 1768 break; 1769 1770 case R_RL78_OPadd: 1771 RL78_STACK_POP (tmp1); 1772 RL78_STACK_POP (tmp2); 1773 tmp1 += tmp2; 1774 RL78_STACK_PUSH (tmp1); 1775 break; 1776 1777 case R_RL78_OPsub: 1778 RL78_STACK_POP (tmp1); 1779 RL78_STACK_POP (tmp2); 1780 tmp2 -= tmp1; 1781 RL78_STACK_PUSH (tmp2); 1782 break; 1783 1784 case R_RL78_OPmul: 1785 RL78_STACK_POP (tmp1); 1786 RL78_STACK_POP (tmp2); 1787 tmp1 *= tmp2; 1788 RL78_STACK_PUSH (tmp1); 1789 break; 1790 1791 case R_RL78_OPdiv: 1792 RL78_STACK_POP (tmp1); 1793 RL78_STACK_POP (tmp2); 1794 tmp1 /= tmp2; 1795 RL78_STACK_PUSH (tmp1); 1796 break; 1797 1798 case R_RL78_OPshla: 1799 RL78_STACK_POP (tmp1); 1800 RL78_STACK_POP (tmp2); 1801 tmp1 <<= tmp2; 1802 RL78_STACK_PUSH (tmp1); 1803 break; 1804 1805 case R_RL78_OPshra: 1806 RL78_STACK_POP (tmp1); 1807 RL78_STACK_POP (tmp2); 1808 tmp1 >>= tmp2; 1809 RL78_STACK_PUSH (tmp1); 1810 break; 1811 1812 case R_RL78_OPsctsize: 1813 RL78_STACK_PUSH (input_section->size); 1814 break; 1815 1816 case R_RL78_OPscttop: 1817 RL78_STACK_PUSH (input_section->output_section->vma); 1818 break; 1819 1820 case R_RL78_OPand: 1821 RL78_STACK_POP (tmp1); 1822 RL78_STACK_POP (tmp2); 1823 tmp1 &= tmp2; 1824 RL78_STACK_PUSH (tmp1); 1825 break; 1826 1827 case R_RL78_OPor: 1828 RL78_STACK_POP (tmp1); 1829 RL78_STACK_POP (tmp2); 1830 tmp1 |= tmp2; 1831 RL78_STACK_PUSH (tmp1); 1832 break; 1833 1834 case R_RL78_OPxor: 1835 RL78_STACK_POP (tmp1); 1836 RL78_STACK_POP (tmp2); 1837 tmp1 ^= tmp2; 1838 RL78_STACK_PUSH (tmp1); 1839 break; 1840 1841 case R_RL78_OPnot: 1842 RL78_STACK_POP (tmp1); 1843 tmp1 = ~ tmp1; 1844 RL78_STACK_PUSH (tmp1); 1845 break; 1846 1847 case R_RL78_OPmod: 1848 RL78_STACK_POP (tmp1); 1849 RL78_STACK_POP (tmp2); 1850 tmp1 %= tmp2; 1851 RL78_STACK_PUSH (tmp1); 1852 break; 1853 1854 case R_RL78_OPromtop: 1855 RL78_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset)); 1856 break; 1857 1858 case R_RL78_OPramtop: 1859 RL78_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset)); 1860 break; 1861 1862 case R_RL78_DIR16UL: 1863 case R_RL78_DIR8UL: 1864 case R_RL78_ABS16UL: 1865 case R_RL78_ABS8UL: 1866 if (rl78_stack_top) 1867 RL78_STACK_POP (symval); 1868 if (lrel) 1869 *lrel = rel; 1870 *scale = 4; 1871 return symval; 1872 1873 case R_RL78_DIR16UW: 1874 case R_RL78_DIR8UW: 1875 case R_RL78_ABS16UW: 1876 case R_RL78_ABS8UW: 1877 if (rl78_stack_top) 1878 RL78_STACK_POP (symval); 1879 if (lrel) 1880 *lrel = rel; 1881 *scale = 2; 1882 return symval; 1883 1884 default: 1885 if (rl78_stack_top) 1886 RL78_STACK_POP (symval); 1887 if (lrel) 1888 *lrel = rel; 1889 return symval; 1890 } 1891 1892 rel ++; 1893 } 1894 } 1895 1896 struct { 1897 int prefix; /* or -1 for "no prefix" */ 1898 int insn; /* or -1 for "end of list" */ 1899 int insn_for_saddr; /* or -1 for "no alternative" */ 1900 int insn_for_sfr; /* or -1 for "no alternative" */ 1901 } relax_addr16[] = { 1902 { -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */ 1903 { -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */ 1904 { -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */ 1905 { -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */ 1906 1907 { -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */ 1908 { -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */ 1909 { -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */ 1910 { -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */ 1911 { -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */ 1912 { -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */ 1913 { -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */ 1914 { -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */ 1915 1916 { -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */ 1917 { -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */ 1918 { -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */ 1919 { -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */ 1920 { -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */ 1921 1922 { -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */ 1923 { -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */ 1924 { -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */ 1925 { -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */ 1926 1927 { -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */ 1928 { -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */ 1929 { -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */ 1930 1931 { -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */ 1932 { -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */ 1933 { -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */ 1934 { -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */ 1935 { -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */ 1936 { -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */ 1937 1938 { 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */ 1939 1940 { 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */ 1941 { 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */ 1942 { 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */ 1943 { 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */ 1944 { 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */ 1945 { 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */ 1946 { 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */ 1947 { 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */ 1948 1949 { 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */ 1950 { 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */ 1951 { 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */ 1952 { 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */ 1953 { 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */ 1954 { 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */ 1955 { 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */ 1956 { 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */ 1957 1958 { -1, -1, -1, -1 } 1959 }; 1960 1961 /* Relax one section. */ 1962 1963 static bfd_boolean 1964 rl78_elf_relax_section 1965 (bfd * abfd, 1966 asection * sec, 1967 struct bfd_link_info * link_info, 1968 bfd_boolean * again) 1969 { 1970 Elf_Internal_Shdr * symtab_hdr; 1971 Elf_Internal_Shdr * shndx_hdr; 1972 Elf_Internal_Rela * internal_relocs; 1973 Elf_Internal_Rela * free_relocs = NULL; 1974 Elf_Internal_Rela * irel; 1975 Elf_Internal_Rela * srel; 1976 Elf_Internal_Rela * irelend; 1977 Elf_Internal_Rela * next_alignment; 1978 bfd_byte * contents = NULL; 1979 bfd_byte * free_contents = NULL; 1980 Elf_Internal_Sym * intsyms = NULL; 1981 Elf_Internal_Sym * free_intsyms = NULL; 1982 Elf_External_Sym_Shndx * shndx_buf = NULL; 1983 bfd_vma pc; 1984 bfd_vma symval ATTRIBUTE_UNUSED = 0; 1985 int pcrel ATTRIBUTE_UNUSED = 0; 1986 int code ATTRIBUTE_UNUSED = 0; 1987 int section_alignment_glue; 1988 int scale; 1989 1990 if (abfd == elf_hash_table (link_info)->dynobj 1991 && strcmp (sec->name, ".plt") == 0) 1992 return rl78_elf_relax_plt_section (abfd, sec, link_info, again); 1993 1994 /* Assume nothing changes. */ 1995 *again = FALSE; 1996 1997 /* We don't have to do anything for a relocatable link, if 1998 this section does not have relocs, or if this is not a 1999 code section. */ 2000 if (link_info->relocatable 2001 || (sec->flags & SEC_RELOC) == 0 2002 || sec->reloc_count == 0 2003 || (sec->flags & SEC_CODE) == 0) 2004 return TRUE; 2005 2006 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 2007 shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr; 2008 2009 /* Get the section contents. */ 2010 if (elf_section_data (sec)->this_hdr.contents != NULL) 2011 contents = elf_section_data (sec)->this_hdr.contents; 2012 /* Go get them off disk. */ 2013 else 2014 { 2015 if (! bfd_malloc_and_get_section (abfd, sec, &contents)) 2016 goto error_return; 2017 elf_section_data (sec)->this_hdr.contents = contents; 2018 } 2019 2020 /* Read this BFD's symbols. */ 2021 /* Get cached copy if it exists. */ 2022 if (symtab_hdr->contents != NULL) 2023 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents; 2024 else 2025 { 2026 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL); 2027 symtab_hdr->contents = (bfd_byte *) intsyms; 2028 } 2029 2030 if (shndx_hdr->sh_size != 0) 2031 { 2032 bfd_size_type amt; 2033 2034 amt = symtab_hdr->sh_info; 2035 amt *= sizeof (Elf_External_Sym_Shndx); 2036 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt); 2037 if (shndx_buf == NULL) 2038 goto error_return; 2039 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0 2040 || bfd_bread (shndx_buf, amt, abfd) != amt) 2041 goto error_return; 2042 shndx_hdr->contents = (bfd_byte *) shndx_buf; 2043 } 2044 2045 /* Get a copy of the native relocations. */ 2046 internal_relocs = (_bfd_elf_link_read_relocs 2047 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL, 2048 link_info->keep_memory)); 2049 if (internal_relocs == NULL) 2050 goto error_return; 2051 if (! link_info->keep_memory) 2052 free_relocs = internal_relocs; 2053 2054 /* The RL_ relocs must be just before the operand relocs they go 2055 with, so we must sort them to guarantee this. We use bubblesort 2056 instead of qsort so we can guarantee that relocs with the same 2057 address remain in the same relative order. */ 2058 reloc_bubblesort (internal_relocs, sec->reloc_count); 2059 2060 /* Walk through them looking for relaxing opportunities. */ 2061 irelend = internal_relocs + sec->reloc_count; 2062 2063 2064 /* This will either be NULL or a pointer to the next alignment 2065 relocation. */ 2066 next_alignment = internal_relocs; 2067 2068 /* We calculate worst case shrinkage caused by alignment directives. 2069 No fool-proof, but better than either ignoring the problem or 2070 doing heavy duty analysis of all the alignment markers in all 2071 input sections. */ 2072 section_alignment_glue = 0; 2073 for (irel = internal_relocs; irel < irelend; irel++) 2074 if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX 2075 && irel->r_addend & RL78_RELAXA_ALIGN) 2076 { 2077 int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM); 2078 2079 if (section_alignment_glue < this_glue) 2080 section_alignment_glue = this_glue; 2081 } 2082 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte 2083 shrinkage. */ 2084 section_alignment_glue *= 2; 2085 2086 for (irel = internal_relocs; irel < irelend; irel++) 2087 { 2088 unsigned char *insn; 2089 int nrelocs; 2090 2091 /* The insns we care about are all marked with one of these. */ 2092 if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX) 2093 continue; 2094 2095 if (irel->r_addend & RL78_RELAXA_ALIGN 2096 || next_alignment == internal_relocs) 2097 { 2098 /* When we delete bytes, we need to maintain all the alignments 2099 indicated. In addition, we need to be careful about relaxing 2100 jumps across alignment boundaries - these displacements 2101 *grow* when we delete bytes. For now, don't shrink 2102 displacements across an alignment boundary, just in case. 2103 Note that this only affects relocations to the same 2104 section. */ 2105 next_alignment += 2; 2106 while (next_alignment < irelend 2107 && (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX 2108 || !(next_alignment->r_addend & RL78_RELAXA_ELIGN))) 2109 next_alignment ++; 2110 if (next_alignment >= irelend || next_alignment->r_offset == 0) 2111 next_alignment = NULL; 2112 } 2113 2114 /* When we hit alignment markers, see if we've shrunk enough 2115 before them to reduce the gap without violating the alignment 2116 requirements. */ 2117 if (irel->r_addend & RL78_RELAXA_ALIGN) 2118 { 2119 /* At this point, the next relocation *should* be the ELIGN 2120 end marker. */ 2121 Elf_Internal_Rela *erel = irel + 1; 2122 unsigned int alignment, nbytes; 2123 2124 if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX) 2125 continue; 2126 if (!(erel->r_addend & RL78_RELAXA_ELIGN)) 2127 continue; 2128 2129 alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM); 2130 2131 if (erel->r_offset - irel->r_offset < alignment) 2132 continue; 2133 2134 nbytes = erel->r_offset - irel->r_offset; 2135 nbytes /= alignment; 2136 nbytes *= alignment; 2137 2138 elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment, 2139 erel->r_offset == sec->size); 2140 *again = TRUE; 2141 2142 continue; 2143 } 2144 2145 if (irel->r_addend & RL78_RELAXA_ELIGN) 2146 continue; 2147 2148 insn = contents + irel->r_offset; 2149 2150 nrelocs = irel->r_addend & RL78_RELAXA_RNUM; 2151 2152 /* At this point, we have an insn that is a candidate for linker 2153 relaxation. There are NRELOCS relocs following that may be 2154 relaxed, although each reloc may be made of more than one 2155 reloc entry (such as gp-rel symbols). */ 2156 2157 /* Get the value of the symbol referred to by the reloc. Just 2158 in case this is the last reloc in the list, use the RL's 2159 addend to choose between this reloc (no addend) or the next 2160 (yes addend, which means at least one following reloc). */ 2161 2162 /* srel points to the "current" reloction for this insn - 2163 actually the last reloc for a given operand, which is the one 2164 we need to update. We check the relaxations in the same 2165 order that the relocations happen, so we'll just push it 2166 along as we go. */ 2167 srel = irel; 2168 2169 pc = sec->output_section->vma + sec->output_offset 2170 + srel->r_offset; 2171 2172 #define GET_RELOC \ 2173 BFD_ASSERT (nrelocs > 0); \ 2174 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \ 2175 pcrel = symval - pc + srel->r_addend; \ 2176 nrelocs --; 2177 2178 #define SNIPNR(offset, nbytes) \ 2179 elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0); 2180 #define SNIP(offset, nbytes, newtype) \ 2181 SNIPNR (offset, nbytes); \ 2182 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype) 2183 2184 /* The order of these bit tests must match the order that the 2185 relocs appear in. Since we sorted those by offset, we can 2186 predict them. */ 2187 2188 /*----------------------------------------------------------------------*/ 2189 /* EF ad BR $rel8 pcrel 2190 ED al ah BR !abs16 abs 2191 EE al ah BR $!rel16 pcrel 2192 EC al ah as BR !!abs20 abs 2193 2194 FD al ah CALL !abs16 abs 2195 FE al ah CALL $!rel16 pcrel 2196 FC al ah as CALL !!abs20 abs 2197 2198 DC ad BC $rel8 2199 DE ad BNC $rel8 2200 DD ad BZ $rel8 2201 DF ad BNZ $rel8 2202 61 C3 ad BH $rel8 2203 61 D3 ad BNH $rel8 2204 61 C8 EF ad SKC ; BR $rel8 2205 61 D8 EF ad SKNC ; BR $rel8 2206 61 E8 EF ad SKZ ; BR $rel8 2207 61 F8 EF ad SKNZ ; BR $rel8 2208 61 E3 EF ad SKH ; BR $rel8 2209 61 F3 EF ad SKNH ; BR $rel8 2210 */ 2211 2212 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_BRA) 2213 { 2214 /* SKIP opcodes that skip non-branches will have a relax tag 2215 but no corresponding symbol to relax against; we just 2216 skip those. */ 2217 if (irel->r_addend & RL78_RELAXA_RNUM) 2218 { 2219 GET_RELOC; 2220 } 2221 2222 switch (insn[0]) 2223 { 2224 case 0xec: /* BR !!abs20 */ 2225 2226 if (pcrel < 127 2227 && pcrel > -127) 2228 { 2229 insn[0] = 0xef; 2230 insn[1] = pcrel; 2231 SNIP (2, 2, R_RL78_DIR8S_PCREL); 2232 *again = TRUE; 2233 } 2234 else if (symval < 65536) 2235 { 2236 insn[0] = 0xed; 2237 insn[1] = symval & 0xff; 2238 insn[2] = symval >> 8; 2239 SNIP (2, 1, R_RL78_DIR16S); 2240 *again = TRUE; 2241 } 2242 else if (pcrel < 32767 2243 && pcrel > -32767) 2244 { 2245 insn[0] = 0xee; 2246 insn[1] = pcrel & 0xff; 2247 insn[2] = pcrel >> 8; 2248 SNIP (2, 1, R_RL78_DIR16S_PCREL); 2249 *again = TRUE; 2250 } 2251 break; 2252 2253 case 0xee: /* BR $!pcrel16 */ 2254 case 0xed: /* BR $!abs16 */ 2255 if (pcrel < 127 2256 && pcrel > -127) 2257 { 2258 insn[0] = 0xef; 2259 insn[1] = pcrel; 2260 SNIP (2, 1, R_RL78_DIR8S_PCREL); 2261 *again = TRUE; 2262 } 2263 break; 2264 2265 case 0xfc: /* CALL !!abs20 */ 2266 if (symval < 65536) 2267 { 2268 insn[0] = 0xfd; 2269 insn[1] = symval & 0xff; 2270 insn[2] = symval >> 8; 2271 SNIP (2, 1, R_RL78_DIR16S); 2272 *again = TRUE; 2273 } 2274 else if (pcrel < 32767 2275 && pcrel > -32767) 2276 { 2277 insn[0] = 0xfe; 2278 insn[1] = pcrel & 0xff; 2279 insn[2] = pcrel >> 8; 2280 SNIP (2, 1, R_RL78_DIR16S_PCREL); 2281 *again = TRUE; 2282 } 2283 break; 2284 2285 case 0x61: /* PREFIX */ 2286 /* For SKIP/BR, we change the BR opcode and delete the 2287 SKIP. That way, we don't have to find and change the 2288 relocation for the BR. */ 2289 /* Note that, for the case where we're skipping some 2290 other insn, we have no "other" reloc but that's safe 2291 here anyway. */ 2292 switch (insn[1]) 2293 { 2294 case 0xc8: /* SKC */ 2295 if (insn[2] == 0xef) 2296 { 2297 insn[2] = 0xde; /* BNC */ 2298 SNIPNR (0, 2); 2299 } 2300 break; 2301 2302 case 0xd8: /* SKNC */ 2303 if (insn[2] == 0xef) 2304 { 2305 insn[2] = 0xdc; /* BC */ 2306 SNIPNR (0, 2); 2307 } 2308 break; 2309 2310 case 0xe8: /* SKZ */ 2311 if (insn[2] == 0xef) 2312 { 2313 insn[2] = 0xdf; /* BNZ */ 2314 SNIPNR (0, 2); 2315 } 2316 break; 2317 2318 case 0xf8: /* SKNZ */ 2319 if (insn[2] == 0xef) 2320 { 2321 insn[2] = 0xdd; /* BZ */ 2322 SNIPNR (0, 2); 2323 } 2324 break; 2325 2326 case 0xe3: /* SKH */ 2327 if (insn[2] == 0xef) 2328 { 2329 insn[2] = 0xd3; /* BNH */ 2330 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */ 2331 } 2332 break; 2333 2334 case 0xf3: /* SKNH */ 2335 if (insn[2] == 0xef) 2336 { 2337 insn[2] = 0xc3; /* BH */ 2338 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */ 2339 } 2340 break; 2341 } 2342 break; 2343 } 2344 2345 } 2346 2347 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_ADDR16) 2348 { 2349 /*----------------------------------------------------------------------*/ 2350 /* Some insns have both a 16-bit address operand and an 8-bit 2351 variant if the address is within a special range: 2352 2353 Address 16-bit operand SADDR range SFR range 2354 FFF00-FFFFF 0xff00-0xffff 0x00-0xff 2355 FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff 2356 2357 The RELAX_ADDR16[] array has the insn encodings for the 2358 16-bit operand version, as well as the SFR and SADDR 2359 variants. We only need to replace the encodings and 2360 adjust the operand. 2361 2362 Note: we intentionally do not attempt to decode and skip 2363 any ES: prefix, as adding ES: means the addr16 (likely) 2364 no longer points to saddr/sfr space. 2365 */ 2366 2367 int is_sfr; 2368 int is_saddr; 2369 int idx; 2370 int poff; 2371 2372 GET_RELOC; 2373 2374 if (0xffe20 <= symval && symval <= 0xfffff) 2375 { 2376 2377 is_saddr = (0xffe20 <= symval && symval <= 0xfff1f); 2378 is_sfr = (0xfff00 <= symval && symval <= 0xfffff); 2379 2380 for (idx = 0; relax_addr16[idx].insn != -1; idx ++) 2381 { 2382 if (relax_addr16[idx].prefix != -1 2383 && insn[0] == relax_addr16[idx].prefix 2384 && insn[1] == relax_addr16[idx].insn) 2385 { 2386 poff = 1; 2387 } 2388 else if (relax_addr16[idx].prefix == -1 2389 && insn[0] == relax_addr16[idx].insn) 2390 { 2391 poff = 0; 2392 } 2393 else 2394 continue; 2395 2396 /* We have a matched insn, and poff is 0 or 1 depending 2397 on the base pattern size. */ 2398 2399 if (is_sfr && relax_addr16[idx].insn_for_sfr != -1) 2400 { 2401 insn[poff] = relax_addr16[idx].insn_for_sfr; 2402 SNIP (poff+2, 1, R_RL78_RH_SFR); 2403 } 2404 2405 else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1) 2406 { 2407 insn[poff] = relax_addr16[idx].insn_for_saddr; 2408 SNIP (poff+2, 1, R_RL78_RH_SADDR); 2409 } 2410 2411 } 2412 } 2413 } 2414 2415 /*----------------------------------------------------------------------*/ 2416 2417 } 2418 2419 return TRUE; 2420 2421 error_return: 2422 if (free_relocs != NULL) 2423 free (free_relocs); 2424 2425 if (free_contents != NULL) 2426 free (free_contents); 2427 2428 if (shndx_buf != NULL) 2429 { 2430 shndx_hdr->contents = NULL; 2431 free (shndx_buf); 2432 } 2433 2434 if (free_intsyms != NULL) 2435 free (free_intsyms); 2436 2437 return TRUE; 2438 } 2439 2440 2441 2443 #define ELF_ARCH bfd_arch_rl78 2444 #define ELF_MACHINE_CODE EM_RL78 2445 #define ELF_MAXPAGESIZE 0x1000 2446 2447 #define TARGET_LITTLE_SYM rl78_elf32_vec 2448 #define TARGET_LITTLE_NAME "elf32-rl78" 2449 2450 #define elf_info_to_howto_rel NULL 2451 #define elf_info_to_howto rl78_info_to_howto_rela 2452 #define elf_backend_object_p rl78_elf_object_p 2453 #define elf_backend_relocate_section rl78_elf_relocate_section 2454 #define elf_symbol_leading_char ('_') 2455 #define elf_backend_can_gc_sections 1 2456 2457 #define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup 2458 #define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup 2459 #define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags 2460 #define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data 2461 #define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data 2462 2463 #define bfd_elf32_bfd_relax_section rl78_elf_relax_section 2464 #define elf_backend_check_relocs rl78_elf_check_relocs 2465 #define elf_backend_always_size_sections \ 2466 rl78_elf_always_size_sections 2467 #define elf_backend_finish_dynamic_sections \ 2468 rl78_elf_finish_dynamic_sections 2469 2470 #include "elf32-target.h" 2471
Indexes created Mon Apr 27 00:23:16 UTC 2026