elf32-rl78.c revision 1.1.1.5
1 /* Renesas RL78 specific support for 32-bit ELF. 2 Copyright (C) 2011-2017 Free Software Foundation, Inc. 3 4 This file is part of BFD, the Binary File Descriptor library. 5 6 This program is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3 of the License, or 9 (at your option) any later version. 10 11 This program is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with this program; if not, write to the Free Software 18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ 19 20 #include "sysdep.h" 21 #include "bfd.h" 22 #include "bfd_stdint.h" 23 #include "libbfd.h" 24 #include "elf-bfd.h" 25 #include "elf/rl78.h" 26 #include "libiberty.h" 27 28 #define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000) 29 30 #define RL78REL(n,sz,bit,shift,complain,pcrel) \ 31 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \ 32 bfd_elf_generic_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE) 33 34 static bfd_reloc_status_type rl78_special_reloc (bfd *, arelent *, asymbol *, void *, 35 asection *, bfd *, char **); 36 37 /* FIXME: We could omit the SHIFT parameter, it is always zero. */ 38 #define RL78_OP_REL(n,sz,bit,shift,complain,pcrel) \ 39 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \ 40 rl78_special_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE) 41 42 /* Note that the relocations around 0x7f are internal to this file; 43 feel free to move them as needed to avoid conflicts with published 44 relocation numbers. */ 45 46 static reloc_howto_type rl78_elf_howto_table [] = 47 { 48 RL78REL (NONE, 3, 0, 0, dont, FALSE), 49 RL78REL (DIR32, 2, 32, 0, signed, FALSE), 50 RL78REL (DIR24S, 2, 24, 0, signed, FALSE), 51 RL78REL (DIR16, 1, 16, 0, dont, FALSE), 52 RL78REL (DIR16U, 1, 16, 0, unsigned, FALSE), 53 RL78REL (DIR16S, 1, 16, 0, signed, FALSE), 54 RL78REL (DIR8, 0, 8, 0, dont, FALSE), 55 RL78REL (DIR8U, 0, 8, 0, unsigned, FALSE), 56 RL78REL (DIR8S, 0, 8, 0, signed, FALSE), 57 RL78REL (DIR24S_PCREL, 2, 24, 0, signed, TRUE), 58 RL78REL (DIR16S_PCREL, 1, 16, 0, signed, TRUE), 59 RL78REL (DIR8S_PCREL, 0, 8, 0, signed, TRUE), 60 RL78REL (DIR16UL, 1, 16, 2, unsigned, FALSE), 61 RL78REL (DIR16UW, 1, 16, 1, unsigned, FALSE), 62 RL78REL (DIR8UL, 0, 8, 2, unsigned, FALSE), 63 RL78REL (DIR8UW, 0, 8, 1, unsigned, FALSE), 64 RL78REL (DIR32_REV, 1, 16, 0, dont, FALSE), 65 RL78REL (DIR16_REV, 1, 16, 0, dont, FALSE), 66 RL78REL (DIR3U_PCREL, 0, 3, 0, dont, TRUE), 67 68 EMPTY_HOWTO (0x13), 69 EMPTY_HOWTO (0x14), 70 EMPTY_HOWTO (0x15), 71 EMPTY_HOWTO (0x16), 72 EMPTY_HOWTO (0x17), 73 EMPTY_HOWTO (0x18), 74 EMPTY_HOWTO (0x19), 75 EMPTY_HOWTO (0x1a), 76 EMPTY_HOWTO (0x1b), 77 EMPTY_HOWTO (0x1c), 78 EMPTY_HOWTO (0x1d), 79 EMPTY_HOWTO (0x1e), 80 EMPTY_HOWTO (0x1f), 81 82 EMPTY_HOWTO (0x20), 83 EMPTY_HOWTO (0x21), 84 EMPTY_HOWTO (0x22), 85 EMPTY_HOWTO (0x23), 86 EMPTY_HOWTO (0x24), 87 EMPTY_HOWTO (0x25), 88 EMPTY_HOWTO (0x26), 89 EMPTY_HOWTO (0x27), 90 EMPTY_HOWTO (0x28), 91 EMPTY_HOWTO (0x29), 92 EMPTY_HOWTO (0x2a), 93 EMPTY_HOWTO (0x2b), 94 EMPTY_HOWTO (0x2c), 95 RL78REL (RH_RELAX, 0, 0, 0, dont, FALSE), 96 97 EMPTY_HOWTO (0x2e), 98 RL78REL (RH_SADDR, 0, 0, 0, dont, FALSE), 99 EMPTY_HOWTO (0x30), 100 EMPTY_HOWTO (0x31), 101 EMPTY_HOWTO (0x32), 102 EMPTY_HOWTO (0x33), 103 EMPTY_HOWTO (0x34), 104 EMPTY_HOWTO (0x35), 105 EMPTY_HOWTO (0x36), 106 EMPTY_HOWTO (0x37), 107 EMPTY_HOWTO (0x38), 108 EMPTY_HOWTO (0x39), 109 EMPTY_HOWTO (0x3a), 110 EMPTY_HOWTO (0x3b), 111 EMPTY_HOWTO (0x3c), 112 EMPTY_HOWTO (0x3d), 113 EMPTY_HOWTO (0x3e), 114 EMPTY_HOWTO (0x3f), 115 EMPTY_HOWTO (0x40), 116 117 RL78_OP_REL (ABS32, 2, 32, 0, dont, FALSE), 118 RL78_OP_REL (ABS24S, 2, 24, 0, signed, FALSE), 119 RL78_OP_REL (ABS16, 1, 16, 0, dont, FALSE), 120 RL78_OP_REL (ABS16U, 1, 16, 0, unsigned, FALSE), 121 RL78_OP_REL (ABS16S, 1, 16, 0, signed, FALSE), 122 RL78_OP_REL (ABS8, 0, 8, 0, dont, FALSE), 123 RL78_OP_REL (ABS8U, 0, 8, 0, unsigned, FALSE), 124 RL78_OP_REL (ABS8S, 0, 8, 0, signed, FALSE), 125 RL78_OP_REL (ABS24S_PCREL, 2, 24, 0, signed, TRUE), 126 RL78_OP_REL (ABS16S_PCREL, 1, 16, 0, signed, TRUE), 127 RL78_OP_REL (ABS8S_PCREL, 0, 8, 0, signed, TRUE), 128 RL78_OP_REL (ABS16UL, 1, 16, 0, unsigned, FALSE), 129 RL78_OP_REL (ABS16UW, 1, 16, 0, unsigned, FALSE), 130 RL78_OP_REL (ABS8UL, 0, 8, 0, unsigned, FALSE), 131 RL78_OP_REL (ABS8UW, 0, 8, 0, unsigned, FALSE), 132 RL78_OP_REL (ABS32_REV, 2, 32, 0, dont, FALSE), 133 RL78_OP_REL (ABS16_REV, 1, 16, 0, dont, FALSE), 134 135 #define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32) 136 137 EMPTY_HOWTO (0x52), 138 EMPTY_HOWTO (0x53), 139 EMPTY_HOWTO (0x54), 140 EMPTY_HOWTO (0x55), 141 EMPTY_HOWTO (0x56), 142 EMPTY_HOWTO (0x57), 143 EMPTY_HOWTO (0x58), 144 EMPTY_HOWTO (0x59), 145 EMPTY_HOWTO (0x5a), 146 EMPTY_HOWTO (0x5b), 147 EMPTY_HOWTO (0x5c), 148 EMPTY_HOWTO (0x5d), 149 EMPTY_HOWTO (0x5e), 150 EMPTY_HOWTO (0x5f), 151 EMPTY_HOWTO (0x60), 152 EMPTY_HOWTO (0x61), 153 EMPTY_HOWTO (0x62), 154 EMPTY_HOWTO (0x63), 155 EMPTY_HOWTO (0x64), 156 EMPTY_HOWTO (0x65), 157 EMPTY_HOWTO (0x66), 158 EMPTY_HOWTO (0x67), 159 EMPTY_HOWTO (0x68), 160 EMPTY_HOWTO (0x69), 161 EMPTY_HOWTO (0x6a), 162 EMPTY_HOWTO (0x6b), 163 EMPTY_HOWTO (0x6c), 164 EMPTY_HOWTO (0x6d), 165 EMPTY_HOWTO (0x6e), 166 EMPTY_HOWTO (0x6f), 167 EMPTY_HOWTO (0x70), 168 EMPTY_HOWTO (0x71), 169 EMPTY_HOWTO (0x72), 170 EMPTY_HOWTO (0x73), 171 EMPTY_HOWTO (0x74), 172 EMPTY_HOWTO (0x75), 173 EMPTY_HOWTO (0x76), 174 EMPTY_HOWTO (0x77), 175 176 EMPTY_HOWTO (0x78), 177 EMPTY_HOWTO (0x79), 178 EMPTY_HOWTO (0x7a), 179 EMPTY_HOWTO (0x7b), 180 EMPTY_HOWTO (0x7c), 181 EMPTY_HOWTO (0x7d), 182 EMPTY_HOWTO (0x7e), 183 EMPTY_HOWTO (0x7f), 184 185 RL78_OP_REL (SYM, 2, 32, 0, dont, FALSE), 186 RL78_OP_REL (OPneg, 2, 32, 0, dont, FALSE), 187 RL78_OP_REL (OPadd, 2, 32, 0, dont, FALSE), 188 RL78_OP_REL (OPsub, 2, 32, 0, dont, FALSE), 189 RL78_OP_REL (OPmul, 2, 32, 0, dont, FALSE), 190 RL78_OP_REL (OPdiv, 2, 32, 0, dont, FALSE), 191 RL78_OP_REL (OPshla, 2, 32, 0, dont, FALSE), 192 RL78_OP_REL (OPshra, 2, 32, 0, dont, FALSE), 193 RL78_OP_REL (OPsctsize, 2, 32, 0, dont, FALSE), 194 EMPTY_HOWTO (0x89), 195 EMPTY_HOWTO (0x8a), 196 EMPTY_HOWTO (0x8b), 197 EMPTY_HOWTO (0x8c), 198 RL78_OP_REL (OPscttop, 2, 32, 0, dont, FALSE), 199 EMPTY_HOWTO (0x8e), 200 EMPTY_HOWTO (0x8f), 201 RL78_OP_REL (OPand, 2, 32, 0, dont, FALSE), 202 RL78_OP_REL (OPor, 2, 32, 0, dont, FALSE), 203 RL78_OP_REL (OPxor, 2, 32, 0, dont, FALSE), 204 RL78_OP_REL (OPnot, 2, 32, 0, dont, FALSE), 205 RL78_OP_REL (OPmod, 2, 32, 0, dont, FALSE), 206 RL78_OP_REL (OPromtop, 2, 32, 0, dont, FALSE), 207 RL78_OP_REL (OPramtop, 2, 32, 0, dont, FALSE) 208 }; 209 210 /* Map BFD reloc types to RL78 ELF reloc types. */ 212 213 struct rl78_reloc_map 214 { 215 bfd_reloc_code_real_type bfd_reloc_val; 216 unsigned int rl78_reloc_val; 217 }; 218 219 static const struct rl78_reloc_map rl78_reloc_map [] = 220 { 221 { BFD_RELOC_NONE, R_RL78_NONE }, 222 { BFD_RELOC_8, R_RL78_DIR8S }, 223 { BFD_RELOC_16, R_RL78_DIR16S }, 224 { BFD_RELOC_24, R_RL78_DIR24S }, 225 { BFD_RELOC_32, R_RL78_DIR32 }, 226 { BFD_RELOC_RL78_16_OP, R_RL78_DIR16 }, 227 { BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL }, 228 { BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL }, 229 { BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL }, 230 { BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL }, 231 { BFD_RELOC_RL78_8U, R_RL78_DIR8U }, 232 { BFD_RELOC_RL78_16U, R_RL78_DIR16U }, 233 { BFD_RELOC_RL78_SYM, R_RL78_SYM }, 234 { BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub }, 235 { BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg }, 236 { BFD_RELOC_RL78_OP_AND, R_RL78_OPand }, 237 { BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra }, 238 { BFD_RELOC_RL78_ABS8, R_RL78_ABS8 }, 239 { BFD_RELOC_RL78_ABS16, R_RL78_ABS16 }, 240 { BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV }, 241 { BFD_RELOC_RL78_ABS32, R_RL78_ABS32 }, 242 { BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV }, 243 { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL }, 244 { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW }, 245 { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U }, 246 { BFD_RELOC_RL78_SADDR, R_RL78_RH_SADDR }, 247 { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX } 248 }; 249 250 static reloc_howto_type * 251 rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, 252 bfd_reloc_code_real_type code) 253 { 254 unsigned int i; 255 256 if (code == BFD_RELOC_RL78_32_OP) 257 return rl78_elf_howto_table + R_RL78_DIR32; 258 259 for (i = ARRAY_SIZE (rl78_reloc_map); i--;) 260 if (rl78_reloc_map [i].bfd_reloc_val == code) 261 return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val; 262 263 return NULL; 264 } 265 266 static reloc_howto_type * 267 rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name) 268 { 269 unsigned int i; 270 271 for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++) 272 if (rl78_elf_howto_table[i].name != NULL 273 && strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0) 274 return rl78_elf_howto_table + i; 275 276 return NULL; 277 } 278 279 /* Set the howto pointer for an RL78 ELF reloc. */ 280 281 static void 282 rl78_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED, 283 arelent * cache_ptr, 284 Elf_Internal_Rela * dst) 285 { 286 unsigned int r_type; 287 288 r_type = ELF32_R_TYPE (dst->r_info); 289 if (r_type >= (unsigned int) R_RL78_max) 290 { 291 /* xgettext:c-format */ 292 _bfd_error_handler (_("%B: invalid RL78 reloc number: %d"), abfd, r_type); 293 r_type = 0; 294 } 295 cache_ptr->howto = rl78_elf_howto_table + r_type; 296 } 297 298 static bfd_vma 300 get_symbol_value (const char * name, 301 struct bfd_link_info * info, 302 bfd * input_bfd, 303 asection * input_section, 304 int offset) 305 { 306 struct bfd_link_hash_entry * h; 307 308 if (info == NULL) 309 return 0; 310 311 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE); 312 313 if (h == NULL 314 || (h->type != bfd_link_hash_defined 315 && h->type != bfd_link_hash_defweak)) 316 { 317 (*info->callbacks->undefined_symbol) 318 (info, name, input_bfd, input_section, offset, TRUE); 319 return 0; 320 } 321 322 return (h->u.def.value 323 + h->u.def.section->output_section->vma 324 + h->u.def.section->output_offset); 325 } 326 327 static bfd_vma 328 get_romstart (struct bfd_link_info * info, 329 bfd * abfd, 330 asection * sec, 331 int offset) 332 { 333 static bfd_boolean cached = FALSE; 334 static bfd_vma cached_value = 0; 335 336 if (!cached) 337 { 338 cached_value = get_symbol_value ("_start", info, abfd, sec, offset); 339 cached = TRUE; 340 } 341 return cached_value; 342 } 343 344 static bfd_vma 345 get_ramstart (struct bfd_link_info * info, 346 bfd * abfd, 347 asection * sec, 348 int offset) 349 { 350 static bfd_boolean cached = FALSE; 351 static bfd_vma cached_value = 0; 352 353 if (!cached) 354 { 355 cached_value = get_symbol_value ("__datastart", info, abfd, sec, offset); 356 cached = TRUE; 357 } 358 return cached_value; 359 } 360 361 #define NUM_STACK_ENTRIES 16 362 static int32_t rl78_stack [ NUM_STACK_ENTRIES ]; 363 static unsigned int rl78_stack_top; 364 365 #define RL78_STACK_PUSH(val) \ 366 do \ 367 { \ 368 if (rl78_stack_top < NUM_STACK_ENTRIES) \ 369 rl78_stack [rl78_stack_top ++] = (val); \ 370 else \ 371 _bfd_error_handler (_("Internal Error: RL78 reloc stack overflow")); \ 372 } \ 373 while (0) 374 375 #define RL78_STACK_POP(dest) \ 376 do \ 377 { \ 378 if (rl78_stack_top > 0) \ 379 (dest) = rl78_stack [-- rl78_stack_top];\ 380 else \ 381 { \ 382 _bfd_error_handler (_("Internal Error: RL78 reloc stack underflow")); \ 383 (dest) = 0; \ 384 } \ 385 } \ 386 while (0) 387 388 /* Special handling for RL78 complex relocs. Returns the 389 value of the reloc, or 0 for relocs which do not generate 390 a result. SYMVAL is the value of the symbol for relocs 391 which use a symbolic argument. */ 392 393 static bfd_vma 394 rl78_compute_complex_reloc (unsigned long r_type, 395 bfd_vma symval, 396 asection * input_section) 397 { 398 int32_t tmp1, tmp2; 399 bfd_vma relocation; 400 401 switch (r_type) 402 { 403 default: 404 return 0; 405 406 case R_RL78_ABS24S_PCREL: 407 case R_RL78_ABS16S_PCREL: 408 case R_RL78_ABS8S_PCREL: 409 RL78_STACK_POP (relocation); 410 relocation -= input_section->output_section->vma + input_section->output_offset; 411 return relocation; 412 413 case R_RL78_ABS32: 414 case R_RL78_ABS32_REV: 415 case R_RL78_ABS16: 416 case R_RL78_ABS16_REV: 417 case R_RL78_ABS16S: 418 case R_RL78_ABS16U: 419 case R_RL78_ABS8: 420 case R_RL78_ABS8U: 421 case R_RL78_ABS8S: 422 RL78_STACK_POP (relocation); 423 return relocation; 424 425 case R_RL78_ABS16UL: 426 case R_RL78_ABS8UL: 427 RL78_STACK_POP (relocation); 428 return relocation >> 2; 429 430 case R_RL78_ABS16UW: 431 case R_RL78_ABS8UW: 432 RL78_STACK_POP (relocation); 433 return relocation >> 1; 434 435 /* The rest of the relocs compute values and then push them onto the stack. */ 436 case R_RL78_OPramtop: 437 case R_RL78_OPromtop: 438 case R_RL78_SYM: 439 RL78_STACK_PUSH (symval); 440 return 0; 441 442 case R_RL78_OPneg: 443 RL78_STACK_POP (tmp1); 444 tmp1 = - tmp1; 445 RL78_STACK_PUSH (tmp1); 446 return 0; 447 448 case R_RL78_OPadd: 449 RL78_STACK_POP (tmp2); 450 RL78_STACK_POP (tmp1); 451 tmp1 += tmp2; 452 RL78_STACK_PUSH (tmp1); 453 return 0; 454 455 case R_RL78_OPsub: 456 /* For the expression "A - B", the assembler pushes A, 457 then B, then OPSUB. So the first op we pop is B, not A. */ 458 RL78_STACK_POP (tmp2); /* B */ 459 RL78_STACK_POP (tmp1); /* A */ 460 tmp1 -= tmp2; /* A - B */ 461 RL78_STACK_PUSH (tmp1); 462 return 0; 463 464 case R_RL78_OPmul: 465 RL78_STACK_POP (tmp2); 466 RL78_STACK_POP (tmp1); 467 tmp1 *= tmp2; 468 RL78_STACK_PUSH (tmp1); 469 return 0; 470 471 case R_RL78_OPdiv: 472 RL78_STACK_POP (tmp2); 473 RL78_STACK_POP (tmp1); 474 tmp1 /= tmp2; 475 RL78_STACK_PUSH (tmp1); 476 return 0; 477 478 case R_RL78_OPshla: 479 RL78_STACK_POP (tmp2); 480 RL78_STACK_POP (tmp1); 481 tmp1 <<= tmp2; 482 RL78_STACK_PUSH (tmp1); 483 return 0; 484 485 case R_RL78_OPshra: 486 RL78_STACK_POP (tmp2); 487 RL78_STACK_POP (tmp1); 488 tmp1 >>= tmp2; 489 RL78_STACK_PUSH (tmp1); 490 return 0; 491 492 case R_RL78_OPsctsize: 493 RL78_STACK_PUSH (input_section->size); 494 return 0; 495 496 case R_RL78_OPscttop: 497 RL78_STACK_PUSH (input_section->output_section->vma); 498 return 0; 499 500 case R_RL78_OPand: 501 RL78_STACK_POP (tmp2); 502 RL78_STACK_POP (tmp1); 503 tmp1 &= tmp2; 504 RL78_STACK_PUSH (tmp1); 505 return 0; 506 507 case R_RL78_OPor: 508 RL78_STACK_POP (tmp2); 509 RL78_STACK_POP (tmp1); 510 tmp1 |= tmp2; 511 RL78_STACK_PUSH (tmp1); 512 return 0; 513 514 case R_RL78_OPxor: 515 RL78_STACK_POP (tmp2); 516 RL78_STACK_POP (tmp1); 517 tmp1 ^= tmp2; 518 RL78_STACK_PUSH (tmp1); 519 return 0; 520 521 case R_RL78_OPnot: 522 RL78_STACK_POP (tmp1); 523 tmp1 = ~ tmp1; 524 RL78_STACK_PUSH (tmp1); 525 return 0; 526 527 case R_RL78_OPmod: 528 RL78_STACK_POP (tmp2); 529 RL78_STACK_POP (tmp1); 530 tmp1 %= tmp2; 531 RL78_STACK_PUSH (tmp1); 532 return 0; 533 } 534 } 535 536 #undef RL78_STACK_PUSH 537 #undef RL78_STACK_POP 538 539 #define OP(i) (contents[reloc->address + (i)]) 540 541 static bfd_reloc_status_type 542 rl78_special_reloc (bfd * input_bfd, 543 arelent * reloc, 544 asymbol * symbol, 545 void * data, 546 asection * input_section, 547 bfd * output_bfd ATTRIBUTE_UNUSED, 548 char ** error_message ATTRIBUTE_UNUSED) 549 { 550 bfd_reloc_status_type r = bfd_reloc_ok; 551 bfd_vma relocation = 0; 552 unsigned long r_type = reloc->howto->type; 553 bfd_byte * contents = data; 554 555 /* If necessary, compute the symbolic value of the relocation. */ 556 switch (r_type) 557 { 558 case R_RL78_SYM: 559 relocation = (symbol->value 560 + symbol->section->output_section->vma 561 + symbol->section->output_offset 562 + reloc->addend); 563 break; 564 565 case R_RL78_OPromtop: 566 relocation = get_romstart (NULL, input_bfd, input_section, 567 reloc->address); 568 break; 569 570 case R_RL78_OPramtop: 571 relocation = get_ramstart (NULL, input_bfd, input_section, 572 reloc->address); 573 break; 574 } 575 576 /* Get the value of the relocation. */ 577 relocation = rl78_compute_complex_reloc (r_type, relocation, input_section); 578 579 /* If the relocation alters the contents of the section then apply it now. 580 Note - since this function is called from 581 bfd_generic_get_relocated_section_contents via bfd_perform_relocation, 582 and not from the linker, we do not perform any range checking. The 583 clients who are calling us are only interested in some relocated section 584 contents, and not any linkage problems that might occur later. */ 585 switch (r_type) 586 { 587 case R_RL78_ABS32: 588 OP (0) = relocation; 589 OP (1) = relocation >> 8; 590 OP (2) = relocation >> 16; 591 OP (3) = relocation >> 24; 592 break; 593 594 case R_RL78_ABS32_REV: 595 OP (3) = relocation; 596 OP (2) = relocation >> 8; 597 OP (1) = relocation >> 16; 598 OP (0) = relocation >> 24; 599 break; 600 601 case R_RL78_ABS24S_PCREL: 602 case R_RL78_ABS24S: 603 OP (0) = relocation; 604 OP (1) = relocation >> 8; 605 OP (2) = relocation >> 16; 606 break; 607 608 case R_RL78_ABS16_REV: 609 OP (1) = relocation; 610 OP (0) = relocation >> 8; 611 break; 612 613 case R_RL78_ABS16S_PCREL: 614 case R_RL78_ABS16: 615 case R_RL78_ABS16S: 616 case R_RL78_ABS16U: 617 case R_RL78_ABS16UL: 618 case R_RL78_ABS16UW: 619 OP (0) = relocation; 620 OP (1) = relocation >> 8; 621 break; 622 623 case R_RL78_ABS8S_PCREL: 624 case R_RL78_ABS8: 625 case R_RL78_ABS8U: 626 case R_RL78_ABS8UL: 627 case R_RL78_ABS8UW: 628 case R_RL78_ABS8S: 629 OP (0) = relocation; 630 break; 631 632 default: 633 break; 634 } 635 636 return r; 637 } 638 639 #undef OP 640 #define OP(i) (contents[rel->r_offset + (i)]) 641 642 /* Relocate an RL78 ELF section. 643 There is some attempt to make this function usable for many architectures, 644 both USE_REL and USE_RELA ['twould be nice if such a critter existed], 645 if only to serve as a learning tool. 646 647 The RELOCATE_SECTION function is called by the new ELF backend linker 648 to handle the relocations for a section. 649 650 The relocs are always passed as Rela structures; if the section 651 actually uses Rel structures, the r_addend field will always be 652 zero. 653 654 This function is responsible for adjusting the section contents as 655 necessary, and (if using Rela relocs and generating a relocatable 656 output file) adjusting the reloc addend as necessary. 657 658 This function does not have to worry about setting the reloc 659 address or the reloc symbol index. 660 661 LOCAL_SYMS is a pointer to the swapped in local symbols. 662 663 LOCAL_SECTIONS is an array giving the section in the input file 664 corresponding to the st_shndx field of each local symbol. 665 666 The global hash table entry for the global symbols can be found 667 via elf_sym_hashes (input_bfd). 668 669 When generating relocatable output, this function must handle 670 STB_LOCAL/STT_SECTION symbols specially. The output symbol is 671 going to be the section symbol corresponding to the output 672 section, which means that the addend must be adjusted 673 accordingly. */ 674 675 static bfd_boolean 676 rl78_elf_relocate_section 677 (bfd * output_bfd, 678 struct bfd_link_info * info, 679 bfd * input_bfd, 680 asection * input_section, 681 bfd_byte * contents, 682 Elf_Internal_Rela * relocs, 683 Elf_Internal_Sym * local_syms, 684 asection ** local_sections) 685 { 686 Elf_Internal_Shdr * symtab_hdr; 687 struct elf_link_hash_entry ** sym_hashes; 688 Elf_Internal_Rela * rel; 689 Elf_Internal_Rela * relend; 690 asection *splt; 691 692 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr; 693 sym_hashes = elf_sym_hashes (input_bfd); 694 relend = relocs + input_section->reloc_count; 695 696 splt = elf_hash_table (info)->splt; 697 698 for (rel = relocs; rel < relend; rel ++) 699 { 700 reloc_howto_type * howto; 701 unsigned long r_symndx; 702 Elf_Internal_Sym * sym; 703 asection * sec; 704 struct elf_link_hash_entry * h; 705 bfd_vma relocation; 706 bfd_reloc_status_type r; 707 const char * name = NULL; 708 bfd_boolean unresolved_reloc = TRUE; 709 int r_type; 710 711 r_type = ELF32_R_TYPE (rel->r_info); 712 r_symndx = ELF32_R_SYM (rel->r_info); 713 714 howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info); 715 h = NULL; 716 sym = NULL; 717 sec = NULL; 718 relocation = 0; 719 720 if (r_symndx < symtab_hdr->sh_info) 721 { 722 sym = local_syms + r_symndx; 723 sec = local_sections [r_symndx]; 724 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel); 725 726 name = bfd_elf_string_from_elf_section 727 (input_bfd, symtab_hdr->sh_link, sym->st_name); 728 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name; 729 } 730 else 731 { 732 bfd_boolean warned ATTRIBUTE_UNUSED; 733 bfd_boolean ignored ATTRIBUTE_UNUSED; 734 735 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, 736 r_symndx, symtab_hdr, sym_hashes, h, 737 sec, relocation, unresolved_reloc, 738 warned, ignored); 739 740 name = h->root.root.string; 741 } 742 743 if (sec != NULL && discarded_section (sec)) 744 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, 745 rel, 1, relend, howto, 0, contents); 746 747 if (bfd_link_relocatable (info)) 748 { 749 /* This is a relocatable link. We don't have to change 750 anything, unless the reloc is against a section symbol, 751 in which case we have to adjust according to where the 752 section symbol winds up in the output section. */ 753 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION) 754 rel->r_addend += sec->output_offset; 755 continue; 756 } 757 758 switch (ELF32_R_TYPE (rel->r_info)) 759 { 760 case R_RL78_DIR16S: 761 { 762 bfd_vma *plt_offset; 763 764 if (h != NULL) 765 plt_offset = &h->plt.offset; 766 else 767 plt_offset = elf_local_got_offsets (input_bfd) + r_symndx; 768 769 if (! valid_16bit_address (relocation)) 770 { 771 /* If this is the first time we've processed this symbol, 772 fill in the plt entry with the correct symbol address. */ 773 if ((*plt_offset & 1) == 0) 774 { 775 unsigned int x; 776 777 x = 0x000000ec; /* br !!abs24 */ 778 x |= (relocation << 8) & 0xffffff00; 779 bfd_put_32 (input_bfd, x, splt->contents + *plt_offset); 780 *plt_offset |= 1; 781 } 782 783 relocation = (splt->output_section->vma 784 + splt->output_offset 785 + (*plt_offset & -2)); 786 if (name) 787 { 788 char *newname = bfd_malloc (strlen(name)+5); 789 strcpy (newname, name); 790 strcat(newname, ".plt"); 791 _bfd_generic_link_add_one_symbol (info, 792 input_bfd, 793 newname, 794 BSF_FUNCTION | BSF_WEAK, 795 splt, 796 (*plt_offset & -2), 797 0, 798 1, 799 0, 800 0); 801 } 802 } 803 } 804 break; 805 } 806 807 if (h != NULL && h->root.type == bfd_link_hash_undefweak) 808 /* If the symbol is undefined and weak 809 then the relocation resolves to zero. */ 810 relocation = 0; 811 else 812 { 813 if (howto->pc_relative) 814 { 815 relocation -= (input_section->output_section->vma 816 + input_section->output_offset 817 + rel->r_offset); 818 relocation -= bfd_get_reloc_size (howto); 819 } 820 821 relocation += rel->r_addend; 822 } 823 824 r = bfd_reloc_ok; 825 826 #define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow 827 828 /* Opcode relocs are always big endian. Data relocs are bi-endian. */ 829 switch (r_type) 830 { 831 case R_RL78_NONE: 832 break; 833 834 case R_RL78_RH_RELAX: 835 break; 836 837 case R_RL78_DIR8S_PCREL: 838 RANGE (-128, 127); 839 OP (0) = relocation; 840 break; 841 842 case R_RL78_DIR8S: 843 RANGE (-128, 255); 844 OP (0) = relocation; 845 break; 846 847 case R_RL78_DIR8U: 848 RANGE (0, 255); 849 OP (0) = relocation; 850 break; 851 852 case R_RL78_DIR16S_PCREL: 853 RANGE (-32768, 32767); 854 OP (0) = relocation; 855 OP (1) = relocation >> 8; 856 break; 857 858 case R_RL78_DIR16S: 859 if ((relocation & 0xf0000) == 0xf0000) 860 relocation &= 0xffff; 861 RANGE (-32768, 65535); 862 OP (0) = relocation; 863 OP (1) = relocation >> 8; 864 break; 865 866 case R_RL78_DIR16U: 867 RANGE (0, 65536); 868 OP (0) = relocation; 869 OP (1) = relocation >> 8; 870 break; 871 872 case R_RL78_DIR16: 873 RANGE (-32768, 65536); 874 OP (0) = relocation; 875 OP (1) = relocation >> 8; 876 break; 877 878 case R_RL78_DIR16_REV: 879 RANGE (-32768, 65536); 880 OP (1) = relocation; 881 OP (0) = relocation >> 8; 882 break; 883 884 case R_RL78_DIR3U_PCREL: 885 RANGE (3, 10); 886 OP (0) &= 0xf8; 887 OP (0) |= relocation & 0x07; 888 break; 889 890 case R_RL78_DIR24S_PCREL: 891 RANGE (-0x800000, 0x7fffff); 892 OP (0) = relocation; 893 OP (1) = relocation >> 8; 894 OP (2) = relocation >> 16; 895 break; 896 897 case R_RL78_DIR24S: 898 RANGE (-0x800000, 0x7fffff); 899 OP (0) = relocation; 900 OP (1) = relocation >> 8; 901 OP (2) = relocation >> 16; 902 break; 903 904 case R_RL78_DIR32: 905 OP (0) = relocation; 906 OP (1) = relocation >> 8; 907 OP (2) = relocation >> 16; 908 OP (3) = relocation >> 24; 909 break; 910 911 case R_RL78_DIR32_REV: 912 OP (3) = relocation; 913 OP (2) = relocation >> 8; 914 OP (1) = relocation >> 16; 915 OP (0) = relocation >> 24; 916 break; 917 918 case R_RL78_RH_SFR: 919 RANGE (0xfff00, 0xfffff); 920 OP (0) = relocation & 0xff; 921 break; 922 923 case R_RL78_RH_SADDR: 924 RANGE (0xffe20, 0xfff1f); 925 OP (0) = relocation & 0xff; 926 break; 927 928 /* Complex reloc handling: */ 929 case R_RL78_ABS32: 930 case R_RL78_ABS32_REV: 931 case R_RL78_ABS24S_PCREL: 932 case R_RL78_ABS24S: 933 case R_RL78_ABS16: 934 case R_RL78_ABS16_REV: 935 case R_RL78_ABS16S_PCREL: 936 case R_RL78_ABS16S: 937 case R_RL78_ABS16U: 938 case R_RL78_ABS16UL: 939 case R_RL78_ABS16UW: 940 case R_RL78_ABS8: 941 case R_RL78_ABS8U: 942 case R_RL78_ABS8UL: 943 case R_RL78_ABS8UW: 944 case R_RL78_ABS8S_PCREL: 945 case R_RL78_ABS8S: 946 case R_RL78_OPneg: 947 case R_RL78_OPadd: 948 case R_RL78_OPsub: 949 case R_RL78_OPmul: 950 case R_RL78_OPdiv: 951 case R_RL78_OPshla: 952 case R_RL78_OPshra: 953 case R_RL78_OPsctsize: 954 case R_RL78_OPscttop: 955 case R_RL78_OPand: 956 case R_RL78_OPor: 957 case R_RL78_OPxor: 958 case R_RL78_OPnot: 959 case R_RL78_OPmod: 960 relocation = rl78_compute_complex_reloc (r_type, 0, input_section); 961 962 switch (r_type) 963 { 964 case R_RL78_ABS32: 965 OP (0) = relocation; 966 OP (1) = relocation >> 8; 967 OP (2) = relocation >> 16; 968 OP (3) = relocation >> 24; 969 break; 970 971 case R_RL78_ABS32_REV: 972 OP (3) = relocation; 973 OP (2) = relocation >> 8; 974 OP (1) = relocation >> 16; 975 OP (0) = relocation >> 24; 976 break; 977 978 case R_RL78_ABS24S_PCREL: 979 case R_RL78_ABS24S: 980 RANGE (-0x800000, 0x7fffff); 981 OP (0) = relocation; 982 OP (1) = relocation >> 8; 983 OP (2) = relocation >> 16; 984 break; 985 986 case R_RL78_ABS16: 987 RANGE (-32768, 65535); 988 OP (0) = relocation; 989 OP (1) = relocation >> 8; 990 break; 991 992 case R_RL78_ABS16_REV: 993 RANGE (-32768, 65535); 994 OP (1) = relocation; 995 OP (0) = relocation >> 8; 996 break; 997 998 case R_RL78_ABS16S_PCREL: 999 case R_RL78_ABS16S: 1000 RANGE (-32768, 32767); 1001 OP (0) = relocation; 1002 OP (1) = relocation >> 8; 1003 break; 1004 1005 case R_RL78_ABS16U: 1006 case R_RL78_ABS16UL: 1007 case R_RL78_ABS16UW: 1008 RANGE (0, 65536); 1009 OP (0) = relocation; 1010 OP (1) = relocation >> 8; 1011 break; 1012 1013 case R_RL78_ABS8: 1014 RANGE (-128, 255); 1015 OP (0) = relocation; 1016 break; 1017 1018 case R_RL78_ABS8U: 1019 case R_RL78_ABS8UL: 1020 case R_RL78_ABS8UW: 1021 RANGE (0, 255); 1022 OP (0) = relocation; 1023 break; 1024 1025 case R_RL78_ABS8S_PCREL: 1026 case R_RL78_ABS8S: 1027 RANGE (-128, 127); 1028 OP (0) = relocation; 1029 break; 1030 1031 default: 1032 break; 1033 } 1034 break; 1035 1036 case R_RL78_SYM: 1037 if (r_symndx < symtab_hdr->sh_info) 1038 relocation = sec->output_section->vma + sec->output_offset 1039 + sym->st_value + rel->r_addend; 1040 else if (h != NULL 1041 && (h->root.type == bfd_link_hash_defined 1042 || h->root.type == bfd_link_hash_defweak)) 1043 relocation = h->root.u.def.value 1044 + sec->output_section->vma 1045 + sec->output_offset 1046 + rel->r_addend; 1047 else 1048 { 1049 relocation = 0; 1050 if (h->root.type != bfd_link_hash_undefweak) 1051 _bfd_error_handler (_("Warning: RL78_SYM reloc with an unknown symbol")); 1052 } 1053 (void) rl78_compute_complex_reloc (r_type, relocation, input_section); 1054 break; 1055 1056 case R_RL78_OPromtop: 1057 relocation = get_romstart (info, input_bfd, input_section, rel->r_offset); 1058 (void) rl78_compute_complex_reloc (r_type, relocation, input_section); 1059 break; 1060 1061 case R_RL78_OPramtop: 1062 relocation = get_ramstart (info, input_bfd, input_section, rel->r_offset); 1063 (void) rl78_compute_complex_reloc (r_type, relocation, input_section); 1064 break; 1065 1066 default: 1067 r = bfd_reloc_notsupported; 1068 break; 1069 } 1070 1071 if (r != bfd_reloc_ok) 1072 { 1073 const char * msg = NULL; 1074 1075 switch (r) 1076 { 1077 case bfd_reloc_overflow: 1078 /* Catch the case of a missing function declaration 1079 and emit a more helpful error message. */ 1080 if (r_type == R_RL78_DIR24S_PCREL) 1081 /* xgettext:c-format */ 1082 msg = _("%B(%A): error: call to undefined function '%s'"); 1083 else 1084 (*info->callbacks->reloc_overflow) 1085 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0, 1086 input_bfd, input_section, rel->r_offset); 1087 break; 1088 1089 case bfd_reloc_undefined: 1090 (*info->callbacks->undefined_symbol) 1091 (info, name, input_bfd, input_section, rel->r_offset, TRUE); 1092 break; 1093 1094 case bfd_reloc_other: 1095 /* xgettext:c-format */ 1096 msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area"); 1097 break; 1098 1099 case bfd_reloc_outofrange: 1100 /* xgettext:c-format */ 1101 msg = _("%B(%A): internal error: out of range error"); 1102 break; 1103 1104 case bfd_reloc_notsupported: 1105 /* xgettext:c-format */ 1106 msg = _("%B(%A): internal error: unsupported relocation error"); 1107 break; 1108 1109 case bfd_reloc_dangerous: 1110 /* xgettext:c-format */ 1111 msg = _("%B(%A): internal error: dangerous relocation"); 1112 break; 1113 1114 default: 1115 /* xgettext:c-format */ 1116 msg = _("%B(%A): internal error: unknown error"); 1117 break; 1118 } 1119 1120 if (msg) 1121 _bfd_error_handler (msg, input_bfd, input_section, name); 1122 } 1123 } 1124 1125 return TRUE; 1126 } 1127 1128 /* Function to set the ELF flag bits. */ 1130 1131 static bfd_boolean 1132 rl78_elf_set_private_flags (bfd * abfd, flagword flags) 1133 { 1134 elf_elfheader (abfd)->e_flags = flags; 1135 elf_flags_init (abfd) = TRUE; 1136 return TRUE; 1137 } 1138 1139 static bfd_boolean no_warn_mismatch = FALSE; 1140 1141 void bfd_elf32_rl78_set_target_flags (bfd_boolean); 1142 1143 void 1144 bfd_elf32_rl78_set_target_flags (bfd_boolean user_no_warn_mismatch) 1145 { 1146 no_warn_mismatch = user_no_warn_mismatch; 1147 } 1148 1149 static const char * 1150 rl78_cpu_name (flagword flags) 1151 { 1152 switch (flags & E_FLAG_RL78_CPU_MASK) 1153 { 1154 default: return ""; 1155 case E_FLAG_RL78_G10: return "G10"; 1156 case E_FLAG_RL78_G13: return "G13"; 1157 case E_FLAG_RL78_G14: return "G14"; 1158 } 1159 } 1160 1161 /* Merge backend specific data from an object file to the output 1162 object file when linking. */ 1163 1164 static bfd_boolean 1165 rl78_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info) 1166 { 1167 bfd *obfd = info->output_bfd; 1168 flagword new_flags; 1169 flagword old_flags; 1170 bfd_boolean error = FALSE; 1171 1172 new_flags = elf_elfheader (ibfd)->e_flags; 1173 old_flags = elf_elfheader (obfd)->e_flags; 1174 1175 if (!elf_flags_init (obfd)) 1176 { 1177 /* First call, no flags set. */ 1178 elf_flags_init (obfd) = TRUE; 1179 elf_elfheader (obfd)->e_flags = new_flags; 1180 } 1181 else if (old_flags != new_flags) 1182 { 1183 flagword changed_flags = old_flags ^ new_flags; 1184 1185 if (changed_flags & E_FLAG_RL78_CPU_MASK) 1186 { 1187 flagword out_cpu = old_flags & E_FLAG_RL78_CPU_MASK; 1188 flagword in_cpu = new_flags & E_FLAG_RL78_CPU_MASK; 1189 1190 if (in_cpu == E_FLAG_RL78_ANY_CPU || in_cpu == out_cpu) 1191 /* It does not matter what new_cpu may have. */; 1192 else if (out_cpu == E_FLAG_RL78_ANY_CPU) 1193 { 1194 if (in_cpu == E_FLAG_RL78_G10) 1195 { 1196 /* G10 files can only be linked with other G10 files. 1197 If the output is set to "any" this means that it is 1198 a G14 file that does not use hardware multiply/divide, 1199 but that is still incompatible with the G10 ABI. */ 1200 error = TRUE; 1201 1202 _bfd_error_handler 1203 /* xgettext:c-format */ 1204 (_("RL78 ABI conflict: G10 file %B cannot be linked" 1205 " with %s file %B"), 1206 ibfd, rl78_cpu_name (out_cpu), obfd); 1207 } 1208 else 1209 { 1210 old_flags &= ~ E_FLAG_RL78_CPU_MASK; 1211 old_flags |= in_cpu; 1212 elf_elfheader (obfd)->e_flags = old_flags; 1213 } 1214 } 1215 else 1216 { 1217 error = TRUE; 1218 1219 _bfd_error_handler 1220 /* xgettext:c-format */ 1221 (_("RL78 ABI conflict: cannot link %s file %B with %s file %B"), 1222 rl78_cpu_name (in_cpu), ibfd, 1223 rl78_cpu_name (out_cpu), obfd); 1224 } 1225 } 1226 1227 if (changed_flags & E_FLAG_RL78_64BIT_DOUBLES) 1228 { 1229 _bfd_error_handler 1230 (_("RL78 merge conflict: cannot link 32-bit and 64-bit objects together")); 1231 1232 if (old_flags & E_FLAG_RL78_64BIT_DOUBLES) 1233 /* xgettext:c-format */ 1234 _bfd_error_handler (_("- %B is 64-bit, %B is not"), 1235 obfd, ibfd); 1236 else 1237 /* xgettext:c-format */ 1238 _bfd_error_handler (_("- %B is 64-bit, %B is not"), 1239 ibfd, obfd); 1240 error = TRUE; 1241 } 1242 } 1243 1244 return !error; 1245 } 1246 1247 static bfd_boolean 1249 rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr) 1250 { 1251 FILE * file = (FILE *) ptr; 1252 flagword flags; 1253 1254 BFD_ASSERT (abfd != NULL && ptr != NULL); 1255 1256 /* Print normal ELF private data. */ 1257 _bfd_elf_print_private_bfd_data (abfd, ptr); 1258 1259 flags = elf_elfheader (abfd)->e_flags; 1260 fprintf (file, _("private flags = 0x%lx:"), (long) flags); 1261 1262 if (flags & E_FLAG_RL78_CPU_MASK) 1263 fprintf (file, " [%s]", rl78_cpu_name (flags)); 1264 1265 if (flags & E_FLAG_RL78_64BIT_DOUBLES) 1266 fprintf (file, _(" [64-bit doubles]")); 1267 1268 fputc ('\n', file); 1269 return TRUE; 1270 } 1271 1272 /* Return the MACH for an e_flags value. */ 1273 1274 static int 1275 elf32_rl78_machine (bfd * abfd ATTRIBUTE_UNUSED) 1276 { 1277 return bfd_mach_rl78; 1278 } 1279 1280 static bfd_boolean 1281 rl78_elf_object_p (bfd * abfd) 1282 { 1283 bfd_default_set_arch_mach (abfd, bfd_arch_rl78, 1284 elf32_rl78_machine (abfd)); 1285 return TRUE; 1286 } 1287 1288 /* support PLT for 16-bit references to 24-bit functions. */ 1290 1291 /* We support 16-bit pointers to code above 64k by generating a thunk 1292 below 64k containing a JMP instruction to the final address. */ 1293 1294 static bfd_boolean 1295 rl78_elf_check_relocs 1296 (bfd * abfd, 1297 struct bfd_link_info * info, 1298 asection * sec, 1299 const Elf_Internal_Rela * relocs) 1300 { 1301 Elf_Internal_Shdr * symtab_hdr; 1302 struct elf_link_hash_entry ** sym_hashes; 1303 const Elf_Internal_Rela * rel; 1304 const Elf_Internal_Rela * rel_end; 1305 bfd_vma *local_plt_offsets; 1306 asection *splt; 1307 bfd *dynobj; 1308 1309 if (bfd_link_relocatable (info)) 1310 return TRUE; 1311 1312 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 1313 sym_hashes = elf_sym_hashes (abfd); 1314 local_plt_offsets = elf_local_got_offsets (abfd); 1315 dynobj = elf_hash_table(info)->dynobj; 1316 1317 rel_end = relocs + sec->reloc_count; 1318 for (rel = relocs; rel < rel_end; rel++) 1319 { 1320 struct elf_link_hash_entry *h; 1321 unsigned long r_symndx; 1322 bfd_vma *offset; 1323 1324 r_symndx = ELF32_R_SYM (rel->r_info); 1325 if (r_symndx < symtab_hdr->sh_info) 1326 h = NULL; 1327 else 1328 { 1329 h = sym_hashes[r_symndx - symtab_hdr->sh_info]; 1330 while (h->root.type == bfd_link_hash_indirect 1331 || h->root.type == bfd_link_hash_warning) 1332 h = (struct elf_link_hash_entry *) h->root.u.i.link; 1333 1334 /* PR15323, ref flags aren't set for references in the same 1335 object. */ 1336 h->root.non_ir_ref = 1; 1337 } 1338 1339 switch (ELF32_R_TYPE (rel->r_info)) 1340 { 1341 /* This relocation describes a 16-bit pointer to a function. 1342 We may need to allocate a thunk in low memory; reserve memory 1343 for it now. */ 1344 case R_RL78_DIR16S: 1345 if (dynobj == NULL) 1346 elf_hash_table (info)->dynobj = dynobj = abfd; 1347 splt = elf_hash_table (info)->splt; 1348 if (splt == NULL) 1349 { 1350 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS 1351 | SEC_IN_MEMORY | SEC_LINKER_CREATED 1352 | SEC_READONLY | SEC_CODE); 1353 splt = bfd_make_section_anyway_with_flags (dynobj, ".plt", 1354 flags); 1355 elf_hash_table (info)->splt = splt; 1356 if (splt == NULL 1357 || ! bfd_set_section_alignment (dynobj, splt, 1)) 1358 return FALSE; 1359 } 1360 1361 if (h != NULL) 1362 offset = &h->plt.offset; 1363 else 1364 { 1365 if (local_plt_offsets == NULL) 1366 { 1367 size_t size; 1368 unsigned int i; 1369 1370 size = symtab_hdr->sh_info * sizeof (bfd_vma); 1371 local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size); 1372 if (local_plt_offsets == NULL) 1373 return FALSE; 1374 elf_local_got_offsets (abfd) = local_plt_offsets; 1375 1376 for (i = 0; i < symtab_hdr->sh_info; i++) 1377 local_plt_offsets[i] = (bfd_vma) -1; 1378 } 1379 offset = &local_plt_offsets[r_symndx]; 1380 } 1381 1382 if (*offset == (bfd_vma) -1) 1383 { 1384 *offset = splt->size; 1385 splt->size += 4; 1386 } 1387 break; 1388 } 1389 } 1390 1391 return TRUE; 1392 } 1393 1394 /* This must exist if dynobj is ever set. */ 1395 1396 static bfd_boolean 1397 rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED, 1398 struct bfd_link_info *info) 1399 { 1400 bfd *dynobj; 1401 asection *splt; 1402 1403 if (!elf_hash_table (info)->dynamic_sections_created) 1404 return TRUE; 1405 1406 /* As an extra sanity check, verify that all plt entries have been 1407 filled in. However, relaxing might have changed the relocs so 1408 that some plt entries don't get filled in, so we have to skip 1409 this check if we're relaxing. Unfortunately, check_relocs is 1410 called before relaxation. */ 1411 1412 if (info->relax_trip > 0) 1413 return TRUE; 1414 1415 dynobj = elf_hash_table (info)->dynobj; 1416 splt = elf_hash_table (info)->splt; 1417 if (dynobj != NULL && splt != NULL) 1418 { 1419 bfd_byte *contents = splt->contents; 1420 unsigned int i, size = splt->size; 1421 1422 for (i = 0; i < size; i += 4) 1423 { 1424 unsigned int x = bfd_get_32 (dynobj, contents + i); 1425 BFD_ASSERT (x != 0); 1426 } 1427 } 1428 1429 return TRUE; 1430 } 1431 1432 static bfd_boolean 1433 rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, 1434 struct bfd_link_info *info) 1435 { 1436 bfd *dynobj; 1437 asection *splt; 1438 1439 if (bfd_link_relocatable (info)) 1440 return TRUE; 1441 1442 dynobj = elf_hash_table (info)->dynobj; 1443 if (dynobj == NULL) 1444 return TRUE; 1445 1446 splt = elf_hash_table (info)->splt; 1447 BFD_ASSERT (splt != NULL); 1448 1449 splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size); 1450 if (splt->contents == NULL) 1451 return FALSE; 1452 1453 return TRUE; 1454 } 1455 1456 1457 1459 /* Handle relaxing. */ 1460 1461 /* A subroutine of rl78_elf_relax_section. If the global symbol H 1462 is within the low 64k, remove any entry for it in the plt. */ 1463 1464 struct relax_plt_data 1465 { 1466 asection *splt; 1467 bfd_boolean *again; 1468 }; 1469 1470 static bfd_boolean 1471 rl78_relax_plt_check (struct elf_link_hash_entry *h, void * xdata) 1472 { 1473 struct relax_plt_data *data = (struct relax_plt_data *) xdata; 1474 1475 if (h->plt.offset != (bfd_vma) -1) 1476 { 1477 bfd_vma address; 1478 1479 if (h->root.type == bfd_link_hash_undefined 1480 || h->root.type == bfd_link_hash_undefweak) 1481 address = 0; 1482 else 1483 address = (h->root.u.def.section->output_section->vma 1484 + h->root.u.def.section->output_offset 1485 + h->root.u.def.value); 1486 1487 if (valid_16bit_address (address)) 1488 { 1489 h->plt.offset = -1; 1490 data->splt->size -= 4; 1491 *data->again = TRUE; 1492 } 1493 } 1494 1495 return TRUE; 1496 } 1497 1498 /* A subroutine of rl78_elf_relax_section. If the global symbol H 1499 previously had a plt entry, give it a new entry offset. */ 1500 1501 static bfd_boolean 1502 rl78_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata) 1503 { 1504 bfd_vma *entry = (bfd_vma *) xdata; 1505 1506 if (h->plt.offset != (bfd_vma) -1) 1507 { 1508 h->plt.offset = *entry; 1509 *entry += 4; 1510 } 1511 1512 return TRUE; 1513 } 1514 1515 static bfd_boolean 1516 rl78_elf_relax_plt_section (bfd *dynobj, 1517 asection *splt, 1518 struct bfd_link_info *info, 1519 bfd_boolean *again) 1520 { 1521 struct relax_plt_data relax_plt_data; 1522 bfd *ibfd; 1523 1524 /* Assume nothing changes. */ 1525 *again = FALSE; 1526 1527 if (bfd_link_relocatable (info)) 1528 return TRUE; 1529 1530 /* We only relax the .plt section at the moment. */ 1531 if (dynobj != elf_hash_table (info)->dynobj 1532 || strcmp (splt->name, ".plt") != 0) 1533 return TRUE; 1534 1535 /* Quick check for an empty plt. */ 1536 if (splt->size == 0) 1537 return TRUE; 1538 1539 /* Map across all global symbols; see which ones happen to 1540 fall in the low 64k. */ 1541 relax_plt_data.splt = splt; 1542 relax_plt_data.again = again; 1543 elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check, 1544 &relax_plt_data); 1545 1546 /* Likewise for local symbols, though that's somewhat less convenient 1547 as we have to walk the list of input bfds and swap in symbol data. */ 1548 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next) 1549 { 1550 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd); 1551 Elf_Internal_Shdr *symtab_hdr; 1552 Elf_Internal_Sym *isymbuf = NULL; 1553 unsigned int idx; 1554 1555 if (! local_plt_offsets) 1556 continue; 1557 1558 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr; 1559 if (symtab_hdr->sh_info != 0) 1560 { 1561 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; 1562 if (isymbuf == NULL) 1563 isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr, 1564 symtab_hdr->sh_info, 0, 1565 NULL, NULL, NULL); 1566 if (isymbuf == NULL) 1567 return FALSE; 1568 } 1569 1570 for (idx = 0; idx < symtab_hdr->sh_info; ++idx) 1571 { 1572 Elf_Internal_Sym *isym; 1573 asection *tsec; 1574 bfd_vma address; 1575 1576 if (local_plt_offsets[idx] == (bfd_vma) -1) 1577 continue; 1578 1579 isym = &isymbuf[idx]; 1580 if (isym->st_shndx == SHN_UNDEF) 1581 continue; 1582 else if (isym->st_shndx == SHN_ABS) 1583 tsec = bfd_abs_section_ptr; 1584 else if (isym->st_shndx == SHN_COMMON) 1585 tsec = bfd_com_section_ptr; 1586 else 1587 tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx); 1588 1589 address = (tsec->output_section->vma 1590 + tsec->output_offset 1591 + isym->st_value); 1592 if (valid_16bit_address (address)) 1593 { 1594 local_plt_offsets[idx] = -1; 1595 splt->size -= 4; 1596 *again = TRUE; 1597 } 1598 } 1599 1600 if (isymbuf != NULL 1601 && symtab_hdr->contents != (unsigned char *) isymbuf) 1602 { 1603 if (! info->keep_memory) 1604 free (isymbuf); 1605 else 1606 { 1607 /* Cache the symbols for elf_link_input_bfd. */ 1608 symtab_hdr->contents = (unsigned char *) isymbuf; 1609 } 1610 } 1611 } 1612 1613 /* If we changed anything, walk the symbols again to reallocate 1614 .plt entry addresses. */ 1615 if (*again && splt->size > 0) 1616 { 1617 bfd_vma entry = 0; 1618 1619 elf_link_hash_traverse (elf_hash_table (info), 1620 rl78_relax_plt_realloc, &entry); 1621 1622 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next) 1623 { 1624 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd); 1625 unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info; 1626 unsigned int idx; 1627 1628 if (! local_plt_offsets) 1629 continue; 1630 1631 for (idx = 0; idx < nlocals; ++idx) 1632 if (local_plt_offsets[idx] != (bfd_vma) -1) 1633 { 1634 local_plt_offsets[idx] = entry; 1635 entry += 4; 1636 } 1637 } 1638 } 1639 1640 return TRUE; 1641 } 1642 1643 /* Delete some bytes from a section while relaxing. */ 1644 1645 static bfd_boolean 1646 elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count, 1647 Elf_Internal_Rela *alignment_rel, int force_snip) 1648 { 1649 Elf_Internal_Shdr * symtab_hdr; 1650 unsigned int sec_shndx; 1651 bfd_byte * contents; 1652 Elf_Internal_Rela * irel; 1653 Elf_Internal_Rela * irelend; 1654 Elf_Internal_Sym * isym; 1655 Elf_Internal_Sym * isymend; 1656 bfd_vma toaddr; 1657 unsigned int symcount; 1658 struct elf_link_hash_entry ** sym_hashes; 1659 struct elf_link_hash_entry ** end_hashes; 1660 1661 if (!alignment_rel) 1662 force_snip = 1; 1663 1664 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); 1665 1666 contents = elf_section_data (sec)->this_hdr.contents; 1667 1668 /* The deletion must stop at the next alignment boundary, if 1669 ALIGNMENT_REL is non-NULL. */ 1670 toaddr = sec->size; 1671 if (alignment_rel) 1672 toaddr = alignment_rel->r_offset; 1673 1674 irel = elf_section_data (sec)->relocs; 1675 if (irel == NULL) 1676 { 1677 _bfd_elf_link_read_relocs (sec->owner, sec, NULL, NULL, TRUE); 1678 irel = elf_section_data (sec)->relocs; 1679 } 1680 1681 irelend = irel + sec->reloc_count; 1682 1683 /* Actually delete the bytes. */ 1684 memmove (contents + addr, contents + addr + count, 1685 (size_t) (toaddr - addr - count)); 1686 1687 /* If we don't have an alignment marker to worry about, we can just 1688 shrink the section. Otherwise, we have to fill in the newly 1689 created gap with NOP insns (0x03). */ 1690 if (force_snip) 1691 sec->size -= count; 1692 else 1693 memset (contents + toaddr - count, 0x03, count); 1694 1695 /* Adjust all the relocs. */ 1696 for (; irel && irel < irelend; irel++) 1697 { 1698 /* Get the new reloc address. */ 1699 if (irel->r_offset > addr 1700 && (irel->r_offset < toaddr 1701 || (force_snip && irel->r_offset == toaddr))) 1702 irel->r_offset -= count; 1703 1704 /* If we see an ALIGN marker at the end of the gap, we move it 1705 to the beginning of the gap, since marking these gaps is what 1706 they're for. */ 1707 if (irel->r_offset == toaddr 1708 && ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX 1709 && irel->r_addend & RL78_RELAXA_ALIGN) 1710 irel->r_offset -= count; 1711 } 1712 1713 /* Adjust the local symbols defined in this section. */ 1714 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 1715 isym = (Elf_Internal_Sym *) symtab_hdr->contents; 1716 isymend = isym + symtab_hdr->sh_info; 1717 1718 for (; isym < isymend; isym++) 1719 { 1720 /* If the symbol is in the range of memory we just moved, we 1721 have to adjust its value. */ 1722 if (isym->st_shndx == sec_shndx 1723 && isym->st_value > addr 1724 && isym->st_value < toaddr) 1725 isym->st_value -= count; 1726 1727 /* If the symbol *spans* the bytes we just deleted (i.e. it's 1728 *end* is in the moved bytes but it's *start* isn't), then we 1729 must adjust its size. */ 1730 if (isym->st_shndx == sec_shndx 1731 && isym->st_value < addr 1732 && isym->st_value + isym->st_size > addr 1733 && isym->st_value + isym->st_size < toaddr) 1734 isym->st_size -= count; 1735 } 1736 1737 /* Now adjust the global symbols defined in this section. */ 1738 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) 1739 - symtab_hdr->sh_info); 1740 sym_hashes = elf_sym_hashes (abfd); 1741 end_hashes = sym_hashes + symcount; 1742 1743 for (; sym_hashes < end_hashes; sym_hashes++) 1744 { 1745 struct elf_link_hash_entry *sym_hash = *sym_hashes; 1746 1747 if ((sym_hash->root.type == bfd_link_hash_defined 1748 || sym_hash->root.type == bfd_link_hash_defweak) 1749 && sym_hash->root.u.def.section == sec) 1750 { 1751 /* As above, adjust the value if needed. */ 1752 if (sym_hash->root.u.def.value > addr 1753 && sym_hash->root.u.def.value < toaddr) 1754 sym_hash->root.u.def.value -= count; 1755 1756 /* As above, adjust the size if needed. */ 1757 if (sym_hash->root.u.def.value < addr 1758 && sym_hash->root.u.def.value + sym_hash->size > addr 1759 && sym_hash->root.u.def.value + sym_hash->size < toaddr) 1760 sym_hash->size -= count; 1761 } 1762 } 1763 1764 return TRUE; 1765 } 1766 1767 /* Used to sort relocs by address. If relocs have the same address, 1768 we maintain their relative order, except that R_RL78_RH_RELAX 1769 alignment relocs must be the first reloc for any given address. */ 1770 1771 static void 1772 reloc_bubblesort (Elf_Internal_Rela * r, int count) 1773 { 1774 int i; 1775 bfd_boolean again; 1776 bfd_boolean swappit; 1777 1778 /* This is almost a classic bubblesort. It's the slowest sort, but 1779 we're taking advantage of the fact that the relocations are 1780 mostly in order already (the assembler emits them that way) and 1781 we need relocs with the same address to remain in the same 1782 relative order. */ 1783 again = TRUE; 1784 while (again) 1785 { 1786 again = FALSE; 1787 for (i = 0; i < count - 1; i ++) 1788 { 1789 if (r[i].r_offset > r[i + 1].r_offset) 1790 swappit = TRUE; 1791 else if (r[i].r_offset < r[i + 1].r_offset) 1792 swappit = FALSE; 1793 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX 1794 && (r[i + 1].r_addend & RL78_RELAXA_ALIGN)) 1795 swappit = TRUE; 1796 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX 1797 && (r[i + 1].r_addend & RL78_RELAXA_ELIGN) 1798 && !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX 1799 && (r[i].r_addend & RL78_RELAXA_ALIGN))) 1800 swappit = TRUE; 1801 else 1802 swappit = FALSE; 1803 1804 if (swappit) 1805 { 1806 Elf_Internal_Rela tmp; 1807 1808 tmp = r[i]; 1809 r[i] = r[i + 1]; 1810 r[i + 1] = tmp; 1811 /* If we do move a reloc back, re-scan to see if it 1812 needs to be moved even further back. This avoids 1813 most of the O(n^2) behavior for our cases. */ 1814 if (i > 0) 1815 i -= 2; 1816 again = TRUE; 1817 } 1818 } 1819 } 1820 } 1821 1822 1823 #define OFFSET_FOR_RELOC(rel, lrel, scale) \ 1824 rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \ 1825 lrel, abfd, sec, link_info, scale) 1826 1827 static bfd_vma 1828 rl78_offset_for_reloc (bfd * abfd, 1829 Elf_Internal_Rela * rel, 1830 Elf_Internal_Shdr * symtab_hdr, 1831 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED, 1832 Elf_Internal_Sym * intsyms, 1833 Elf_Internal_Rela ** lrel, 1834 bfd * input_bfd, 1835 asection * input_section, 1836 struct bfd_link_info * info, 1837 int * scale) 1838 { 1839 bfd_vma symval; 1840 1841 *scale = 1; 1842 1843 /* REL is the first of 1..N relocations. We compute the symbol 1844 value for each relocation, then combine them if needed. LREL 1845 gets a pointer to the last relocation used. */ 1846 while (1) 1847 { 1848 unsigned long r_type; 1849 1850 /* Get the value of the symbol referred to by the reloc. */ 1851 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info) 1852 { 1853 /* A local symbol. */ 1854 Elf_Internal_Sym *isym; 1855 asection *ssec; 1856 1857 isym = intsyms + ELF32_R_SYM (rel->r_info); 1858 1859 if (isym->st_shndx == SHN_UNDEF) 1860 ssec = bfd_und_section_ptr; 1861 else if (isym->st_shndx == SHN_ABS) 1862 ssec = bfd_abs_section_ptr; 1863 else if (isym->st_shndx == SHN_COMMON) 1864 ssec = bfd_com_section_ptr; 1865 else 1866 ssec = bfd_section_from_elf_index (abfd, 1867 isym->st_shndx); 1868 1869 /* Initial symbol value. */ 1870 symval = isym->st_value; 1871 1872 /* GAS may have made this symbol relative to a section, in 1873 which case, we have to add the addend to find the 1874 symbol. */ 1875 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION) 1876 symval += rel->r_addend; 1877 1878 if (ssec) 1879 { 1880 if ((ssec->flags & SEC_MERGE) 1881 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE) 1882 symval = _bfd_merged_section_offset (abfd, & ssec, 1883 elf_section_data (ssec)->sec_info, 1884 symval); 1885 } 1886 1887 /* Now make the offset relative to where the linker is putting it. */ 1888 if (ssec) 1889 symval += 1890 ssec->output_section->vma + ssec->output_offset; 1891 1892 symval += rel->r_addend; 1893 } 1894 else 1895 { 1896 unsigned long indx; 1897 struct elf_link_hash_entry * h; 1898 1899 /* An external symbol. */ 1900 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info; 1901 h = elf_sym_hashes (abfd)[indx]; 1902 BFD_ASSERT (h != NULL); 1903 1904 if (h->root.type != bfd_link_hash_defined 1905 && h->root.type != bfd_link_hash_defweak) 1906 { 1907 /* This appears to be a reference to an undefined 1908 symbol. Just ignore it--it will be caught by the 1909 regular reloc processing. */ 1910 if (lrel) 1911 *lrel = rel; 1912 return 0; 1913 } 1914 1915 symval = (h->root.u.def.value 1916 + h->root.u.def.section->output_section->vma 1917 + h->root.u.def.section->output_offset); 1918 1919 symval += rel->r_addend; 1920 } 1921 1922 r_type = ELF32_R_TYPE (rel->r_info); 1923 switch (r_type) 1924 { 1925 case R_RL78_SYM: 1926 (void) rl78_compute_complex_reloc (r_type, symval, input_section); 1927 break; 1928 1929 case R_RL78_OPromtop: 1930 symval = get_romstart (info, input_bfd, input_section, rel->r_offset); 1931 (void) rl78_compute_complex_reloc (r_type, symval, input_section); 1932 break; 1933 1934 case R_RL78_OPramtop: 1935 symval = get_ramstart (info, input_bfd, input_section, rel->r_offset); 1936 (void) rl78_compute_complex_reloc (r_type, symval, input_section); 1937 break; 1938 1939 case R_RL78_OPneg: 1940 case R_RL78_OPadd: 1941 case R_RL78_OPsub: 1942 case R_RL78_OPmul: 1943 case R_RL78_OPdiv: 1944 case R_RL78_OPshla: 1945 case R_RL78_OPshra: 1946 case R_RL78_OPsctsize: 1947 case R_RL78_OPscttop: 1948 case R_RL78_OPand: 1949 case R_RL78_OPor: 1950 case R_RL78_OPxor: 1951 case R_RL78_OPnot: 1952 case R_RL78_OPmod: 1953 (void) rl78_compute_complex_reloc (r_type, 0, input_section); 1954 break; 1955 1956 case R_RL78_DIR16UL: 1957 case R_RL78_DIR8UL: 1958 case R_RL78_ABS16UL: 1959 case R_RL78_ABS8UL: 1960 *scale = 4; 1961 goto reloc_computes_value; 1962 1963 case R_RL78_DIR16UW: 1964 case R_RL78_DIR8UW: 1965 case R_RL78_ABS16UW: 1966 case R_RL78_ABS8UW: 1967 *scale = 2; 1968 goto reloc_computes_value; 1969 1970 default: 1971 reloc_computes_value: 1972 symval = rl78_compute_complex_reloc (r_type, symval, input_section); 1973 /* Fall through. */ 1974 case R_RL78_DIR32: 1975 case R_RL78_DIR24S: 1976 case R_RL78_DIR16: 1977 case R_RL78_DIR16U: 1978 case R_RL78_DIR16S: 1979 case R_RL78_DIR24S_PCREL: 1980 case R_RL78_DIR16S_PCREL: 1981 case R_RL78_DIR8S_PCREL: 1982 if (lrel) 1983 *lrel = rel; 1984 return symval; 1985 } 1986 1987 rel ++; 1988 } 1989 } 1990 1991 struct { 1992 int prefix; /* or -1 for "no prefix" */ 1993 int insn; /* or -1 for "end of list" */ 1994 int insn_for_saddr; /* or -1 for "no alternative" */ 1995 int insn_for_sfr; /* or -1 for "no alternative" */ 1996 } relax_addr16[] = { 1997 { -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */ 1998 { -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */ 1999 { -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */ 2000 { -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */ 2001 2002 { -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */ 2003 { -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */ 2004 { -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */ 2005 { -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */ 2006 { -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */ 2007 { -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */ 2008 { -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */ 2009 { -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */ 2010 2011 { -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */ 2012 { -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */ 2013 { -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */ 2014 { -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */ 2015 { -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */ 2016 2017 { -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */ 2018 { -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */ 2019 { -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */ 2020 { -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */ 2021 2022 { -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */ 2023 { -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */ 2024 { -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */ 2025 2026 { -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */ 2027 { -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */ 2028 { -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */ 2029 { -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */ 2030 { -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */ 2031 { -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */ 2032 2033 { 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */ 2034 2035 { 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */ 2036 { 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */ 2037 { 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */ 2038 { 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */ 2039 { 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */ 2040 { 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */ 2041 { 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */ 2042 { 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */ 2043 2044 { 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */ 2045 { 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */ 2046 { 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */ 2047 { 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */ 2048 { 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */ 2049 { 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */ 2050 { 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */ 2051 { 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */ 2052 2053 { -1, -1, -1, -1 } 2054 }; 2055 2056 /* Relax one section. */ 2057 2058 static bfd_boolean 2059 rl78_elf_relax_section 2060 (bfd * abfd, 2061 asection * sec, 2062 struct bfd_link_info * link_info, 2063 bfd_boolean * again) 2064 { 2065 Elf_Internal_Shdr * symtab_hdr; 2066 Elf_Internal_Shdr * shndx_hdr; 2067 Elf_Internal_Rela * internal_relocs; 2068 Elf_Internal_Rela * free_relocs = NULL; 2069 Elf_Internal_Rela * irel; 2070 Elf_Internal_Rela * srel; 2071 Elf_Internal_Rela * irelend; 2072 Elf_Internal_Rela * next_alignment; 2073 bfd_byte * contents = NULL; 2074 bfd_byte * free_contents = NULL; 2075 Elf_Internal_Sym * intsyms = NULL; 2076 Elf_Internal_Sym * free_intsyms = NULL; 2077 Elf_External_Sym_Shndx * shndx_buf = NULL; 2078 bfd_vma pc; 2079 bfd_vma symval ATTRIBUTE_UNUSED = 0; 2080 int pcrel ATTRIBUTE_UNUSED = 0; 2081 int code ATTRIBUTE_UNUSED = 0; 2082 int section_alignment_glue; 2083 int scale; 2084 2085 if (abfd == elf_hash_table (link_info)->dynobj 2086 && strcmp (sec->name, ".plt") == 0) 2087 return rl78_elf_relax_plt_section (abfd, sec, link_info, again); 2088 2089 /* Assume nothing changes. */ 2090 *again = FALSE; 2091 2092 /* We don't have to do anything for a relocatable link, if 2093 this section does not have relocs, or if this is not a 2094 code section. */ 2095 if (bfd_link_relocatable (link_info) 2096 || (sec->flags & SEC_RELOC) == 0 2097 || sec->reloc_count == 0 2098 || (sec->flags & SEC_CODE) == 0) 2099 return TRUE; 2100 2101 symtab_hdr = & elf_symtab_hdr (abfd); 2102 if (elf_symtab_shndx_list (abfd)) 2103 shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr; 2104 else 2105 shndx_hdr = NULL; 2106 2107 /* Get the section contents. */ 2108 if (elf_section_data (sec)->this_hdr.contents != NULL) 2109 contents = elf_section_data (sec)->this_hdr.contents; 2110 /* Go get them off disk. */ 2111 else 2112 { 2113 if (! bfd_malloc_and_get_section (abfd, sec, &contents)) 2114 goto error_return; 2115 elf_section_data (sec)->this_hdr.contents = contents; 2116 } 2117 2118 /* Read this BFD's symbols. */ 2119 /* Get cached copy if it exists. */ 2120 if (symtab_hdr->contents != NULL) 2121 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents; 2122 else 2123 { 2124 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL); 2125 symtab_hdr->contents = (bfd_byte *) intsyms; 2126 } 2127 2128 if (shndx_hdr && shndx_hdr->sh_size != 0) 2129 { 2130 bfd_size_type amt; 2131 2132 amt = symtab_hdr->sh_info; 2133 amt *= sizeof (Elf_External_Sym_Shndx); 2134 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt); 2135 if (shndx_buf == NULL) 2136 goto error_return; 2137 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0 2138 || bfd_bread (shndx_buf, amt, abfd) != amt) 2139 goto error_return; 2140 shndx_hdr->contents = (bfd_byte *) shndx_buf; 2141 } 2142 2143 /* Get a copy of the native relocations. */ 2144 internal_relocs = (_bfd_elf_link_read_relocs 2145 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL, 2146 link_info->keep_memory)); 2147 if (internal_relocs == NULL) 2148 goto error_return; 2149 if (! link_info->keep_memory) 2150 free_relocs = internal_relocs; 2151 2152 /* The RL_ relocs must be just before the operand relocs they go 2153 with, so we must sort them to guarantee this. We use bubblesort 2154 instead of qsort so we can guarantee that relocs with the same 2155 address remain in the same relative order. */ 2156 reloc_bubblesort (internal_relocs, sec->reloc_count); 2157 2158 /* Walk through them looking for relaxing opportunities. */ 2159 irelend = internal_relocs + sec->reloc_count; 2160 2161 2162 /* This will either be NULL or a pointer to the next alignment 2163 relocation. */ 2164 next_alignment = internal_relocs; 2165 2166 /* We calculate worst case shrinkage caused by alignment directives. 2167 No fool-proof, but better than either ignoring the problem or 2168 doing heavy duty analysis of all the alignment markers in all 2169 input sections. */ 2170 section_alignment_glue = 0; 2171 for (irel = internal_relocs; irel < irelend; irel++) 2172 if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX 2173 && irel->r_addend & RL78_RELAXA_ALIGN) 2174 { 2175 int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM); 2176 2177 if (section_alignment_glue < this_glue) 2178 section_alignment_glue = this_glue; 2179 } 2180 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte 2181 shrinkage. */ 2182 section_alignment_glue *= 2; 2183 2184 for (irel = internal_relocs; irel < irelend; irel++) 2185 { 2186 unsigned char *insn; 2187 int nrelocs; 2188 2189 /* The insns we care about are all marked with one of these. */ 2190 if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX) 2191 continue; 2192 2193 if (irel->r_addend & RL78_RELAXA_ALIGN 2194 || next_alignment == internal_relocs) 2195 { 2196 /* When we delete bytes, we need to maintain all the alignments 2197 indicated. In addition, we need to be careful about relaxing 2198 jumps across alignment boundaries - these displacements 2199 *grow* when we delete bytes. For now, don't shrink 2200 displacements across an alignment boundary, just in case. 2201 Note that this only affects relocations to the same 2202 section. */ 2203 next_alignment += 2; 2204 while (next_alignment < irelend 2205 && (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX 2206 || !(next_alignment->r_addend & RL78_RELAXA_ELIGN))) 2207 next_alignment ++; 2208 if (next_alignment >= irelend || next_alignment->r_offset == 0) 2209 next_alignment = NULL; 2210 } 2211 2212 /* When we hit alignment markers, see if we've shrunk enough 2213 before them to reduce the gap without violating the alignment 2214 requirements. */ 2215 if (irel->r_addend & RL78_RELAXA_ALIGN) 2216 { 2217 /* At this point, the next relocation *should* be the ELIGN 2218 end marker. */ 2219 Elf_Internal_Rela *erel = irel + 1; 2220 unsigned int alignment, nbytes; 2221 2222 if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX) 2223 continue; 2224 if (!(erel->r_addend & RL78_RELAXA_ELIGN)) 2225 continue; 2226 2227 alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM); 2228 2229 if (erel->r_offset - irel->r_offset < alignment) 2230 continue; 2231 2232 nbytes = erel->r_offset - irel->r_offset; 2233 nbytes /= alignment; 2234 nbytes *= alignment; 2235 2236 elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset - nbytes, nbytes, 2237 next_alignment, erel->r_offset == sec->size); 2238 *again = TRUE; 2239 2240 continue; 2241 } 2242 2243 if (irel->r_addend & RL78_RELAXA_ELIGN) 2244 continue; 2245 2246 insn = contents + irel->r_offset; 2247 2248 nrelocs = irel->r_addend & RL78_RELAXA_RNUM; 2249 2250 /* At this point, we have an insn that is a candidate for linker 2251 relaxation. There are NRELOCS relocs following that may be 2252 relaxed, although each reloc may be made of more than one 2253 reloc entry (such as gp-rel symbols). */ 2254 2255 /* Get the value of the symbol referred to by the reloc. Just 2256 in case this is the last reloc in the list, use the RL's 2257 addend to choose between this reloc (no addend) or the next 2258 (yes addend, which means at least one following reloc). */ 2259 2260 /* srel points to the "current" reloction for this insn - 2261 actually the last reloc for a given operand, which is the one 2262 we need to update. We check the relaxations in the same 2263 order that the relocations happen, so we'll just push it 2264 along as we go. */ 2265 srel = irel; 2266 2267 pc = sec->output_section->vma + sec->output_offset 2268 + srel->r_offset; 2269 2270 #define GET_RELOC \ 2271 BFD_ASSERT (nrelocs > 0); \ 2272 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \ 2273 pcrel = symval - pc + srel->r_addend; \ 2274 nrelocs --; 2275 2276 #define SNIPNR(offset, nbytes) \ 2277 elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0); 2278 2279 #define SNIP(offset, nbytes, newtype) \ 2280 SNIPNR (offset, nbytes); \ 2281 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype) 2282 2283 /* The order of these bit tests must match the order that the 2284 relocs appear in. Since we sorted those by offset, we can 2285 predict them. */ 2286 2287 /*----------------------------------------------------------------------*/ 2288 /* EF ad BR $rel8 pcrel 2289 ED al ah BR !abs16 abs 2290 EE al ah BR $!rel16 pcrel 2291 EC al ah as BR !!abs20 abs 2292 2293 FD al ah CALL !abs16 abs 2294 FE al ah CALL $!rel16 pcrel 2295 FC al ah as CALL !!abs20 abs 2296 2297 DC ad BC $rel8 2298 DE ad BNC $rel8 2299 DD ad BZ $rel8 2300 DF ad BNZ $rel8 2301 61 C3 ad BH $rel8 2302 61 D3 ad BNH $rel8 2303 61 C8 EF ad SKC ; BR $rel8 2304 61 D8 EF ad SKNC ; BR $rel8 2305 61 E8 EF ad SKZ ; BR $rel8 2306 61 F8 EF ad SKNZ ; BR $rel8 2307 61 E3 EF ad SKH ; BR $rel8 2308 61 F3 EF ad SKNH ; BR $rel8 2309 */ 2310 2311 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_BRA) 2312 { 2313 /* SKIP opcodes that skip non-branches will have a relax tag 2314 but no corresponding symbol to relax against; we just 2315 skip those. */ 2316 if (irel->r_addend & RL78_RELAXA_RNUM) 2317 { 2318 GET_RELOC; 2319 } 2320 2321 switch (insn[0]) 2322 { 2323 case 0xdc: /* BC */ 2324 case 0xdd: /* BZ */ 2325 case 0xde: /* BNC */ 2326 case 0xdf: /* BNZ */ 2327 if (insn[1] == 0x03 && insn[2] == 0xee /* BR */ 2328 && (srel->r_offset - irel->r_offset) > 1) /* a B<c> without its own reloc */ 2329 { 2330 /* This is a "long" conditional as generated by gas: 2331 DC 03 EE ad.dr */ 2332 if (pcrel < 127 2333 && pcrel > -127) 2334 { 2335 insn[0] ^= 0x02; /* invert conditional */ 2336 SNIPNR (4, 1); 2337 SNIP (1, 2, R_RL78_DIR8S_PCREL); 2338 insn[1] = pcrel; 2339 *again = TRUE; 2340 } 2341 } 2342 break; 2343 2344 case 0xec: /* BR !!abs20 */ 2345 2346 if (pcrel < 127 2347 && pcrel > -127) 2348 { 2349 insn[0] = 0xef; 2350 insn[1] = pcrel; 2351 SNIP (2, 2, R_RL78_DIR8S_PCREL); 2352 *again = TRUE; 2353 } 2354 else if (symval < 65536) 2355 { 2356 insn[0] = 0xed; 2357 insn[1] = symval & 0xff; 2358 insn[2] = symval >> 8; 2359 SNIP (2, 1, R_RL78_DIR16U); 2360 *again = TRUE; 2361 } 2362 else if (pcrel < 32767 2363 && pcrel > -32767) 2364 { 2365 insn[0] = 0xee; 2366 insn[1] = pcrel & 0xff; 2367 insn[2] = pcrel >> 8; 2368 SNIP (2, 1, R_RL78_DIR16S_PCREL); 2369 *again = TRUE; 2370 } 2371 break; 2372 2373 case 0xee: /* BR $!pcrel16 */ 2374 case 0xed: /* BR $!abs16 */ 2375 if (pcrel < 127 2376 && pcrel > -127) 2377 { 2378 insn[0] = 0xef; 2379 insn[1] = pcrel; 2380 SNIP (2, 1, R_RL78_DIR8S_PCREL); 2381 *again = TRUE; 2382 } 2383 break; 2384 2385 case 0xfc: /* CALL !!abs20 */ 2386 if (symval < 65536) 2387 { 2388 insn[0] = 0xfd; 2389 insn[1] = symval & 0xff; 2390 insn[2] = symval >> 8; 2391 SNIP (2, 1, R_RL78_DIR16U); 2392 *again = TRUE; 2393 } 2394 else if (pcrel < 32767 2395 && pcrel > -32767) 2396 { 2397 insn[0] = 0xfe; 2398 insn[1] = pcrel & 0xff; 2399 insn[2] = pcrel >> 8; 2400 SNIP (2, 1, R_RL78_DIR16S_PCREL); 2401 *again = TRUE; 2402 } 2403 break; 2404 2405 case 0x61: /* PREFIX */ 2406 /* For SKIP/BR, we change the BR opcode and delete the 2407 SKIP. That way, we don't have to find and change the 2408 relocation for the BR. */ 2409 /* Note that, for the case where we're skipping some 2410 other insn, we have no "other" reloc but that's safe 2411 here anyway. */ 2412 switch (insn[1]) 2413 { 2414 case 0xd3: /* BNH */ 2415 case 0xc3: /* BH */ 2416 if (insn[2] == 0x03 && insn[3] == 0xee 2417 && (srel->r_offset - irel->r_offset) > 2) /* a B<c> without its own reloc */ 2418 { 2419 /* Another long branch by gas: 2420 61 D3 03 EE ad.dr */ 2421 if (pcrel < 127 2422 && pcrel > -127) 2423 { 2424 insn[1] ^= 0x10; /* invert conditional */ 2425 SNIPNR (5, 1); 2426 SNIP (2, 2, R_RL78_DIR8S_PCREL); 2427 insn[2] = pcrel; 2428 *again = TRUE; 2429 } 2430 } 2431 break; 2432 2433 case 0xc8: /* SKC */ 2434 if (insn[2] == 0xef) 2435 { 2436 insn[2] = 0xde; /* BNC */ 2437 SNIPNR (0, 2); 2438 } 2439 break; 2440 2441 case 0xd8: /* SKNC */ 2442 if (insn[2] == 0xef) 2443 { 2444 insn[2] = 0xdc; /* BC */ 2445 SNIPNR (0, 2); 2446 } 2447 break; 2448 2449 case 0xe8: /* SKZ */ 2450 if (insn[2] == 0xef) 2451 { 2452 insn[2] = 0xdf; /* BNZ */ 2453 SNIPNR (0, 2); 2454 } 2455 break; 2456 2457 case 0xf8: /* SKNZ */ 2458 if (insn[2] == 0xef) 2459 { 2460 insn[2] = 0xdd; /* BZ */ 2461 SNIPNR (0, 2); 2462 } 2463 break; 2464 2465 case 0xe3: /* SKH */ 2466 if (insn[2] == 0xef) 2467 { 2468 insn[2] = 0xd3; /* BNH */ 2469 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */ 2470 } 2471 break; 2472 2473 case 0xf3: /* SKNH */ 2474 if (insn[2] == 0xef) 2475 { 2476 insn[2] = 0xc3; /* BH */ 2477 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */ 2478 } 2479 break; 2480 } 2481 break; 2482 } 2483 } 2484 2485 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_ADDR16 2486 && nrelocs > 0) 2487 { 2488 /*----------------------------------------------------------------------*/ 2489 /* Some insns have both a 16-bit address operand and an 8-bit 2490 variant if the address is within a special range: 2491 2492 Address 16-bit operand SADDR range SFR range 2493 FFF00-FFFFF 0xff00-0xffff 0x00-0xff 2494 FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff 2495 2496 The RELAX_ADDR16[] array has the insn encodings for the 2497 16-bit operand version, as well as the SFR and SADDR 2498 variants. We only need to replace the encodings and 2499 adjust the operand. 2500 2501 Note: we intentionally do not attempt to decode and skip 2502 any ES: prefix, as adding ES: means the addr16 (likely) 2503 no longer points to saddr/sfr space. 2504 */ 2505 2506 int is_sfr; 2507 int is_saddr; 2508 int idx; 2509 int poff; 2510 2511 GET_RELOC; 2512 2513 if (0xffe20 <= symval && symval <= 0xfffff) 2514 { 2515 2516 is_saddr = (0xffe20 <= symval && symval <= 0xfff1f); 2517 is_sfr = (0xfff00 <= symval && symval <= 0xfffff); 2518 2519 for (idx = 0; relax_addr16[idx].insn != -1; idx ++) 2520 { 2521 if (relax_addr16[idx].prefix != -1 2522 && insn[0] == relax_addr16[idx].prefix 2523 && insn[1] == relax_addr16[idx].insn) 2524 { 2525 poff = 1; 2526 } 2527 else if (relax_addr16[idx].prefix == -1 2528 && insn[0] == relax_addr16[idx].insn) 2529 { 2530 poff = 0; 2531 } 2532 else 2533 continue; 2534 2535 /* We have a matched insn, and poff is 0 or 1 depending 2536 on the base pattern size. */ 2537 2538 if (is_sfr && relax_addr16[idx].insn_for_sfr != -1) 2539 { 2540 insn[poff] = relax_addr16[idx].insn_for_sfr; 2541 SNIP (poff+2, 1, R_RL78_RH_SFR); 2542 } 2543 2544 else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1) 2545 { 2546 insn[poff] = relax_addr16[idx].insn_for_saddr; 2547 SNIP (poff+2, 1, R_RL78_RH_SADDR); 2548 } 2549 } 2550 } 2551 } 2552 /*----------------------------------------------------------------------*/ 2553 } 2554 2555 return TRUE; 2556 2557 error_return: 2558 if (free_relocs != NULL) 2559 free (free_relocs); 2560 2561 if (free_contents != NULL) 2562 free (free_contents); 2563 2564 if (shndx_buf != NULL) 2565 { 2566 shndx_hdr->contents = NULL; 2567 free (shndx_buf); 2568 } 2569 2570 if (free_intsyms != NULL) 2571 free (free_intsyms); 2572 2573 return TRUE; 2574 } 2575 2576 2577 2579 #define ELF_ARCH bfd_arch_rl78 2580 #define ELF_MACHINE_CODE EM_RL78 2581 #define ELF_MAXPAGESIZE 0x1000 2582 2583 #define TARGET_LITTLE_SYM rl78_elf32_vec 2584 #define TARGET_LITTLE_NAME "elf32-rl78" 2585 2586 #define elf_info_to_howto_rel NULL 2587 #define elf_info_to_howto rl78_info_to_howto_rela 2588 #define elf_backend_object_p rl78_elf_object_p 2589 #define elf_backend_relocate_section rl78_elf_relocate_section 2590 #define elf_symbol_leading_char ('_') 2591 #define elf_backend_can_gc_sections 1 2592 2593 #define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup 2594 #define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup 2595 #define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags 2596 #define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data 2597 #define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data 2598 2599 #define bfd_elf32_bfd_relax_section rl78_elf_relax_section 2600 #define elf_backend_check_relocs rl78_elf_check_relocs 2601 #define elf_backend_always_size_sections \ 2602 rl78_elf_always_size_sections 2603 #define elf_backend_finish_dynamic_sections \ 2604 rl78_elf_finish_dynamic_sections 2605 2606 #include "elf32-target.h" 2607
Indexes created Thu Apr 23 00:23:13 UTC 2026