elf32-rl78.c revision 1.1.1.7
1 /* Renesas RL78 specific support for 32-bit ELF. 2 Copyright (C) 2011-2020 Free Software Foundation, Inc. 3 4 This file is part of BFD, the Binary File Descriptor library. 5 6 This program is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3 of the License, or 9 (at your option) any later version. 10 11 This program is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with this program; if not, write to the Free Software 18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 19 MA 02110-1301, USA. */ 20 21 #include "sysdep.h" 22 #include "bfd.h" 23 #include "libbfd.h" 24 #include "elf-bfd.h" 25 #include "elf/rl78.h" 26 #include "libiberty.h" 27 28 #define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000) 29 30 #define RL78REL(n,sz,bit,shift,complain,pcrel) \ 31 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \ 32 bfd_elf_generic_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE) 33 34 static bfd_reloc_status_type rl78_special_reloc (bfd *, arelent *, asymbol *, void *, 35 asection *, bfd *, char **); 36 37 /* FIXME: We could omit the SHIFT parameter, it is always zero. */ 38 #define RL78_OP_REL(n,sz,bit,shift,complain,pcrel) \ 39 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \ 40 rl78_special_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE) 41 42 /* Note that the relocations around 0x7f are internal to this file; 43 feel free to move them as needed to avoid conflicts with published 44 relocation numbers. */ 45 46 static reloc_howto_type rl78_elf_howto_table [] = 47 { 48 RL78REL (NONE, 3, 0, 0, dont, FALSE), 49 RL78REL (DIR32, 2, 32, 0, signed, FALSE), 50 RL78REL (DIR24S, 2, 24, 0, signed, FALSE), 51 RL78REL (DIR16, 1, 16, 0, dont, FALSE), 52 RL78REL (DIR16U, 1, 16, 0, unsigned, FALSE), 53 RL78REL (DIR16S, 1, 16, 0, signed, FALSE), 54 RL78REL (DIR8, 0, 8, 0, dont, FALSE), 55 RL78REL (DIR8U, 0, 8, 0, unsigned, FALSE), 56 RL78REL (DIR8S, 0, 8, 0, signed, FALSE), 57 RL78REL (DIR24S_PCREL, 2, 24, 0, signed, TRUE), 58 RL78REL (DIR16S_PCREL, 1, 16, 0, signed, TRUE), 59 RL78REL (DIR8S_PCREL, 0, 8, 0, signed, TRUE), 60 RL78REL (DIR16UL, 1, 16, 2, unsigned, FALSE), 61 RL78REL (DIR16UW, 1, 16, 1, unsigned, FALSE), 62 RL78REL (DIR8UL, 0, 8, 2, unsigned, FALSE), 63 RL78REL (DIR8UW, 0, 8, 1, unsigned, FALSE), 64 RL78REL (DIR32_REV, 1, 16, 0, dont, FALSE), 65 RL78REL (DIR16_REV, 1, 16, 0, dont, FALSE), 66 RL78REL (DIR3U_PCREL, 0, 3, 0, dont, TRUE), 67 68 EMPTY_HOWTO (0x13), 69 EMPTY_HOWTO (0x14), 70 EMPTY_HOWTO (0x15), 71 EMPTY_HOWTO (0x16), 72 EMPTY_HOWTO (0x17), 73 EMPTY_HOWTO (0x18), 74 EMPTY_HOWTO (0x19), 75 EMPTY_HOWTO (0x1a), 76 EMPTY_HOWTO (0x1b), 77 EMPTY_HOWTO (0x1c), 78 EMPTY_HOWTO (0x1d), 79 EMPTY_HOWTO (0x1e), 80 EMPTY_HOWTO (0x1f), 81 82 EMPTY_HOWTO (0x20), 83 EMPTY_HOWTO (0x21), 84 EMPTY_HOWTO (0x22), 85 EMPTY_HOWTO (0x23), 86 EMPTY_HOWTO (0x24), 87 EMPTY_HOWTO (0x25), 88 EMPTY_HOWTO (0x26), 89 EMPTY_HOWTO (0x27), 90 EMPTY_HOWTO (0x28), 91 EMPTY_HOWTO (0x29), 92 EMPTY_HOWTO (0x2a), 93 EMPTY_HOWTO (0x2b), 94 EMPTY_HOWTO (0x2c), 95 RL78REL (RH_RELAX, 0, 0, 0, dont, FALSE), 96 97 EMPTY_HOWTO (0x2e), 98 RL78REL (RH_SADDR, 0, 0, 0, dont, FALSE), 99 EMPTY_HOWTO (0x30), 100 EMPTY_HOWTO (0x31), 101 EMPTY_HOWTO (0x32), 102 EMPTY_HOWTO (0x33), 103 EMPTY_HOWTO (0x34), 104 EMPTY_HOWTO (0x35), 105 EMPTY_HOWTO (0x36), 106 EMPTY_HOWTO (0x37), 107 EMPTY_HOWTO (0x38), 108 EMPTY_HOWTO (0x39), 109 EMPTY_HOWTO (0x3a), 110 EMPTY_HOWTO (0x3b), 111 EMPTY_HOWTO (0x3c), 112 EMPTY_HOWTO (0x3d), 113 EMPTY_HOWTO (0x3e), 114 EMPTY_HOWTO (0x3f), 115 EMPTY_HOWTO (0x40), 116 117 RL78_OP_REL (ABS32, 2, 32, 0, dont, FALSE), 118 RL78_OP_REL (ABS24S, 2, 24, 0, signed, FALSE), 119 RL78_OP_REL (ABS16, 1, 16, 0, dont, FALSE), 120 RL78_OP_REL (ABS16U, 1, 16, 0, unsigned, FALSE), 121 RL78_OP_REL (ABS16S, 1, 16, 0, signed, FALSE), 122 RL78_OP_REL (ABS8, 0, 8, 0, dont, FALSE), 123 RL78_OP_REL (ABS8U, 0, 8, 0, unsigned, FALSE), 124 RL78_OP_REL (ABS8S, 0, 8, 0, signed, FALSE), 125 RL78_OP_REL (ABS24S_PCREL, 2, 24, 0, signed, TRUE), 126 RL78_OP_REL (ABS16S_PCREL, 1, 16, 0, signed, TRUE), 127 RL78_OP_REL (ABS8S_PCREL, 0, 8, 0, signed, TRUE), 128 RL78_OP_REL (ABS16UL, 1, 16, 0, unsigned, FALSE), 129 RL78_OP_REL (ABS16UW, 1, 16, 0, unsigned, FALSE), 130 RL78_OP_REL (ABS8UL, 0, 8, 0, unsigned, FALSE), 131 RL78_OP_REL (ABS8UW, 0, 8, 0, unsigned, FALSE), 132 RL78_OP_REL (ABS32_REV, 2, 32, 0, dont, FALSE), 133 RL78_OP_REL (ABS16_REV, 1, 16, 0, dont, FALSE), 134 135 #define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32) 136 137 EMPTY_HOWTO (0x52), 138 EMPTY_HOWTO (0x53), 139 EMPTY_HOWTO (0x54), 140 EMPTY_HOWTO (0x55), 141 EMPTY_HOWTO (0x56), 142 EMPTY_HOWTO (0x57), 143 EMPTY_HOWTO (0x58), 144 EMPTY_HOWTO (0x59), 145 EMPTY_HOWTO (0x5a), 146 EMPTY_HOWTO (0x5b), 147 EMPTY_HOWTO (0x5c), 148 EMPTY_HOWTO (0x5d), 149 EMPTY_HOWTO (0x5e), 150 EMPTY_HOWTO (0x5f), 151 EMPTY_HOWTO (0x60), 152 EMPTY_HOWTO (0x61), 153 EMPTY_HOWTO (0x62), 154 EMPTY_HOWTO (0x63), 155 EMPTY_HOWTO (0x64), 156 EMPTY_HOWTO (0x65), 157 EMPTY_HOWTO (0x66), 158 EMPTY_HOWTO (0x67), 159 EMPTY_HOWTO (0x68), 160 EMPTY_HOWTO (0x69), 161 EMPTY_HOWTO (0x6a), 162 EMPTY_HOWTO (0x6b), 163 EMPTY_HOWTO (0x6c), 164 EMPTY_HOWTO (0x6d), 165 EMPTY_HOWTO (0x6e), 166 EMPTY_HOWTO (0x6f), 167 EMPTY_HOWTO (0x70), 168 EMPTY_HOWTO (0x71), 169 EMPTY_HOWTO (0x72), 170 EMPTY_HOWTO (0x73), 171 EMPTY_HOWTO (0x74), 172 EMPTY_HOWTO (0x75), 173 EMPTY_HOWTO (0x76), 174 EMPTY_HOWTO (0x77), 175 176 EMPTY_HOWTO (0x78), 177 EMPTY_HOWTO (0x79), 178 EMPTY_HOWTO (0x7a), 179 EMPTY_HOWTO (0x7b), 180 EMPTY_HOWTO (0x7c), 181 EMPTY_HOWTO (0x7d), 182 EMPTY_HOWTO (0x7e), 183 EMPTY_HOWTO (0x7f), 184 185 RL78_OP_REL (SYM, 2, 32, 0, dont, FALSE), 186 RL78_OP_REL (OPneg, 2, 32, 0, dont, FALSE), 187 RL78_OP_REL (OPadd, 2, 32, 0, dont, FALSE), 188 RL78_OP_REL (OPsub, 2, 32, 0, dont, FALSE), 189 RL78_OP_REL (OPmul, 2, 32, 0, dont, FALSE), 190 RL78_OP_REL (OPdiv, 2, 32, 0, dont, FALSE), 191 RL78_OP_REL (OPshla, 2, 32, 0, dont, FALSE), 192 RL78_OP_REL (OPshra, 2, 32, 0, dont, FALSE), 193 RL78_OP_REL (OPsctsize, 2, 32, 0, dont, FALSE), 194 EMPTY_HOWTO (0x89), 195 EMPTY_HOWTO (0x8a), 196 EMPTY_HOWTO (0x8b), 197 EMPTY_HOWTO (0x8c), 198 RL78_OP_REL (OPscttop, 2, 32, 0, dont, FALSE), 199 EMPTY_HOWTO (0x8e), 200 EMPTY_HOWTO (0x8f), 201 RL78_OP_REL (OPand, 2, 32, 0, dont, FALSE), 202 RL78_OP_REL (OPor, 2, 32, 0, dont, FALSE), 203 RL78_OP_REL (OPxor, 2, 32, 0, dont, FALSE), 204 RL78_OP_REL (OPnot, 2, 32, 0, dont, FALSE), 205 RL78_OP_REL (OPmod, 2, 32, 0, dont, FALSE), 206 RL78_OP_REL (OPromtop, 2, 32, 0, dont, FALSE), 207 RL78_OP_REL (OPramtop, 2, 32, 0, dont, FALSE) 208 }; 209 210 /* Map BFD reloc types to RL78 ELF reloc types. */ 212 213 struct rl78_reloc_map 214 { 215 bfd_reloc_code_real_type bfd_reloc_val; 216 unsigned int rl78_reloc_val; 217 }; 218 219 static const struct rl78_reloc_map rl78_reloc_map [] = 220 { 221 { BFD_RELOC_NONE, R_RL78_NONE }, 222 { BFD_RELOC_8, R_RL78_DIR8S }, 223 { BFD_RELOC_16, R_RL78_DIR16S }, 224 { BFD_RELOC_24, R_RL78_DIR24S }, 225 { BFD_RELOC_32, R_RL78_DIR32 }, 226 { BFD_RELOC_RL78_16_OP, R_RL78_DIR16 }, 227 { BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL }, 228 { BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL }, 229 { BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL }, 230 { BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL }, 231 { BFD_RELOC_RL78_8U, R_RL78_DIR8U }, 232 { BFD_RELOC_RL78_16U, R_RL78_DIR16U }, 233 { BFD_RELOC_RL78_SYM, R_RL78_SYM }, 234 { BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub }, 235 { BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg }, 236 { BFD_RELOC_RL78_OP_AND, R_RL78_OPand }, 237 { BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra }, 238 { BFD_RELOC_RL78_ABS8, R_RL78_ABS8 }, 239 { BFD_RELOC_RL78_ABS16, R_RL78_ABS16 }, 240 { BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV }, 241 { BFD_RELOC_RL78_ABS32, R_RL78_ABS32 }, 242 { BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV }, 243 { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL }, 244 { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW }, 245 { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U }, 246 { BFD_RELOC_RL78_SADDR, R_RL78_RH_SADDR }, 247 { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX } 248 }; 249 250 static reloc_howto_type * 251 rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, 252 bfd_reloc_code_real_type code) 253 { 254 unsigned int i; 255 256 if (code == BFD_RELOC_RL78_32_OP) 257 return rl78_elf_howto_table + R_RL78_DIR32; 258 259 for (i = ARRAY_SIZE (rl78_reloc_map); i--;) 260 if (rl78_reloc_map [i].bfd_reloc_val == code) 261 return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val; 262 263 return NULL; 264 } 265 266 static reloc_howto_type * 267 rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name) 268 { 269 unsigned int i; 270 271 for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++) 272 if (rl78_elf_howto_table[i].name != NULL 273 && strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0) 274 return rl78_elf_howto_table + i; 275 276 return NULL; 277 } 278 279 /* Set the howto pointer for an RL78 ELF reloc. */ 280 281 static bfd_boolean 282 rl78_info_to_howto_rela (bfd * abfd, 283 arelent * cache_ptr, 284 Elf_Internal_Rela * dst) 285 { 286 unsigned int r_type; 287 288 r_type = ELF32_R_TYPE (dst->r_info); 289 if (r_type >= (unsigned int) R_RL78_max) 290 { 291 /* xgettext:c-format */ 292 _bfd_error_handler (_("%pB: unsupported relocation type %#x"), 293 abfd, r_type); 294 bfd_set_error (bfd_error_bad_value); 295 return FALSE; 296 } 297 cache_ptr->howto = rl78_elf_howto_table + r_type; 298 return TRUE; 299 } 300 301 static bfd_vma 303 get_symbol_value (const char * name, 304 struct bfd_link_info * info, 305 bfd * input_bfd, 306 asection * input_section, 307 int offset) 308 { 309 struct bfd_link_hash_entry * h; 310 311 if (info == NULL) 312 return 0; 313 314 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE); 315 316 if (h == NULL 317 || (h->type != bfd_link_hash_defined 318 && h->type != bfd_link_hash_defweak)) 319 { 320 (*info->callbacks->undefined_symbol) 321 (info, name, input_bfd, input_section, offset, TRUE); 322 return 0; 323 } 324 325 return (h->u.def.value 326 + h->u.def.section->output_section->vma 327 + h->u.def.section->output_offset); 328 } 329 330 static bfd_vma 331 get_romstart (struct bfd_link_info * info, 332 bfd * abfd, 333 asection * sec, 334 int offset) 335 { 336 static bfd_boolean cached = FALSE; 337 static bfd_vma cached_value = 0; 338 339 if (!cached) 340 { 341 cached_value = get_symbol_value ("_start", info, abfd, sec, offset); 342 cached = TRUE; 343 } 344 return cached_value; 345 } 346 347 static bfd_vma 348 get_ramstart (struct bfd_link_info * info, 349 bfd * abfd, 350 asection * sec, 351 int offset) 352 { 353 static bfd_boolean cached = FALSE; 354 static bfd_vma cached_value = 0; 355 356 if (!cached) 357 { 358 cached_value = get_symbol_value ("__datastart", info, abfd, sec, offset); 359 cached = TRUE; 360 } 361 return cached_value; 362 } 363 364 #define NUM_STACK_ENTRIES 16 365 static int32_t rl78_stack [ NUM_STACK_ENTRIES ]; 366 static unsigned int rl78_stack_top; 367 368 #define RL78_STACK_PUSH(val) \ 369 do \ 370 { \ 371 if (rl78_stack_top < NUM_STACK_ENTRIES) \ 372 rl78_stack [rl78_stack_top ++] = (val); \ 373 else \ 374 _bfd_error_handler (_("internal error: RL78 reloc stack overflow")); \ 375 } \ 376 while (0) 377 378 #define RL78_STACK_POP(dest) \ 379 do \ 380 { \ 381 if (rl78_stack_top > 0) \ 382 (dest) = rl78_stack [-- rl78_stack_top];\ 383 else \ 384 { \ 385 _bfd_error_handler (_("internal error: RL78 reloc stack underflow")); \ 386 (dest) = 0; \ 387 } \ 388 } \ 389 while (0) 390 391 /* Special handling for RL78 complex relocs. Returns the 392 value of the reloc, or 0 for relocs which do not generate 393 a result. SYMVAL is the value of the symbol for relocs 394 which use a symbolic argument. */ 395 396 static bfd_vma 397 rl78_compute_complex_reloc (unsigned long r_type, 398 bfd_vma symval, 399 asection * input_section) 400 { 401 int32_t tmp1, tmp2; 402 bfd_vma relocation; 403 404 switch (r_type) 405 { 406 default: 407 return 0; 408 409 case R_RL78_ABS24S_PCREL: 410 case R_RL78_ABS16S_PCREL: 411 case R_RL78_ABS8S_PCREL: 412 RL78_STACK_POP (relocation); 413 relocation -= input_section->output_section->vma + input_section->output_offset; 414 return relocation; 415 416 case R_RL78_ABS32: 417 case R_RL78_ABS32_REV: 418 case R_RL78_ABS16: 419 case R_RL78_ABS16_REV: 420 case R_RL78_ABS16S: 421 case R_RL78_ABS16U: 422 case R_RL78_ABS8: 423 case R_RL78_ABS8U: 424 case R_RL78_ABS8S: 425 RL78_STACK_POP (relocation); 426 return relocation; 427 428 case R_RL78_ABS16UL: 429 case R_RL78_ABS8UL: 430 RL78_STACK_POP (relocation); 431 return relocation >> 2; 432 433 case R_RL78_ABS16UW: 434 case R_RL78_ABS8UW: 435 RL78_STACK_POP (relocation); 436 return relocation >> 1; 437 438 /* The rest of the relocs compute values and then push them onto the stack. */ 439 case R_RL78_OPramtop: 440 case R_RL78_OPromtop: 441 case R_RL78_SYM: 442 RL78_STACK_PUSH (symval); 443 return 0; 444 445 case R_RL78_OPneg: 446 RL78_STACK_POP (tmp1); 447 tmp1 = - tmp1; 448 RL78_STACK_PUSH (tmp1); 449 return 0; 450 451 case R_RL78_OPadd: 452 RL78_STACK_POP (tmp2); 453 RL78_STACK_POP (tmp1); 454 tmp1 += tmp2; 455 RL78_STACK_PUSH (tmp1); 456 return 0; 457 458 case R_RL78_OPsub: 459 /* For the expression "A - B", the assembler pushes A, 460 then B, then OPSUB. So the first op we pop is B, not A. */ 461 RL78_STACK_POP (tmp2); /* B */ 462 RL78_STACK_POP (tmp1); /* A */ 463 tmp1 -= tmp2; /* A - B */ 464 RL78_STACK_PUSH (tmp1); 465 return 0; 466 467 case R_RL78_OPmul: 468 RL78_STACK_POP (tmp2); 469 RL78_STACK_POP (tmp1); 470 tmp1 *= tmp2; 471 RL78_STACK_PUSH (tmp1); 472 return 0; 473 474 case R_RL78_OPdiv: 475 RL78_STACK_POP (tmp2); 476 RL78_STACK_POP (tmp1); 477 tmp1 /= tmp2; 478 RL78_STACK_PUSH (tmp1); 479 return 0; 480 481 case R_RL78_OPshla: 482 RL78_STACK_POP (tmp2); 483 RL78_STACK_POP (tmp1); 484 tmp1 <<= tmp2; 485 RL78_STACK_PUSH (tmp1); 486 return 0; 487 488 case R_RL78_OPshra: 489 RL78_STACK_POP (tmp2); 490 RL78_STACK_POP (tmp1); 491 tmp1 >>= tmp2; 492 RL78_STACK_PUSH (tmp1); 493 return 0; 494 495 case R_RL78_OPsctsize: 496 RL78_STACK_PUSH (input_section->size); 497 return 0; 498 499 case R_RL78_OPscttop: 500 RL78_STACK_PUSH (input_section->output_section->vma); 501 return 0; 502 503 case R_RL78_OPand: 504 RL78_STACK_POP (tmp2); 505 RL78_STACK_POP (tmp1); 506 tmp1 &= tmp2; 507 RL78_STACK_PUSH (tmp1); 508 return 0; 509 510 case R_RL78_OPor: 511 RL78_STACK_POP (tmp2); 512 RL78_STACK_POP (tmp1); 513 tmp1 |= tmp2; 514 RL78_STACK_PUSH (tmp1); 515 return 0; 516 517 case R_RL78_OPxor: 518 RL78_STACK_POP (tmp2); 519 RL78_STACK_POP (tmp1); 520 tmp1 ^= tmp2; 521 RL78_STACK_PUSH (tmp1); 522 return 0; 523 524 case R_RL78_OPnot: 525 RL78_STACK_POP (tmp1); 526 tmp1 = ~ tmp1; 527 RL78_STACK_PUSH (tmp1); 528 return 0; 529 530 case R_RL78_OPmod: 531 RL78_STACK_POP (tmp2); 532 RL78_STACK_POP (tmp1); 533 tmp1 %= tmp2; 534 RL78_STACK_PUSH (tmp1); 535 return 0; 536 } 537 } 538 539 #undef RL78_STACK_PUSH 540 #undef RL78_STACK_POP 541 542 #define OP(i) (contents[reloc->address + (i)]) 543 544 static bfd_reloc_status_type 545 rl78_special_reloc (bfd * input_bfd, 546 arelent * reloc, 547 asymbol * symbol, 548 void * data, 549 asection * input_section, 550 bfd * output_bfd ATTRIBUTE_UNUSED, 551 char ** error_message ATTRIBUTE_UNUSED) 552 { 553 bfd_reloc_status_type r = bfd_reloc_ok; 554 bfd_vma relocation = 0; 555 unsigned long r_type = reloc->howto->type; 556 bfd_byte * contents = data; 557 558 /* If necessary, compute the symbolic value of the relocation. */ 559 switch (r_type) 560 { 561 case R_RL78_SYM: 562 relocation = (symbol->value 563 + symbol->section->output_section->vma 564 + symbol->section->output_offset 565 + reloc->addend); 566 break; 567 568 case R_RL78_OPromtop: 569 relocation = get_romstart (NULL, input_bfd, input_section, 570 reloc->address); 571 break; 572 573 case R_RL78_OPramtop: 574 relocation = get_ramstart (NULL, input_bfd, input_section, 575 reloc->address); 576 break; 577 } 578 579 /* Get the value of the relocation. */ 580 relocation = rl78_compute_complex_reloc (r_type, relocation, input_section); 581 582 /* If the relocation alters the contents of the section then apply it now. 583 Note - since this function is called from 584 bfd_generic_get_relocated_section_contents via bfd_perform_relocation, 585 and not from the linker, we do not perform any range checking. The 586 clients who are calling us are only interested in some relocated section 587 contents, and not any linkage problems that might occur later. */ 588 switch (r_type) 589 { 590 case R_RL78_ABS32: 591 OP (0) = relocation; 592 OP (1) = relocation >> 8; 593 OP (2) = relocation >> 16; 594 OP (3) = relocation >> 24; 595 break; 596 597 case R_RL78_ABS32_REV: 598 OP (3) = relocation; 599 OP (2) = relocation >> 8; 600 OP (1) = relocation >> 16; 601 OP (0) = relocation >> 24; 602 break; 603 604 case R_RL78_ABS24S_PCREL: 605 case R_RL78_ABS24S: 606 OP (0) = relocation; 607 OP (1) = relocation >> 8; 608 OP (2) = relocation >> 16; 609 break; 610 611 case R_RL78_ABS16_REV: 612 OP (1) = relocation; 613 OP (0) = relocation >> 8; 614 break; 615 616 case R_RL78_ABS16S_PCREL: 617 case R_RL78_ABS16: 618 case R_RL78_ABS16S: 619 case R_RL78_ABS16U: 620 case R_RL78_ABS16UL: 621 case R_RL78_ABS16UW: 622 OP (0) = relocation; 623 OP (1) = relocation >> 8; 624 break; 625 626 case R_RL78_ABS8S_PCREL: 627 case R_RL78_ABS8: 628 case R_RL78_ABS8U: 629 case R_RL78_ABS8UL: 630 case R_RL78_ABS8UW: 631 case R_RL78_ABS8S: 632 OP (0) = relocation; 633 break; 634 635 default: 636 break; 637 } 638 639 return r; 640 } 641 642 #undef OP 643 #define OP(i) (contents[rel->r_offset + (i)]) 644 645 /* Relocate an RL78 ELF section. 646 There is some attempt to make this function usable for many architectures, 647 both USE_REL and USE_RELA ['twould be nice if such a critter existed], 648 if only to serve as a learning tool. 649 650 The RELOCATE_SECTION function is called by the new ELF backend linker 651 to handle the relocations for a section. 652 653 The relocs are always passed as Rela structures; if the section 654 actually uses Rel structures, the r_addend field will always be 655 zero. 656 657 This function is responsible for adjusting the section contents as 658 necessary, and (if using Rela relocs and generating a relocatable 659 output file) adjusting the reloc addend as necessary. 660 661 This function does not have to worry about setting the reloc 662 address or the reloc symbol index. 663 664 LOCAL_SYMS is a pointer to the swapped in local symbols. 665 666 LOCAL_SECTIONS is an array giving the section in the input file 667 corresponding to the st_shndx field of each local symbol. 668 669 The global hash table entry for the global symbols can be found 670 via elf_sym_hashes (input_bfd). 671 672 When generating relocatable output, this function must handle 673 STB_LOCAL/STT_SECTION symbols specially. The output symbol is 674 going to be the section symbol corresponding to the output 675 section, which means that the addend must be adjusted 676 accordingly. */ 677 678 static bfd_boolean 679 rl78_elf_relocate_section 680 (bfd * output_bfd, 681 struct bfd_link_info * info, 682 bfd * input_bfd, 683 asection * input_section, 684 bfd_byte * contents, 685 Elf_Internal_Rela * relocs, 686 Elf_Internal_Sym * local_syms, 687 asection ** local_sections) 688 { 689 Elf_Internal_Shdr * symtab_hdr; 690 struct elf_link_hash_entry ** sym_hashes; 691 Elf_Internal_Rela * rel; 692 Elf_Internal_Rela * relend; 693 asection *splt; 694 695 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr; 696 sym_hashes = elf_sym_hashes (input_bfd); 697 relend = relocs + input_section->reloc_count; 698 699 splt = elf_hash_table (info)->splt; 700 701 for (rel = relocs; rel < relend; rel ++) 702 { 703 reloc_howto_type * howto; 704 unsigned long r_symndx; 705 Elf_Internal_Sym * sym; 706 asection * sec; 707 struct elf_link_hash_entry * h; 708 bfd_vma relocation; 709 bfd_reloc_status_type r; 710 const char * name = NULL; 711 bfd_boolean unresolved_reloc = TRUE; 712 int r_type; 713 714 r_type = ELF32_R_TYPE (rel->r_info); 715 r_symndx = ELF32_R_SYM (rel->r_info); 716 717 howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info); 718 h = NULL; 719 sym = NULL; 720 sec = NULL; 721 relocation = 0; 722 723 if (r_symndx < symtab_hdr->sh_info) 724 { 725 sym = local_syms + r_symndx; 726 sec = local_sections [r_symndx]; 727 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel); 728 729 name = bfd_elf_string_from_elf_section 730 (input_bfd, symtab_hdr->sh_link, sym->st_name); 731 name = sym->st_name == 0 ? bfd_section_name (sec) : name; 732 } 733 else 734 { 735 bfd_boolean warned ATTRIBUTE_UNUSED; 736 bfd_boolean ignored ATTRIBUTE_UNUSED; 737 738 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, 739 r_symndx, symtab_hdr, sym_hashes, h, 740 sec, relocation, unresolved_reloc, 741 warned, ignored); 742 743 name = h->root.root.string; 744 } 745 746 if (sec != NULL && discarded_section (sec)) 747 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, 748 rel, 1, relend, howto, 0, contents); 749 750 if (bfd_link_relocatable (info)) 751 { 752 /* This is a relocatable link. We don't have to change 753 anything, unless the reloc is against a section symbol, 754 in which case we have to adjust according to where the 755 section symbol winds up in the output section. */ 756 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION) 757 rel->r_addend += sec->output_offset; 758 continue; 759 } 760 761 switch (ELF32_R_TYPE (rel->r_info)) 762 { 763 case R_RL78_DIR16S: 764 { 765 bfd_vma *plt_offset; 766 767 if (h != NULL) 768 plt_offset = &h->plt.offset; 769 else 770 plt_offset = elf_local_got_offsets (input_bfd) + r_symndx; 771 772 if (! valid_16bit_address (relocation)) 773 { 774 /* If this is the first time we've processed this symbol, 775 fill in the plt entry with the correct symbol address. */ 776 if ((*plt_offset & 1) == 0) 777 { 778 unsigned int x; 779 780 x = 0x000000ec; /* br !!abs24 */ 781 x |= (relocation << 8) & 0xffffff00; 782 bfd_put_32 (input_bfd, x, splt->contents + *plt_offset); 783 *plt_offset |= 1; 784 } 785 786 relocation = (splt->output_section->vma 787 + splt->output_offset 788 + (*plt_offset & -2)); 789 if (name) 790 { 791 char *newname = bfd_malloc (strlen(name)+5); 792 strcpy (newname, name); 793 strcat(newname, ".plt"); 794 _bfd_generic_link_add_one_symbol (info, 795 input_bfd, 796 newname, 797 BSF_FUNCTION | BSF_WEAK, 798 splt, 799 (*plt_offset & -2), 800 0, 801 1, 802 0, 803 0); 804 } 805 } 806 } 807 break; 808 } 809 810 if (h != NULL && h->root.type == bfd_link_hash_undefweak) 811 /* If the symbol is undefined and weak 812 then the relocation resolves to zero. */ 813 relocation = 0; 814 else 815 { 816 if (howto->pc_relative) 817 { 818 relocation -= (input_section->output_section->vma 819 + input_section->output_offset 820 + rel->r_offset); 821 relocation -= bfd_get_reloc_size (howto); 822 } 823 824 relocation += rel->r_addend; 825 } 826 827 r = bfd_reloc_ok; 828 829 #define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow 830 831 /* Opcode relocs are always big endian. Data relocs are bi-endian. */ 832 switch (r_type) 833 { 834 case R_RL78_NONE: 835 break; 836 837 case R_RL78_RH_RELAX: 838 break; 839 840 case R_RL78_DIR8S_PCREL: 841 RANGE (-128, 127); 842 OP (0) = relocation; 843 break; 844 845 case R_RL78_DIR8S: 846 RANGE (-128, 255); 847 OP (0) = relocation; 848 break; 849 850 case R_RL78_DIR8U: 851 RANGE (0, 255); 852 OP (0) = relocation; 853 break; 854 855 case R_RL78_DIR16S_PCREL: 856 RANGE (-32768, 32767); 857 OP (0) = relocation; 858 OP (1) = relocation >> 8; 859 break; 860 861 case R_RL78_DIR16S: 862 if ((relocation & 0xf0000) == 0xf0000) 863 relocation &= 0xffff; 864 RANGE (-32768, 65535); 865 OP (0) = relocation; 866 OP (1) = relocation >> 8; 867 break; 868 869 case R_RL78_DIR16U: 870 RANGE (0, 65536); 871 OP (0) = relocation; 872 OP (1) = relocation >> 8; 873 break; 874 875 case R_RL78_DIR16: 876 RANGE (-32768, 65536); 877 OP (0) = relocation; 878 OP (1) = relocation >> 8; 879 break; 880 881 case R_RL78_DIR16_REV: 882 RANGE (-32768, 65536); 883 OP (1) = relocation; 884 OP (0) = relocation >> 8; 885 break; 886 887 case R_RL78_DIR3U_PCREL: 888 RANGE (3, 10); 889 OP (0) &= 0xf8; 890 OP (0) |= relocation & 0x07; 891 break; 892 893 case R_RL78_DIR24S_PCREL: 894 RANGE (-0x800000, 0x7fffff); 895 OP (0) = relocation; 896 OP (1) = relocation >> 8; 897 OP (2) = relocation >> 16; 898 break; 899 900 case R_RL78_DIR24S: 901 RANGE (-0x800000, 0x7fffff); 902 OP (0) = relocation; 903 OP (1) = relocation >> 8; 904 OP (2) = relocation >> 16; 905 break; 906 907 case R_RL78_DIR32: 908 OP (0) = relocation; 909 OP (1) = relocation >> 8; 910 OP (2) = relocation >> 16; 911 OP (3) = relocation >> 24; 912 break; 913 914 case R_RL78_DIR32_REV: 915 OP (3) = relocation; 916 OP (2) = relocation >> 8; 917 OP (1) = relocation >> 16; 918 OP (0) = relocation >> 24; 919 break; 920 921 case R_RL78_RH_SFR: 922 RANGE (0xfff00, 0xfffff); 923 OP (0) = relocation & 0xff; 924 break; 925 926 case R_RL78_RH_SADDR: 927 RANGE (0xffe20, 0xfff1f); 928 OP (0) = relocation & 0xff; 929 break; 930 931 /* Complex reloc handling: */ 932 case R_RL78_ABS32: 933 case R_RL78_ABS32_REV: 934 case R_RL78_ABS24S_PCREL: 935 case R_RL78_ABS24S: 936 case R_RL78_ABS16: 937 case R_RL78_ABS16_REV: 938 case R_RL78_ABS16S_PCREL: 939 case R_RL78_ABS16S: 940 case R_RL78_ABS16U: 941 case R_RL78_ABS16UL: 942 case R_RL78_ABS16UW: 943 case R_RL78_ABS8: 944 case R_RL78_ABS8U: 945 case R_RL78_ABS8UL: 946 case R_RL78_ABS8UW: 947 case R_RL78_ABS8S_PCREL: 948 case R_RL78_ABS8S: 949 case R_RL78_OPneg: 950 case R_RL78_OPadd: 951 case R_RL78_OPsub: 952 case R_RL78_OPmul: 953 case R_RL78_OPdiv: 954 case R_RL78_OPshla: 955 case R_RL78_OPshra: 956 case R_RL78_OPsctsize: 957 case R_RL78_OPscttop: 958 case R_RL78_OPand: 959 case R_RL78_OPor: 960 case R_RL78_OPxor: 961 case R_RL78_OPnot: 962 case R_RL78_OPmod: 963 relocation = rl78_compute_complex_reloc (r_type, 0, input_section); 964 965 switch (r_type) 966 { 967 case R_RL78_ABS32: 968 OP (0) = relocation; 969 OP (1) = relocation >> 8; 970 OP (2) = relocation >> 16; 971 OP (3) = relocation >> 24; 972 break; 973 974 case R_RL78_ABS32_REV: 975 OP (3) = relocation; 976 OP (2) = relocation >> 8; 977 OP (1) = relocation >> 16; 978 OP (0) = relocation >> 24; 979 break; 980 981 case R_RL78_ABS24S_PCREL: 982 case R_RL78_ABS24S: 983 RANGE (-0x800000, 0x7fffff); 984 OP (0) = relocation; 985 OP (1) = relocation >> 8; 986 OP (2) = relocation >> 16; 987 break; 988 989 case R_RL78_ABS16: 990 RANGE (-32768, 65535); 991 OP (0) = relocation; 992 OP (1) = relocation >> 8; 993 break; 994 995 case R_RL78_ABS16_REV: 996 RANGE (-32768, 65535); 997 OP (1) = relocation; 998 OP (0) = relocation >> 8; 999 break; 1000 1001 case R_RL78_ABS16S_PCREL: 1002 case R_RL78_ABS16S: 1003 RANGE (-32768, 32767); 1004 OP (0) = relocation; 1005 OP (1) = relocation >> 8; 1006 break; 1007 1008 case R_RL78_ABS16U: 1009 case R_RL78_ABS16UL: 1010 case R_RL78_ABS16UW: 1011 RANGE (0, 65536); 1012 OP (0) = relocation; 1013 OP (1) = relocation >> 8; 1014 break; 1015 1016 case R_RL78_ABS8: 1017 RANGE (-128, 255); 1018 OP (0) = relocation; 1019 break; 1020 1021 case R_RL78_ABS8U: 1022 case R_RL78_ABS8UL: 1023 case R_RL78_ABS8UW: 1024 RANGE (0, 255); 1025 OP (0) = relocation; 1026 break; 1027 1028 case R_RL78_ABS8S_PCREL: 1029 case R_RL78_ABS8S: 1030 RANGE (-128, 127); 1031 OP (0) = relocation; 1032 break; 1033 1034 default: 1035 break; 1036 } 1037 break; 1038 1039 case R_RL78_SYM: 1040 if (r_symndx < symtab_hdr->sh_info) 1041 relocation = sec->output_section->vma + sec->output_offset 1042 + sym->st_value + rel->r_addend; 1043 else if (h != NULL 1044 && (h->root.type == bfd_link_hash_defined 1045 || h->root.type == bfd_link_hash_defweak)) 1046 relocation = h->root.u.def.value 1047 + sec->output_section->vma 1048 + sec->output_offset 1049 + rel->r_addend; 1050 else 1051 { 1052 relocation = 0; 1053 if (h->root.type != bfd_link_hash_undefweak) 1054 _bfd_error_handler 1055 (_("warning: RL78_SYM reloc with an unknown symbol")); 1056 } 1057 (void) rl78_compute_complex_reloc (r_type, relocation, input_section); 1058 break; 1059 1060 case R_RL78_OPromtop: 1061 relocation = get_romstart (info, input_bfd, input_section, rel->r_offset); 1062 (void) rl78_compute_complex_reloc (r_type, relocation, input_section); 1063 break; 1064 1065 case R_RL78_OPramtop: 1066 relocation = get_ramstart (info, input_bfd, input_section, rel->r_offset); 1067 (void) rl78_compute_complex_reloc (r_type, relocation, input_section); 1068 break; 1069 1070 default: 1071 r = bfd_reloc_notsupported; 1072 break; 1073 } 1074 1075 if (r != bfd_reloc_ok) 1076 { 1077 const char * msg = NULL; 1078 1079 switch (r) 1080 { 1081 case bfd_reloc_overflow: 1082 /* Catch the case of a missing function declaration 1083 and emit a more helpful error message. */ 1084 if (r_type == R_RL78_DIR24S_PCREL) 1085 /* xgettext:c-format */ 1086 msg = _("%pB(%pA): error: call to undefined function '%s'"); 1087 else 1088 (*info->callbacks->reloc_overflow) 1089 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0, 1090 input_bfd, input_section, rel->r_offset); 1091 break; 1092 1093 case bfd_reloc_undefined: 1094 (*info->callbacks->undefined_symbol) 1095 (info, name, input_bfd, input_section, rel->r_offset, TRUE); 1096 break; 1097 1098 case bfd_reloc_other: 1099 /* xgettext:c-format */ 1100 msg = _("%pB(%pA): warning: unaligned access to symbol '%s' in the small data area"); 1101 break; 1102 1103 case bfd_reloc_outofrange: 1104 /* xgettext:c-format */ 1105 msg = _("%pB(%pA): internal error: out of range error"); 1106 break; 1107 1108 case bfd_reloc_notsupported: 1109 /* xgettext:c-format */ 1110 msg = _("%pB(%pA): internal error: unsupported relocation error"); 1111 break; 1112 1113 case bfd_reloc_dangerous: 1114 /* xgettext:c-format */ 1115 msg = _("%pB(%pA): internal error: dangerous relocation"); 1116 break; 1117 1118 default: 1119 /* xgettext:c-format */ 1120 msg = _("%pB(%pA): internal error: unknown error"); 1121 break; 1122 } 1123 1124 if (msg) 1125 _bfd_error_handler (msg, input_bfd, input_section, name); 1126 } 1127 } 1128 1129 return TRUE; 1130 } 1131 1132 /* Function to set the ELF flag bits. */ 1134 1135 static bfd_boolean 1136 rl78_elf_set_private_flags (bfd * abfd, flagword flags) 1137 { 1138 elf_elfheader (abfd)->e_flags = flags; 1139 elf_flags_init (abfd) = TRUE; 1140 return TRUE; 1141 } 1142 1143 static bfd_boolean no_warn_mismatch = FALSE; 1144 1145 void bfd_elf32_rl78_set_target_flags (bfd_boolean); 1146 1147 void 1148 bfd_elf32_rl78_set_target_flags (bfd_boolean user_no_warn_mismatch) 1149 { 1150 no_warn_mismatch = user_no_warn_mismatch; 1151 } 1152 1153 static const char * 1154 rl78_cpu_name (flagword flags) 1155 { 1156 switch (flags & E_FLAG_RL78_CPU_MASK) 1157 { 1158 default: return ""; 1159 case E_FLAG_RL78_G10: return "G10"; 1160 case E_FLAG_RL78_G13: return "G13"; 1161 case E_FLAG_RL78_G14: return "G14"; 1162 } 1163 } 1164 1165 /* Merge backend specific data from an object file to the output 1166 object file when linking. */ 1167 1168 static bfd_boolean 1169 rl78_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info) 1170 { 1171 bfd *obfd = info->output_bfd; 1172 flagword new_flags; 1173 flagword old_flags; 1174 bfd_boolean error = FALSE; 1175 1176 new_flags = elf_elfheader (ibfd)->e_flags; 1177 old_flags = elf_elfheader (obfd)->e_flags; 1178 1179 if (!elf_flags_init (obfd)) 1180 { 1181 /* First call, no flags set. */ 1182 elf_flags_init (obfd) = TRUE; 1183 elf_elfheader (obfd)->e_flags = new_flags; 1184 } 1185 else if (old_flags != new_flags) 1186 { 1187 flagword changed_flags = old_flags ^ new_flags; 1188 1189 if (changed_flags & E_FLAG_RL78_CPU_MASK) 1190 { 1191 flagword out_cpu = old_flags & E_FLAG_RL78_CPU_MASK; 1192 flagword in_cpu = new_flags & E_FLAG_RL78_CPU_MASK; 1193 1194 if (in_cpu == E_FLAG_RL78_ANY_CPU || in_cpu == out_cpu) 1195 /* It does not matter what new_cpu may have. */; 1196 else if (out_cpu == E_FLAG_RL78_ANY_CPU) 1197 { 1198 if (in_cpu == E_FLAG_RL78_G10) 1199 { 1200 /* G10 files can only be linked with other G10 files. 1201 If the output is set to "any" this means that it is 1202 a G14 file that does not use hardware multiply/divide, 1203 but that is still incompatible with the G10 ABI. */ 1204 error = TRUE; 1205 1206 _bfd_error_handler 1207 /* xgettext:c-format */ 1208 (_("RL78 ABI conflict: G10 file %pB cannot be linked" 1209 " with %s file %pB"), 1210 ibfd, rl78_cpu_name (out_cpu), obfd); 1211 } 1212 else 1213 { 1214 old_flags &= ~ E_FLAG_RL78_CPU_MASK; 1215 old_flags |= in_cpu; 1216 elf_elfheader (obfd)->e_flags = old_flags; 1217 } 1218 } 1219 else 1220 { 1221 error = TRUE; 1222 1223 _bfd_error_handler 1224 /* xgettext:c-format */ 1225 (_("RL78 ABI conflict: cannot link %s file %pB with %s file %pB"), 1226 rl78_cpu_name (in_cpu), ibfd, 1227 rl78_cpu_name (out_cpu), obfd); 1228 } 1229 } 1230 1231 if (changed_flags & E_FLAG_RL78_64BIT_DOUBLES) 1232 { 1233 _bfd_error_handler 1234 (_("RL78 merge conflict: cannot link 32-bit and 64-bit objects together")); 1235 1236 if (old_flags & E_FLAG_RL78_64BIT_DOUBLES) 1237 /* xgettext:c-format */ 1238 _bfd_error_handler (_("- %pB is 64-bit, %pB is not"), 1239 obfd, ibfd); 1240 else 1241 /* xgettext:c-format */ 1242 _bfd_error_handler (_("- %pB is 64-bit, %pB is not"), 1243 ibfd, obfd); 1244 error = TRUE; 1245 } 1246 } 1247 1248 return !error; 1249 } 1250 1251 static bfd_boolean 1253 rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr) 1254 { 1255 FILE * file = (FILE *) ptr; 1256 flagword flags; 1257 1258 BFD_ASSERT (abfd != NULL && ptr != NULL); 1259 1260 /* Print normal ELF private data. */ 1261 _bfd_elf_print_private_bfd_data (abfd, ptr); 1262 1263 flags = elf_elfheader (abfd)->e_flags; 1264 fprintf (file, _("private flags = 0x%lx:"), (long) flags); 1265 1266 if (flags & E_FLAG_RL78_CPU_MASK) 1267 fprintf (file, " [%s]", rl78_cpu_name (flags)); 1268 1269 if (flags & E_FLAG_RL78_64BIT_DOUBLES) 1270 fprintf (file, _(" [64-bit doubles]")); 1271 1272 fputc ('\n', file); 1273 return TRUE; 1274 } 1275 1276 /* Return the MACH for an e_flags value. */ 1277 1278 static int 1279 elf32_rl78_machine (bfd * abfd ATTRIBUTE_UNUSED) 1280 { 1281 return bfd_mach_rl78; 1282 } 1283 1284 static bfd_boolean 1285 rl78_elf_object_p (bfd * abfd) 1286 { 1287 bfd_default_set_arch_mach (abfd, bfd_arch_rl78, 1288 elf32_rl78_machine (abfd)); 1289 return TRUE; 1290 } 1291 1292 /* support PLT for 16-bit references to 24-bit functions. */ 1294 1295 /* We support 16-bit pointers to code above 64k by generating a thunk 1296 below 64k containing a JMP instruction to the final address. */ 1297 1298 static bfd_boolean 1299 rl78_elf_check_relocs 1300 (bfd * abfd, 1301 struct bfd_link_info * info, 1302 asection * sec, 1303 const Elf_Internal_Rela * relocs) 1304 { 1305 Elf_Internal_Shdr * symtab_hdr; 1306 struct elf_link_hash_entry ** sym_hashes; 1307 const Elf_Internal_Rela * rel; 1308 const Elf_Internal_Rela * rel_end; 1309 bfd_vma *local_plt_offsets; 1310 asection *splt; 1311 bfd *dynobj; 1312 1313 if (bfd_link_relocatable (info)) 1314 return TRUE; 1315 1316 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 1317 sym_hashes = elf_sym_hashes (abfd); 1318 local_plt_offsets = elf_local_got_offsets (abfd); 1319 dynobj = elf_hash_table(info)->dynobj; 1320 1321 rel_end = relocs + sec->reloc_count; 1322 for (rel = relocs; rel < rel_end; rel++) 1323 { 1324 struct elf_link_hash_entry *h; 1325 unsigned long r_symndx; 1326 bfd_vma *offset; 1327 1328 r_symndx = ELF32_R_SYM (rel->r_info); 1329 if (r_symndx < symtab_hdr->sh_info) 1330 h = NULL; 1331 else 1332 { 1333 h = sym_hashes[r_symndx - symtab_hdr->sh_info]; 1334 while (h->root.type == bfd_link_hash_indirect 1335 || h->root.type == bfd_link_hash_warning) 1336 h = (struct elf_link_hash_entry *) h->root.u.i.link; 1337 } 1338 1339 switch (ELF32_R_TYPE (rel->r_info)) 1340 { 1341 /* This relocation describes a 16-bit pointer to a function. 1342 We may need to allocate a thunk in low memory; reserve memory 1343 for it now. */ 1344 case R_RL78_DIR16S: 1345 if (dynobj == NULL) 1346 elf_hash_table (info)->dynobj = dynobj = abfd; 1347 splt = elf_hash_table (info)->splt; 1348 if (splt == NULL) 1349 { 1350 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS 1351 | SEC_IN_MEMORY | SEC_LINKER_CREATED 1352 | SEC_READONLY | SEC_CODE); 1353 splt = bfd_make_section_anyway_with_flags (dynobj, ".plt", 1354 flags); 1355 elf_hash_table (info)->splt = splt; 1356 if (splt == NULL 1357 || !bfd_set_section_alignment (splt, 1)) 1358 return FALSE; 1359 } 1360 1361 if (h != NULL) 1362 offset = &h->plt.offset; 1363 else 1364 { 1365 if (local_plt_offsets == NULL) 1366 { 1367 size_t size; 1368 unsigned int i; 1369 1370 size = symtab_hdr->sh_info * sizeof (bfd_vma); 1371 local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size); 1372 if (local_plt_offsets == NULL) 1373 return FALSE; 1374 elf_local_got_offsets (abfd) = local_plt_offsets; 1375 1376 for (i = 0; i < symtab_hdr->sh_info; i++) 1377 local_plt_offsets[i] = (bfd_vma) -1; 1378 } 1379 offset = &local_plt_offsets[r_symndx]; 1380 } 1381 1382 if (*offset == (bfd_vma) -1) 1383 { 1384 *offset = splt->size; 1385 splt->size += 4; 1386 } 1387 break; 1388 } 1389 } 1390 1391 return TRUE; 1392 } 1393 1394 /* This must exist if dynobj is ever set. */ 1395 1396 static bfd_boolean 1397 rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED, 1398 struct bfd_link_info *info) 1399 { 1400 bfd *dynobj; 1401 asection *splt; 1402 1403 if (!elf_hash_table (info)->dynamic_sections_created) 1404 return TRUE; 1405 1406 /* As an extra sanity check, verify that all plt entries have been 1407 filled in. However, relaxing might have changed the relocs so 1408 that some plt entries don't get filled in, so we have to skip 1409 this check if we're relaxing. Unfortunately, check_relocs is 1410 called before relaxation. */ 1411 1412 if (info->relax_trip > 0) 1413 return TRUE; 1414 1415 dynobj = elf_hash_table (info)->dynobj; 1416 splt = elf_hash_table (info)->splt; 1417 if (dynobj != NULL && splt != NULL) 1418 { 1419 bfd_byte *contents = splt->contents; 1420 unsigned int i, size = splt->size; 1421 1422 for (i = 0; i < size; i += 4) 1423 { 1424 unsigned int x = bfd_get_32 (dynobj, contents + i); 1425 BFD_ASSERT (x != 0); 1426 } 1427 } 1428 1429 return TRUE; 1430 } 1431 1432 static bfd_boolean 1433 rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, 1434 struct bfd_link_info *info) 1435 { 1436 bfd *dynobj; 1437 asection *splt; 1438 1439 if (bfd_link_relocatable (info)) 1440 return TRUE; 1441 1442 dynobj = elf_hash_table (info)->dynobj; 1443 if (dynobj == NULL) 1444 return TRUE; 1445 1446 splt = elf_hash_table (info)->splt; 1447 BFD_ASSERT (splt != NULL); 1448 1449 splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size); 1450 if (splt->contents == NULL) 1451 return FALSE; 1452 1453 return TRUE; 1454 } 1455 1456 1457 1459 /* Handle relaxing. */ 1460 1461 /* A subroutine of rl78_elf_relax_section. If the global symbol H 1462 is within the low 64k, remove any entry for it in the plt. */ 1463 1464 struct relax_plt_data 1465 { 1466 asection *splt; 1467 bfd_boolean *again; 1468 }; 1469 1470 static bfd_boolean 1471 rl78_relax_plt_check (struct elf_link_hash_entry *h, void * xdata) 1472 { 1473 struct relax_plt_data *data = (struct relax_plt_data *) xdata; 1474 1475 if (h->plt.offset != (bfd_vma) -1) 1476 { 1477 bfd_vma address; 1478 1479 if (h->root.type == bfd_link_hash_undefined 1480 || h->root.type == bfd_link_hash_undefweak) 1481 address = 0; 1482 else 1483 address = (h->root.u.def.section->output_section->vma 1484 + h->root.u.def.section->output_offset 1485 + h->root.u.def.value); 1486 1487 if (valid_16bit_address (address)) 1488 { 1489 h->plt.offset = -1; 1490 data->splt->size -= 4; 1491 *data->again = TRUE; 1492 } 1493 } 1494 1495 return TRUE; 1496 } 1497 1498 /* A subroutine of rl78_elf_relax_section. If the global symbol H 1499 previously had a plt entry, give it a new entry offset. */ 1500 1501 static bfd_boolean 1502 rl78_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata) 1503 { 1504 bfd_vma *entry = (bfd_vma *) xdata; 1505 1506 if (h->plt.offset != (bfd_vma) -1) 1507 { 1508 h->plt.offset = *entry; 1509 *entry += 4; 1510 } 1511 1512 return TRUE; 1513 } 1514 1515 static bfd_boolean 1516 rl78_elf_relax_plt_section (bfd *dynobj, 1517 asection *splt, 1518 struct bfd_link_info *info, 1519 bfd_boolean *again) 1520 { 1521 struct relax_plt_data relax_plt_data; 1522 bfd *ibfd; 1523 1524 /* Assume nothing changes. */ 1525 *again = FALSE; 1526 1527 if (bfd_link_relocatable (info)) 1528 return TRUE; 1529 1530 /* We only relax the .plt section at the moment. */ 1531 if (dynobj != elf_hash_table (info)->dynobj 1532 || strcmp (splt->name, ".plt") != 0) 1533 return TRUE; 1534 1535 /* Quick check for an empty plt. */ 1536 if (splt->size == 0) 1537 return TRUE; 1538 1539 /* Map across all global symbols; see which ones happen to 1540 fall in the low 64k. */ 1541 relax_plt_data.splt = splt; 1542 relax_plt_data.again = again; 1543 elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check, 1544 &relax_plt_data); 1545 1546 /* Likewise for local symbols, though that's somewhat less convenient 1547 as we have to walk the list of input bfds and swap in symbol data. */ 1548 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next) 1549 { 1550 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd); 1551 Elf_Internal_Shdr *symtab_hdr; 1552 Elf_Internal_Sym *isymbuf = NULL; 1553 unsigned int idx; 1554 1555 if (! local_plt_offsets) 1556 continue; 1557 1558 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr; 1559 if (symtab_hdr->sh_info != 0) 1560 { 1561 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; 1562 if (isymbuf == NULL) 1563 isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr, 1564 symtab_hdr->sh_info, 0, 1565 NULL, NULL, NULL); 1566 if (isymbuf == NULL) 1567 return FALSE; 1568 } 1569 1570 for (idx = 0; idx < symtab_hdr->sh_info; ++idx) 1571 { 1572 Elf_Internal_Sym *isym; 1573 asection *tsec; 1574 bfd_vma address; 1575 1576 if (local_plt_offsets[idx] == (bfd_vma) -1) 1577 continue; 1578 1579 isym = &isymbuf[idx]; 1580 if (isym->st_shndx == SHN_UNDEF) 1581 continue; 1582 else if (isym->st_shndx == SHN_ABS) 1583 tsec = bfd_abs_section_ptr; 1584 else if (isym->st_shndx == SHN_COMMON) 1585 tsec = bfd_com_section_ptr; 1586 else 1587 tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx); 1588 1589 address = (tsec->output_section->vma 1590 + tsec->output_offset 1591 + isym->st_value); 1592 if (valid_16bit_address (address)) 1593 { 1594 local_plt_offsets[idx] = -1; 1595 splt->size -= 4; 1596 *again = TRUE; 1597 } 1598 } 1599 1600 if (isymbuf != NULL 1601 && symtab_hdr->contents != (unsigned char *) isymbuf) 1602 { 1603 if (! info->keep_memory) 1604 free (isymbuf); 1605 else 1606 { 1607 /* Cache the symbols for elf_link_input_bfd. */ 1608 symtab_hdr->contents = (unsigned char *) isymbuf; 1609 } 1610 } 1611 } 1612 1613 /* If we changed anything, walk the symbols again to reallocate 1614 .plt entry addresses. */ 1615 if (*again && splt->size > 0) 1616 { 1617 bfd_vma entry = 0; 1618 1619 elf_link_hash_traverse (elf_hash_table (info), 1620 rl78_relax_plt_realloc, &entry); 1621 1622 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next) 1623 { 1624 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd); 1625 unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info; 1626 unsigned int idx; 1627 1628 if (! local_plt_offsets) 1629 continue; 1630 1631 for (idx = 0; idx < nlocals; ++idx) 1632 if (local_plt_offsets[idx] != (bfd_vma) -1) 1633 { 1634 local_plt_offsets[idx] = entry; 1635 entry += 4; 1636 } 1637 } 1638 } 1639 1640 return TRUE; 1641 } 1642 1643 /* Delete some bytes from a section while relaxing. */ 1644 1645 static bfd_boolean 1646 elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count, 1647 Elf_Internal_Rela *alignment_rel, int force_snip) 1648 { 1649 Elf_Internal_Shdr * symtab_hdr; 1650 unsigned int sec_shndx; 1651 bfd_byte * contents; 1652 Elf_Internal_Rela * irel; 1653 Elf_Internal_Rela * irelend; 1654 Elf_Internal_Sym * isym; 1655 Elf_Internal_Sym * isymend; 1656 bfd_vma toaddr; 1657 unsigned int symcount; 1658 struct elf_link_hash_entry ** sym_hashes; 1659 struct elf_link_hash_entry ** end_hashes; 1660 1661 if (!alignment_rel) 1662 force_snip = 1; 1663 1664 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); 1665 1666 contents = elf_section_data (sec)->this_hdr.contents; 1667 1668 /* The deletion must stop at the next alignment boundary, if 1669 ALIGNMENT_REL is non-NULL. */ 1670 toaddr = sec->size; 1671 if (alignment_rel) 1672 toaddr = alignment_rel->r_offset; 1673 1674 irel = elf_section_data (sec)->relocs; 1675 if (irel == NULL) 1676 { 1677 _bfd_elf_link_read_relocs (sec->owner, sec, NULL, NULL, TRUE); 1678 irel = elf_section_data (sec)->relocs; 1679 } 1680 1681 irelend = irel + sec->reloc_count; 1682 1683 /* Actually delete the bytes. */ 1684 memmove (contents + addr, contents + addr + count, 1685 (size_t) (toaddr - addr - count)); 1686 1687 /* If we don't have an alignment marker to worry about, we can just 1688 shrink the section. Otherwise, we have to fill in the newly 1689 created gap with NOP insns (0x03). */ 1690 if (force_snip) 1691 sec->size -= count; 1692 else 1693 memset (contents + toaddr - count, 0x03, count); 1694 1695 /* Adjust all the relocs. */ 1696 for (; irel && irel < irelend; irel++) 1697 { 1698 /* Get the new reloc address. */ 1699 if (irel->r_offset > addr 1700 && (irel->r_offset < toaddr 1701 || (force_snip && irel->r_offset == toaddr))) 1702 irel->r_offset -= count; 1703 1704 /* If we see an ALIGN marker at the end of the gap, we move it 1705 to the beginning of the gap, since marking these gaps is what 1706 they're for. */ 1707 if (irel->r_offset == toaddr 1708 && ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX 1709 && irel->r_addend & RL78_RELAXA_ALIGN) 1710 irel->r_offset -= count; 1711 } 1712 1713 /* Adjust the local symbols defined in this section. */ 1714 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 1715 isym = (Elf_Internal_Sym *) symtab_hdr->contents; 1716 isymend = isym + symtab_hdr->sh_info; 1717 1718 for (; isym < isymend; isym++) 1719 { 1720 /* If the symbol is in the range of memory we just moved, we 1721 have to adjust its value. */ 1722 if (isym->st_shndx == sec_shndx 1723 && isym->st_value > addr 1724 && isym->st_value < toaddr) 1725 isym->st_value -= count; 1726 1727 /* If the symbol *spans* the bytes we just deleted (i.e. it's 1728 *end* is in the moved bytes but it's *start* isn't), then we 1729 must adjust its size. */ 1730 if (isym->st_shndx == sec_shndx 1731 && isym->st_value < addr 1732 && isym->st_value + isym->st_size > addr 1733 && isym->st_value + isym->st_size < toaddr) 1734 isym->st_size -= count; 1735 } 1736 1737 /* Now adjust the global symbols defined in this section. */ 1738 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) 1739 - symtab_hdr->sh_info); 1740 sym_hashes = elf_sym_hashes (abfd); 1741 end_hashes = sym_hashes + symcount; 1742 1743 for (; sym_hashes < end_hashes; sym_hashes++) 1744 { 1745 struct elf_link_hash_entry *sym_hash = *sym_hashes; 1746 1747 if ((sym_hash->root.type == bfd_link_hash_defined 1748 || sym_hash->root.type == bfd_link_hash_defweak) 1749 && sym_hash->root.u.def.section == sec) 1750 { 1751 /* As above, adjust the value if needed. */ 1752 if (sym_hash->root.u.def.value > addr 1753 && sym_hash->root.u.def.value < toaddr) 1754 sym_hash->root.u.def.value -= count; 1755 1756 /* As above, adjust the size if needed. */ 1757 if (sym_hash->root.u.def.value < addr 1758 && sym_hash->root.u.def.value + sym_hash->size > addr 1759 && sym_hash->root.u.def.value + sym_hash->size < toaddr) 1760 sym_hash->size -= count; 1761 } 1762 } 1763 1764 return TRUE; 1765 } 1766 1767 /* Used to sort relocs by address. If relocs have the same address, 1768 we maintain their relative order, except that R_RL78_RH_RELAX 1769 alignment relocs must be the first reloc for any given address. */ 1770 1771 static void 1772 reloc_bubblesort (Elf_Internal_Rela * r, int count) 1773 { 1774 int i; 1775 bfd_boolean again; 1776 bfd_boolean swappit; 1777 1778 /* This is almost a classic bubblesort. It's the slowest sort, but 1779 we're taking advantage of the fact that the relocations are 1780 mostly in order already (the assembler emits them that way) and 1781 we need relocs with the same address to remain in the same 1782 relative order. */ 1783 again = TRUE; 1784 while (again) 1785 { 1786 again = FALSE; 1787 for (i = 0; i < count - 1; i ++) 1788 { 1789 if (r[i].r_offset > r[i + 1].r_offset) 1790 swappit = TRUE; 1791 else if (r[i].r_offset < r[i + 1].r_offset) 1792 swappit = FALSE; 1793 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX 1794 && (r[i + 1].r_addend & RL78_RELAXA_ALIGN)) 1795 swappit = TRUE; 1796 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX 1797 && (r[i + 1].r_addend & RL78_RELAXA_ELIGN) 1798 && !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX 1799 && (r[i].r_addend & RL78_RELAXA_ALIGN))) 1800 swappit = TRUE; 1801 else 1802 swappit = FALSE; 1803 1804 if (swappit) 1805 { 1806 Elf_Internal_Rela tmp; 1807 1808 tmp = r[i]; 1809 r[i] = r[i + 1]; 1810 r[i + 1] = tmp; 1811 /* If we do move a reloc back, re-scan to see if it 1812 needs to be moved even further back. This avoids 1813 most of the O(n^2) behavior for our cases. */ 1814 if (i > 0) 1815 i -= 2; 1816 again = TRUE; 1817 } 1818 } 1819 } 1820 } 1821 1822 1823 #define OFFSET_FOR_RELOC(rel, lrel, scale) \ 1824 rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \ 1825 lrel, abfd, sec, link_info, scale) 1826 1827 static bfd_vma 1828 rl78_offset_for_reloc (bfd * abfd, 1829 Elf_Internal_Rela * rel, 1830 Elf_Internal_Shdr * symtab_hdr, 1831 bfd_byte * shndx_buf ATTRIBUTE_UNUSED, 1832 Elf_Internal_Sym * intsyms, 1833 Elf_Internal_Rela ** lrel, 1834 bfd * input_bfd, 1835 asection * input_section, 1836 struct bfd_link_info * info, 1837 int * scale) 1838 { 1839 bfd_vma symval; 1840 1841 *scale = 1; 1842 1843 /* REL is the first of 1..N relocations. We compute the symbol 1844 value for each relocation, then combine them if needed. LREL 1845 gets a pointer to the last relocation used. */ 1846 while (1) 1847 { 1848 unsigned long r_type; 1849 1850 /* Get the value of the symbol referred to by the reloc. */ 1851 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info) 1852 { 1853 /* A local symbol. */ 1854 Elf_Internal_Sym *isym; 1855 asection *ssec; 1856 1857 isym = intsyms + ELF32_R_SYM (rel->r_info); 1858 1859 if (isym->st_shndx == SHN_UNDEF) 1860 ssec = bfd_und_section_ptr; 1861 else if (isym->st_shndx == SHN_ABS) 1862 ssec = bfd_abs_section_ptr; 1863 else if (isym->st_shndx == SHN_COMMON) 1864 ssec = bfd_com_section_ptr; 1865 else 1866 ssec = bfd_section_from_elf_index (abfd, 1867 isym->st_shndx); 1868 1869 /* Initial symbol value. */ 1870 symval = isym->st_value; 1871 1872 /* GAS may have made this symbol relative to a section, in 1873 which case, we have to add the addend to find the 1874 symbol. */ 1875 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION) 1876 symval += rel->r_addend; 1877 1878 if (ssec) 1879 { 1880 if ((ssec->flags & SEC_MERGE) 1881 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE) 1882 symval = _bfd_merged_section_offset (abfd, & ssec, 1883 elf_section_data (ssec)->sec_info, 1884 symval); 1885 } 1886 1887 /* Now make the offset relative to where the linker is putting it. */ 1888 if (ssec) 1889 symval += 1890 ssec->output_section->vma + ssec->output_offset; 1891 1892 symval += rel->r_addend; 1893 } 1894 else 1895 { 1896 unsigned long indx; 1897 struct elf_link_hash_entry * h; 1898 1899 /* An external symbol. */ 1900 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info; 1901 h = elf_sym_hashes (abfd)[indx]; 1902 BFD_ASSERT (h != NULL); 1903 1904 if (h->root.type != bfd_link_hash_defined 1905 && h->root.type != bfd_link_hash_defweak) 1906 { 1907 /* This appears to be a reference to an undefined 1908 symbol. Just ignore it--it will be caught by the 1909 regular reloc processing. */ 1910 if (lrel) 1911 *lrel = rel; 1912 return 0; 1913 } 1914 1915 symval = (h->root.u.def.value 1916 + h->root.u.def.section->output_section->vma 1917 + h->root.u.def.section->output_offset); 1918 1919 symval += rel->r_addend; 1920 } 1921 1922 r_type = ELF32_R_TYPE (rel->r_info); 1923 switch (r_type) 1924 { 1925 case R_RL78_SYM: 1926 (void) rl78_compute_complex_reloc (r_type, symval, input_section); 1927 break; 1928 1929 case R_RL78_OPromtop: 1930 symval = get_romstart (info, input_bfd, input_section, rel->r_offset); 1931 (void) rl78_compute_complex_reloc (r_type, symval, input_section); 1932 break; 1933 1934 case R_RL78_OPramtop: 1935 symval = get_ramstart (info, input_bfd, input_section, rel->r_offset); 1936 (void) rl78_compute_complex_reloc (r_type, symval, input_section); 1937 break; 1938 1939 case R_RL78_OPneg: 1940 case R_RL78_OPadd: 1941 case R_RL78_OPsub: 1942 case R_RL78_OPmul: 1943 case R_RL78_OPdiv: 1944 case R_RL78_OPshla: 1945 case R_RL78_OPshra: 1946 case R_RL78_OPsctsize: 1947 case R_RL78_OPscttop: 1948 case R_RL78_OPand: 1949 case R_RL78_OPor: 1950 case R_RL78_OPxor: 1951 case R_RL78_OPnot: 1952 case R_RL78_OPmod: 1953 (void) rl78_compute_complex_reloc (r_type, 0, input_section); 1954 break; 1955 1956 case R_RL78_DIR16UL: 1957 case R_RL78_DIR8UL: 1958 case R_RL78_ABS16UL: 1959 case R_RL78_ABS8UL: 1960 *scale = 4; 1961 goto reloc_computes_value; 1962 1963 case R_RL78_DIR16UW: 1964 case R_RL78_DIR8UW: 1965 case R_RL78_ABS16UW: 1966 case R_RL78_ABS8UW: 1967 *scale = 2; 1968 goto reloc_computes_value; 1969 1970 default: 1971 reloc_computes_value: 1972 symval = rl78_compute_complex_reloc (r_type, symval, input_section); 1973 /* Fall through. */ 1974 case R_RL78_DIR32: 1975 case R_RL78_DIR24S: 1976 case R_RL78_DIR16: 1977 case R_RL78_DIR16U: 1978 case R_RL78_DIR16S: 1979 case R_RL78_DIR24S_PCREL: 1980 case R_RL78_DIR16S_PCREL: 1981 case R_RL78_DIR8S_PCREL: 1982 if (lrel) 1983 *lrel = rel; 1984 return symval; 1985 } 1986 1987 rel ++; 1988 } 1989 } 1990 1991 struct { 1992 int prefix; /* or -1 for "no prefix" */ 1993 int insn; /* or -1 for "end of list" */ 1994 int insn_for_saddr; /* or -1 for "no alternative" */ 1995 int insn_for_sfr; /* or -1 for "no alternative" */ 1996 } relax_addr16[] = { 1997 { -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */ 1998 { -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */ 1999 { -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */ 2000 { -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */ 2001 2002 { -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */ 2003 { -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */ 2004 { -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */ 2005 { -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */ 2006 { -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */ 2007 { -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */ 2008 { -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */ 2009 { -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */ 2010 2011 { -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */ 2012 { -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */ 2013 { -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */ 2014 { -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */ 2015 { -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */ 2016 2017 { -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */ 2018 { -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */ 2019 { -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */ 2020 { -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */ 2021 2022 { -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */ 2023 { -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */ 2024 { -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */ 2025 2026 { -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */ 2027 { -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */ 2028 { -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */ 2029 { -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */ 2030 { -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */ 2031 { -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */ 2032 2033 { 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */ 2034 2035 { 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */ 2036 { 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */ 2037 { 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */ 2038 { 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */ 2039 { 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */ 2040 { 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */ 2041 { 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */ 2042 { 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */ 2043 2044 { 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */ 2045 { 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */ 2046 { 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */ 2047 { 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */ 2048 { 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */ 2049 { 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */ 2050 { 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */ 2051 { 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */ 2052 2053 { -1, -1, -1, -1 } 2054 }; 2055 2056 /* Relax one section. */ 2057 2058 static bfd_boolean 2059 rl78_elf_relax_section 2060 (bfd * abfd, 2061 asection * sec, 2062 struct bfd_link_info * link_info, 2063 bfd_boolean * again) 2064 { 2065 Elf_Internal_Shdr * symtab_hdr; 2066 Elf_Internal_Shdr * shndx_hdr; 2067 Elf_Internal_Rela * internal_relocs; 2068 Elf_Internal_Rela * free_relocs = NULL; 2069 Elf_Internal_Rela * irel; 2070 Elf_Internal_Rela * srel; 2071 Elf_Internal_Rela * irelend; 2072 Elf_Internal_Rela * next_alignment; 2073 bfd_byte * contents = NULL; 2074 bfd_byte * free_contents = NULL; 2075 Elf_Internal_Sym * intsyms = NULL; 2076 Elf_Internal_Sym * free_intsyms = NULL; 2077 bfd_byte * shndx_buf = NULL; 2078 bfd_vma pc; 2079 bfd_vma symval ATTRIBUTE_UNUSED = 0; 2080 int pcrel ATTRIBUTE_UNUSED = 0; 2081 int code ATTRIBUTE_UNUSED = 0; 2082 int section_alignment_glue; 2083 int scale; 2084 2085 if (abfd == elf_hash_table (link_info)->dynobj 2086 && strcmp (sec->name, ".plt") == 0) 2087 return rl78_elf_relax_plt_section (abfd, sec, link_info, again); 2088 2089 /* Assume nothing changes. */ 2090 *again = FALSE; 2091 2092 /* We don't have to do anything for a relocatable link, if 2093 this section does not have relocs, or if this is not a 2094 code section. */ 2095 if (bfd_link_relocatable (link_info) 2096 || (sec->flags & SEC_RELOC) == 0 2097 || sec->reloc_count == 0 2098 || (sec->flags & SEC_CODE) == 0) 2099 return TRUE; 2100 2101 symtab_hdr = & elf_symtab_hdr (abfd); 2102 if (elf_symtab_shndx_list (abfd)) 2103 shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr; 2104 else 2105 shndx_hdr = NULL; 2106 2107 /* Get the section contents. */ 2108 if (elf_section_data (sec)->this_hdr.contents != NULL) 2109 contents = elf_section_data (sec)->this_hdr.contents; 2110 /* Go get them off disk. */ 2111 else 2112 { 2113 if (! bfd_malloc_and_get_section (abfd, sec, &contents)) 2114 goto error_return; 2115 elf_section_data (sec)->this_hdr.contents = contents; 2116 } 2117 2118 /* Read this BFD's symbols. */ 2119 /* Get cached copy if it exists. */ 2120 if (symtab_hdr->contents != NULL) 2121 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents; 2122 else 2123 { 2124 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL); 2125 symtab_hdr->contents = (bfd_byte *) intsyms; 2126 } 2127 2128 if (shndx_hdr && shndx_hdr->sh_size != 0) 2129 { 2130 size_t amt; 2131 2132 if (_bfd_mul_overflow (symtab_hdr->sh_info, 2133 sizeof (Elf_External_Sym_Shndx), &amt)) 2134 { 2135 bfd_set_error (bfd_error_no_memory); 2136 goto error_return; 2137 } 2138 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0) 2139 goto error_return; 2140 shndx_buf = _bfd_malloc_and_read (abfd, amt, amt); 2141 if (shndx_buf == NULL) 2142 goto error_return; 2143 shndx_hdr->contents = shndx_buf; 2144 } 2145 2146 /* Get a copy of the native relocations. */ 2147 internal_relocs = (_bfd_elf_link_read_relocs 2148 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL, 2149 link_info->keep_memory)); 2150 if (internal_relocs == NULL) 2151 goto error_return; 2152 if (! link_info->keep_memory) 2153 free_relocs = internal_relocs; 2154 2155 /* The RL_ relocs must be just before the operand relocs they go 2156 with, so we must sort them to guarantee this. We use bubblesort 2157 instead of qsort so we can guarantee that relocs with the same 2158 address remain in the same relative order. */ 2159 reloc_bubblesort (internal_relocs, sec->reloc_count); 2160 2161 /* Walk through them looking for relaxing opportunities. */ 2162 irelend = internal_relocs + sec->reloc_count; 2163 2164 2165 /* This will either be NULL or a pointer to the next alignment 2166 relocation. */ 2167 next_alignment = internal_relocs; 2168 2169 /* We calculate worst case shrinkage caused by alignment directives. 2170 No fool-proof, but better than either ignoring the problem or 2171 doing heavy duty analysis of all the alignment markers in all 2172 input sections. */ 2173 section_alignment_glue = 0; 2174 for (irel = internal_relocs; irel < irelend; irel++) 2175 if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX 2176 && irel->r_addend & RL78_RELAXA_ALIGN) 2177 { 2178 int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM); 2179 2180 if (section_alignment_glue < this_glue) 2181 section_alignment_glue = this_glue; 2182 } 2183 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte 2184 shrinkage. */ 2185 section_alignment_glue *= 2; 2186 2187 for (irel = internal_relocs; irel < irelend; irel++) 2188 { 2189 unsigned char *insn; 2190 int nrelocs; 2191 2192 /* The insns we care about are all marked with one of these. */ 2193 if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX) 2194 continue; 2195 2196 if (irel->r_addend & RL78_RELAXA_ALIGN 2197 || next_alignment == internal_relocs) 2198 { 2199 /* When we delete bytes, we need to maintain all the alignments 2200 indicated. In addition, we need to be careful about relaxing 2201 jumps across alignment boundaries - these displacements 2202 *grow* when we delete bytes. For now, don't shrink 2203 displacements across an alignment boundary, just in case. 2204 Note that this only affects relocations to the same 2205 section. */ 2206 next_alignment += 2; 2207 while (next_alignment < irelend 2208 && (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX 2209 || !(next_alignment->r_addend & RL78_RELAXA_ELIGN))) 2210 next_alignment ++; 2211 if (next_alignment >= irelend || next_alignment->r_offset == 0) 2212 next_alignment = NULL; 2213 } 2214 2215 /* When we hit alignment markers, see if we've shrunk enough 2216 before them to reduce the gap without violating the alignment 2217 requirements. */ 2218 if (irel->r_addend & RL78_RELAXA_ALIGN) 2219 { 2220 /* At this point, the next relocation *should* be the ELIGN 2221 end marker. */ 2222 Elf_Internal_Rela *erel = irel + 1; 2223 unsigned int alignment, nbytes; 2224 2225 if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX) 2226 continue; 2227 if (!(erel->r_addend & RL78_RELAXA_ELIGN)) 2228 continue; 2229 2230 alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM); 2231 2232 if (erel->r_offset - irel->r_offset < alignment) 2233 continue; 2234 2235 nbytes = erel->r_offset - irel->r_offset; 2236 nbytes /= alignment; 2237 nbytes *= alignment; 2238 2239 elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset - nbytes, nbytes, 2240 next_alignment, erel->r_offset == sec->size); 2241 *again = TRUE; 2242 2243 continue; 2244 } 2245 2246 if (irel->r_addend & RL78_RELAXA_ELIGN) 2247 continue; 2248 2249 insn = contents + irel->r_offset; 2250 2251 nrelocs = irel->r_addend & RL78_RELAXA_RNUM; 2252 2253 /* At this point, we have an insn that is a candidate for linker 2254 relaxation. There are NRELOCS relocs following that may be 2255 relaxed, although each reloc may be made of more than one 2256 reloc entry (such as gp-rel symbols). */ 2257 2258 /* Get the value of the symbol referred to by the reloc. Just 2259 in case this is the last reloc in the list, use the RL's 2260 addend to choose between this reloc (no addend) or the next 2261 (yes addend, which means at least one following reloc). */ 2262 2263 /* srel points to the "current" reloction for this insn - 2264 actually the last reloc for a given operand, which is the one 2265 we need to update. We check the relaxations in the same 2266 order that the relocations happen, so we'll just push it 2267 along as we go. */ 2268 srel = irel; 2269 2270 pc = sec->output_section->vma + sec->output_offset 2271 + srel->r_offset; 2272 2273 #define GET_RELOC \ 2274 BFD_ASSERT (nrelocs > 0); \ 2275 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \ 2276 pcrel = symval - pc + srel->r_addend; \ 2277 nrelocs --; 2278 2279 #define SNIPNR(offset, nbytes) \ 2280 elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0); 2281 2282 #define SNIP(offset, nbytes, newtype) \ 2283 SNIPNR (offset, nbytes); \ 2284 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype) 2285 2286 /* The order of these bit tests must match the order that the 2287 relocs appear in. Since we sorted those by offset, we can 2288 predict them. */ 2289 2290 /*----------------------------------------------------------------------*/ 2291 /* EF ad BR $rel8 pcrel 2292 ED al ah BR !abs16 abs 2293 EE al ah BR $!rel16 pcrel 2294 EC al ah as BR !!abs20 abs 2295 2296 FD al ah CALL !abs16 abs 2297 FE al ah CALL $!rel16 pcrel 2298 FC al ah as CALL !!abs20 abs 2299 2300 DC ad BC $rel8 2301 DE ad BNC $rel8 2302 DD ad BZ $rel8 2303 DF ad BNZ $rel8 2304 61 C3 ad BH $rel8 2305 61 D3 ad BNH $rel8 2306 61 C8 EF ad SKC ; BR $rel8 2307 61 D8 EF ad SKNC ; BR $rel8 2308 61 E8 EF ad SKZ ; BR $rel8 2309 61 F8 EF ad SKNZ ; BR $rel8 2310 61 E3 EF ad SKH ; BR $rel8 2311 61 F3 EF ad SKNH ; BR $rel8 2312 */ 2313 2314 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_BRA) 2315 { 2316 /* SKIP opcodes that skip non-branches will have a relax tag 2317 but no corresponding symbol to relax against; we just 2318 skip those. */ 2319 if (irel->r_addend & RL78_RELAXA_RNUM) 2320 { 2321 GET_RELOC; 2322 } 2323 2324 switch (insn[0]) 2325 { 2326 case 0xdc: /* BC */ 2327 case 0xdd: /* BZ */ 2328 case 0xde: /* BNC */ 2329 case 0xdf: /* BNZ */ 2330 if (insn[1] == 0x03 && insn[2] == 0xee /* BR */ 2331 && (srel->r_offset - irel->r_offset) > 1) /* a B<c> without its own reloc */ 2332 { 2333 /* This is a "long" conditional as generated by gas: 2334 DC 03 EE ad.dr */ 2335 if (pcrel < 127 2336 && pcrel > -127) 2337 { 2338 insn[0] ^= 0x02; /* invert conditional */ 2339 SNIPNR (4, 1); 2340 SNIP (1, 2, R_RL78_DIR8S_PCREL); 2341 insn[1] = pcrel; 2342 *again = TRUE; 2343 } 2344 } 2345 break; 2346 2347 case 0xec: /* BR !!abs20 */ 2348 2349 if (pcrel < 127 2350 && pcrel > -127) 2351 { 2352 insn[0] = 0xef; 2353 insn[1] = pcrel; 2354 SNIP (2, 2, R_RL78_DIR8S_PCREL); 2355 *again = TRUE; 2356 } 2357 else if (symval < 65536) 2358 { 2359 insn[0] = 0xed; 2360 insn[1] = symval & 0xff; 2361 insn[2] = symval >> 8; 2362 SNIP (2, 1, R_RL78_DIR16U); 2363 *again = TRUE; 2364 } 2365 else if (pcrel < 32767 2366 && pcrel > -32767) 2367 { 2368 insn[0] = 0xee; 2369 insn[1] = pcrel & 0xff; 2370 insn[2] = pcrel >> 8; 2371 SNIP (2, 1, R_RL78_DIR16S_PCREL); 2372 *again = TRUE; 2373 } 2374 break; 2375 2376 case 0xee: /* BR $!pcrel16 */ 2377 case 0xed: /* BR $!abs16 */ 2378 if (pcrel < 127 2379 && pcrel > -127) 2380 { 2381 insn[0] = 0xef; 2382 insn[1] = pcrel; 2383 SNIP (2, 1, R_RL78_DIR8S_PCREL); 2384 *again = TRUE; 2385 } 2386 break; 2387 2388 case 0xfc: /* CALL !!abs20 */ 2389 if (symval < 65536) 2390 { 2391 insn[0] = 0xfd; 2392 insn[1] = symval & 0xff; 2393 insn[2] = symval >> 8; 2394 SNIP (2, 1, R_RL78_DIR16U); 2395 *again = TRUE; 2396 } 2397 else if (pcrel < 32767 2398 && pcrel > -32767) 2399 { 2400 insn[0] = 0xfe; 2401 insn[1] = pcrel & 0xff; 2402 insn[2] = pcrel >> 8; 2403 SNIP (2, 1, R_RL78_DIR16S_PCREL); 2404 *again = TRUE; 2405 } 2406 break; 2407 2408 case 0x61: /* PREFIX */ 2409 /* For SKIP/BR, we change the BR opcode and delete the 2410 SKIP. That way, we don't have to find and change the 2411 relocation for the BR. */ 2412 /* Note that, for the case where we're skipping some 2413 other insn, we have no "other" reloc but that's safe 2414 here anyway. */ 2415 switch (insn[1]) 2416 { 2417 case 0xd3: /* BNH */ 2418 case 0xc3: /* BH */ 2419 if (insn[2] == 0x03 && insn[3] == 0xee 2420 && (srel->r_offset - irel->r_offset) > 2) /* a B<c> without its own reloc */ 2421 { 2422 /* Another long branch by gas: 2423 61 D3 03 EE ad.dr */ 2424 if (pcrel < 127 2425 && pcrel > -127) 2426 { 2427 insn[1] ^= 0x10; /* invert conditional */ 2428 SNIPNR (5, 1); 2429 SNIP (2, 2, R_RL78_DIR8S_PCREL); 2430 insn[2] = pcrel; 2431 *again = TRUE; 2432 } 2433 } 2434 break; 2435 2436 case 0xc8: /* SKC */ 2437 if (insn[2] == 0xef) 2438 { 2439 insn[2] = 0xde; /* BNC */ 2440 SNIPNR (0, 2); 2441 } 2442 break; 2443 2444 case 0xd8: /* SKNC */ 2445 if (insn[2] == 0xef) 2446 { 2447 insn[2] = 0xdc; /* BC */ 2448 SNIPNR (0, 2); 2449 } 2450 break; 2451 2452 case 0xe8: /* SKZ */ 2453 if (insn[2] == 0xef) 2454 { 2455 insn[2] = 0xdf; /* BNZ */ 2456 SNIPNR (0, 2); 2457 } 2458 break; 2459 2460 case 0xf8: /* SKNZ */ 2461 if (insn[2] == 0xef) 2462 { 2463 insn[2] = 0xdd; /* BZ */ 2464 SNIPNR (0, 2); 2465 } 2466 break; 2467 2468 case 0xe3: /* SKH */ 2469 if (insn[2] == 0xef) 2470 { 2471 insn[2] = 0xd3; /* BNH */ 2472 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */ 2473 } 2474 break; 2475 2476 case 0xf3: /* SKNH */ 2477 if (insn[2] == 0xef) 2478 { 2479 insn[2] = 0xc3; /* BH */ 2480 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */ 2481 } 2482 break; 2483 } 2484 break; 2485 } 2486 } 2487 2488 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_ADDR16 2489 && nrelocs > 0) 2490 { 2491 /*----------------------------------------------------------------------*/ 2492 /* Some insns have both a 16-bit address operand and an 8-bit 2493 variant if the address is within a special range: 2494 2495 Address 16-bit operand SADDR range SFR range 2496 FFF00-FFFFF 0xff00-0xffff 0x00-0xff 2497 FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff 2498 2499 The RELAX_ADDR16[] array has the insn encodings for the 2500 16-bit operand version, as well as the SFR and SADDR 2501 variants. We only need to replace the encodings and 2502 adjust the operand. 2503 2504 Note: we intentionally do not attempt to decode and skip 2505 any ES: prefix, as adding ES: means the addr16 (likely) 2506 no longer points to saddr/sfr space. 2507 */ 2508 2509 int is_sfr; 2510 int is_saddr; 2511 int idx; 2512 int poff; 2513 2514 GET_RELOC; 2515 2516 if (0xffe20 <= symval && symval <= 0xfffff) 2517 { 2518 2519 is_saddr = (0xffe20 <= symval && symval <= 0xfff1f); 2520 is_sfr = (0xfff00 <= symval && symval <= 0xfffff); 2521 2522 for (idx = 0; relax_addr16[idx].insn != -1; idx ++) 2523 { 2524 if (relax_addr16[idx].prefix != -1 2525 && insn[0] == relax_addr16[idx].prefix 2526 && insn[1] == relax_addr16[idx].insn) 2527 { 2528 poff = 1; 2529 } 2530 else if (relax_addr16[idx].prefix == -1 2531 && insn[0] == relax_addr16[idx].insn) 2532 { 2533 poff = 0; 2534 } 2535 else 2536 continue; 2537 2538 /* We have a matched insn, and poff is 0 or 1 depending 2539 on the base pattern size. */ 2540 2541 if (is_sfr && relax_addr16[idx].insn_for_sfr != -1) 2542 { 2543 insn[poff] = relax_addr16[idx].insn_for_sfr; 2544 SNIP (poff+2, 1, R_RL78_RH_SFR); 2545 } 2546 2547 else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1) 2548 { 2549 insn[poff] = relax_addr16[idx].insn_for_saddr; 2550 SNIP (poff+2, 1, R_RL78_RH_SADDR); 2551 } 2552 } 2553 } 2554 } 2555 /*----------------------------------------------------------------------*/ 2556 } 2557 2558 return TRUE; 2559 2560 error_return: 2561 free (free_relocs); 2562 free (free_contents); 2563 2564 if (shndx_buf != NULL) 2565 { 2566 shndx_hdr->contents = NULL; 2567 free (shndx_buf); 2568 } 2569 2570 free (free_intsyms); 2571 2572 return TRUE; 2573 } 2574 2575 2576 2578 #define ELF_ARCH bfd_arch_rl78 2579 #define ELF_MACHINE_CODE EM_RL78 2580 #define ELF_MAXPAGESIZE 0x1000 2581 2582 #define TARGET_LITTLE_SYM rl78_elf32_vec 2583 #define TARGET_LITTLE_NAME "elf32-rl78" 2584 2585 #define elf_info_to_howto_rel NULL 2586 #define elf_info_to_howto rl78_info_to_howto_rela 2587 #define elf_backend_object_p rl78_elf_object_p 2588 #define elf_backend_relocate_section rl78_elf_relocate_section 2589 #define elf_symbol_leading_char ('_') 2590 #define elf_backend_can_gc_sections 1 2591 2592 #define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup 2593 #define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup 2594 #define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags 2595 #define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data 2596 #define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data 2597 2598 #define bfd_elf32_bfd_relax_section rl78_elf_relax_section 2599 #define elf_backend_check_relocs rl78_elf_check_relocs 2600 #define elf_backend_always_size_sections \ 2601 rl78_elf_always_size_sections 2602 #define elf_backend_finish_dynamic_sections \ 2603 rl78_elf_finish_dynamic_sections 2604 2605 #include "elf32-target.h" 2606
Indexes created Fri May 01 00:23:41 UTC 2026