elf32-rl78.c revision 1.9.2.1
1 /* Renesas RL78 specific support for 32-bit ELF. 2 Copyright (C) 2011-2022 Free Software Foundation, Inc. 3 4 This file is part of BFD, the Binary File Descriptor library. 5 6 This program is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3 of the License, or 9 (at your option) any later version. 10 11 This program is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with this program; if not, write to the Free Software 18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 19 MA 02110-1301, USA. */ 20 21 #include "sysdep.h" 22 #include "bfd.h" 23 #include "libbfd.h" 24 #include "elf-bfd.h" 25 #include "elf/rl78.h" 26 #include "libiberty.h" 27 28 #define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000) 29 30 #define RL78REL(n,sz,bit,mask,shift,complain,pcrel) \ 31 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \ 32 bfd_elf_generic_reloc, "R_RL78_" #n, false, 0, mask, false) 33 34 static bfd_reloc_status_type rl78_special_reloc (bfd *, arelent *, asymbol *, void *, 35 asection *, bfd *, char **); 36 37 #define RL78_OP_REL(n,sz,bit,mask,shift,complain,pcrel) \ 38 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \ 39 rl78_special_reloc, "R_RL78_" #n, false, 0, mask, false) 40 41 /* Note that the relocations around 0x7f are internal to this file; 42 feel free to move them as needed to avoid conflicts with published 43 relocation numbers. */ 44 45 static reloc_howto_type rl78_elf_howto_table [] = 46 { 47 RL78REL (NONE, 0, 0, 0, 0, dont, false), 48 RL78REL (DIR32, 4, 32, 0xffffffff, 0, dont, false), 49 RL78REL (DIR24S, 4, 24, 0xffffff, 0, signed, false), 50 RL78REL (DIR16, 2, 16, 0xffff, 0, bitfield, false), 51 RL78REL (DIR16U, 2, 16, 0xffff, 0, unsigned, false), 52 RL78REL (DIR16S, 2, 16, 0xffff, 0, bitfield, false), 53 RL78REL (DIR8, 1, 8, 0xff, 0, dont, false), 54 RL78REL (DIR8U, 1, 8, 0xff, 0, unsigned, false), 55 RL78REL (DIR8S, 1, 8, 0xff, 0, bitfield, false), 56 RL78REL (DIR24S_PCREL, 4, 24, 0xffffff, 0, signed, true), 57 RL78REL (DIR16S_PCREL, 2, 16, 0xffff, 0, signed, true), 58 RL78REL (DIR8S_PCREL, 1, 8, 0xff, 0, signed, true), 59 RL78REL (DIR16UL, 2, 16, 0xffff, 2, unsigned, false), 60 RL78REL (DIR16UW, 2, 16, 0xffff, 1, unsigned, false), 61 RL78REL (DIR8UL, 1, 8, 0xff, 2, unsigned, false), 62 RL78REL (DIR8UW, 1, 8, 0xff, 1, unsigned, false), 63 RL78REL (DIR32_REV, 4, 32, 0xffffffff, 0, dont, false), 64 RL78REL (DIR16_REV, 2, 16, 0xffff, 0, bitfield, false), 65 RL78REL (DIR3U_PCREL, 1, 3, 0x7, 0, unsigned, true), 66 67 EMPTY_HOWTO (0x13), 68 EMPTY_HOWTO (0x14), 69 EMPTY_HOWTO (0x15), 70 EMPTY_HOWTO (0x16), 71 EMPTY_HOWTO (0x17), 72 EMPTY_HOWTO (0x18), 73 EMPTY_HOWTO (0x19), 74 EMPTY_HOWTO (0x1a), 75 EMPTY_HOWTO (0x1b), 76 EMPTY_HOWTO (0x1c), 77 EMPTY_HOWTO (0x1d), 78 EMPTY_HOWTO (0x1e), 79 EMPTY_HOWTO (0x1f), 80 81 EMPTY_HOWTO (0x20), 82 EMPTY_HOWTO (0x21), 83 EMPTY_HOWTO (0x22), 84 EMPTY_HOWTO (0x23), 85 EMPTY_HOWTO (0x24), 86 EMPTY_HOWTO (0x25), 87 EMPTY_HOWTO (0x26), 88 EMPTY_HOWTO (0x27), 89 EMPTY_HOWTO (0x28), 90 EMPTY_HOWTO (0x29), 91 EMPTY_HOWTO (0x2a), 92 EMPTY_HOWTO (0x2b), 93 EMPTY_HOWTO (0x2c), 94 95 RL78REL (RH_RELAX, 0, 0, 0, 0, dont, false), 96 RL78REL (RH_SFR, 1, 8, 0xff, 0, unsigned, false), 97 RL78REL (RH_SADDR, 1, 8, 0xff, 0, unsigned, false), 98 99 EMPTY_HOWTO (0x30), 100 EMPTY_HOWTO (0x31), 101 EMPTY_HOWTO (0x32), 102 EMPTY_HOWTO (0x33), 103 EMPTY_HOWTO (0x34), 104 EMPTY_HOWTO (0x35), 105 EMPTY_HOWTO (0x36), 106 EMPTY_HOWTO (0x37), 107 EMPTY_HOWTO (0x38), 108 EMPTY_HOWTO (0x39), 109 EMPTY_HOWTO (0x3a), 110 EMPTY_HOWTO (0x3b), 111 EMPTY_HOWTO (0x3c), 112 EMPTY_HOWTO (0x3d), 113 EMPTY_HOWTO (0x3e), 114 EMPTY_HOWTO (0x3f), 115 EMPTY_HOWTO (0x40), 116 117 RL78_OP_REL (ABS32, 4, 32, 0xffffffff, 0, dont, false), 118 RL78_OP_REL (ABS24S, 4, 24, 0xffffff, 0, signed, false), 119 RL78_OP_REL (ABS16, 2, 16, 0xffff, 0, bitfield, false), 120 RL78_OP_REL (ABS16U, 2, 16, 0xffff, 0, unsigned, false), 121 RL78_OP_REL (ABS16S, 2, 16, 0xffff, 0, signed, false), 122 RL78_OP_REL (ABS8, 1, 8, 0xff, 0, bitfield, false), 123 RL78_OP_REL (ABS8U, 1, 8, 0xff, 0, unsigned, false), 124 RL78_OP_REL (ABS8S, 1, 8, 0xff, 0, signed, false), 125 RL78_OP_REL (ABS24S_PCREL, 4, 24, 0xffffff, 0, signed, true), 126 RL78_OP_REL (ABS16S_PCREL, 2, 16, 0xffff, 0, signed, true), 127 RL78_OP_REL (ABS8S_PCREL, 1, 8, 0xff, 0, signed, true), 128 RL78_OP_REL (ABS16UL, 2, 16, 0xffff, 0, unsigned, false), 129 RL78_OP_REL (ABS16UW, 2, 16, 0xffff, 0, unsigned, false), 130 RL78_OP_REL (ABS8UL, 1, 8, 0xff, 0, unsigned, false), 131 RL78_OP_REL (ABS8UW, 1, 8, 0xff, 0, unsigned, false), 132 RL78_OP_REL (ABS32_REV, 4, 32, 0xffffffff, 0, dont, false), 133 RL78_OP_REL (ABS16_REV, 2, 16, 0xffff, 0, bitfield, false), 134 135 #define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32) 136 137 EMPTY_HOWTO (0x52), 138 EMPTY_HOWTO (0x53), 139 EMPTY_HOWTO (0x54), 140 EMPTY_HOWTO (0x55), 141 EMPTY_HOWTO (0x56), 142 EMPTY_HOWTO (0x57), 143 EMPTY_HOWTO (0x58), 144 EMPTY_HOWTO (0x59), 145 EMPTY_HOWTO (0x5a), 146 EMPTY_HOWTO (0x5b), 147 EMPTY_HOWTO (0x5c), 148 EMPTY_HOWTO (0x5d), 149 EMPTY_HOWTO (0x5e), 150 EMPTY_HOWTO (0x5f), 151 EMPTY_HOWTO (0x60), 152 EMPTY_HOWTO (0x61), 153 EMPTY_HOWTO (0x62), 154 EMPTY_HOWTO (0x63), 155 EMPTY_HOWTO (0x64), 156 EMPTY_HOWTO (0x65), 157 EMPTY_HOWTO (0x66), 158 EMPTY_HOWTO (0x67), 159 EMPTY_HOWTO (0x68), 160 EMPTY_HOWTO (0x69), 161 EMPTY_HOWTO (0x6a), 162 EMPTY_HOWTO (0x6b), 163 EMPTY_HOWTO (0x6c), 164 EMPTY_HOWTO (0x6d), 165 EMPTY_HOWTO (0x6e), 166 EMPTY_HOWTO (0x6f), 167 EMPTY_HOWTO (0x70), 168 EMPTY_HOWTO (0x71), 169 EMPTY_HOWTO (0x72), 170 EMPTY_HOWTO (0x73), 171 EMPTY_HOWTO (0x74), 172 EMPTY_HOWTO (0x75), 173 EMPTY_HOWTO (0x76), 174 EMPTY_HOWTO (0x77), 175 176 EMPTY_HOWTO (0x78), 177 EMPTY_HOWTO (0x79), 178 EMPTY_HOWTO (0x7a), 179 EMPTY_HOWTO (0x7b), 180 EMPTY_HOWTO (0x7c), 181 EMPTY_HOWTO (0x7d), 182 EMPTY_HOWTO (0x7e), 183 EMPTY_HOWTO (0x7f), 184 185 RL78_OP_REL (SYM, 0, 0, 0, 0, dont, false), 186 RL78_OP_REL (OPneg, 0, 0, 0, 0, dont, false), 187 RL78_OP_REL (OPadd, 0, 0, 0, 0, dont, false), 188 RL78_OP_REL (OPsub, 0, 0, 0, 0, dont, false), 189 RL78_OP_REL (OPmul, 0, 0, 0, 0, dont, false), 190 RL78_OP_REL (OPdiv, 0, 0, 0, 0, dont, false), 191 RL78_OP_REL (OPshla, 0, 0, 0, 0, dont, false), 192 RL78_OP_REL (OPshra, 0, 0, 0, 0, dont, false), 193 RL78_OP_REL (OPsctsize, 0, 0, 0, 0, dont, false), 194 EMPTY_HOWTO (0x89), 195 EMPTY_HOWTO (0x8a), 196 EMPTY_HOWTO (0x8b), 197 EMPTY_HOWTO (0x8c), 198 RL78_OP_REL (OPscttop, 0, 0, 0, 0, dont, false), 199 EMPTY_HOWTO (0x8e), 200 EMPTY_HOWTO (0x8f), 201 RL78_OP_REL (OPand, 0, 0, 0, 0, dont, false), 202 RL78_OP_REL (OPor, 0, 0, 0, 0, dont, false), 203 RL78_OP_REL (OPxor, 0, 0, 0, 0, dont, false), 204 RL78_OP_REL (OPnot, 0, 0, 0, 0, dont, false), 205 RL78_OP_REL (OPmod, 0, 0, 0, 0, dont, false), 206 RL78_OP_REL (OPromtop, 0, 0, 0, 0, dont, false), 207 RL78_OP_REL (OPramtop, 0, 0, 0, 0, dont, false) 208 }; 209 210 /* Map BFD reloc types to RL78 ELF reloc types. */ 212 213 struct rl78_reloc_map 214 { 215 bfd_reloc_code_real_type bfd_reloc_val; 216 unsigned int rl78_reloc_val; 217 }; 218 219 static const struct rl78_reloc_map rl78_reloc_map [] = 220 { 221 { BFD_RELOC_NONE, R_RL78_NONE }, 222 { BFD_RELOC_8, R_RL78_DIR8S }, 223 { BFD_RELOC_16, R_RL78_DIR16S }, 224 { BFD_RELOC_24, R_RL78_DIR24S }, 225 { BFD_RELOC_32, R_RL78_DIR32 }, 226 { BFD_RELOC_RL78_16_OP, R_RL78_DIR16 }, 227 { BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL }, 228 { BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL }, 229 { BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL }, 230 { BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL }, 231 { BFD_RELOC_RL78_8U, R_RL78_DIR8U }, 232 { BFD_RELOC_RL78_16U, R_RL78_DIR16U }, 233 { BFD_RELOC_RL78_SYM, R_RL78_SYM }, 234 { BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub }, 235 { BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg }, 236 { BFD_RELOC_RL78_OP_AND, R_RL78_OPand }, 237 { BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra }, 238 { BFD_RELOC_RL78_ABS8, R_RL78_ABS8 }, 239 { BFD_RELOC_RL78_ABS16, R_RL78_ABS16 }, 240 { BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV }, 241 { BFD_RELOC_RL78_ABS32, R_RL78_ABS32 }, 242 { BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV }, 243 { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL }, 244 { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW }, 245 { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U }, 246 { BFD_RELOC_RL78_SADDR, R_RL78_RH_SADDR }, 247 { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX } 248 }; 249 250 static reloc_howto_type * 251 rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, 252 bfd_reloc_code_real_type code) 253 { 254 unsigned int i; 255 256 if (code == BFD_RELOC_RL78_32_OP) 257 return rl78_elf_howto_table + R_RL78_DIR32; 258 259 for (i = ARRAY_SIZE (rl78_reloc_map); i--;) 260 if (rl78_reloc_map [i].bfd_reloc_val == code) 261 return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val; 262 263 return NULL; 264 } 265 266 static reloc_howto_type * 267 rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name) 268 { 269 unsigned int i; 270 271 for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++) 272 if (rl78_elf_howto_table[i].name != NULL 273 && strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0) 274 return rl78_elf_howto_table + i; 275 276 return NULL; 277 } 278 279 /* Set the howto pointer for an RL78 ELF reloc. */ 280 281 static bool 282 rl78_info_to_howto_rela (bfd * abfd, 283 arelent * cache_ptr, 284 Elf_Internal_Rela * dst) 285 { 286 unsigned int r_type; 287 288 r_type = ELF32_R_TYPE (dst->r_info); 289 if (r_type >= (unsigned int) R_RL78_max) 290 { 291 /* xgettext:c-format */ 292 _bfd_error_handler (_("%pB: unsupported relocation type %#x"), 293 abfd, r_type); 294 bfd_set_error (bfd_error_bad_value); 295 return false; 296 } 297 cache_ptr->howto = rl78_elf_howto_table + r_type; 298 return true; 299 } 300 301 static bfd_vma 303 get_symbol_value (const char * name, 304 struct bfd_link_info * info, 305 bfd * input_bfd, 306 asection * input_section, 307 int offset) 308 { 309 struct bfd_link_hash_entry * h; 310 311 if (info == NULL) 312 return 0; 313 314 h = bfd_link_hash_lookup (info->hash, name, false, false, true); 315 316 if (h == NULL 317 || (h->type != bfd_link_hash_defined 318 && h->type != bfd_link_hash_defweak)) 319 { 320 (*info->callbacks->undefined_symbol) 321 (info, name, input_bfd, input_section, offset, true); 322 return 0; 323 } 324 325 return (h->u.def.value 326 + h->u.def.section->output_section->vma 327 + h->u.def.section->output_offset); 328 } 329 330 static bfd_vma 331 get_romstart (struct bfd_link_info * info, 332 bfd * abfd, 333 asection * sec, 334 int offset) 335 { 336 static bool cached = false; 337 static bfd_vma cached_value = 0; 338 339 if (!cached) 340 { 341 cached_value = get_symbol_value ("_start", info, abfd, sec, offset); 342 cached = true; 343 } 344 return cached_value; 345 } 346 347 static bfd_vma 348 get_ramstart (struct bfd_link_info * info, 349 bfd * abfd, 350 asection * sec, 351 int offset) 352 { 353 static bool cached = false; 354 static bfd_vma cached_value = 0; 355 356 if (!cached) 357 { 358 cached_value = get_symbol_value ("__datastart", info, abfd, sec, offset); 359 cached = true; 360 } 361 return cached_value; 362 } 363 364 #define NUM_STACK_ENTRIES 16 365 static int32_t rl78_stack [ NUM_STACK_ENTRIES ]; 366 static unsigned int rl78_stack_top; 367 368 static inline void 369 rl78_stack_push (bfd_vma val, bfd_reloc_status_type *r) 370 { 371 if (rl78_stack_top < NUM_STACK_ENTRIES) 372 rl78_stack[rl78_stack_top++] = val; 373 else 374 *r = bfd_reloc_dangerous; 375 } 376 377 static inline bfd_vma 378 rl78_stack_pop (bfd_reloc_status_type *r) 379 { 380 if (rl78_stack_top > 0) 381 return rl78_stack[-- rl78_stack_top]; 382 else 383 *r = bfd_reloc_dangerous; 384 return 0; 385 } 386 387 /* Special handling for RL78 complex relocs. Returns the 388 value of the reloc, or 0 for relocs which do not generate 389 a result. SYMVAL is the value of the symbol for relocs 390 which use a symbolic argument. */ 391 392 static bfd_vma 393 rl78_compute_complex_reloc (unsigned long r_type, 394 bfd_vma symval, 395 asection *input_section, 396 bfd_reloc_status_type *r, 397 char **error_message) 398 { 399 int32_t tmp1, tmp2; 400 bfd_vma relocation = 0; 401 bfd_reloc_status_type stat = bfd_reloc_ok; 402 403 switch (r_type) 404 { 405 default: 406 stat = bfd_reloc_notsupported; 407 break; 408 409 case R_RL78_ABS24S_PCREL: 410 case R_RL78_ABS16S_PCREL: 411 case R_RL78_ABS8S_PCREL: 412 relocation = rl78_stack_pop (&stat); 413 relocation -= input_section->output_section->vma + input_section->output_offset; 414 break; 415 416 case R_RL78_ABS32: 417 case R_RL78_ABS32_REV: 418 case R_RL78_ABS16: 419 case R_RL78_ABS16_REV: 420 case R_RL78_ABS16S: 421 case R_RL78_ABS16U: 422 case R_RL78_ABS8: 423 case R_RL78_ABS8U: 424 case R_RL78_ABS8S: 425 relocation = rl78_stack_pop (&stat); 426 break; 427 428 case R_RL78_ABS16UL: 429 case R_RL78_ABS8UL: 430 relocation = rl78_stack_pop (&stat) >> 2; 431 break;; 432 433 case R_RL78_ABS16UW: 434 case R_RL78_ABS8UW: 435 relocation = rl78_stack_pop (&stat) >> 1; 436 break; 437 438 /* The rest of the relocs compute values and then push them onto the stack. */ 439 case R_RL78_OPramtop: 440 case R_RL78_OPromtop: 441 case R_RL78_SYM: 442 rl78_stack_push (symval, &stat); 443 break; 444 445 case R_RL78_OPneg: 446 tmp1 = rl78_stack_pop (&stat); 447 tmp1 = - tmp1; 448 rl78_stack_push (tmp1, &stat); 449 break; 450 451 case R_RL78_OPadd: 452 tmp2 = rl78_stack_pop (&stat); 453 tmp1 = rl78_stack_pop (&stat); 454 tmp1 += tmp2; 455 rl78_stack_push (tmp1, &stat); 456 break; 457 458 case R_RL78_OPsub: 459 /* For the expression "A - B", the assembler pushes A, 460 then B, then OPSUB. So the first op we pop is B, not A. */ 461 tmp2 = rl78_stack_pop (&stat); /* B */ 462 tmp1 = rl78_stack_pop (&stat); /* A */ 463 tmp1 -= tmp2; /* A - B */ 464 rl78_stack_push (tmp1, &stat); 465 break; 466 467 case R_RL78_OPmul: 468 tmp2 = rl78_stack_pop (&stat); 469 tmp1 = rl78_stack_pop (&stat); 470 tmp1 *= tmp2; 471 rl78_stack_push (tmp1, &stat); 472 break; 473 474 case R_RL78_OPdiv: 475 tmp2 = rl78_stack_pop (&stat); 476 tmp1 = rl78_stack_pop (&stat); 477 if (tmp2 != 0) 478 tmp1 /= tmp2; 479 else 480 { 481 tmp1 = 0; 482 stat = bfd_reloc_overflow; 483 } 484 rl78_stack_push (tmp1, &stat); 485 break; 486 487 case R_RL78_OPshla: 488 tmp2 = rl78_stack_pop (&stat); 489 tmp1 = rl78_stack_pop (&stat); 490 tmp1 <<= tmp2; 491 rl78_stack_push (tmp1, &stat); 492 break; 493 494 case R_RL78_OPshra: 495 tmp2 = rl78_stack_pop (&stat); 496 tmp1 = rl78_stack_pop (&stat); 497 tmp1 >>= tmp2; 498 rl78_stack_push (tmp1, &stat); 499 break; 500 501 case R_RL78_OPsctsize: 502 rl78_stack_push (input_section->size, &stat); 503 break; 504 505 case R_RL78_OPscttop: 506 rl78_stack_push (input_section->output_section->vma, &stat); 507 break; 508 509 case R_RL78_OPand: 510 tmp2 = rl78_stack_pop (&stat); 511 tmp1 = rl78_stack_pop (&stat); 512 tmp1 &= tmp2; 513 rl78_stack_push (tmp1, &stat); 514 break; 515 516 case R_RL78_OPor: 517 tmp2 = rl78_stack_pop (&stat); 518 tmp1 = rl78_stack_pop (&stat); 519 tmp1 |= tmp2; 520 rl78_stack_push (tmp1, &stat); 521 break; 522 523 case R_RL78_OPxor: 524 tmp2 = rl78_stack_pop (&stat); 525 tmp1 = rl78_stack_pop (&stat); 526 tmp1 ^= tmp2; 527 rl78_stack_push (tmp1, &stat); 528 break; 529 530 case R_RL78_OPnot: 531 tmp1 = rl78_stack_pop (&stat); 532 tmp1 = ~ tmp1; 533 rl78_stack_push (tmp1, &stat); 534 break; 535 536 case R_RL78_OPmod: 537 tmp2 = rl78_stack_pop (&stat); 538 tmp1 = rl78_stack_pop (&stat); 539 if (tmp2 != 0) 540 tmp1 %= tmp2; 541 else 542 { 543 tmp1 = 0; 544 stat = bfd_reloc_overflow; 545 } 546 rl78_stack_push (tmp1, &stat); 547 break; 548 } 549 550 if (r) 551 { 552 if (stat == bfd_reloc_dangerous) 553 *error_message = (_("RL78 reloc stack overflow/underflow")); 554 else if (stat == bfd_reloc_overflow) 555 { 556 stat = bfd_reloc_dangerous; 557 *error_message = (_("RL78 reloc divide by zero")); 558 } 559 *r = stat; 560 } 561 return relocation; 562 } 563 564 /* Check whether RELOCATION overflows a relocation field described by 565 HOWTO. */ 566 567 static bfd_reloc_status_type 568 check_overflow (reloc_howto_type *howto, bfd_vma relocation) 569 { 570 switch (howto->complain_on_overflow) 571 { 572 case complain_overflow_dont: 573 break; 574 575 case complain_overflow_bitfield: 576 if ((bfd_signed_vma) relocation < -(1LL << (howto->bitsize - 1)) 577 || (bfd_signed_vma) relocation >= 1LL << howto->bitsize) 578 return bfd_reloc_overflow; 579 break; 580 581 case complain_overflow_signed: 582 if ((bfd_signed_vma) relocation < -(1LL << (howto->bitsize - 1)) 583 || (bfd_signed_vma) relocation >= 1LL << (howto->bitsize - 1)) 584 return bfd_reloc_overflow; 585 break; 586 587 case complain_overflow_unsigned: 588 if (relocation >= 1ULL << howto->bitsize) 589 return bfd_reloc_overflow; 590 break; 591 } 592 return bfd_reloc_ok; 593 } 594 595 static bfd_reloc_status_type 596 rl78_special_reloc (bfd * input_bfd, 597 arelent * reloc, 598 asymbol * symbol, 599 void * data, 600 asection * input_section, 601 bfd * output_bfd ATTRIBUTE_UNUSED, 602 char ** error_message) 603 { 604 bfd_reloc_status_type r = bfd_reloc_ok; 605 bfd_vma relocation = 0; 606 unsigned long r_type = reloc->howto->type; 607 bfd_byte * contents = data; 608 609 /* If necessary, compute the symbolic value of the relocation. */ 610 switch (r_type) 611 { 612 case R_RL78_SYM: 613 relocation = (symbol->value 614 + symbol->section->output_section->vma 615 + symbol->section->output_offset 616 + reloc->addend); 617 break; 618 619 case R_RL78_OPromtop: 620 relocation = get_romstart (NULL, input_bfd, input_section, 621 reloc->address); 622 break; 623 624 case R_RL78_OPramtop: 625 relocation = get_ramstart (NULL, input_bfd, input_section, 626 reloc->address); 627 break; 628 } 629 630 /* Get the value of the relocation. */ 631 relocation = rl78_compute_complex_reloc (r_type, relocation, input_section, 632 &r, error_message); 633 634 if (STACK_REL_P (r_type)) 635 { 636 bfd_size_type limit; 637 unsigned int nbytes; 638 639 if (r == bfd_reloc_ok) 640 r = check_overflow (reloc->howto, relocation); 641 642 if (r_type == R_RL78_ABS16_REV) 643 relocation = ((relocation & 0xff) << 8) | ((relocation >> 8) & 0xff); 644 else if (r_type == R_RL78_ABS32_REV) 645 relocation = (((relocation & 0xff) << 24) 646 | ((relocation & 0xff00) << 8) 647 | ((relocation >> 8) & 0xff00) 648 | ((relocation >> 24) & 0xff)); 649 650 limit = bfd_get_section_limit_octets (input_bfd, input_section); 651 nbytes = reloc->howto->bitsize / 8; 652 if (reloc->address < limit 653 && nbytes <= limit - reloc->address) 654 { 655 unsigned int i; 656 657 for (i = 0; i < nbytes; i++) 658 { 659 contents[reloc->address + i] = relocation; 660 relocation >>= 8; 661 } 662 } 663 else 664 r = bfd_reloc_outofrange; 665 } 666 667 return r; 668 } 669 670 #define OP(i) (contents[rel->r_offset + (i)]) 671 672 /* Relocate an RL78 ELF section. 673 There is some attempt to make this function usable for many architectures, 674 both USE_REL and USE_RELA ['twould be nice if such a critter existed], 675 if only to serve as a learning tool. 676 677 The RELOCATE_SECTION function is called by the new ELF backend linker 678 to handle the relocations for a section. 679 680 The relocs are always passed as Rela structures; if the section 681 actually uses Rel structures, the r_addend field will always be 682 zero. 683 684 This function is responsible for adjusting the section contents as 685 necessary, and (if using Rela relocs and generating a relocatable 686 output file) adjusting the reloc addend as necessary. 687 688 This function does not have to worry about setting the reloc 689 address or the reloc symbol index. 690 691 LOCAL_SYMS is a pointer to the swapped in local symbols. 692 693 LOCAL_SECTIONS is an array giving the section in the input file 694 corresponding to the st_shndx field of each local symbol. 695 696 The global hash table entry for the global symbols can be found 697 via elf_sym_hashes (input_bfd). 698 699 When generating relocatable output, this function must handle 700 STB_LOCAL/STT_SECTION symbols specially. The output symbol is 701 going to be the section symbol corresponding to the output 702 section, which means that the addend must be adjusted 703 accordingly. */ 704 705 static int 706 rl78_elf_relocate_section 707 (bfd * output_bfd, 708 struct bfd_link_info * info, 709 bfd * input_bfd, 710 asection * input_section, 711 bfd_byte * contents, 712 Elf_Internal_Rela * relocs, 713 Elf_Internal_Sym * local_syms, 714 asection ** local_sections) 715 { 716 Elf_Internal_Shdr * symtab_hdr; 717 struct elf_link_hash_entry ** sym_hashes; 718 Elf_Internal_Rela * rel; 719 Elf_Internal_Rela * relend; 720 asection *splt; 721 bool ret; 722 723 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr; 724 sym_hashes = elf_sym_hashes (input_bfd); 725 relend = relocs + input_section->reloc_count; 726 727 splt = elf_hash_table (info)->splt; 728 ret = true; 729 for (rel = relocs; rel < relend; rel ++) 730 { 731 reloc_howto_type *howto; 732 unsigned long r_symndx; 733 Elf_Internal_Sym *sym; 734 asection *sec; 735 struct elf_link_hash_entry *h; 736 bfd_vma relocation; 737 bfd_reloc_status_type r; 738 const char *name = NULL; 739 bool unresolved_reloc = true; 740 int r_type; 741 char *error_message; 742 743 r_type = ELF32_R_TYPE (rel->r_info); 744 r_symndx = ELF32_R_SYM (rel->r_info); 745 746 howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info); 747 h = NULL; 748 sym = NULL; 749 sec = NULL; 750 relocation = 0; 751 752 if (r_symndx < symtab_hdr->sh_info) 753 { 754 sym = local_syms + r_symndx; 755 sec = local_sections [r_symndx]; 756 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel); 757 758 name = bfd_elf_string_from_elf_section 759 (input_bfd, symtab_hdr->sh_link, sym->st_name); 760 name = sym->st_name == 0 ? bfd_section_name (sec) : name; 761 } 762 else 763 { 764 bool warned ATTRIBUTE_UNUSED; 765 bool ignored ATTRIBUTE_UNUSED; 766 767 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, 768 r_symndx, symtab_hdr, sym_hashes, h, 769 sec, relocation, unresolved_reloc, 770 warned, ignored); 771 772 name = h->root.root.string; 773 } 774 775 if (sec != NULL && discarded_section (sec)) 776 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, 777 rel, 1, relend, howto, 0, contents); 778 779 if (bfd_link_relocatable (info)) 780 { 781 /* This is a relocatable link. We don't have to change 782 anything, unless the reloc is against a section symbol, 783 in which case we have to adjust according to where the 784 section symbol winds up in the output section. */ 785 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION) 786 rel->r_addend += sec->output_offset; 787 continue; 788 } 789 790 switch (ELF32_R_TYPE (rel->r_info)) 791 { 792 case R_RL78_DIR16S: 793 { 794 bfd_vma *plt_offset; 795 796 if (h != NULL) 797 plt_offset = &h->plt.offset; 798 else 799 plt_offset = elf_local_got_offsets (input_bfd) + r_symndx; 800 801 if (! valid_16bit_address (relocation)) 802 { 803 /* If this is the first time we've processed this symbol, 804 fill in the plt entry with the correct symbol address. */ 805 if ((*plt_offset & 1) == 0) 806 { 807 unsigned int x; 808 809 x = 0x000000ec; /* br !!abs24 */ 810 x |= (relocation << 8) & 0xffffff00; 811 bfd_put_32 (input_bfd, x, splt->contents + *plt_offset); 812 *plt_offset |= 1; 813 } 814 815 relocation = (splt->output_section->vma 816 + splt->output_offset 817 + (*plt_offset & -2)); 818 if (name) 819 { 820 char *newname = bfd_malloc (strlen(name)+5); 821 strcpy (newname, name); 822 strcat(newname, ".plt"); 823 _bfd_generic_link_add_one_symbol (info, 824 input_bfd, 825 newname, 826 BSF_FUNCTION | BSF_WEAK, 827 splt, 828 (*plt_offset & -2), 829 0, 830 1, 831 0, 832 0); 833 } 834 } 835 } 836 break; 837 } 838 839 if (h != NULL && h->root.type == bfd_link_hash_undefweak) 840 /* If the symbol is undefined and weak 841 then the relocation resolves to zero. */ 842 relocation = 0; 843 else 844 { 845 if (howto->pc_relative) 846 { 847 relocation -= (input_section->output_section->vma 848 + input_section->output_offset 849 + rel->r_offset); 850 relocation -= bfd_get_reloc_size (howto); 851 } 852 853 relocation += rel->r_addend; 854 } 855 856 r = bfd_reloc_ok; 857 if (howto->bitsize != 0 858 && (rel->r_offset >= input_section->size 859 || ((howto->bitsize + 7u) / 8 860 > input_section->size - rel->r_offset))) 861 r = bfd_reloc_outofrange; 862 else 863 switch (r_type) 864 { 865 case R_RL78_NONE: 866 break; 867 868 case R_RL78_RH_RELAX: 869 break; 870 871 case R_RL78_DIR8S_PCREL: 872 OP (0) = relocation; 873 break; 874 875 case R_RL78_DIR8S: 876 OP (0) = relocation; 877 break; 878 879 case R_RL78_DIR8U: 880 OP (0) = relocation; 881 break; 882 883 case R_RL78_DIR16S_PCREL: 884 OP (0) = relocation; 885 OP (1) = relocation >> 8; 886 break; 887 888 case R_RL78_DIR16S: 889 if ((relocation & 0xf0000) == 0xf0000) 890 relocation &= 0xffff; 891 OP (0) = relocation; 892 OP (1) = relocation >> 8; 893 break; 894 895 case R_RL78_DIR16U: 896 OP (0) = relocation; 897 OP (1) = relocation >> 8; 898 break; 899 900 case R_RL78_DIR16: 901 OP (0) = relocation; 902 OP (1) = relocation >> 8; 903 break; 904 905 case R_RL78_DIR16_REV: 906 OP (1) = relocation; 907 OP (0) = relocation >> 8; 908 break; 909 910 case R_RL78_DIR3U_PCREL: 911 OP (0) &= 0xf8; 912 OP (0) |= relocation & 0x07; 913 /* Map [3, 10] to [0, 7]. The code below using howto 914 bitsize will check for unsigned overflow. */ 915 relocation -= 3; 916 break; 917 918 case R_RL78_DIR24S_PCREL: 919 OP (0) = relocation; 920 OP (1) = relocation >> 8; 921 OP (2) = relocation >> 16; 922 break; 923 924 case R_RL78_DIR24S: 925 OP (0) = relocation; 926 OP (1) = relocation >> 8; 927 OP (2) = relocation >> 16; 928 break; 929 930 case R_RL78_DIR32: 931 OP (0) = relocation; 932 OP (1) = relocation >> 8; 933 OP (2) = relocation >> 16; 934 OP (3) = relocation >> 24; 935 break; 936 937 case R_RL78_DIR32_REV: 938 OP (3) = relocation; 939 OP (2) = relocation >> 8; 940 OP (1) = relocation >> 16; 941 OP (0) = relocation >> 24; 942 break; 943 944 case R_RL78_RH_SFR: 945 relocation -= 0xfff00; 946 OP (0) = relocation; 947 break; 948 949 case R_RL78_RH_SADDR: 950 relocation -= 0xffe20; 951 OP (0) = relocation; 952 break; 953 954 /* Complex reloc handling: */ 955 case R_RL78_ABS32: 956 case R_RL78_ABS32_REV: 957 case R_RL78_ABS24S_PCREL: 958 case R_RL78_ABS24S: 959 case R_RL78_ABS16: 960 case R_RL78_ABS16_REV: 961 case R_RL78_ABS16S_PCREL: 962 case R_RL78_ABS16S: 963 case R_RL78_ABS16U: 964 case R_RL78_ABS16UL: 965 case R_RL78_ABS16UW: 966 case R_RL78_ABS8: 967 case R_RL78_ABS8U: 968 case R_RL78_ABS8UL: 969 case R_RL78_ABS8UW: 970 case R_RL78_ABS8S_PCREL: 971 case R_RL78_ABS8S: 972 case R_RL78_OPneg: 973 case R_RL78_OPadd: 974 case R_RL78_OPsub: 975 case R_RL78_OPmul: 976 case R_RL78_OPdiv: 977 case R_RL78_OPshla: 978 case R_RL78_OPshra: 979 case R_RL78_OPsctsize: 980 case R_RL78_OPscttop: 981 case R_RL78_OPand: 982 case R_RL78_OPor: 983 case R_RL78_OPxor: 984 case R_RL78_OPnot: 985 case R_RL78_OPmod: 986 relocation = rl78_compute_complex_reloc (r_type, 0, input_section, 987 &r, &error_message); 988 989 switch (r_type) 990 { 991 case R_RL78_ABS32: 992 OP (0) = relocation; 993 OP (1) = relocation >> 8; 994 OP (2) = relocation >> 16; 995 OP (3) = relocation >> 24; 996 break; 997 998 case R_RL78_ABS32_REV: 999 OP (3) = relocation; 1000 OP (2) = relocation >> 8; 1001 OP (1) = relocation >> 16; 1002 OP (0) = relocation >> 24; 1003 break; 1004 1005 case R_RL78_ABS24S_PCREL: 1006 case R_RL78_ABS24S: 1007 OP (0) = relocation; 1008 OP (1) = relocation >> 8; 1009 OP (2) = relocation >> 16; 1010 break; 1011 1012 case R_RL78_ABS16: 1013 OP (0) = relocation; 1014 OP (1) = relocation >> 8; 1015 break; 1016 1017 case R_RL78_ABS16_REV: 1018 OP (1) = relocation; 1019 OP (0) = relocation >> 8; 1020 break; 1021 1022 case R_RL78_ABS16S_PCREL: 1023 case R_RL78_ABS16S: 1024 OP (0) = relocation; 1025 OP (1) = relocation >> 8; 1026 break; 1027 1028 case R_RL78_ABS16U: 1029 case R_RL78_ABS16UL: 1030 case R_RL78_ABS16UW: 1031 OP (0) = relocation; 1032 OP (1) = relocation >> 8; 1033 break; 1034 1035 case R_RL78_ABS8: 1036 OP (0) = relocation; 1037 break; 1038 1039 case R_RL78_ABS8U: 1040 case R_RL78_ABS8UL: 1041 case R_RL78_ABS8UW: 1042 OP (0) = relocation; 1043 break; 1044 1045 case R_RL78_ABS8S_PCREL: 1046 case R_RL78_ABS8S: 1047 OP (0) = relocation; 1048 break; 1049 1050 default: 1051 break; 1052 } 1053 break; 1054 1055 case R_RL78_SYM: 1056 if (r_symndx < symtab_hdr->sh_info) 1057 relocation = sec->output_section->vma + sec->output_offset 1058 + sym->st_value + rel->r_addend; 1059 else if (h != NULL 1060 && (h->root.type == bfd_link_hash_defined 1061 || h->root.type == bfd_link_hash_defweak)) 1062 relocation = h->root.u.def.value 1063 + sec->output_section->vma 1064 + sec->output_offset 1065 + rel->r_addend; 1066 else 1067 { 1068 relocation = 0; 1069 if (h->root.type != bfd_link_hash_undefweak) 1070 _bfd_error_handler 1071 (_("warning: RL78_SYM reloc with an unknown symbol")); 1072 } 1073 (void) rl78_compute_complex_reloc (r_type, relocation, input_section, 1074 &r, &error_message); 1075 break; 1076 1077 case R_RL78_OPromtop: 1078 relocation = get_romstart (info, input_bfd, input_section, 1079 rel->r_offset); 1080 (void) rl78_compute_complex_reloc (r_type, relocation, input_section, 1081 &r, &error_message); 1082 break; 1083 1084 case R_RL78_OPramtop: 1085 relocation = get_ramstart (info, input_bfd, input_section, 1086 rel->r_offset); 1087 (void) rl78_compute_complex_reloc (r_type, relocation, input_section, 1088 &r, &error_message); 1089 break; 1090 1091 default: 1092 r = bfd_reloc_notsupported; 1093 break; 1094 } 1095 1096 if (r == bfd_reloc_ok) 1097 r = check_overflow (howto, relocation); 1098 1099 if (r != bfd_reloc_ok) 1100 { 1101 switch (r) 1102 { 1103 case bfd_reloc_overflow: 1104 (*info->callbacks->reloc_overflow) 1105 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0, 1106 input_bfd, input_section, rel->r_offset); 1107 break; 1108 1109 case bfd_reloc_undefined: 1110 (*info->callbacks->undefined_symbol) 1111 (info, name, input_bfd, input_section, rel->r_offset, true); 1112 break; 1113 1114 case bfd_reloc_outofrange: 1115 /* xgettext:c-format */ 1116 (*info->callbacks->einfo) 1117 (_("%H: %s out of range\n"), 1118 input_bfd, input_section, rel->r_offset, howto->name); 1119 break; 1120 1121 case bfd_reloc_notsupported: 1122 /* xgettext:c-format */ 1123 (*info->callbacks->einfo) 1124 (_("%H: relocation type %u is not supported\n"), 1125 input_bfd, input_section, rel->r_offset, r_type); 1126 break; 1127 1128 case bfd_reloc_dangerous: 1129 (*info->callbacks->reloc_dangerous) 1130 (info, error_message, input_bfd, input_section, rel->r_offset); 1131 break; 1132 1133 default: 1134 /* xgettext:c-format */ 1135 (*info->callbacks->einfo) 1136 (_("%H: relocation %s returns an unrecognized value %x\n"), 1137 input_bfd, input_section, rel->r_offset, howto->name, r); 1138 break; 1139 } 1140 ret = false; 1141 } 1142 } 1143 1144 return ret; 1145 } 1146 1147 /* Function to set the ELF flag bits. */ 1149 1150 static bool 1151 rl78_elf_set_private_flags (bfd * abfd, flagword flags) 1152 { 1153 elf_elfheader (abfd)->e_flags = flags; 1154 elf_flags_init (abfd) = true; 1155 return true; 1156 } 1157 1158 static bool no_warn_mismatch = false; 1159 1160 void bfd_elf32_rl78_set_target_flags (bool); 1161 1162 void 1163 bfd_elf32_rl78_set_target_flags (bool user_no_warn_mismatch) 1164 { 1165 no_warn_mismatch = user_no_warn_mismatch; 1166 } 1167 1168 static const char * 1169 rl78_cpu_name (flagword flags) 1170 { 1171 switch (flags & E_FLAG_RL78_CPU_MASK) 1172 { 1173 default: return ""; 1174 case E_FLAG_RL78_G10: return "G10"; 1175 case E_FLAG_RL78_G13: return "G13"; 1176 case E_FLAG_RL78_G14: return "G14"; 1177 } 1178 } 1179 1180 /* Merge backend specific data from an object file to the output 1181 object file when linking. */ 1182 1183 static bool 1184 rl78_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info) 1185 { 1186 bfd *obfd = info->output_bfd; 1187 flagword new_flags; 1188 flagword old_flags; 1189 bool error = false; 1190 1191 new_flags = elf_elfheader (ibfd)->e_flags; 1192 old_flags = elf_elfheader (obfd)->e_flags; 1193 1194 if (!elf_flags_init (obfd)) 1195 { 1196 /* First call, no flags set. */ 1197 elf_flags_init (obfd) = true; 1198 elf_elfheader (obfd)->e_flags = new_flags; 1199 } 1200 else if (old_flags != new_flags) 1201 { 1202 flagword changed_flags = old_flags ^ new_flags; 1203 1204 if (changed_flags & E_FLAG_RL78_CPU_MASK) 1205 { 1206 flagword out_cpu = old_flags & E_FLAG_RL78_CPU_MASK; 1207 flagword in_cpu = new_flags & E_FLAG_RL78_CPU_MASK; 1208 1209 if (in_cpu == E_FLAG_RL78_ANY_CPU || in_cpu == out_cpu) 1210 /* It does not matter what new_cpu may have. */; 1211 else if (out_cpu == E_FLAG_RL78_ANY_CPU) 1212 { 1213 if (in_cpu == E_FLAG_RL78_G10) 1214 { 1215 /* G10 files can only be linked with other G10 files. 1216 If the output is set to "any" this means that it is 1217 a G14 file that does not use hardware multiply/divide, 1218 but that is still incompatible with the G10 ABI. */ 1219 error = true; 1220 1221 _bfd_error_handler 1222 /* xgettext:c-format */ 1223 (_("RL78 ABI conflict: G10 file %pB cannot be linked" 1224 " with %s file %pB"), 1225 ibfd, rl78_cpu_name (out_cpu), obfd); 1226 } 1227 else 1228 { 1229 old_flags &= ~ E_FLAG_RL78_CPU_MASK; 1230 old_flags |= in_cpu; 1231 elf_elfheader (obfd)->e_flags = old_flags; 1232 } 1233 } 1234 else 1235 { 1236 error = true; 1237 1238 _bfd_error_handler 1239 /* xgettext:c-format */ 1240 (_("RL78 ABI conflict: cannot link %s file %pB with %s file %pB"), 1241 rl78_cpu_name (in_cpu), ibfd, 1242 rl78_cpu_name (out_cpu), obfd); 1243 } 1244 } 1245 1246 if (changed_flags & E_FLAG_RL78_64BIT_DOUBLES) 1247 { 1248 _bfd_error_handler 1249 (_("RL78 merge conflict: cannot link 32-bit and 64-bit objects together")); 1250 1251 if (old_flags & E_FLAG_RL78_64BIT_DOUBLES) 1252 /* xgettext:c-format */ 1253 _bfd_error_handler (_("- %pB is 64-bit, %pB is not"), 1254 obfd, ibfd); 1255 else 1256 /* xgettext:c-format */ 1257 _bfd_error_handler (_("- %pB is 64-bit, %pB is not"), 1258 ibfd, obfd); 1259 error = true; 1260 } 1261 } 1262 1263 return !error; 1264 } 1265 1266 static bool 1268 rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr) 1269 { 1270 FILE * file = (FILE *) ptr; 1271 flagword flags; 1272 1273 BFD_ASSERT (abfd != NULL && ptr != NULL); 1274 1275 /* Print normal ELF private data. */ 1276 _bfd_elf_print_private_bfd_data (abfd, ptr); 1277 1278 flags = elf_elfheader (abfd)->e_flags; 1279 fprintf (file, _("private flags = 0x%lx:"), (long) flags); 1280 1281 if (flags & E_FLAG_RL78_CPU_MASK) 1282 fprintf (file, " [%s]", rl78_cpu_name (flags)); 1283 1284 if (flags & E_FLAG_RL78_64BIT_DOUBLES) 1285 fprintf (file, _(" [64-bit doubles]")); 1286 1287 fputc ('\n', file); 1288 return true; 1289 } 1290 1291 /* Return the MACH for an e_flags value. */ 1292 1293 static int 1294 elf32_rl78_machine (bfd * abfd ATTRIBUTE_UNUSED) 1295 { 1296 return bfd_mach_rl78; 1297 } 1298 1299 static bool 1300 rl78_elf_object_p (bfd * abfd) 1301 { 1302 bfd_default_set_arch_mach (abfd, bfd_arch_rl78, 1303 elf32_rl78_machine (abfd)); 1304 return true; 1305 } 1306 1307 /* support PLT for 16-bit references to 24-bit functions. */ 1309 1310 /* We support 16-bit pointers to code above 64k by generating a thunk 1311 below 64k containing a JMP instruction to the final address. */ 1312 1313 static bool 1314 rl78_elf_check_relocs 1315 (bfd * abfd, 1316 struct bfd_link_info * info, 1317 asection * sec, 1318 const Elf_Internal_Rela * relocs) 1319 { 1320 Elf_Internal_Shdr * symtab_hdr; 1321 struct elf_link_hash_entry ** sym_hashes; 1322 const Elf_Internal_Rela * rel; 1323 const Elf_Internal_Rela * rel_end; 1324 bfd_vma *local_plt_offsets; 1325 asection *splt; 1326 bfd *dynobj; 1327 1328 if (bfd_link_relocatable (info)) 1329 return true; 1330 1331 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 1332 sym_hashes = elf_sym_hashes (abfd); 1333 local_plt_offsets = elf_local_got_offsets (abfd); 1334 dynobj = elf_hash_table(info)->dynobj; 1335 1336 rel_end = relocs + sec->reloc_count; 1337 for (rel = relocs; rel < rel_end; rel++) 1338 { 1339 struct elf_link_hash_entry *h; 1340 unsigned long r_symndx; 1341 bfd_vma *offset; 1342 1343 r_symndx = ELF32_R_SYM (rel->r_info); 1344 if (r_symndx < symtab_hdr->sh_info) 1345 h = NULL; 1346 else 1347 { 1348 h = sym_hashes[r_symndx - symtab_hdr->sh_info]; 1349 while (h->root.type == bfd_link_hash_indirect 1350 || h->root.type == bfd_link_hash_warning) 1351 h = (struct elf_link_hash_entry *) h->root.u.i.link; 1352 } 1353 1354 switch (ELF32_R_TYPE (rel->r_info)) 1355 { 1356 /* This relocation describes a 16-bit pointer to a function. 1357 We may need to allocate a thunk in low memory; reserve memory 1358 for it now. */ 1359 case R_RL78_DIR16S: 1360 if (dynobj == NULL) 1361 elf_hash_table (info)->dynobj = dynobj = abfd; 1362 splt = elf_hash_table (info)->splt; 1363 if (splt == NULL) 1364 { 1365 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS 1366 | SEC_IN_MEMORY | SEC_LINKER_CREATED 1367 | SEC_READONLY | SEC_CODE); 1368 splt = bfd_make_section_anyway_with_flags (dynobj, ".plt", 1369 flags); 1370 elf_hash_table (info)->splt = splt; 1371 if (splt == NULL 1372 || !bfd_set_section_alignment (splt, 1)) 1373 return false; 1374 } 1375 1376 if (h != NULL) 1377 offset = &h->plt.offset; 1378 else 1379 { 1380 if (local_plt_offsets == NULL) 1381 { 1382 size_t size; 1383 unsigned int i; 1384 1385 size = symtab_hdr->sh_info * sizeof (bfd_vma); 1386 local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size); 1387 if (local_plt_offsets == NULL) 1388 return false; 1389 elf_local_got_offsets (abfd) = local_plt_offsets; 1390 1391 for (i = 0; i < symtab_hdr->sh_info; i++) 1392 local_plt_offsets[i] = (bfd_vma) -1; 1393 } 1394 offset = &local_plt_offsets[r_symndx]; 1395 } 1396 1397 if (*offset == (bfd_vma) -1) 1398 { 1399 *offset = splt->size; 1400 splt->size += 4; 1401 } 1402 break; 1403 } 1404 } 1405 1406 return true; 1407 } 1408 1409 /* This must exist if dynobj is ever set. */ 1410 1411 static bool 1412 rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED, 1413 struct bfd_link_info *info) 1414 { 1415 bfd *dynobj; 1416 asection *splt; 1417 1418 if (!elf_hash_table (info)->dynamic_sections_created) 1419 return true; 1420 1421 /* As an extra sanity check, verify that all plt entries have been 1422 filled in. However, relaxing might have changed the relocs so 1423 that some plt entries don't get filled in, so we have to skip 1424 this check if we're relaxing. Unfortunately, check_relocs is 1425 called before relaxation. */ 1426 1427 if (info->relax_trip > 0) 1428 return true; 1429 1430 dynobj = elf_hash_table (info)->dynobj; 1431 splt = elf_hash_table (info)->splt; 1432 if (dynobj != NULL && splt != NULL) 1433 { 1434 bfd_byte *contents = splt->contents; 1435 unsigned int i, size = splt->size; 1436 1437 for (i = 0; i < size; i += 4) 1438 { 1439 unsigned int x = bfd_get_32 (dynobj, contents + i); 1440 BFD_ASSERT (x != 0); 1441 } 1442 } 1443 1444 return true; 1445 } 1446 1447 static bool 1448 rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, 1449 struct bfd_link_info *info) 1450 { 1451 bfd *dynobj; 1452 asection *splt; 1453 1454 if (bfd_link_relocatable (info)) 1455 return true; 1456 1457 dynobj = elf_hash_table (info)->dynobj; 1458 if (dynobj == NULL) 1459 return true; 1460 1461 splt = elf_hash_table (info)->splt; 1462 BFD_ASSERT (splt != NULL); 1463 1464 splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size); 1465 if (splt->contents == NULL) 1466 return false; 1467 1468 return true; 1469 } 1470 1471 1472 1474 /* Handle relaxing. */ 1475 1476 /* A subroutine of rl78_elf_relax_section. If the global symbol H 1477 is within the low 64k, remove any entry for it in the plt. */ 1478 1479 struct relax_plt_data 1480 { 1481 asection *splt; 1482 bool *again; 1483 }; 1484 1485 static bool 1486 rl78_relax_plt_check (struct elf_link_hash_entry *h, void * xdata) 1487 { 1488 struct relax_plt_data *data = (struct relax_plt_data *) xdata; 1489 1490 if (h->plt.offset != (bfd_vma) -1) 1491 { 1492 bfd_vma address; 1493 1494 if (h->root.type == bfd_link_hash_undefined 1495 || h->root.type == bfd_link_hash_undefweak) 1496 address = 0; 1497 else 1498 address = (h->root.u.def.section->output_section->vma 1499 + h->root.u.def.section->output_offset 1500 + h->root.u.def.value); 1501 1502 if (valid_16bit_address (address)) 1503 { 1504 h->plt.offset = -1; 1505 data->splt->size -= 4; 1506 *data->again = true; 1507 } 1508 } 1509 1510 return true; 1511 } 1512 1513 /* A subroutine of rl78_elf_relax_section. If the global symbol H 1514 previously had a plt entry, give it a new entry offset. */ 1515 1516 static bool 1517 rl78_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata) 1518 { 1519 bfd_vma *entry = (bfd_vma *) xdata; 1520 1521 if (h->plt.offset != (bfd_vma) -1) 1522 { 1523 h->plt.offset = *entry; 1524 *entry += 4; 1525 } 1526 1527 return true; 1528 } 1529 1530 static bool 1531 rl78_elf_relax_plt_section (bfd *dynobj, 1532 asection *splt, 1533 struct bfd_link_info *info, 1534 bool *again) 1535 { 1536 struct relax_plt_data relax_plt_data; 1537 bfd *ibfd; 1538 1539 /* Assume nothing changes. */ 1540 *again = false; 1541 1542 if (bfd_link_relocatable (info)) 1543 return true; 1544 1545 /* We only relax the .plt section at the moment. */ 1546 if (dynobj != elf_hash_table (info)->dynobj 1547 || strcmp (splt->name, ".plt") != 0) 1548 return true; 1549 1550 /* Quick check for an empty plt. */ 1551 if (splt->size == 0) 1552 return true; 1553 1554 /* Map across all global symbols; see which ones happen to 1555 fall in the low 64k. */ 1556 relax_plt_data.splt = splt; 1557 relax_plt_data.again = again; 1558 elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check, 1559 &relax_plt_data); 1560 1561 /* Likewise for local symbols, though that's somewhat less convenient 1562 as we have to walk the list of input bfds and swap in symbol data. */ 1563 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next) 1564 { 1565 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd); 1566 Elf_Internal_Shdr *symtab_hdr; 1567 Elf_Internal_Sym *isymbuf = NULL; 1568 unsigned int idx; 1569 1570 if (! local_plt_offsets) 1571 continue; 1572 1573 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr; 1574 if (symtab_hdr->sh_info != 0) 1575 { 1576 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; 1577 if (isymbuf == NULL) 1578 isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr, 1579 symtab_hdr->sh_info, 0, 1580 NULL, NULL, NULL); 1581 if (isymbuf == NULL) 1582 return false; 1583 } 1584 1585 for (idx = 0; idx < symtab_hdr->sh_info; ++idx) 1586 { 1587 Elf_Internal_Sym *isym; 1588 asection *tsec; 1589 bfd_vma address; 1590 1591 if (local_plt_offsets[idx] == (bfd_vma) -1) 1592 continue; 1593 1594 isym = &isymbuf[idx]; 1595 if (isym->st_shndx == SHN_UNDEF) 1596 continue; 1597 else if (isym->st_shndx == SHN_ABS) 1598 tsec = bfd_abs_section_ptr; 1599 else if (isym->st_shndx == SHN_COMMON) 1600 tsec = bfd_com_section_ptr; 1601 else 1602 tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx); 1603 1604 address = (tsec->output_section->vma 1605 + tsec->output_offset 1606 + isym->st_value); 1607 if (valid_16bit_address (address)) 1608 { 1609 local_plt_offsets[idx] = -1; 1610 splt->size -= 4; 1611 *again = true; 1612 } 1613 } 1614 1615 if (isymbuf != NULL 1616 && symtab_hdr->contents != (unsigned char *) isymbuf) 1617 { 1618 if (! info->keep_memory) 1619 free (isymbuf); 1620 else 1621 { 1622 /* Cache the symbols for elf_link_input_bfd. */ 1623 symtab_hdr->contents = (unsigned char *) isymbuf; 1624 } 1625 } 1626 } 1627 1628 /* If we changed anything, walk the symbols again to reallocate 1629 .plt entry addresses. */ 1630 if (*again && splt->size > 0) 1631 { 1632 bfd_vma entry = 0; 1633 1634 elf_link_hash_traverse (elf_hash_table (info), 1635 rl78_relax_plt_realloc, &entry); 1636 1637 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next) 1638 { 1639 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd); 1640 unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info; 1641 unsigned int idx; 1642 1643 if (! local_plt_offsets) 1644 continue; 1645 1646 for (idx = 0; idx < nlocals; ++idx) 1647 if (local_plt_offsets[idx] != (bfd_vma) -1) 1648 { 1649 local_plt_offsets[idx] = entry; 1650 entry += 4; 1651 } 1652 } 1653 } 1654 1655 return true; 1656 } 1657 1658 /* Delete some bytes from a section while relaxing. */ 1659 1660 static bool 1661 elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count, 1662 Elf_Internal_Rela *alignment_rel, int force_snip) 1663 { 1664 Elf_Internal_Shdr * symtab_hdr; 1665 unsigned int sec_shndx; 1666 bfd_byte * contents; 1667 Elf_Internal_Rela * irel; 1668 Elf_Internal_Rela * irelend; 1669 Elf_Internal_Sym * isym; 1670 Elf_Internal_Sym * isymend; 1671 bfd_vma toaddr; 1672 unsigned int symcount; 1673 struct elf_link_hash_entry ** sym_hashes; 1674 struct elf_link_hash_entry ** end_hashes; 1675 1676 if (!alignment_rel) 1677 force_snip = 1; 1678 1679 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); 1680 1681 contents = elf_section_data (sec)->this_hdr.contents; 1682 1683 /* The deletion must stop at the next alignment boundary, if 1684 ALIGNMENT_REL is non-NULL. */ 1685 toaddr = sec->size; 1686 if (alignment_rel) 1687 toaddr = alignment_rel->r_offset; 1688 1689 irel = elf_section_data (sec)->relocs; 1690 if (irel == NULL) 1691 { 1692 _bfd_elf_link_read_relocs (sec->owner, sec, NULL, NULL, true); 1693 irel = elf_section_data (sec)->relocs; 1694 } 1695 1696 irelend = irel + sec->reloc_count; 1697 1698 /* Actually delete the bytes. */ 1699 memmove (contents + addr, contents + addr + count, 1700 (size_t) (toaddr - addr - count)); 1701 1702 /* If we don't have an alignment marker to worry about, we can just 1703 shrink the section. Otherwise, we have to fill in the newly 1704 created gap with NOP insns (0x03). */ 1705 if (force_snip) 1706 sec->size -= count; 1707 else 1708 memset (contents + toaddr - count, 0x03, count); 1709 1710 /* Adjust all the relocs. */ 1711 for (; irel && irel < irelend; irel++) 1712 { 1713 /* Get the new reloc address. */ 1714 if (irel->r_offset > addr 1715 && (irel->r_offset < toaddr 1716 || (force_snip && irel->r_offset == toaddr))) 1717 irel->r_offset -= count; 1718 1719 /* If we see an ALIGN marker at the end of the gap, we move it 1720 to the beginning of the gap, since marking these gaps is what 1721 they're for. */ 1722 if (irel->r_offset == toaddr 1723 && ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX 1724 && irel->r_addend & RL78_RELAXA_ALIGN) 1725 irel->r_offset -= count; 1726 } 1727 1728 /* Adjust the local symbols defined in this section. */ 1729 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 1730 isym = (Elf_Internal_Sym *) symtab_hdr->contents; 1731 isymend = isym + symtab_hdr->sh_info; 1732 1733 for (; isym < isymend; isym++) 1734 { 1735 /* If the symbol is in the range of memory we just moved, we 1736 have to adjust its value. */ 1737 if (isym->st_shndx == sec_shndx 1738 && isym->st_value > addr 1739 && isym->st_value < toaddr) 1740 isym->st_value -= count; 1741 1742 /* If the symbol *spans* the bytes we just deleted (i.e. it's 1743 *end* is in the moved bytes but it's *start* isn't), then we 1744 must adjust its size. */ 1745 if (isym->st_shndx == sec_shndx 1746 && isym->st_value < addr 1747 && isym->st_value + isym->st_size > addr 1748 && isym->st_value + isym->st_size < toaddr) 1749 isym->st_size -= count; 1750 } 1751 1752 /* Now adjust the global symbols defined in this section. */ 1753 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) 1754 - symtab_hdr->sh_info); 1755 sym_hashes = elf_sym_hashes (abfd); 1756 end_hashes = sym_hashes + symcount; 1757 1758 for (; sym_hashes < end_hashes; sym_hashes++) 1759 { 1760 struct elf_link_hash_entry *sym_hash = *sym_hashes; 1761 1762 if ((sym_hash->root.type == bfd_link_hash_defined 1763 || sym_hash->root.type == bfd_link_hash_defweak) 1764 && sym_hash->root.u.def.section == sec) 1765 { 1766 /* As above, adjust the value if needed. */ 1767 if (sym_hash->root.u.def.value > addr 1768 && sym_hash->root.u.def.value < toaddr) 1769 sym_hash->root.u.def.value -= count; 1770 1771 /* As above, adjust the size if needed. */ 1772 if (sym_hash->root.u.def.value < addr 1773 && sym_hash->root.u.def.value + sym_hash->size > addr 1774 && sym_hash->root.u.def.value + sym_hash->size < toaddr) 1775 sym_hash->size -= count; 1776 } 1777 } 1778 1779 return true; 1780 } 1781 1782 /* Used to sort relocs by address. If relocs have the same address, 1783 we maintain their relative order, except that R_RL78_RH_RELAX 1784 alignment relocs must be the first reloc for any given address. */ 1785 1786 static void 1787 reloc_bubblesort (Elf_Internal_Rela * r, int count) 1788 { 1789 int i; 1790 bool again; 1791 bool swappit; 1792 1793 /* This is almost a classic bubblesort. It's the slowest sort, but 1794 we're taking advantage of the fact that the relocations are 1795 mostly in order already (the assembler emits them that way) and 1796 we need relocs with the same address to remain in the same 1797 relative order. */ 1798 again = true; 1799 while (again) 1800 { 1801 again = false; 1802 for (i = 0; i < count - 1; i ++) 1803 { 1804 if (r[i].r_offset > r[i + 1].r_offset) 1805 swappit = true; 1806 else if (r[i].r_offset < r[i + 1].r_offset) 1807 swappit = false; 1808 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX 1809 && (r[i + 1].r_addend & RL78_RELAXA_ALIGN)) 1810 swappit = true; 1811 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX 1812 && (r[i + 1].r_addend & RL78_RELAXA_ELIGN) 1813 && !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX 1814 && (r[i].r_addend & RL78_RELAXA_ALIGN))) 1815 swappit = true; 1816 else 1817 swappit = false; 1818 1819 if (swappit) 1820 { 1821 Elf_Internal_Rela tmp; 1822 1823 tmp = r[i]; 1824 r[i] = r[i + 1]; 1825 r[i + 1] = tmp; 1826 /* If we do move a reloc back, re-scan to see if it 1827 needs to be moved even further back. This avoids 1828 most of the O(n^2) behavior for our cases. */ 1829 if (i > 0) 1830 i -= 2; 1831 again = true; 1832 } 1833 } 1834 } 1835 } 1836 1837 1838 #define OFFSET_FOR_RELOC(rel, lrel, scale) \ 1839 rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \ 1840 lrel, abfd, sec, link_info, scale) 1841 1842 static bfd_vma 1843 rl78_offset_for_reloc (bfd * abfd, 1844 Elf_Internal_Rela * rel, 1845 Elf_Internal_Shdr * symtab_hdr, 1846 bfd_byte * shndx_buf ATTRIBUTE_UNUSED, 1847 Elf_Internal_Sym * intsyms, 1848 Elf_Internal_Rela ** lrel, 1849 bfd * input_bfd, 1850 asection * input_section, 1851 struct bfd_link_info * info, 1852 int * scale) 1853 { 1854 bfd_vma symval; 1855 1856 *scale = 1; 1857 1858 /* REL is the first of 1..N relocations. We compute the symbol 1859 value for each relocation, then combine them if needed. LREL 1860 gets a pointer to the last relocation used. */ 1861 while (1) 1862 { 1863 unsigned long r_type; 1864 1865 /* Get the value of the symbol referred to by the reloc. */ 1866 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info) 1867 { 1868 /* A local symbol. */ 1869 Elf_Internal_Sym *isym; 1870 asection *ssec; 1871 1872 isym = intsyms + ELF32_R_SYM (rel->r_info); 1873 1874 if (isym->st_shndx == SHN_UNDEF) 1875 ssec = bfd_und_section_ptr; 1876 else if (isym->st_shndx == SHN_ABS) 1877 ssec = bfd_abs_section_ptr; 1878 else if (isym->st_shndx == SHN_COMMON) 1879 ssec = bfd_com_section_ptr; 1880 else 1881 ssec = bfd_section_from_elf_index (abfd, 1882 isym->st_shndx); 1883 1884 /* Initial symbol value. */ 1885 symval = isym->st_value; 1886 1887 /* GAS may have made this symbol relative to a section, in 1888 which case, we have to add the addend to find the 1889 symbol. */ 1890 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION) 1891 symval += rel->r_addend; 1892 1893 if (ssec) 1894 { 1895 if ((ssec->flags & SEC_MERGE) 1896 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE) 1897 symval = _bfd_merged_section_offset (abfd, & ssec, 1898 elf_section_data (ssec)->sec_info, 1899 symval); 1900 } 1901 1902 /* Now make the offset relative to where the linker is putting it. */ 1903 if (ssec) 1904 symval += 1905 ssec->output_section->vma + ssec->output_offset; 1906 1907 symval += rel->r_addend; 1908 } 1909 else 1910 { 1911 unsigned long indx; 1912 struct elf_link_hash_entry * h; 1913 1914 /* An external symbol. */ 1915 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info; 1916 h = elf_sym_hashes (abfd)[indx]; 1917 BFD_ASSERT (h != NULL); 1918 1919 if (h->root.type != bfd_link_hash_defined 1920 && h->root.type != bfd_link_hash_defweak) 1921 { 1922 /* This appears to be a reference to an undefined 1923 symbol. Just ignore it--it will be caught by the 1924 regular reloc processing. */ 1925 if (lrel) 1926 *lrel = rel; 1927 return 0; 1928 } 1929 1930 symval = (h->root.u.def.value 1931 + h->root.u.def.section->output_section->vma 1932 + h->root.u.def.section->output_offset); 1933 1934 symval += rel->r_addend; 1935 } 1936 1937 r_type = ELF32_R_TYPE (rel->r_info); 1938 switch (r_type) 1939 { 1940 case R_RL78_SYM: 1941 (void) rl78_compute_complex_reloc (r_type, symval, input_section, 1942 NULL, NULL); 1943 break; 1944 1945 case R_RL78_OPromtop: 1946 symval = get_romstart (info, input_bfd, input_section, rel->r_offset); 1947 (void) rl78_compute_complex_reloc (r_type, symval, input_section, 1948 NULL, NULL); 1949 break; 1950 1951 case R_RL78_OPramtop: 1952 symval = get_ramstart (info, input_bfd, input_section, rel->r_offset); 1953 (void) rl78_compute_complex_reloc (r_type, symval, input_section, 1954 NULL, NULL); 1955 break; 1956 1957 case R_RL78_OPneg: 1958 case R_RL78_OPadd: 1959 case R_RL78_OPsub: 1960 case R_RL78_OPmul: 1961 case R_RL78_OPdiv: 1962 case R_RL78_OPshla: 1963 case R_RL78_OPshra: 1964 case R_RL78_OPsctsize: 1965 case R_RL78_OPscttop: 1966 case R_RL78_OPand: 1967 case R_RL78_OPor: 1968 case R_RL78_OPxor: 1969 case R_RL78_OPnot: 1970 case R_RL78_OPmod: 1971 (void) rl78_compute_complex_reloc (r_type, 0, input_section, 1972 NULL, NULL); 1973 break; 1974 1975 case R_RL78_DIR16UL: 1976 case R_RL78_DIR8UL: 1977 case R_RL78_ABS16UL: 1978 case R_RL78_ABS8UL: 1979 *scale = 4; 1980 goto reloc_computes_value; 1981 1982 case R_RL78_DIR16UW: 1983 case R_RL78_DIR8UW: 1984 case R_RL78_ABS16UW: 1985 case R_RL78_ABS8UW: 1986 *scale = 2; 1987 goto reloc_computes_value; 1988 1989 default: 1990 reloc_computes_value: 1991 symval = rl78_compute_complex_reloc (r_type, symval, input_section, 1992 NULL, NULL); 1993 /* Fall through. */ 1994 case R_RL78_DIR32: 1995 case R_RL78_DIR24S: 1996 case R_RL78_DIR16: 1997 case R_RL78_DIR16U: 1998 case R_RL78_DIR16S: 1999 case R_RL78_DIR24S_PCREL: 2000 case R_RL78_DIR16S_PCREL: 2001 case R_RL78_DIR8S_PCREL: 2002 if (lrel) 2003 *lrel = rel; 2004 return symval; 2005 } 2006 2007 rel ++; 2008 } 2009 } 2010 2011 const struct { 2012 int prefix; /* or -1 for "no prefix" */ 2013 int insn; /* or -1 for "end of list" */ 2014 int insn_for_saddr; /* or -1 for "no alternative" */ 2015 int insn_for_sfr; /* or -1 for "no alternative" */ 2016 } relax_addr16[] = { 2017 { -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */ 2018 { -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */ 2019 { -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */ 2020 { -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */ 2021 2022 { -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */ 2023 { -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */ 2024 { -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */ 2025 { -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */ 2026 { -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */ 2027 { -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */ 2028 { -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */ 2029 { -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */ 2030 2031 { -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */ 2032 { -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */ 2033 { -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */ 2034 { -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */ 2035 { -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */ 2036 2037 { -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */ 2038 { -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */ 2039 { -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */ 2040 { -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */ 2041 2042 { -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */ 2043 { -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */ 2044 { -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */ 2045 2046 { -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */ 2047 { -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */ 2048 { -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */ 2049 { -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */ 2050 { -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */ 2051 { -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */ 2052 2053 { 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */ 2054 2055 { 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */ 2056 { 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */ 2057 { 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */ 2058 { 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */ 2059 { 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */ 2060 { 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */ 2061 { 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */ 2062 { 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */ 2063 2064 { 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */ 2065 { 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */ 2066 { 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */ 2067 { 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */ 2068 { 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */ 2069 { 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */ 2070 { 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */ 2071 { 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */ 2072 2073 { -1, -1, -1, -1 } 2074 }; 2075 2076 /* Relax one section. */ 2077 2078 static bool 2079 rl78_elf_relax_section (bfd *abfd, 2080 asection *sec, 2081 struct bfd_link_info *link_info, 2082 bool *again) 2083 { 2084 Elf_Internal_Shdr * symtab_hdr; 2085 Elf_Internal_Shdr * shndx_hdr; 2086 Elf_Internal_Rela * internal_relocs; 2087 Elf_Internal_Rela * free_relocs = NULL; 2088 Elf_Internal_Rela * irel; 2089 Elf_Internal_Rela * srel; 2090 Elf_Internal_Rela * irelend; 2091 Elf_Internal_Rela * next_alignment; 2092 bfd_byte * contents = NULL; 2093 bfd_byte * free_contents = NULL; 2094 Elf_Internal_Sym * intsyms = NULL; 2095 Elf_Internal_Sym * free_intsyms = NULL; 2096 bfd_byte * shndx_buf = NULL; 2097 bfd_vma pc; 2098 bfd_vma symval ATTRIBUTE_UNUSED = 0; 2099 int pcrel ATTRIBUTE_UNUSED = 0; 2100 int code ATTRIBUTE_UNUSED = 0; 2101 int section_alignment_glue; 2102 int scale; 2103 2104 if (abfd == elf_hash_table (link_info)->dynobj 2105 && strcmp (sec->name, ".plt") == 0) 2106 return rl78_elf_relax_plt_section (abfd, sec, link_info, again); 2107 2108 /* Assume nothing changes. */ 2109 *again = false; 2110 2111 /* We don't have to do anything for a relocatable link, if 2112 this section does not have relocs, or if this is not a 2113 code section. */ 2114 if (bfd_link_relocatable (link_info) 2115 || (sec->flags & SEC_RELOC) == 0 2116 || sec->reloc_count == 0 2117 || (sec->flags & SEC_CODE) == 0) 2118 return true; 2119 2120 symtab_hdr = & elf_symtab_hdr (abfd); 2121 if (elf_symtab_shndx_list (abfd)) 2122 shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr; 2123 else 2124 shndx_hdr = NULL; 2125 2126 /* Get the section contents. */ 2127 if (elf_section_data (sec)->this_hdr.contents != NULL) 2128 contents = elf_section_data (sec)->this_hdr.contents; 2129 /* Go get them off disk. */ 2130 else 2131 { 2132 if (! bfd_malloc_and_get_section (abfd, sec, &contents)) 2133 goto error_return; 2134 elf_section_data (sec)->this_hdr.contents = contents; 2135 } 2136 2137 /* Read this BFD's symbols. */ 2138 /* Get cached copy if it exists. */ 2139 if (symtab_hdr->contents != NULL) 2140 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents; 2141 else 2142 { 2143 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL); 2144 symtab_hdr->contents = (bfd_byte *) intsyms; 2145 } 2146 2147 if (shndx_hdr && shndx_hdr->sh_size != 0) 2148 { 2149 size_t amt; 2150 2151 if (_bfd_mul_overflow (symtab_hdr->sh_info, 2152 sizeof (Elf_External_Sym_Shndx), &amt)) 2153 { 2154 bfd_set_error (bfd_error_no_memory); 2155 goto error_return; 2156 } 2157 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0) 2158 goto error_return; 2159 shndx_buf = _bfd_malloc_and_read (abfd, amt, amt); 2160 if (shndx_buf == NULL) 2161 goto error_return; 2162 shndx_hdr->contents = shndx_buf; 2163 } 2164 2165 /* Get a copy of the native relocations. */ 2166 internal_relocs = (_bfd_elf_link_read_relocs 2167 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL, 2168 link_info->keep_memory)); 2169 if (internal_relocs == NULL) 2170 goto error_return; 2171 if (! link_info->keep_memory) 2172 free_relocs = internal_relocs; 2173 2174 /* The RL_ relocs must be just before the operand relocs they go 2175 with, so we must sort them to guarantee this. We use bubblesort 2176 instead of qsort so we can guarantee that relocs with the same 2177 address remain in the same relative order. */ 2178 reloc_bubblesort (internal_relocs, sec->reloc_count); 2179 2180 /* Walk through them looking for relaxing opportunities. */ 2181 irelend = internal_relocs + sec->reloc_count; 2182 2183 2184 /* This will either be NULL or a pointer to the next alignment 2185 relocation. */ 2186 next_alignment = internal_relocs; 2187 2188 /* We calculate worst case shrinkage caused by alignment directives. 2189 No fool-proof, but better than either ignoring the problem or 2190 doing heavy duty analysis of all the alignment markers in all 2191 input sections. */ 2192 section_alignment_glue = 0; 2193 for (irel = internal_relocs; irel < irelend; irel++) 2194 if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX 2195 && irel->r_addend & RL78_RELAXA_ALIGN) 2196 { 2197 int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM); 2198 2199 if (section_alignment_glue < this_glue) 2200 section_alignment_glue = this_glue; 2201 } 2202 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte 2203 shrinkage. */ 2204 section_alignment_glue *= 2; 2205 2206 for (irel = internal_relocs; irel < irelend; irel++) 2207 { 2208 unsigned char *insn; 2209 int nrelocs; 2210 2211 /* The insns we care about are all marked with one of these. */ 2212 if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX) 2213 continue; 2214 2215 if (irel->r_addend & RL78_RELAXA_ALIGN 2216 || next_alignment == internal_relocs) 2217 { 2218 /* When we delete bytes, we need to maintain all the alignments 2219 indicated. In addition, we need to be careful about relaxing 2220 jumps across alignment boundaries - these displacements 2221 *grow* when we delete bytes. For now, don't shrink 2222 displacements across an alignment boundary, just in case. 2223 Note that this only affects relocations to the same 2224 section. */ 2225 next_alignment += 2; 2226 while (next_alignment < irelend 2227 && (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX 2228 || !(next_alignment->r_addend & RL78_RELAXA_ELIGN))) 2229 next_alignment ++; 2230 if (next_alignment >= irelend || next_alignment->r_offset == 0) 2231 next_alignment = NULL; 2232 } 2233 2234 /* When we hit alignment markers, see if we've shrunk enough 2235 before them to reduce the gap without violating the alignment 2236 requirements. */ 2237 if (irel->r_addend & RL78_RELAXA_ALIGN) 2238 { 2239 /* At this point, the next relocation *should* be the ELIGN 2240 end marker. */ 2241 Elf_Internal_Rela *erel = irel + 1; 2242 unsigned int alignment, nbytes; 2243 2244 if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX) 2245 continue; 2246 if (!(erel->r_addend & RL78_RELAXA_ELIGN)) 2247 continue; 2248 2249 alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM); 2250 2251 if (erel->r_offset - irel->r_offset < alignment) 2252 continue; 2253 2254 nbytes = erel->r_offset - irel->r_offset; 2255 nbytes /= alignment; 2256 nbytes *= alignment; 2257 2258 elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset - nbytes, nbytes, 2259 next_alignment, erel->r_offset == sec->size); 2260 *again = true; 2261 2262 continue; 2263 } 2264 2265 if (irel->r_addend & RL78_RELAXA_ELIGN) 2266 continue; 2267 2268 insn = contents + irel->r_offset; 2269 2270 nrelocs = irel->r_addend & RL78_RELAXA_RNUM; 2271 2272 /* At this point, we have an insn that is a candidate for linker 2273 relaxation. There are NRELOCS relocs following that may be 2274 relaxed, although each reloc may be made of more than one 2275 reloc entry (such as gp-rel symbols). */ 2276 2277 /* Get the value of the symbol referred to by the reloc. Just 2278 in case this is the last reloc in the list, use the RL's 2279 addend to choose between this reloc (no addend) or the next 2280 (yes addend, which means at least one following reloc). */ 2281 2282 /* srel points to the "current" reloction for this insn - 2283 actually the last reloc for a given operand, which is the one 2284 we need to update. We check the relaxations in the same 2285 order that the relocations happen, so we'll just push it 2286 along as we go. */ 2287 srel = irel; 2288 2289 pc = sec->output_section->vma + sec->output_offset 2290 + srel->r_offset; 2291 2292 #define GET_RELOC \ 2293 BFD_ASSERT (nrelocs > 0); \ 2294 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \ 2295 pcrel = symval - pc + srel->r_addend; \ 2296 nrelocs --; 2297 2298 #define SNIPNR(offset, nbytes) \ 2299 elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0); 2300 2301 #define SNIP(offset, nbytes, newtype) \ 2302 SNIPNR (offset, nbytes); \ 2303 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype) 2304 2305 /* The order of these bit tests must match the order that the 2306 relocs appear in. Since we sorted those by offset, we can 2307 predict them. */ 2308 2309 /*----------------------------------------------------------------------*/ 2310 /* EF ad BR $rel8 pcrel 2311 ED al ah BR !abs16 abs 2312 EE al ah BR $!rel16 pcrel 2313 EC al ah as BR !!abs20 abs 2314 2315 FD al ah CALL !abs16 abs 2316 FE al ah CALL $!rel16 pcrel 2317 FC al ah as CALL !!abs20 abs 2318 2319 DC ad BC $rel8 2320 DE ad BNC $rel8 2321 DD ad BZ $rel8 2322 DF ad BNZ $rel8 2323 61 C3 ad BH $rel8 2324 61 D3 ad BNH $rel8 2325 61 C8 EF ad SKC ; BR $rel8 2326 61 D8 EF ad SKNC ; BR $rel8 2327 61 E8 EF ad SKZ ; BR $rel8 2328 61 F8 EF ad SKNZ ; BR $rel8 2329 61 E3 EF ad SKH ; BR $rel8 2330 61 F3 EF ad SKNH ; BR $rel8 2331 */ 2332 2333 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_BRA) 2334 { 2335 /* SKIP opcodes that skip non-branches will have a relax tag 2336 but no corresponding symbol to relax against; we just 2337 skip those. */ 2338 if (irel->r_addend & RL78_RELAXA_RNUM) 2339 { 2340 GET_RELOC; 2341 } 2342 2343 switch (insn[0]) 2344 { 2345 case 0xdc: /* BC */ 2346 case 0xdd: /* BZ */ 2347 case 0xde: /* BNC */ 2348 case 0xdf: /* BNZ */ 2349 if (insn[1] == 0x03 && insn[2] == 0xee /* BR */ 2350 && (srel->r_offset - irel->r_offset) > 1) /* a B<c> without its own reloc */ 2351 { 2352 /* This is a "long" conditional as generated by gas: 2353 DC 03 EE ad.dr */ 2354 if (pcrel < 127 2355 && pcrel > -127) 2356 { 2357 insn[0] ^= 0x02; /* invert conditional */ 2358 SNIPNR (4, 1); 2359 SNIP (1, 2, R_RL78_DIR8S_PCREL); 2360 insn[1] = pcrel; 2361 *again = true; 2362 } 2363 } 2364 break; 2365 2366 case 0xec: /* BR !!abs20 */ 2367 2368 if (pcrel < 127 2369 && pcrel > -127) 2370 { 2371 insn[0] = 0xef; 2372 insn[1] = pcrel; 2373 SNIP (2, 2, R_RL78_DIR8S_PCREL); 2374 *again = true; 2375 } 2376 else if (symval < 65536) 2377 { 2378 insn[0] = 0xed; 2379 insn[1] = symval & 0xff; 2380 insn[2] = symval >> 8; 2381 SNIP (2, 1, R_RL78_DIR16U); 2382 *again = true; 2383 } 2384 else if (pcrel < 32767 2385 && pcrel > -32767) 2386 { 2387 insn[0] = 0xee; 2388 insn[1] = pcrel & 0xff; 2389 insn[2] = pcrel >> 8; 2390 SNIP (2, 1, R_RL78_DIR16S_PCREL); 2391 *again = true; 2392 } 2393 break; 2394 2395 case 0xee: /* BR $!pcrel16 */ 2396 case 0xed: /* BR $!abs16 */ 2397 if (pcrel < 127 2398 && pcrel > -127) 2399 { 2400 insn[0] = 0xef; 2401 insn[1] = pcrel; 2402 SNIP (2, 1, R_RL78_DIR8S_PCREL); 2403 *again = true; 2404 } 2405 break; 2406 2407 case 0xfc: /* CALL !!abs20 */ 2408 if (symval < 65536) 2409 { 2410 insn[0] = 0xfd; 2411 insn[1] = symval & 0xff; 2412 insn[2] = symval >> 8; 2413 SNIP (2, 1, R_RL78_DIR16U); 2414 *again = true; 2415 } 2416 else if (pcrel < 32767 2417 && pcrel > -32767) 2418 { 2419 insn[0] = 0xfe; 2420 insn[1] = pcrel & 0xff; 2421 insn[2] = pcrel >> 8; 2422 SNIP (2, 1, R_RL78_DIR16S_PCREL); 2423 *again = true; 2424 } 2425 break; 2426 2427 case 0x61: /* PREFIX */ 2428 /* For SKIP/BR, we change the BR opcode and delete the 2429 SKIP. That way, we don't have to find and change the 2430 relocation for the BR. */ 2431 /* Note that, for the case where we're skipping some 2432 other insn, we have no "other" reloc but that's safe 2433 here anyway. */ 2434 switch (insn[1]) 2435 { 2436 case 0xd3: /* BNH */ 2437 case 0xc3: /* BH */ 2438 if (insn[2] == 0x03 && insn[3] == 0xee 2439 && (srel->r_offset - irel->r_offset) > 2) /* a B<c> without its own reloc */ 2440 { 2441 /* Another long branch by gas: 2442 61 D3 03 EE ad.dr */ 2443 if (pcrel < 127 2444 && pcrel > -127) 2445 { 2446 insn[1] ^= 0x10; /* invert conditional */ 2447 SNIPNR (5, 1); 2448 SNIP (2, 2, R_RL78_DIR8S_PCREL); 2449 insn[2] = pcrel; 2450 *again = true; 2451 } 2452 } 2453 break; 2454 2455 case 0xc8: /* SKC */ 2456 if (insn[2] == 0xef) 2457 { 2458 insn[2] = 0xde; /* BNC */ 2459 SNIPNR (0, 2); 2460 } 2461 break; 2462 2463 case 0xd8: /* SKNC */ 2464 if (insn[2] == 0xef) 2465 { 2466 insn[2] = 0xdc; /* BC */ 2467 SNIPNR (0, 2); 2468 } 2469 break; 2470 2471 case 0xe8: /* SKZ */ 2472 if (insn[2] == 0xef) 2473 { 2474 insn[2] = 0xdf; /* BNZ */ 2475 SNIPNR (0, 2); 2476 } 2477 break; 2478 2479 case 0xf8: /* SKNZ */ 2480 if (insn[2] == 0xef) 2481 { 2482 insn[2] = 0xdd; /* BZ */ 2483 SNIPNR (0, 2); 2484 } 2485 break; 2486 2487 case 0xe3: /* SKH */ 2488 if (insn[2] == 0xef) 2489 { 2490 insn[2] = 0xd3; /* BNH */ 2491 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */ 2492 } 2493 break; 2494 2495 case 0xf3: /* SKNH */ 2496 if (insn[2] == 0xef) 2497 { 2498 insn[2] = 0xc3; /* BH */ 2499 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */ 2500 } 2501 break; 2502 } 2503 break; 2504 } 2505 } 2506 2507 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_ADDR16 2508 && nrelocs > 0) 2509 { 2510 /*----------------------------------------------------------------------*/ 2511 /* Some insns have both a 16-bit address operand and an 8-bit 2512 variant if the address is within a special range: 2513 2514 Address 16-bit operand SADDR range SFR range 2515 FFF00-FFFFF 0xff00-0xffff 0x00-0xff 2516 FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff 2517 2518 The RELAX_ADDR16[] array has the insn encodings for the 2519 16-bit operand version, as well as the SFR and SADDR 2520 variants. We only need to replace the encodings and 2521 adjust the operand. 2522 2523 Note: we intentionally do not attempt to decode and skip 2524 any ES: prefix, as adding ES: means the addr16 (likely) 2525 no longer points to saddr/sfr space. 2526 */ 2527 2528 int is_sfr; 2529 int is_saddr; 2530 int idx; 2531 int poff; 2532 2533 GET_RELOC; 2534 2535 if (0xffe20 <= symval && symval <= 0xfffff) 2536 { 2537 2538 is_saddr = (0xffe20 <= symval && symval <= 0xfff1f); 2539 is_sfr = (0xfff00 <= symval && symval <= 0xfffff); 2540 2541 for (idx = 0; relax_addr16[idx].insn != -1; idx ++) 2542 { 2543 if (relax_addr16[idx].prefix != -1 2544 && insn[0] == relax_addr16[idx].prefix 2545 && insn[1] == relax_addr16[idx].insn) 2546 { 2547 poff = 1; 2548 } 2549 else if (relax_addr16[idx].prefix == -1 2550 && insn[0] == relax_addr16[idx].insn) 2551 { 2552 poff = 0; 2553 } 2554 else 2555 continue; 2556 2557 /* We have a matched insn, and poff is 0 or 1 depending 2558 on the base pattern size. */ 2559 2560 if (is_sfr && relax_addr16[idx].insn_for_sfr != -1) 2561 { 2562 insn[poff] = relax_addr16[idx].insn_for_sfr; 2563 SNIP (poff+2, 1, R_RL78_RH_SFR); 2564 } 2565 2566 else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1) 2567 { 2568 insn[poff] = relax_addr16[idx].insn_for_saddr; 2569 SNIP (poff+2, 1, R_RL78_RH_SADDR); 2570 } 2571 } 2572 } 2573 } 2574 /*----------------------------------------------------------------------*/ 2575 } 2576 2577 return true; 2578 2579 error_return: 2580 free (free_relocs); 2581 free (free_contents); 2582 2583 if (shndx_buf != NULL) 2584 { 2585 shndx_hdr->contents = NULL; 2586 free (shndx_buf); 2587 } 2588 2589 free (free_intsyms); 2590 2591 return true; 2592 } 2593 2594 2595 2597 #define ELF_ARCH bfd_arch_rl78 2598 #define ELF_MACHINE_CODE EM_RL78 2599 #define ELF_MAXPAGESIZE 0x1000 2600 2601 #define TARGET_LITTLE_SYM rl78_elf32_vec 2602 #define TARGET_LITTLE_NAME "elf32-rl78" 2603 2604 #define elf_info_to_howto_rel NULL 2605 #define elf_info_to_howto rl78_info_to_howto_rela 2606 #define elf_backend_object_p rl78_elf_object_p 2607 #define elf_backend_relocate_section rl78_elf_relocate_section 2608 #define elf_symbol_leading_char ('_') 2609 #define elf_backend_can_gc_sections 1 2610 2611 #define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup 2612 #define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup 2613 #define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags 2614 #define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data 2615 #define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data 2616 2617 #define bfd_elf32_bfd_relax_section rl78_elf_relax_section 2618 #define elf_backend_check_relocs rl78_elf_check_relocs 2619 #define elf_backend_always_size_sections \ 2620 rl78_elf_always_size_sections 2621 #define elf_backend_finish_dynamic_sections \ 2622 rl78_elf_finish_dynamic_sections 2623 2624 #include "elf32-target.h" 2625
Indexes created Thu Apr 23 00:23:13 UTC 2026