Home | History | Annotate | Line # | Download | only in m32r
dv-m32r_cache.c revision 1.1.1.2 
      1 /* Handle cache related addresses.
      2 
      3    Copyright (C) 1996-2017 Free Software Foundation, Inc.
      4    Contributed by Cygnus Solutions and Mike Frysinger.
      5 
      6    This file is part of the GNU simulators.
      7 
      8    This program is free software; you can redistribute it and/or modify
      9    it under the terms of the GNU General Public License as published by
     10    the Free Software Foundation; either version 3 of the License, or
     11    (at your option) any later version.
     12 
     13    This program is distributed in the hope that it will be useful,
     14    but WITHOUT ANY WARRANTY; without even the implied warranty of
     15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     16    GNU General Public License for more details.
     17 
     18    You should have received a copy of the GNU General Public License
     19    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
     20 
     21 #include "config.h"
     22 
     23 #include "sim-main.h"
     24 #include "hw-main.h"
     25 
     26 #include "dv-m32r_cache.h"
     27 
     28 struct m32r_cache_hw
     29 {
     30 };
     31 
     32 static unsigned
     33 cris_io_write_buffer (struct hw *me, const void *source,
     34 		      int space, address_word addr, unsigned nr_bytes)
     35 {
     36   SIM_DESC sd = hw_system (me);
     37 
     38 #if WITH_SCACHE
     39   /* MSPR support is deprecated but is kept in for upward compatibility
     40      with existing overlay support.  */
     41   switch (addr)
     42     {
     43     case MSPR_ADDR:
     44       if ((*(const char *) source & MSPR_PURGE) != 0)
     45 	scache_flush (sd);
     46       break;
     47 
     48     case MCCR_ADDR:
     49       if ((*(const char *) source & MCCR_CP) != 0)
     50 	scache_flush (sd);
     51       break;
     52     }
     53 #endif
     54 
     55   return nr_bytes;
     56 }
     57 
     58 static void
     59 attach_regs (struct hw *me, struct m32r_cache_hw *hw)
     60 {
     61   address_word attach_address;
     62   int attach_space;
     63   unsigned attach_size;
     64   reg_property_spec reg;
     65 
     66   if (hw_find_property (me, "reg") == NULL)
     67     hw_abort (me, "Missing \"reg\" property");
     68 
     69   if (!hw_find_reg_array_property (me, "reg", 0, &reg))
     70     hw_abort (me, "\"reg\" property must contain three addr/size entries");
     71 
     72   hw_unit_address_to_attach_address (hw_parent (me),
     73 				     &reg.address,
     74 				     &attach_space, &attach_address, me);
     75   hw_unit_size_to_attach_size (hw_parent (me), &reg.size, &attach_size, me);
     76 
     77   hw_attach_address (hw_parent (me),
     78 		     0, attach_space, attach_address, attach_size, me);
     79 }
     80 
     81 static void
     82 m32r_cache_finish (struct hw *me)
     83 {
     84   struct m32r_cache_hw *hw;
     85 
     86   hw = HW_ZALLOC (me, struct m32r_cache_hw);
     87   set_hw_data (me, hw);
     88   set_hw_io_write_buffer (me, cris_io_write_buffer);
     89 
     90   attach_regs (me, hw);
     91 }
     92 
     93 const struct hw_descriptor dv_m32r_cache_descriptor[] = {
     94   { "m32r_cache", m32r_cache_finish, },
     95   { NULL },
     96 };
     97