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dv-m32r_cache.c revision 1.1.1.4.2.1 
      1 /* Handle cache related addresses.
      2 
      3    Copyright (C) 1996-2023 Free Software Foundation, Inc.
      4    Contributed by Cygnus Solutions and Mike Frysinger.
      5 
      6    This file is part of the GNU simulators.
      7 
      8    This program is free software; you can redistribute it and/or modify
      9    it under the terms of the GNU General Public License as published by
     10    the Free Software Foundation; either version 3 of the License, or
     11    (at your option) any later version.
     12 
     13    This program is distributed in the hope that it will be useful,
     14    but WITHOUT ANY WARRANTY; without even the implied warranty of
     15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     16    GNU General Public License for more details.
     17 
     18    You should have received a copy of the GNU General Public License
     19    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
     20 
     21 /* This must come before any other includes.  */
     22 #include "defs.h"
     23 
     24 #include "sim-main.h"
     25 #include "hw-main.h"
     26 
     27 #include "dv-m32r_cache.h"
     28 
     29 struct m32r_cache_hw
     30 {
     31 };
     32 
     33 static unsigned
     34 cris_io_write_buffer (struct hw *me, const void *source,
     35 		      int space, address_word addr, unsigned nr_bytes)
     36 {
     37   SIM_DESC sd = hw_system (me);
     38 
     39 #if WITH_SCACHE
     40   /* MSPR support is deprecated but is kept in for upward compatibility
     41      with existing overlay support.  */
     42   switch (addr)
     43     {
     44     case MSPR_ADDR:
     45       if ((*(const char *) source & MSPR_PURGE) != 0)
     46 	scache_flush (sd);
     47       break;
     48 
     49     case MCCR_ADDR:
     50       if ((*(const char *) source & MCCR_CP) != 0)
     51 	scache_flush (sd);
     52       break;
     53     }
     54 #endif
     55 
     56   return nr_bytes;
     57 }
     58 
     59 static void
     60 attach_regs (struct hw *me, struct m32r_cache_hw *hw)
     61 {
     62   address_word attach_address;
     63   int attach_space;
     64   unsigned attach_size;
     65   reg_property_spec reg;
     66 
     67   if (hw_find_property (me, "reg") == NULL)
     68     hw_abort (me, "Missing \"reg\" property");
     69 
     70   if (!hw_find_reg_array_property (me, "reg", 0, &reg))
     71     hw_abort (me, "\"reg\" property must contain three addr/size entries");
     72 
     73   hw_unit_address_to_attach_address (hw_parent (me),
     74 				     &reg.address,
     75 				     &attach_space, &attach_address, me);
     76   hw_unit_size_to_attach_size (hw_parent (me), &reg.size, &attach_size, me);
     77 
     78   hw_attach_address (hw_parent (me),
     79 		     0, attach_space, attach_address, attach_size, me);
     80 }
     81 
     82 static void
     83 m32r_cache_finish (struct hw *me)
     84 {
     85   struct m32r_cache_hw *hw;
     86 
     87   hw = HW_ZALLOC (me, struct m32r_cache_hw);
     88   set_hw_data (me, hw);
     89   set_hw_io_write_buffer (me, cris_io_write_buffer);
     90 
     91   attach_regs (me, hw);
     92 }
     93 
     94 const struct hw_descriptor dv_m32r_cache_descriptor[] = {
     95   { "m32r_cache", m32r_cache_finish, },
     96   { NULL },
     97 };
     98