semx-switch.c revision 1.1
1 /* Simulator instruction semantics for m32rxf. 2 3 THIS FILE IS MACHINE GENERATED WITH CGEN. 4 5 Copyright 1996-2014 Free Software Foundation, Inc. 6 7 This file is part of the GNU simulators. 8 9 This file is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 3, or (at your option) 12 any later version. 13 14 It is distributed in the hope that it will be useful, but WITHOUT 15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 17 License for more details. 18 19 You should have received a copy of the GNU General Public License along 20 with this program; if not, see <http://www.gnu.org/licenses/>. 21 22 */ 23 24 #ifdef DEFINE_LABELS 25 26 /* The labels have the case they have because the enum of insn types 27 is all uppercase and in the non-stdc case the insn symbol is built 28 into the enum name. */ 29 30 static struct { 31 int index; 32 void *label; 33 } labels[] = { 34 { M32RXF_INSN_X_INVALID, && case_sem_INSN_X_INVALID }, 35 { M32RXF_INSN_X_AFTER, && case_sem_INSN_X_AFTER }, 36 { M32RXF_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE }, 37 { M32RXF_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN }, 38 { M32RXF_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN }, 39 { M32RXF_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN }, 40 { M32RXF_INSN_ADD, && case_sem_INSN_ADD }, 41 { M32RXF_INSN_ADD3, && case_sem_INSN_ADD3 }, 42 { M32RXF_INSN_AND, && case_sem_INSN_AND }, 43 { M32RXF_INSN_AND3, && case_sem_INSN_AND3 }, 44 { M32RXF_INSN_OR, && case_sem_INSN_OR }, 45 { M32RXF_INSN_OR3, && case_sem_INSN_OR3 }, 46 { M32RXF_INSN_XOR, && case_sem_INSN_XOR }, 47 { M32RXF_INSN_XOR3, && case_sem_INSN_XOR3 }, 48 { M32RXF_INSN_ADDI, && case_sem_INSN_ADDI }, 49 { M32RXF_INSN_ADDV, && case_sem_INSN_ADDV }, 50 { M32RXF_INSN_ADDV3, && case_sem_INSN_ADDV3 }, 51 { M32RXF_INSN_ADDX, && case_sem_INSN_ADDX }, 52 { M32RXF_INSN_BC8, && case_sem_INSN_BC8 }, 53 { M32RXF_INSN_BC24, && case_sem_INSN_BC24 }, 54 { M32RXF_INSN_BEQ, && case_sem_INSN_BEQ }, 55 { M32RXF_INSN_BEQZ, && case_sem_INSN_BEQZ }, 56 { M32RXF_INSN_BGEZ, && case_sem_INSN_BGEZ }, 57 { M32RXF_INSN_BGTZ, && case_sem_INSN_BGTZ }, 58 { M32RXF_INSN_BLEZ, && case_sem_INSN_BLEZ }, 59 { M32RXF_INSN_BLTZ, && case_sem_INSN_BLTZ }, 60 { M32RXF_INSN_BNEZ, && case_sem_INSN_BNEZ }, 61 { M32RXF_INSN_BL8, && case_sem_INSN_BL8 }, 62 { M32RXF_INSN_BL24, && case_sem_INSN_BL24 }, 63 { M32RXF_INSN_BCL8, && case_sem_INSN_BCL8 }, 64 { M32RXF_INSN_BCL24, && case_sem_INSN_BCL24 }, 65 { M32RXF_INSN_BNC8, && case_sem_INSN_BNC8 }, 66 { M32RXF_INSN_BNC24, && case_sem_INSN_BNC24 }, 67 { M32RXF_INSN_BNE, && case_sem_INSN_BNE }, 68 { M32RXF_INSN_BRA8, && case_sem_INSN_BRA8 }, 69 { M32RXF_INSN_BRA24, && case_sem_INSN_BRA24 }, 70 { M32RXF_INSN_BNCL8, && case_sem_INSN_BNCL8 }, 71 { M32RXF_INSN_BNCL24, && case_sem_INSN_BNCL24 }, 72 { M32RXF_INSN_CMP, && case_sem_INSN_CMP }, 73 { M32RXF_INSN_CMPI, && case_sem_INSN_CMPI }, 74 { M32RXF_INSN_CMPU, && case_sem_INSN_CMPU }, 75 { M32RXF_INSN_CMPUI, && case_sem_INSN_CMPUI }, 76 { M32RXF_INSN_CMPEQ, && case_sem_INSN_CMPEQ }, 77 { M32RXF_INSN_CMPZ, && case_sem_INSN_CMPZ }, 78 { M32RXF_INSN_DIV, && case_sem_INSN_DIV }, 79 { M32RXF_INSN_DIVU, && case_sem_INSN_DIVU }, 80 { M32RXF_INSN_REM, && case_sem_INSN_REM }, 81 { M32RXF_INSN_REMU, && case_sem_INSN_REMU }, 82 { M32RXF_INSN_DIVH, && case_sem_INSN_DIVH }, 83 { M32RXF_INSN_JC, && case_sem_INSN_JC }, 84 { M32RXF_INSN_JNC, && case_sem_INSN_JNC }, 85 { M32RXF_INSN_JL, && case_sem_INSN_JL }, 86 { M32RXF_INSN_JMP, && case_sem_INSN_JMP }, 87 { M32RXF_INSN_LD, && case_sem_INSN_LD }, 88 { M32RXF_INSN_LD_D, && case_sem_INSN_LD_D }, 89 { M32RXF_INSN_LDB, && case_sem_INSN_LDB }, 90 { M32RXF_INSN_LDB_D, && case_sem_INSN_LDB_D }, 91 { M32RXF_INSN_LDH, && case_sem_INSN_LDH }, 92 { M32RXF_INSN_LDH_D, && case_sem_INSN_LDH_D }, 93 { M32RXF_INSN_LDUB, && case_sem_INSN_LDUB }, 94 { M32RXF_INSN_LDUB_D, && case_sem_INSN_LDUB_D }, 95 { M32RXF_INSN_LDUH, && case_sem_INSN_LDUH }, 96 { M32RXF_INSN_LDUH_D, && case_sem_INSN_LDUH_D }, 97 { M32RXF_INSN_LD_PLUS, && case_sem_INSN_LD_PLUS }, 98 { M32RXF_INSN_LD24, && case_sem_INSN_LD24 }, 99 { M32RXF_INSN_LDI8, && case_sem_INSN_LDI8 }, 100 { M32RXF_INSN_LDI16, && case_sem_INSN_LDI16 }, 101 { M32RXF_INSN_LOCK, && case_sem_INSN_LOCK }, 102 { M32RXF_INSN_MACHI_A, && case_sem_INSN_MACHI_A }, 103 { M32RXF_INSN_MACLO_A, && case_sem_INSN_MACLO_A }, 104 { M32RXF_INSN_MACWHI_A, && case_sem_INSN_MACWHI_A }, 105 { M32RXF_INSN_MACWLO_A, && case_sem_INSN_MACWLO_A }, 106 { M32RXF_INSN_MUL, && case_sem_INSN_MUL }, 107 { M32RXF_INSN_MULHI_A, && case_sem_INSN_MULHI_A }, 108 { M32RXF_INSN_MULLO_A, && case_sem_INSN_MULLO_A }, 109 { M32RXF_INSN_MULWHI_A, && case_sem_INSN_MULWHI_A }, 110 { M32RXF_INSN_MULWLO_A, && case_sem_INSN_MULWLO_A }, 111 { M32RXF_INSN_MV, && case_sem_INSN_MV }, 112 { M32RXF_INSN_MVFACHI_A, && case_sem_INSN_MVFACHI_A }, 113 { M32RXF_INSN_MVFACLO_A, && case_sem_INSN_MVFACLO_A }, 114 { M32RXF_INSN_MVFACMI_A, && case_sem_INSN_MVFACMI_A }, 115 { M32RXF_INSN_MVFC, && case_sem_INSN_MVFC }, 116 { M32RXF_INSN_MVTACHI_A, && case_sem_INSN_MVTACHI_A }, 117 { M32RXF_INSN_MVTACLO_A, && case_sem_INSN_MVTACLO_A }, 118 { M32RXF_INSN_MVTC, && case_sem_INSN_MVTC }, 119 { M32RXF_INSN_NEG, && case_sem_INSN_NEG }, 120 { M32RXF_INSN_NOP, && case_sem_INSN_NOP }, 121 { M32RXF_INSN_NOT, && case_sem_INSN_NOT }, 122 { M32RXF_INSN_RAC_DSI, && case_sem_INSN_RAC_DSI }, 123 { M32RXF_INSN_RACH_DSI, && case_sem_INSN_RACH_DSI }, 124 { M32RXF_INSN_RTE, && case_sem_INSN_RTE }, 125 { M32RXF_INSN_SETH, && case_sem_INSN_SETH }, 126 { M32RXF_INSN_SLL, && case_sem_INSN_SLL }, 127 { M32RXF_INSN_SLL3, && case_sem_INSN_SLL3 }, 128 { M32RXF_INSN_SLLI, && case_sem_INSN_SLLI }, 129 { M32RXF_INSN_SRA, && case_sem_INSN_SRA }, 130 { M32RXF_INSN_SRA3, && case_sem_INSN_SRA3 }, 131 { M32RXF_INSN_SRAI, && case_sem_INSN_SRAI }, 132 { M32RXF_INSN_SRL, && case_sem_INSN_SRL }, 133 { M32RXF_INSN_SRL3, && case_sem_INSN_SRL3 }, 134 { M32RXF_INSN_SRLI, && case_sem_INSN_SRLI }, 135 { M32RXF_INSN_ST, && case_sem_INSN_ST }, 136 { M32RXF_INSN_ST_D, && case_sem_INSN_ST_D }, 137 { M32RXF_INSN_STB, && case_sem_INSN_STB }, 138 { M32RXF_INSN_STB_D, && case_sem_INSN_STB_D }, 139 { M32RXF_INSN_STH, && case_sem_INSN_STH }, 140 { M32RXF_INSN_STH_D, && case_sem_INSN_STH_D }, 141 { M32RXF_INSN_ST_PLUS, && case_sem_INSN_ST_PLUS }, 142 { M32RXF_INSN_STH_PLUS, && case_sem_INSN_STH_PLUS }, 143 { M32RXF_INSN_STB_PLUS, && case_sem_INSN_STB_PLUS }, 144 { M32RXF_INSN_ST_MINUS, && case_sem_INSN_ST_MINUS }, 145 { M32RXF_INSN_SUB, && case_sem_INSN_SUB }, 146 { M32RXF_INSN_SUBV, && case_sem_INSN_SUBV }, 147 { M32RXF_INSN_SUBX, && case_sem_INSN_SUBX }, 148 { M32RXF_INSN_TRAP, && case_sem_INSN_TRAP }, 149 { M32RXF_INSN_UNLOCK, && case_sem_INSN_UNLOCK }, 150 { M32RXF_INSN_SATB, && case_sem_INSN_SATB }, 151 { M32RXF_INSN_SATH, && case_sem_INSN_SATH }, 152 { M32RXF_INSN_SAT, && case_sem_INSN_SAT }, 153 { M32RXF_INSN_PCMPBZ, && case_sem_INSN_PCMPBZ }, 154 { M32RXF_INSN_SADD, && case_sem_INSN_SADD }, 155 { M32RXF_INSN_MACWU1, && case_sem_INSN_MACWU1 }, 156 { M32RXF_INSN_MSBLO, && case_sem_INSN_MSBLO }, 157 { M32RXF_INSN_MULWU1, && case_sem_INSN_MULWU1 }, 158 { M32RXF_INSN_MACLH1, && case_sem_INSN_MACLH1 }, 159 { M32RXF_INSN_SC, && case_sem_INSN_SC }, 160 { M32RXF_INSN_SNC, && case_sem_INSN_SNC }, 161 { M32RXF_INSN_CLRPSW, && case_sem_INSN_CLRPSW }, 162 { M32RXF_INSN_SETPSW, && case_sem_INSN_SETPSW }, 163 { M32RXF_INSN_BSET, && case_sem_INSN_BSET }, 164 { M32RXF_INSN_BCLR, && case_sem_INSN_BCLR }, 165 { M32RXF_INSN_BTST, && case_sem_INSN_BTST }, 166 { M32RXF_INSN_PAR_ADD, && case_sem_INSN_PAR_ADD }, 167 { M32RXF_INSN_WRITE_ADD, && case_sem_INSN_WRITE_ADD }, 168 { M32RXF_INSN_PAR_AND, && case_sem_INSN_PAR_AND }, 169 { M32RXF_INSN_WRITE_AND, && case_sem_INSN_WRITE_AND }, 170 { M32RXF_INSN_PAR_OR, && case_sem_INSN_PAR_OR }, 171 { M32RXF_INSN_WRITE_OR, && case_sem_INSN_WRITE_OR }, 172 { M32RXF_INSN_PAR_XOR, && case_sem_INSN_PAR_XOR }, 173 { M32RXF_INSN_WRITE_XOR, && case_sem_INSN_WRITE_XOR }, 174 { M32RXF_INSN_PAR_ADDI, && case_sem_INSN_PAR_ADDI }, 175 { M32RXF_INSN_WRITE_ADDI, && case_sem_INSN_WRITE_ADDI }, 176 { M32RXF_INSN_PAR_ADDV, && case_sem_INSN_PAR_ADDV }, 177 { M32RXF_INSN_WRITE_ADDV, && case_sem_INSN_WRITE_ADDV }, 178 { M32RXF_INSN_PAR_ADDX, && case_sem_INSN_PAR_ADDX }, 179 { M32RXF_INSN_WRITE_ADDX, && case_sem_INSN_WRITE_ADDX }, 180 { M32RXF_INSN_PAR_BC8, && case_sem_INSN_PAR_BC8 }, 181 { M32RXF_INSN_WRITE_BC8, && case_sem_INSN_WRITE_BC8 }, 182 { M32RXF_INSN_PAR_BL8, && case_sem_INSN_PAR_BL8 }, 183 { M32RXF_INSN_WRITE_BL8, && case_sem_INSN_WRITE_BL8 }, 184 { M32RXF_INSN_PAR_BCL8, && case_sem_INSN_PAR_BCL8 }, 185 { M32RXF_INSN_WRITE_BCL8, && case_sem_INSN_WRITE_BCL8 }, 186 { M32RXF_INSN_PAR_BNC8, && case_sem_INSN_PAR_BNC8 }, 187 { M32RXF_INSN_WRITE_BNC8, && case_sem_INSN_WRITE_BNC8 }, 188 { M32RXF_INSN_PAR_BRA8, && case_sem_INSN_PAR_BRA8 }, 189 { M32RXF_INSN_WRITE_BRA8, && case_sem_INSN_WRITE_BRA8 }, 190 { M32RXF_INSN_PAR_BNCL8, && case_sem_INSN_PAR_BNCL8 }, 191 { M32RXF_INSN_WRITE_BNCL8, && case_sem_INSN_WRITE_BNCL8 }, 192 { M32RXF_INSN_PAR_CMP, && case_sem_INSN_PAR_CMP }, 193 { M32RXF_INSN_WRITE_CMP, && case_sem_INSN_WRITE_CMP }, 194 { M32RXF_INSN_PAR_CMPU, && case_sem_INSN_PAR_CMPU }, 195 { M32RXF_INSN_WRITE_CMPU, && case_sem_INSN_WRITE_CMPU }, 196 { M32RXF_INSN_PAR_CMPEQ, && case_sem_INSN_PAR_CMPEQ }, 197 { M32RXF_INSN_WRITE_CMPEQ, && case_sem_INSN_WRITE_CMPEQ }, 198 { M32RXF_INSN_PAR_CMPZ, && case_sem_INSN_PAR_CMPZ }, 199 { M32RXF_INSN_WRITE_CMPZ, && case_sem_INSN_WRITE_CMPZ }, 200 { M32RXF_INSN_PAR_JC, && case_sem_INSN_PAR_JC }, 201 { M32RXF_INSN_WRITE_JC, && case_sem_INSN_WRITE_JC }, 202 { M32RXF_INSN_PAR_JNC, && case_sem_INSN_PAR_JNC }, 203 { M32RXF_INSN_WRITE_JNC, && case_sem_INSN_WRITE_JNC }, 204 { M32RXF_INSN_PAR_JL, && case_sem_INSN_PAR_JL }, 205 { M32RXF_INSN_WRITE_JL, && case_sem_INSN_WRITE_JL }, 206 { M32RXF_INSN_PAR_JMP, && case_sem_INSN_PAR_JMP }, 207 { M32RXF_INSN_WRITE_JMP, && case_sem_INSN_WRITE_JMP }, 208 { M32RXF_INSN_PAR_LD, && case_sem_INSN_PAR_LD }, 209 { M32RXF_INSN_WRITE_LD, && case_sem_INSN_WRITE_LD }, 210 { M32RXF_INSN_PAR_LDB, && case_sem_INSN_PAR_LDB }, 211 { M32RXF_INSN_WRITE_LDB, && case_sem_INSN_WRITE_LDB }, 212 { M32RXF_INSN_PAR_LDH, && case_sem_INSN_PAR_LDH }, 213 { M32RXF_INSN_WRITE_LDH, && case_sem_INSN_WRITE_LDH }, 214 { M32RXF_INSN_PAR_LDUB, && case_sem_INSN_PAR_LDUB }, 215 { M32RXF_INSN_WRITE_LDUB, && case_sem_INSN_WRITE_LDUB }, 216 { M32RXF_INSN_PAR_LDUH, && case_sem_INSN_PAR_LDUH }, 217 { M32RXF_INSN_WRITE_LDUH, && case_sem_INSN_WRITE_LDUH }, 218 { M32RXF_INSN_PAR_LD_PLUS, && case_sem_INSN_PAR_LD_PLUS }, 219 { M32RXF_INSN_WRITE_LD_PLUS, && case_sem_INSN_WRITE_LD_PLUS }, 220 { M32RXF_INSN_PAR_LDI8, && case_sem_INSN_PAR_LDI8 }, 221 { M32RXF_INSN_WRITE_LDI8, && case_sem_INSN_WRITE_LDI8 }, 222 { M32RXF_INSN_PAR_LOCK, && case_sem_INSN_PAR_LOCK }, 223 { M32RXF_INSN_WRITE_LOCK, && case_sem_INSN_WRITE_LOCK }, 224 { M32RXF_INSN_PAR_MACHI_A, && case_sem_INSN_PAR_MACHI_A }, 225 { M32RXF_INSN_WRITE_MACHI_A, && case_sem_INSN_WRITE_MACHI_A }, 226 { M32RXF_INSN_PAR_MACLO_A, && case_sem_INSN_PAR_MACLO_A }, 227 { M32RXF_INSN_WRITE_MACLO_A, && case_sem_INSN_WRITE_MACLO_A }, 228 { M32RXF_INSN_PAR_MACWHI_A, && case_sem_INSN_PAR_MACWHI_A }, 229 { M32RXF_INSN_WRITE_MACWHI_A, && case_sem_INSN_WRITE_MACWHI_A }, 230 { M32RXF_INSN_PAR_MACWLO_A, && case_sem_INSN_PAR_MACWLO_A }, 231 { M32RXF_INSN_WRITE_MACWLO_A, && case_sem_INSN_WRITE_MACWLO_A }, 232 { M32RXF_INSN_PAR_MUL, && case_sem_INSN_PAR_MUL }, 233 { M32RXF_INSN_WRITE_MUL, && case_sem_INSN_WRITE_MUL }, 234 { M32RXF_INSN_PAR_MULHI_A, && case_sem_INSN_PAR_MULHI_A }, 235 { M32RXF_INSN_WRITE_MULHI_A, && case_sem_INSN_WRITE_MULHI_A }, 236 { M32RXF_INSN_PAR_MULLO_A, && case_sem_INSN_PAR_MULLO_A }, 237 { M32RXF_INSN_WRITE_MULLO_A, && case_sem_INSN_WRITE_MULLO_A }, 238 { M32RXF_INSN_PAR_MULWHI_A, && case_sem_INSN_PAR_MULWHI_A }, 239 { M32RXF_INSN_WRITE_MULWHI_A, && case_sem_INSN_WRITE_MULWHI_A }, 240 { M32RXF_INSN_PAR_MULWLO_A, && case_sem_INSN_PAR_MULWLO_A }, 241 { M32RXF_INSN_WRITE_MULWLO_A, && case_sem_INSN_WRITE_MULWLO_A }, 242 { M32RXF_INSN_PAR_MV, && case_sem_INSN_PAR_MV }, 243 { M32RXF_INSN_WRITE_MV, && case_sem_INSN_WRITE_MV }, 244 { M32RXF_INSN_PAR_MVFACHI_A, && case_sem_INSN_PAR_MVFACHI_A }, 245 { M32RXF_INSN_WRITE_MVFACHI_A, && case_sem_INSN_WRITE_MVFACHI_A }, 246 { M32RXF_INSN_PAR_MVFACLO_A, && case_sem_INSN_PAR_MVFACLO_A }, 247 { M32RXF_INSN_WRITE_MVFACLO_A, && case_sem_INSN_WRITE_MVFACLO_A }, 248 { M32RXF_INSN_PAR_MVFACMI_A, && case_sem_INSN_PAR_MVFACMI_A }, 249 { M32RXF_INSN_WRITE_MVFACMI_A, && case_sem_INSN_WRITE_MVFACMI_A }, 250 { M32RXF_INSN_PAR_MVFC, && case_sem_INSN_PAR_MVFC }, 251 { M32RXF_INSN_WRITE_MVFC, && case_sem_INSN_WRITE_MVFC }, 252 { M32RXF_INSN_PAR_MVTACHI_A, && case_sem_INSN_PAR_MVTACHI_A }, 253 { M32RXF_INSN_WRITE_MVTACHI_A, && case_sem_INSN_WRITE_MVTACHI_A }, 254 { M32RXF_INSN_PAR_MVTACLO_A, && case_sem_INSN_PAR_MVTACLO_A }, 255 { M32RXF_INSN_WRITE_MVTACLO_A, && case_sem_INSN_WRITE_MVTACLO_A }, 256 { M32RXF_INSN_PAR_MVTC, && case_sem_INSN_PAR_MVTC }, 257 { M32RXF_INSN_WRITE_MVTC, && case_sem_INSN_WRITE_MVTC }, 258 { M32RXF_INSN_PAR_NEG, && case_sem_INSN_PAR_NEG }, 259 { M32RXF_INSN_WRITE_NEG, && case_sem_INSN_WRITE_NEG }, 260 { M32RXF_INSN_PAR_NOP, && case_sem_INSN_PAR_NOP }, 261 { M32RXF_INSN_WRITE_NOP, && case_sem_INSN_WRITE_NOP }, 262 { M32RXF_INSN_PAR_NOT, && case_sem_INSN_PAR_NOT }, 263 { M32RXF_INSN_WRITE_NOT, && case_sem_INSN_WRITE_NOT }, 264 { M32RXF_INSN_PAR_RAC_DSI, && case_sem_INSN_PAR_RAC_DSI }, 265 { M32RXF_INSN_WRITE_RAC_DSI, && case_sem_INSN_WRITE_RAC_DSI }, 266 { M32RXF_INSN_PAR_RACH_DSI, && case_sem_INSN_PAR_RACH_DSI }, 267 { M32RXF_INSN_WRITE_RACH_DSI, && case_sem_INSN_WRITE_RACH_DSI }, 268 { M32RXF_INSN_PAR_RTE, && case_sem_INSN_PAR_RTE }, 269 { M32RXF_INSN_WRITE_RTE, && case_sem_INSN_WRITE_RTE }, 270 { M32RXF_INSN_PAR_SLL, && case_sem_INSN_PAR_SLL }, 271 { M32RXF_INSN_WRITE_SLL, && case_sem_INSN_WRITE_SLL }, 272 { M32RXF_INSN_PAR_SLLI, && case_sem_INSN_PAR_SLLI }, 273 { M32RXF_INSN_WRITE_SLLI, && case_sem_INSN_WRITE_SLLI }, 274 { M32RXF_INSN_PAR_SRA, && case_sem_INSN_PAR_SRA }, 275 { M32RXF_INSN_WRITE_SRA, && case_sem_INSN_WRITE_SRA }, 276 { M32RXF_INSN_PAR_SRAI, && case_sem_INSN_PAR_SRAI }, 277 { M32RXF_INSN_WRITE_SRAI, && case_sem_INSN_WRITE_SRAI }, 278 { M32RXF_INSN_PAR_SRL, && case_sem_INSN_PAR_SRL }, 279 { M32RXF_INSN_WRITE_SRL, && case_sem_INSN_WRITE_SRL }, 280 { M32RXF_INSN_PAR_SRLI, && case_sem_INSN_PAR_SRLI }, 281 { M32RXF_INSN_WRITE_SRLI, && case_sem_INSN_WRITE_SRLI }, 282 { M32RXF_INSN_PAR_ST, && case_sem_INSN_PAR_ST }, 283 { M32RXF_INSN_WRITE_ST, && case_sem_INSN_WRITE_ST }, 284 { M32RXF_INSN_PAR_STB, && case_sem_INSN_PAR_STB }, 285 { M32RXF_INSN_WRITE_STB, && case_sem_INSN_WRITE_STB }, 286 { M32RXF_INSN_PAR_STH, && case_sem_INSN_PAR_STH }, 287 { M32RXF_INSN_WRITE_STH, && case_sem_INSN_WRITE_STH }, 288 { M32RXF_INSN_PAR_ST_PLUS, && case_sem_INSN_PAR_ST_PLUS }, 289 { M32RXF_INSN_WRITE_ST_PLUS, && case_sem_INSN_WRITE_ST_PLUS }, 290 { M32RXF_INSN_PAR_STH_PLUS, && case_sem_INSN_PAR_STH_PLUS }, 291 { M32RXF_INSN_WRITE_STH_PLUS, && case_sem_INSN_WRITE_STH_PLUS }, 292 { M32RXF_INSN_PAR_STB_PLUS, && case_sem_INSN_PAR_STB_PLUS }, 293 { M32RXF_INSN_WRITE_STB_PLUS, && case_sem_INSN_WRITE_STB_PLUS }, 294 { M32RXF_INSN_PAR_ST_MINUS, && case_sem_INSN_PAR_ST_MINUS }, 295 { M32RXF_INSN_WRITE_ST_MINUS, && case_sem_INSN_WRITE_ST_MINUS }, 296 { M32RXF_INSN_PAR_SUB, && case_sem_INSN_PAR_SUB }, 297 { M32RXF_INSN_WRITE_SUB, && case_sem_INSN_WRITE_SUB }, 298 { M32RXF_INSN_PAR_SUBV, && case_sem_INSN_PAR_SUBV }, 299 { M32RXF_INSN_WRITE_SUBV, && case_sem_INSN_WRITE_SUBV }, 300 { M32RXF_INSN_PAR_SUBX, && case_sem_INSN_PAR_SUBX }, 301 { M32RXF_INSN_WRITE_SUBX, && case_sem_INSN_WRITE_SUBX }, 302 { M32RXF_INSN_PAR_TRAP, && case_sem_INSN_PAR_TRAP }, 303 { M32RXF_INSN_WRITE_TRAP, && case_sem_INSN_WRITE_TRAP }, 304 { M32RXF_INSN_PAR_UNLOCK, && case_sem_INSN_PAR_UNLOCK }, 305 { M32RXF_INSN_WRITE_UNLOCK, && case_sem_INSN_WRITE_UNLOCK }, 306 { M32RXF_INSN_PAR_PCMPBZ, && case_sem_INSN_PAR_PCMPBZ }, 307 { M32RXF_INSN_WRITE_PCMPBZ, && case_sem_INSN_WRITE_PCMPBZ }, 308 { M32RXF_INSN_PAR_SADD, && case_sem_INSN_PAR_SADD }, 309 { M32RXF_INSN_WRITE_SADD, && case_sem_INSN_WRITE_SADD }, 310 { M32RXF_INSN_PAR_MACWU1, && case_sem_INSN_PAR_MACWU1 }, 311 { M32RXF_INSN_WRITE_MACWU1, && case_sem_INSN_WRITE_MACWU1 }, 312 { M32RXF_INSN_PAR_MSBLO, && case_sem_INSN_PAR_MSBLO }, 313 { M32RXF_INSN_WRITE_MSBLO, && case_sem_INSN_WRITE_MSBLO }, 314 { M32RXF_INSN_PAR_MULWU1, && case_sem_INSN_PAR_MULWU1 }, 315 { M32RXF_INSN_WRITE_MULWU1, && case_sem_INSN_WRITE_MULWU1 }, 316 { M32RXF_INSN_PAR_MACLH1, && case_sem_INSN_PAR_MACLH1 }, 317 { M32RXF_INSN_WRITE_MACLH1, && case_sem_INSN_WRITE_MACLH1 }, 318 { M32RXF_INSN_PAR_SC, && case_sem_INSN_PAR_SC }, 319 { M32RXF_INSN_WRITE_SC, && case_sem_INSN_WRITE_SC }, 320 { M32RXF_INSN_PAR_SNC, && case_sem_INSN_PAR_SNC }, 321 { M32RXF_INSN_WRITE_SNC, && case_sem_INSN_WRITE_SNC }, 322 { M32RXF_INSN_PAR_CLRPSW, && case_sem_INSN_PAR_CLRPSW }, 323 { M32RXF_INSN_WRITE_CLRPSW, && case_sem_INSN_WRITE_CLRPSW }, 324 { M32RXF_INSN_PAR_SETPSW, && case_sem_INSN_PAR_SETPSW }, 325 { M32RXF_INSN_WRITE_SETPSW, && case_sem_INSN_WRITE_SETPSW }, 326 { M32RXF_INSN_PAR_BTST, && case_sem_INSN_PAR_BTST }, 327 { M32RXF_INSN_WRITE_BTST, && case_sem_INSN_WRITE_BTST }, 328 { 0, 0 } 329 }; 330 int i; 331 332 for (i = 0; labels[i].label != 0; ++i) 333 { 334 #if FAST_P 335 CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label; 336 #else 337 CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label; 338 #endif 339 } 340 341 #undef DEFINE_LABELS 342 #endif /* DEFINE_LABELS */ 343 344 #ifdef DEFINE_SWITCH 345 346 /* If hyper-fast [well not unnecessarily slow] execution is selected, turn 347 off frills like tracing and profiling. */ 348 /* FIXME: A better way would be to have TRACE_RESULT check for something 349 that can cause it to be optimized out. Another way would be to emit 350 special handlers into the instruction "stream". */ 351 352 #if FAST_P 353 #undef TRACE_RESULT 354 #define TRACE_RESULT(cpu, abuf, name, type, val) 355 #endif 356 357 #undef GET_ATTR 358 #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) 359 360 { 361 362 #if WITH_SCACHE_PBB 363 364 /* Branch to next handler without going around main loop. */ 365 #define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case 366 SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) 367 368 #else /* ! WITH_SCACHE_PBB */ 369 370 #define NEXT(vpc) BREAK (sem) 371 #ifdef __GNUC__ 372 #if FAST_P 373 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab) 374 #else 375 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab) 376 #endif 377 #else 378 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num) 379 #endif 380 381 #endif /* ! WITH_SCACHE_PBB */ 382 383 { 384 385 CASE (sem, INSN_X_INVALID) : /* --invalid-- */ 386 { 387 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 388 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 389 #define FLD(f) abuf->fields.sfmt_empty.f 390 int UNUSED written = 0; 391 IADDR UNUSED pc = abuf->addr; 392 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 393 394 { 395 /* Update the recorded pc in the cpu state struct. 396 Only necessary for WITH_SCACHE case, but to avoid the 397 conditional compilation .... */ 398 SET_H_PC (pc); 399 /* Virtual insns have zero size. Overwrite vpc with address of next insn 400 using the default-insn-bitsize spec. When executing insns in parallel 401 we may want to queue the fault and continue execution. */ 402 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 403 vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); 404 } 405 406 #undef FLD 407 } 408 NEXT (vpc); 409 410 CASE (sem, INSN_X_AFTER) : /* --after-- */ 411 { 412 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 413 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 414 #define FLD(f) abuf->fields.sfmt_empty.f 415 int UNUSED written = 0; 416 IADDR UNUSED pc = abuf->addr; 417 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 418 419 { 420 #if WITH_SCACHE_PBB_M32RXF 421 m32rxf_pbb_after (current_cpu, sem_arg); 422 #endif 423 } 424 425 #undef FLD 426 } 427 NEXT (vpc); 428 429 CASE (sem, INSN_X_BEFORE) : /* --before-- */ 430 { 431 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 432 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 433 #define FLD(f) abuf->fields.sfmt_empty.f 434 int UNUSED written = 0; 435 IADDR UNUSED pc = abuf->addr; 436 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 437 438 { 439 #if WITH_SCACHE_PBB_M32RXF 440 m32rxf_pbb_before (current_cpu, sem_arg); 441 #endif 442 } 443 444 #undef FLD 445 } 446 NEXT (vpc); 447 448 CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */ 449 { 450 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 451 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 452 #define FLD(f) abuf->fields.sfmt_empty.f 453 int UNUSED written = 0; 454 IADDR UNUSED pc = abuf->addr; 455 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 456 457 { 458 #if WITH_SCACHE_PBB_M32RXF 459 #ifdef DEFINE_SWITCH 460 vpc = m32rxf_pbb_cti_chain (current_cpu, sem_arg, 461 pbb_br_type, pbb_br_npc); 462 BREAK (sem); 463 #else 464 /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ 465 vpc = m32rxf_pbb_cti_chain (current_cpu, sem_arg, 466 CPU_PBB_BR_TYPE (current_cpu), 467 CPU_PBB_BR_NPC (current_cpu)); 468 #endif 469 #endif 470 } 471 472 #undef FLD 473 } 474 NEXT (vpc); 475 476 CASE (sem, INSN_X_CHAIN) : /* --chain-- */ 477 { 478 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 479 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 480 #define FLD(f) abuf->fields.sfmt_empty.f 481 int UNUSED written = 0; 482 IADDR UNUSED pc = abuf->addr; 483 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 484 485 { 486 #if WITH_SCACHE_PBB_M32RXF 487 vpc = m32rxf_pbb_chain (current_cpu, sem_arg); 488 #ifdef DEFINE_SWITCH 489 BREAK (sem); 490 #endif 491 #endif 492 } 493 494 #undef FLD 495 } 496 NEXT (vpc); 497 498 CASE (sem, INSN_X_BEGIN) : /* --begin-- */ 499 { 500 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 501 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 502 #define FLD(f) abuf->fields.sfmt_empty.f 503 int UNUSED written = 0; 504 IADDR UNUSED pc = abuf->addr; 505 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 506 507 { 508 #if WITH_SCACHE_PBB_M32RXF 509 #if defined DEFINE_SWITCH || defined FAST_P 510 /* In the switch case FAST_P is a constant, allowing several optimizations 511 in any called inline functions. */ 512 vpc = m32rxf_pbb_begin (current_cpu, FAST_P); 513 #else 514 #if 0 /* cgen engine can't handle dynamic fast/full switching yet. */ 515 vpc = m32rxf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); 516 #else 517 vpc = m32rxf_pbb_begin (current_cpu, 0); 518 #endif 519 #endif 520 #endif 521 } 522 523 #undef FLD 524 } 525 NEXT (vpc); 526 527 CASE (sem, INSN_ADD) : /* add $dr,$sr */ 528 { 529 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 530 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 531 #define FLD(f) abuf->fields.sfmt_add.f 532 int UNUSED written = 0; 533 IADDR UNUSED pc = abuf->addr; 534 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 535 536 { 537 SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr)); 538 * FLD (i_dr) = opval; 539 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 540 } 541 542 #undef FLD 543 } 544 NEXT (vpc); 545 546 CASE (sem, INSN_ADD3) : /* add3 $dr,$sr,$hash$slo16 */ 547 { 548 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 549 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 550 #define FLD(f) abuf->fields.sfmt_add3.f 551 int UNUSED written = 0; 552 IADDR UNUSED pc = abuf->addr; 553 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 554 555 { 556 SI opval = ADDSI (* FLD (i_sr), FLD (f_simm16)); 557 * FLD (i_dr) = opval; 558 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 559 } 560 561 #undef FLD 562 } 563 NEXT (vpc); 564 565 CASE (sem, INSN_AND) : /* and $dr,$sr */ 566 { 567 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 568 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 569 #define FLD(f) abuf->fields.sfmt_add.f 570 int UNUSED written = 0; 571 IADDR UNUSED pc = abuf->addr; 572 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 573 574 { 575 SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr)); 576 * FLD (i_dr) = opval; 577 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 578 } 579 580 #undef FLD 581 } 582 NEXT (vpc); 583 584 CASE (sem, INSN_AND3) : /* and3 $dr,$sr,$uimm16 */ 585 { 586 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 587 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 588 #define FLD(f) abuf->fields.sfmt_and3.f 589 int UNUSED written = 0; 590 IADDR UNUSED pc = abuf->addr; 591 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 592 593 { 594 SI opval = ANDSI (* FLD (i_sr), FLD (f_uimm16)); 595 * FLD (i_dr) = opval; 596 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 597 } 598 599 #undef FLD 600 } 601 NEXT (vpc); 602 603 CASE (sem, INSN_OR) : /* or $dr,$sr */ 604 { 605 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 606 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 607 #define FLD(f) abuf->fields.sfmt_add.f 608 int UNUSED written = 0; 609 IADDR UNUSED pc = abuf->addr; 610 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 611 612 { 613 SI opval = ORSI (* FLD (i_dr), * FLD (i_sr)); 614 * FLD (i_dr) = opval; 615 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 616 } 617 618 #undef FLD 619 } 620 NEXT (vpc); 621 622 CASE (sem, INSN_OR3) : /* or3 $dr,$sr,$hash$ulo16 */ 623 { 624 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 625 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 626 #define FLD(f) abuf->fields.sfmt_and3.f 627 int UNUSED written = 0; 628 IADDR UNUSED pc = abuf->addr; 629 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 630 631 { 632 SI opval = ORSI (* FLD (i_sr), FLD (f_uimm16)); 633 * FLD (i_dr) = opval; 634 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 635 } 636 637 #undef FLD 638 } 639 NEXT (vpc); 640 641 CASE (sem, INSN_XOR) : /* xor $dr,$sr */ 642 { 643 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 644 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 645 #define FLD(f) abuf->fields.sfmt_add.f 646 int UNUSED written = 0; 647 IADDR UNUSED pc = abuf->addr; 648 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 649 650 { 651 SI opval = XORSI (* FLD (i_dr), * FLD (i_sr)); 652 * FLD (i_dr) = opval; 653 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 654 } 655 656 #undef FLD 657 } 658 NEXT (vpc); 659 660 CASE (sem, INSN_XOR3) : /* xor3 $dr,$sr,$uimm16 */ 661 { 662 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 663 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 664 #define FLD(f) abuf->fields.sfmt_and3.f 665 int UNUSED written = 0; 666 IADDR UNUSED pc = abuf->addr; 667 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 668 669 { 670 SI opval = XORSI (* FLD (i_sr), FLD (f_uimm16)); 671 * FLD (i_dr) = opval; 672 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 673 } 674 675 #undef FLD 676 } 677 NEXT (vpc); 678 679 CASE (sem, INSN_ADDI) : /* addi $dr,$simm8 */ 680 { 681 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 682 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 683 #define FLD(f) abuf->fields.sfmt_addi.f 684 int UNUSED written = 0; 685 IADDR UNUSED pc = abuf->addr; 686 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 687 688 { 689 SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8)); 690 * FLD (i_dr) = opval; 691 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 692 } 693 694 #undef FLD 695 } 696 NEXT (vpc); 697 698 CASE (sem, INSN_ADDV) : /* addv $dr,$sr */ 699 { 700 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 701 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 702 #define FLD(f) abuf->fields.sfmt_add.f 703 int UNUSED written = 0; 704 IADDR UNUSED pc = abuf->addr; 705 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 706 707 { 708 SI temp0;BI temp1; 709 temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr)); 710 temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0); 711 { 712 SI opval = temp0; 713 * FLD (i_dr) = opval; 714 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 715 } 716 { 717 BI opval = temp1; 718 CPU (h_cond) = opval; 719 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 720 } 721 } 722 723 #undef FLD 724 } 725 NEXT (vpc); 726 727 CASE (sem, INSN_ADDV3) : /* addv3 $dr,$sr,$simm16 */ 728 { 729 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 730 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 731 #define FLD(f) abuf->fields.sfmt_add3.f 732 int UNUSED written = 0; 733 IADDR UNUSED pc = abuf->addr; 734 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 735 736 { 737 SI temp0;BI temp1; 738 temp0 = ADDSI (* FLD (i_sr), FLD (f_simm16)); 739 temp1 = ADDOFSI (* FLD (i_sr), FLD (f_simm16), 0); 740 { 741 SI opval = temp0; 742 * FLD (i_dr) = opval; 743 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 744 } 745 { 746 BI opval = temp1; 747 CPU (h_cond) = opval; 748 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 749 } 750 } 751 752 #undef FLD 753 } 754 NEXT (vpc); 755 756 CASE (sem, INSN_ADDX) : /* addx $dr,$sr */ 757 { 758 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 759 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 760 #define FLD(f) abuf->fields.sfmt_add.f 761 int UNUSED written = 0; 762 IADDR UNUSED pc = abuf->addr; 763 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 764 765 { 766 SI temp0;BI temp1; 767 temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); 768 temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); 769 { 770 SI opval = temp0; 771 * FLD (i_dr) = opval; 772 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 773 } 774 { 775 BI opval = temp1; 776 CPU (h_cond) = opval; 777 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 778 } 779 } 780 781 #undef FLD 782 } 783 NEXT (vpc); 784 785 CASE (sem, INSN_BC8) : /* bc.s $disp8 */ 786 { 787 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 788 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 789 #define FLD(f) abuf->fields.sfmt_bl8.f 790 int UNUSED written = 0; 791 IADDR UNUSED pc = abuf->addr; 792 SEM_BRANCH_INIT 793 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 794 795 if (CPU (h_cond)) { 796 { 797 USI opval = FLD (i_disp8); 798 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 799 written |= (1 << 2); 800 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 801 } 802 } 803 804 abuf->written = written; 805 SEM_BRANCH_FINI (vpc); 806 #undef FLD 807 } 808 NEXT (vpc); 809 810 CASE (sem, INSN_BC24) : /* bc.l $disp24 */ 811 { 812 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 813 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 814 #define FLD(f) abuf->fields.sfmt_bl24.f 815 int UNUSED written = 0; 816 IADDR UNUSED pc = abuf->addr; 817 SEM_BRANCH_INIT 818 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 819 820 if (CPU (h_cond)) { 821 { 822 USI opval = FLD (i_disp24); 823 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 824 written |= (1 << 2); 825 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 826 } 827 } 828 829 abuf->written = written; 830 SEM_BRANCH_FINI (vpc); 831 #undef FLD 832 } 833 NEXT (vpc); 834 835 CASE (sem, INSN_BEQ) : /* beq $src1,$src2,$disp16 */ 836 { 837 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 838 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 839 #define FLD(f) abuf->fields.sfmt_beq.f 840 int UNUSED written = 0; 841 IADDR UNUSED pc = abuf->addr; 842 SEM_BRANCH_INIT 843 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 844 845 if (EQSI (* FLD (i_src1), * FLD (i_src2))) { 846 { 847 USI opval = FLD (i_disp16); 848 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 849 written |= (1 << 3); 850 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 851 } 852 } 853 854 abuf->written = written; 855 SEM_BRANCH_FINI (vpc); 856 #undef FLD 857 } 858 NEXT (vpc); 859 860 CASE (sem, INSN_BEQZ) : /* beqz $src2,$disp16 */ 861 { 862 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 863 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 864 #define FLD(f) abuf->fields.sfmt_beq.f 865 int UNUSED written = 0; 866 IADDR UNUSED pc = abuf->addr; 867 SEM_BRANCH_INIT 868 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 869 870 if (EQSI (* FLD (i_src2), 0)) { 871 { 872 USI opval = FLD (i_disp16); 873 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 874 written |= (1 << 2); 875 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 876 } 877 } 878 879 abuf->written = written; 880 SEM_BRANCH_FINI (vpc); 881 #undef FLD 882 } 883 NEXT (vpc); 884 885 CASE (sem, INSN_BGEZ) : /* bgez $src2,$disp16 */ 886 { 887 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 888 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 889 #define FLD(f) abuf->fields.sfmt_beq.f 890 int UNUSED written = 0; 891 IADDR UNUSED pc = abuf->addr; 892 SEM_BRANCH_INIT 893 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 894 895 if (GESI (* FLD (i_src2), 0)) { 896 { 897 USI opval = FLD (i_disp16); 898 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 899 written |= (1 << 2); 900 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 901 } 902 } 903 904 abuf->written = written; 905 SEM_BRANCH_FINI (vpc); 906 #undef FLD 907 } 908 NEXT (vpc); 909 910 CASE (sem, INSN_BGTZ) : /* bgtz $src2,$disp16 */ 911 { 912 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 913 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 914 #define FLD(f) abuf->fields.sfmt_beq.f 915 int UNUSED written = 0; 916 IADDR UNUSED pc = abuf->addr; 917 SEM_BRANCH_INIT 918 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 919 920 if (GTSI (* FLD (i_src2), 0)) { 921 { 922 USI opval = FLD (i_disp16); 923 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 924 written |= (1 << 2); 925 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 926 } 927 } 928 929 abuf->written = written; 930 SEM_BRANCH_FINI (vpc); 931 #undef FLD 932 } 933 NEXT (vpc); 934 935 CASE (sem, INSN_BLEZ) : /* blez $src2,$disp16 */ 936 { 937 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 938 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 939 #define FLD(f) abuf->fields.sfmt_beq.f 940 int UNUSED written = 0; 941 IADDR UNUSED pc = abuf->addr; 942 SEM_BRANCH_INIT 943 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 944 945 if (LESI (* FLD (i_src2), 0)) { 946 { 947 USI opval = FLD (i_disp16); 948 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 949 written |= (1 << 2); 950 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 951 } 952 } 953 954 abuf->written = written; 955 SEM_BRANCH_FINI (vpc); 956 #undef FLD 957 } 958 NEXT (vpc); 959 960 CASE (sem, INSN_BLTZ) : /* bltz $src2,$disp16 */ 961 { 962 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 963 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 964 #define FLD(f) abuf->fields.sfmt_beq.f 965 int UNUSED written = 0; 966 IADDR UNUSED pc = abuf->addr; 967 SEM_BRANCH_INIT 968 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 969 970 if (LTSI (* FLD (i_src2), 0)) { 971 { 972 USI opval = FLD (i_disp16); 973 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 974 written |= (1 << 2); 975 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 976 } 977 } 978 979 abuf->written = written; 980 SEM_BRANCH_FINI (vpc); 981 #undef FLD 982 } 983 NEXT (vpc); 984 985 CASE (sem, INSN_BNEZ) : /* bnez $src2,$disp16 */ 986 { 987 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 988 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 989 #define FLD(f) abuf->fields.sfmt_beq.f 990 int UNUSED written = 0; 991 IADDR UNUSED pc = abuf->addr; 992 SEM_BRANCH_INIT 993 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 994 995 if (NESI (* FLD (i_src2), 0)) { 996 { 997 USI opval = FLD (i_disp16); 998 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 999 written |= (1 << 2); 1000 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1001 } 1002 } 1003 1004 abuf->written = written; 1005 SEM_BRANCH_FINI (vpc); 1006 #undef FLD 1007 } 1008 NEXT (vpc); 1009 1010 CASE (sem, INSN_BL8) : /* bl.s $disp8 */ 1011 { 1012 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1013 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1014 #define FLD(f) abuf->fields.sfmt_bl8.f 1015 int UNUSED written = 0; 1016 IADDR UNUSED pc = abuf->addr; 1017 SEM_BRANCH_INIT 1018 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1019 1020 { 1021 { 1022 SI opval = ADDSI (ANDSI (pc, -4), 4); 1023 CPU (h_gr[((UINT) 14)]) = opval; 1024 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1025 } 1026 { 1027 USI opval = FLD (i_disp8); 1028 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 1029 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1030 } 1031 } 1032 1033 SEM_BRANCH_FINI (vpc); 1034 #undef FLD 1035 } 1036 NEXT (vpc); 1037 1038 CASE (sem, INSN_BL24) : /* bl.l $disp24 */ 1039 { 1040 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1041 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1042 #define FLD(f) abuf->fields.sfmt_bl24.f 1043 int UNUSED written = 0; 1044 IADDR UNUSED pc = abuf->addr; 1045 SEM_BRANCH_INIT 1046 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1047 1048 { 1049 { 1050 SI opval = ADDSI (pc, 4); 1051 CPU (h_gr[((UINT) 14)]) = opval; 1052 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1053 } 1054 { 1055 USI opval = FLD (i_disp24); 1056 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 1057 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1058 } 1059 } 1060 1061 SEM_BRANCH_FINI (vpc); 1062 #undef FLD 1063 } 1064 NEXT (vpc); 1065 1066 CASE (sem, INSN_BCL8) : /* bcl.s $disp8 */ 1067 { 1068 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1069 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1070 #define FLD(f) abuf->fields.sfmt_bl8.f 1071 int UNUSED written = 0; 1072 IADDR UNUSED pc = abuf->addr; 1073 SEM_BRANCH_INIT 1074 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1075 1076 if (CPU (h_cond)) { 1077 { 1078 { 1079 SI opval = ADDSI (ANDSI (pc, -4), 4); 1080 CPU (h_gr[((UINT) 14)]) = opval; 1081 written |= (1 << 3); 1082 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1083 } 1084 { 1085 USI opval = FLD (i_disp8); 1086 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 1087 written |= (1 << 4); 1088 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1089 } 1090 } 1091 } 1092 1093 abuf->written = written; 1094 SEM_BRANCH_FINI (vpc); 1095 #undef FLD 1096 } 1097 NEXT (vpc); 1098 1099 CASE (sem, INSN_BCL24) : /* bcl.l $disp24 */ 1100 { 1101 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1102 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1103 #define FLD(f) abuf->fields.sfmt_bl24.f 1104 int UNUSED written = 0; 1105 IADDR UNUSED pc = abuf->addr; 1106 SEM_BRANCH_INIT 1107 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1108 1109 if (CPU (h_cond)) { 1110 { 1111 { 1112 SI opval = ADDSI (pc, 4); 1113 CPU (h_gr[((UINT) 14)]) = opval; 1114 written |= (1 << 3); 1115 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1116 } 1117 { 1118 USI opval = FLD (i_disp24); 1119 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 1120 written |= (1 << 4); 1121 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1122 } 1123 } 1124 } 1125 1126 abuf->written = written; 1127 SEM_BRANCH_FINI (vpc); 1128 #undef FLD 1129 } 1130 NEXT (vpc); 1131 1132 CASE (sem, INSN_BNC8) : /* bnc.s $disp8 */ 1133 { 1134 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1135 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1136 #define FLD(f) abuf->fields.sfmt_bl8.f 1137 int UNUSED written = 0; 1138 IADDR UNUSED pc = abuf->addr; 1139 SEM_BRANCH_INIT 1140 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1141 1142 if (NOTBI (CPU (h_cond))) { 1143 { 1144 USI opval = FLD (i_disp8); 1145 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 1146 written |= (1 << 2); 1147 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1148 } 1149 } 1150 1151 abuf->written = written; 1152 SEM_BRANCH_FINI (vpc); 1153 #undef FLD 1154 } 1155 NEXT (vpc); 1156 1157 CASE (sem, INSN_BNC24) : /* bnc.l $disp24 */ 1158 { 1159 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1160 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1161 #define FLD(f) abuf->fields.sfmt_bl24.f 1162 int UNUSED written = 0; 1163 IADDR UNUSED pc = abuf->addr; 1164 SEM_BRANCH_INIT 1165 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1166 1167 if (NOTBI (CPU (h_cond))) { 1168 { 1169 USI opval = FLD (i_disp24); 1170 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 1171 written |= (1 << 2); 1172 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1173 } 1174 } 1175 1176 abuf->written = written; 1177 SEM_BRANCH_FINI (vpc); 1178 #undef FLD 1179 } 1180 NEXT (vpc); 1181 1182 CASE (sem, INSN_BNE) : /* bne $src1,$src2,$disp16 */ 1183 { 1184 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1185 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1186 #define FLD(f) abuf->fields.sfmt_beq.f 1187 int UNUSED written = 0; 1188 IADDR UNUSED pc = abuf->addr; 1189 SEM_BRANCH_INIT 1190 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1191 1192 if (NESI (* FLD (i_src1), * FLD (i_src2))) { 1193 { 1194 USI opval = FLD (i_disp16); 1195 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 1196 written |= (1 << 3); 1197 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1198 } 1199 } 1200 1201 abuf->written = written; 1202 SEM_BRANCH_FINI (vpc); 1203 #undef FLD 1204 } 1205 NEXT (vpc); 1206 1207 CASE (sem, INSN_BRA8) : /* bra.s $disp8 */ 1208 { 1209 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1210 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1211 #define FLD(f) abuf->fields.sfmt_bl8.f 1212 int UNUSED written = 0; 1213 IADDR UNUSED pc = abuf->addr; 1214 SEM_BRANCH_INIT 1215 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1216 1217 { 1218 USI opval = FLD (i_disp8); 1219 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 1220 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1221 } 1222 1223 SEM_BRANCH_FINI (vpc); 1224 #undef FLD 1225 } 1226 NEXT (vpc); 1227 1228 CASE (sem, INSN_BRA24) : /* bra.l $disp24 */ 1229 { 1230 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1231 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1232 #define FLD(f) abuf->fields.sfmt_bl24.f 1233 int UNUSED written = 0; 1234 IADDR UNUSED pc = abuf->addr; 1235 SEM_BRANCH_INIT 1236 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1237 1238 { 1239 USI opval = FLD (i_disp24); 1240 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 1241 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1242 } 1243 1244 SEM_BRANCH_FINI (vpc); 1245 #undef FLD 1246 } 1247 NEXT (vpc); 1248 1249 CASE (sem, INSN_BNCL8) : /* bncl.s $disp8 */ 1250 { 1251 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1252 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1253 #define FLD(f) abuf->fields.sfmt_bl8.f 1254 int UNUSED written = 0; 1255 IADDR UNUSED pc = abuf->addr; 1256 SEM_BRANCH_INIT 1257 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1258 1259 if (NOTBI (CPU (h_cond))) { 1260 { 1261 { 1262 SI opval = ADDSI (ANDSI (pc, -4), 4); 1263 CPU (h_gr[((UINT) 14)]) = opval; 1264 written |= (1 << 3); 1265 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1266 } 1267 { 1268 USI opval = FLD (i_disp8); 1269 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 1270 written |= (1 << 4); 1271 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1272 } 1273 } 1274 } 1275 1276 abuf->written = written; 1277 SEM_BRANCH_FINI (vpc); 1278 #undef FLD 1279 } 1280 NEXT (vpc); 1281 1282 CASE (sem, INSN_BNCL24) : /* bncl.l $disp24 */ 1283 { 1284 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1285 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1286 #define FLD(f) abuf->fields.sfmt_bl24.f 1287 int UNUSED written = 0; 1288 IADDR UNUSED pc = abuf->addr; 1289 SEM_BRANCH_INIT 1290 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1291 1292 if (NOTBI (CPU (h_cond))) { 1293 { 1294 { 1295 SI opval = ADDSI (pc, 4); 1296 CPU (h_gr[((UINT) 14)]) = opval; 1297 written |= (1 << 3); 1298 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1299 } 1300 { 1301 USI opval = FLD (i_disp24); 1302 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 1303 written |= (1 << 4); 1304 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1305 } 1306 } 1307 } 1308 1309 abuf->written = written; 1310 SEM_BRANCH_FINI (vpc); 1311 #undef FLD 1312 } 1313 NEXT (vpc); 1314 1315 CASE (sem, INSN_CMP) : /* cmp $src1,$src2 */ 1316 { 1317 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1318 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1319 #define FLD(f) abuf->fields.sfmt_st_plus.f 1320 int UNUSED written = 0; 1321 IADDR UNUSED pc = abuf->addr; 1322 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1323 1324 { 1325 BI opval = LTSI (* FLD (i_src1), * FLD (i_src2)); 1326 CPU (h_cond) = opval; 1327 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 1328 } 1329 1330 #undef FLD 1331 } 1332 NEXT (vpc); 1333 1334 CASE (sem, INSN_CMPI) : /* cmpi $src2,$simm16 */ 1335 { 1336 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1337 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1338 #define FLD(f) abuf->fields.sfmt_st_d.f 1339 int UNUSED written = 0; 1340 IADDR UNUSED pc = abuf->addr; 1341 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1342 1343 { 1344 BI opval = LTSI (* FLD (i_src2), FLD (f_simm16)); 1345 CPU (h_cond) = opval; 1346 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 1347 } 1348 1349 #undef FLD 1350 } 1351 NEXT (vpc); 1352 1353 CASE (sem, INSN_CMPU) : /* cmpu $src1,$src2 */ 1354 { 1355 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1356 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1357 #define FLD(f) abuf->fields.sfmt_st_plus.f 1358 int UNUSED written = 0; 1359 IADDR UNUSED pc = abuf->addr; 1360 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1361 1362 { 1363 BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2)); 1364 CPU (h_cond) = opval; 1365 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 1366 } 1367 1368 #undef FLD 1369 } 1370 NEXT (vpc); 1371 1372 CASE (sem, INSN_CMPUI) : /* cmpui $src2,$simm16 */ 1373 { 1374 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1375 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1376 #define FLD(f) abuf->fields.sfmt_st_d.f 1377 int UNUSED written = 0; 1378 IADDR UNUSED pc = abuf->addr; 1379 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1380 1381 { 1382 BI opval = LTUSI (* FLD (i_src2), FLD (f_simm16)); 1383 CPU (h_cond) = opval; 1384 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 1385 } 1386 1387 #undef FLD 1388 } 1389 NEXT (vpc); 1390 1391 CASE (sem, INSN_CMPEQ) : /* cmpeq $src1,$src2 */ 1392 { 1393 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1394 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1395 #define FLD(f) abuf->fields.sfmt_st_plus.f 1396 int UNUSED written = 0; 1397 IADDR UNUSED pc = abuf->addr; 1398 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1399 1400 { 1401 BI opval = EQSI (* FLD (i_src1), * FLD (i_src2)); 1402 CPU (h_cond) = opval; 1403 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 1404 } 1405 1406 #undef FLD 1407 } 1408 NEXT (vpc); 1409 1410 CASE (sem, INSN_CMPZ) : /* cmpz $src2 */ 1411 { 1412 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1413 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1414 #define FLD(f) abuf->fields.sfmt_st_plus.f 1415 int UNUSED written = 0; 1416 IADDR UNUSED pc = abuf->addr; 1417 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1418 1419 { 1420 BI opval = EQSI (* FLD (i_src2), 0); 1421 CPU (h_cond) = opval; 1422 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 1423 } 1424 1425 #undef FLD 1426 } 1427 NEXT (vpc); 1428 1429 CASE (sem, INSN_DIV) : /* div $dr,$sr */ 1430 { 1431 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1432 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1433 #define FLD(f) abuf->fields.sfmt_add.f 1434 int UNUSED written = 0; 1435 IADDR UNUSED pc = abuf->addr; 1436 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1437 1438 if (NESI (* FLD (i_sr), 0)) { 1439 { 1440 SI opval = DIVSI (* FLD (i_dr), * FLD (i_sr)); 1441 * FLD (i_dr) = opval; 1442 written |= (1 << 2); 1443 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1444 } 1445 } 1446 1447 abuf->written = written; 1448 #undef FLD 1449 } 1450 NEXT (vpc); 1451 1452 CASE (sem, INSN_DIVU) : /* divu $dr,$sr */ 1453 { 1454 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1455 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1456 #define FLD(f) abuf->fields.sfmt_add.f 1457 int UNUSED written = 0; 1458 IADDR UNUSED pc = abuf->addr; 1459 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1460 1461 if (NESI (* FLD (i_sr), 0)) { 1462 { 1463 SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr)); 1464 * FLD (i_dr) = opval; 1465 written |= (1 << 2); 1466 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1467 } 1468 } 1469 1470 abuf->written = written; 1471 #undef FLD 1472 } 1473 NEXT (vpc); 1474 1475 CASE (sem, INSN_REM) : /* rem $dr,$sr */ 1476 { 1477 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1478 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1479 #define FLD(f) abuf->fields.sfmt_add.f 1480 int UNUSED written = 0; 1481 IADDR UNUSED pc = abuf->addr; 1482 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1483 1484 if (NESI (* FLD (i_sr), 0)) { 1485 { 1486 SI opval = MODSI (* FLD (i_dr), * FLD (i_sr)); 1487 * FLD (i_dr) = opval; 1488 written |= (1 << 2); 1489 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1490 } 1491 } 1492 1493 abuf->written = written; 1494 #undef FLD 1495 } 1496 NEXT (vpc); 1497 1498 CASE (sem, INSN_REMU) : /* remu $dr,$sr */ 1499 { 1500 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1501 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1502 #define FLD(f) abuf->fields.sfmt_add.f 1503 int UNUSED written = 0; 1504 IADDR UNUSED pc = abuf->addr; 1505 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1506 1507 if (NESI (* FLD (i_sr), 0)) { 1508 { 1509 SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr)); 1510 * FLD (i_dr) = opval; 1511 written |= (1 << 2); 1512 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1513 } 1514 } 1515 1516 abuf->written = written; 1517 #undef FLD 1518 } 1519 NEXT (vpc); 1520 1521 CASE (sem, INSN_DIVH) : /* divh $dr,$sr */ 1522 { 1523 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1524 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1525 #define FLD(f) abuf->fields.sfmt_add.f 1526 int UNUSED written = 0; 1527 IADDR UNUSED pc = abuf->addr; 1528 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1529 1530 if (NESI (* FLD (i_sr), 0)) { 1531 { 1532 SI opval = DIVSI (EXTHISI (TRUNCSIHI (* FLD (i_dr))), * FLD (i_sr)); 1533 * FLD (i_dr) = opval; 1534 written |= (1 << 2); 1535 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1536 } 1537 } 1538 1539 abuf->written = written; 1540 #undef FLD 1541 } 1542 NEXT (vpc); 1543 1544 CASE (sem, INSN_JC) : /* jc $sr */ 1545 { 1546 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1547 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1548 #define FLD(f) abuf->fields.sfmt_jl.f 1549 int UNUSED written = 0; 1550 IADDR UNUSED pc = abuf->addr; 1551 SEM_BRANCH_INIT 1552 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1553 1554 if (CPU (h_cond)) { 1555 { 1556 USI opval = ANDSI (* FLD (i_sr), -4); 1557 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 1558 written |= (1 << 2); 1559 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1560 } 1561 } 1562 1563 abuf->written = written; 1564 SEM_BRANCH_FINI (vpc); 1565 #undef FLD 1566 } 1567 NEXT (vpc); 1568 1569 CASE (sem, INSN_JNC) : /* jnc $sr */ 1570 { 1571 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1572 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1573 #define FLD(f) abuf->fields.sfmt_jl.f 1574 int UNUSED written = 0; 1575 IADDR UNUSED pc = abuf->addr; 1576 SEM_BRANCH_INIT 1577 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1578 1579 if (NOTBI (CPU (h_cond))) { 1580 { 1581 USI opval = ANDSI (* FLD (i_sr), -4); 1582 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 1583 written |= (1 << 2); 1584 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1585 } 1586 } 1587 1588 abuf->written = written; 1589 SEM_BRANCH_FINI (vpc); 1590 #undef FLD 1591 } 1592 NEXT (vpc); 1593 1594 CASE (sem, INSN_JL) : /* jl $sr */ 1595 { 1596 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1597 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1598 #define FLD(f) abuf->fields.sfmt_jl.f 1599 int UNUSED written = 0; 1600 IADDR UNUSED pc = abuf->addr; 1601 SEM_BRANCH_INIT 1602 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1603 1604 { 1605 SI temp0;USI temp1; 1606 temp0 = ADDSI (ANDSI (pc, -4), 4); 1607 temp1 = ANDSI (* FLD (i_sr), -4); 1608 { 1609 SI opval = temp0; 1610 CPU (h_gr[((UINT) 14)]) = opval; 1611 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1612 } 1613 { 1614 USI opval = temp1; 1615 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 1616 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1617 } 1618 } 1619 1620 SEM_BRANCH_FINI (vpc); 1621 #undef FLD 1622 } 1623 NEXT (vpc); 1624 1625 CASE (sem, INSN_JMP) : /* jmp $sr */ 1626 { 1627 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1628 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1629 #define FLD(f) abuf->fields.sfmt_jl.f 1630 int UNUSED written = 0; 1631 IADDR UNUSED pc = abuf->addr; 1632 SEM_BRANCH_INIT 1633 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1634 1635 { 1636 USI opval = ANDSI (* FLD (i_sr), -4); 1637 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 1638 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1639 } 1640 1641 SEM_BRANCH_FINI (vpc); 1642 #undef FLD 1643 } 1644 NEXT (vpc); 1645 1646 CASE (sem, INSN_LD) : /* ld $dr,@$sr */ 1647 { 1648 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1649 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1650 #define FLD(f) abuf->fields.sfmt_ld_plus.f 1651 int UNUSED written = 0; 1652 IADDR UNUSED pc = abuf->addr; 1653 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1654 1655 { 1656 SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr)); 1657 * FLD (i_dr) = opval; 1658 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1659 } 1660 1661 #undef FLD 1662 } 1663 NEXT (vpc); 1664 1665 CASE (sem, INSN_LD_D) : /* ld $dr,@($slo16,$sr) */ 1666 { 1667 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1668 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1669 #define FLD(f) abuf->fields.sfmt_add3.f 1670 int UNUSED written = 0; 1671 IADDR UNUSED pc = abuf->addr; 1672 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1673 1674 { 1675 SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))); 1676 * FLD (i_dr) = opval; 1677 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1678 } 1679 1680 #undef FLD 1681 } 1682 NEXT (vpc); 1683 1684 CASE (sem, INSN_LDB) : /* ldb $dr,@$sr */ 1685 { 1686 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1687 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1688 #define FLD(f) abuf->fields.sfmt_ld_plus.f 1689 int UNUSED written = 0; 1690 IADDR UNUSED pc = abuf->addr; 1691 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1692 1693 { 1694 SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr))); 1695 * FLD (i_dr) = opval; 1696 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1697 } 1698 1699 #undef FLD 1700 } 1701 NEXT (vpc); 1702 1703 CASE (sem, INSN_LDB_D) : /* ldb $dr,@($slo16,$sr) */ 1704 { 1705 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1706 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1707 #define FLD(f) abuf->fields.sfmt_add3.f 1708 int UNUSED written = 0; 1709 IADDR UNUSED pc = abuf->addr; 1710 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1711 1712 { 1713 SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); 1714 * FLD (i_dr) = opval; 1715 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1716 } 1717 1718 #undef FLD 1719 } 1720 NEXT (vpc); 1721 1722 CASE (sem, INSN_LDH) : /* ldh $dr,@$sr */ 1723 { 1724 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1725 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1726 #define FLD(f) abuf->fields.sfmt_ld_plus.f 1727 int UNUSED written = 0; 1728 IADDR UNUSED pc = abuf->addr; 1729 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1730 1731 { 1732 SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr))); 1733 * FLD (i_dr) = opval; 1734 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1735 } 1736 1737 #undef FLD 1738 } 1739 NEXT (vpc); 1740 1741 CASE (sem, INSN_LDH_D) : /* ldh $dr,@($slo16,$sr) */ 1742 { 1743 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1744 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1745 #define FLD(f) abuf->fields.sfmt_add3.f 1746 int UNUSED written = 0; 1747 IADDR UNUSED pc = abuf->addr; 1748 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1749 1750 { 1751 SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); 1752 * FLD (i_dr) = opval; 1753 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1754 } 1755 1756 #undef FLD 1757 } 1758 NEXT (vpc); 1759 1760 CASE (sem, INSN_LDUB) : /* ldub $dr,@$sr */ 1761 { 1762 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1763 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1764 #define FLD(f) abuf->fields.sfmt_ld_plus.f 1765 int UNUSED written = 0; 1766 IADDR UNUSED pc = abuf->addr; 1767 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1768 1769 { 1770 SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr))); 1771 * FLD (i_dr) = opval; 1772 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1773 } 1774 1775 #undef FLD 1776 } 1777 NEXT (vpc); 1778 1779 CASE (sem, INSN_LDUB_D) : /* ldub $dr,@($slo16,$sr) */ 1780 { 1781 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1782 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1783 #define FLD(f) abuf->fields.sfmt_add3.f 1784 int UNUSED written = 0; 1785 IADDR UNUSED pc = abuf->addr; 1786 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1787 1788 { 1789 SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); 1790 * FLD (i_dr) = opval; 1791 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1792 } 1793 1794 #undef FLD 1795 } 1796 NEXT (vpc); 1797 1798 CASE (sem, INSN_LDUH) : /* lduh $dr,@$sr */ 1799 { 1800 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1801 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1802 #define FLD(f) abuf->fields.sfmt_ld_plus.f 1803 int UNUSED written = 0; 1804 IADDR UNUSED pc = abuf->addr; 1805 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1806 1807 { 1808 SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr))); 1809 * FLD (i_dr) = opval; 1810 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1811 } 1812 1813 #undef FLD 1814 } 1815 NEXT (vpc); 1816 1817 CASE (sem, INSN_LDUH_D) : /* lduh $dr,@($slo16,$sr) */ 1818 { 1819 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1820 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1821 #define FLD(f) abuf->fields.sfmt_add3.f 1822 int UNUSED written = 0; 1823 IADDR UNUSED pc = abuf->addr; 1824 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1825 1826 { 1827 SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); 1828 * FLD (i_dr) = opval; 1829 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1830 } 1831 1832 #undef FLD 1833 } 1834 NEXT (vpc); 1835 1836 CASE (sem, INSN_LD_PLUS) : /* ld $dr,@$sr+ */ 1837 { 1838 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1839 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1840 #define FLD(f) abuf->fields.sfmt_ld_plus.f 1841 int UNUSED written = 0; 1842 IADDR UNUSED pc = abuf->addr; 1843 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1844 1845 { 1846 SI temp0;SI temp1; 1847 temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr)); 1848 temp1 = ADDSI (* FLD (i_sr), 4); 1849 { 1850 SI opval = temp0; 1851 * FLD (i_dr) = opval; 1852 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1853 } 1854 { 1855 SI opval = temp1; 1856 * FLD (i_sr) = opval; 1857 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1858 } 1859 } 1860 1861 #undef FLD 1862 } 1863 NEXT (vpc); 1864 1865 CASE (sem, INSN_LD24) : /* ld24 $dr,$uimm24 */ 1866 { 1867 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1868 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1869 #define FLD(f) abuf->fields.sfmt_ld24.f 1870 int UNUSED written = 0; 1871 IADDR UNUSED pc = abuf->addr; 1872 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1873 1874 { 1875 SI opval = FLD (i_uimm24); 1876 * FLD (i_dr) = opval; 1877 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1878 } 1879 1880 #undef FLD 1881 } 1882 NEXT (vpc); 1883 1884 CASE (sem, INSN_LDI8) : /* ldi8 $dr,$simm8 */ 1885 { 1886 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1887 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1888 #define FLD(f) abuf->fields.sfmt_addi.f 1889 int UNUSED written = 0; 1890 IADDR UNUSED pc = abuf->addr; 1891 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1892 1893 { 1894 SI opval = FLD (f_simm8); 1895 * FLD (i_dr) = opval; 1896 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1897 } 1898 1899 #undef FLD 1900 } 1901 NEXT (vpc); 1902 1903 CASE (sem, INSN_LDI16) : /* ldi16 $dr,$hash$slo16 */ 1904 { 1905 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1906 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1907 #define FLD(f) abuf->fields.sfmt_add3.f 1908 int UNUSED written = 0; 1909 IADDR UNUSED pc = abuf->addr; 1910 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1911 1912 { 1913 SI opval = FLD (f_simm16); 1914 * FLD (i_dr) = opval; 1915 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1916 } 1917 1918 #undef FLD 1919 } 1920 NEXT (vpc); 1921 1922 CASE (sem, INSN_LOCK) : /* lock $dr,@$sr */ 1923 { 1924 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1925 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1926 #define FLD(f) abuf->fields.sfmt_ld_plus.f 1927 int UNUSED written = 0; 1928 IADDR UNUSED pc = abuf->addr; 1929 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1930 1931 { 1932 { 1933 BI opval = 1; 1934 CPU (h_lock) = opval; 1935 TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval); 1936 } 1937 { 1938 SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr)); 1939 * FLD (i_dr) = opval; 1940 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1941 } 1942 } 1943 1944 #undef FLD 1945 } 1946 NEXT (vpc); 1947 1948 CASE (sem, INSN_MACHI_A) : /* machi $src1,$src2,$acc */ 1949 { 1950 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1951 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1952 #define FLD(f) abuf->fields.sfmt_machi_a.f 1953 int UNUSED written = 0; 1954 IADDR UNUSED pc = abuf->addr; 1955 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1956 1957 { 1958 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8); 1959 SET_H_ACCUMS (FLD (f_acc), opval); 1960 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 1961 } 1962 1963 #undef FLD 1964 } 1965 NEXT (vpc); 1966 1967 CASE (sem, INSN_MACLO_A) : /* maclo $src1,$src2,$acc */ 1968 { 1969 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1970 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1971 #define FLD(f) abuf->fields.sfmt_machi_a.f 1972 int UNUSED written = 0; 1973 IADDR UNUSED pc = abuf->addr; 1974 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1975 1976 { 1977 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8); 1978 SET_H_ACCUMS (FLD (f_acc), opval); 1979 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 1980 } 1981 1982 #undef FLD 1983 } 1984 NEXT (vpc); 1985 1986 CASE (sem, INSN_MACWHI_A) : /* macwhi $src1,$src2,$acc */ 1987 { 1988 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1989 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1990 #define FLD(f) abuf->fields.sfmt_machi_a.f 1991 int UNUSED written = 0; 1992 IADDR UNUSED pc = abuf->addr; 1993 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1994 1995 { 1996 DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))); 1997 SET_H_ACCUMS (FLD (f_acc), opval); 1998 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 1999 } 2000 2001 #undef FLD 2002 } 2003 NEXT (vpc); 2004 2005 CASE (sem, INSN_MACWLO_A) : /* macwlo $src1,$src2,$acc */ 2006 { 2007 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2008 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2009 #define FLD(f) abuf->fields.sfmt_machi_a.f 2010 int UNUSED written = 0; 2011 IADDR UNUSED pc = abuf->addr; 2012 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2013 2014 { 2015 DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))); 2016 SET_H_ACCUMS (FLD (f_acc), opval); 2017 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 2018 } 2019 2020 #undef FLD 2021 } 2022 NEXT (vpc); 2023 2024 CASE (sem, INSN_MUL) : /* mul $dr,$sr */ 2025 { 2026 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2027 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2028 #define FLD(f) abuf->fields.sfmt_add.f 2029 int UNUSED written = 0; 2030 IADDR UNUSED pc = abuf->addr; 2031 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2032 2033 { 2034 SI opval = MULSI (* FLD (i_dr), * FLD (i_sr)); 2035 * FLD (i_dr) = opval; 2036 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2037 } 2038 2039 #undef FLD 2040 } 2041 NEXT (vpc); 2042 2043 CASE (sem, INSN_MULHI_A) : /* mulhi $src1,$src2,$acc */ 2044 { 2045 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2046 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2047 #define FLD(f) abuf->fields.sfmt_machi_a.f 2048 int UNUSED written = 0; 2049 IADDR UNUSED pc = abuf->addr; 2050 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2051 2052 { 2053 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16); 2054 SET_H_ACCUMS (FLD (f_acc), opval); 2055 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 2056 } 2057 2058 #undef FLD 2059 } 2060 NEXT (vpc); 2061 2062 CASE (sem, INSN_MULLO_A) : /* mullo $src1,$src2,$acc */ 2063 { 2064 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2065 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2066 #define FLD(f) abuf->fields.sfmt_machi_a.f 2067 int UNUSED written = 0; 2068 IADDR UNUSED pc = abuf->addr; 2069 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2070 2071 { 2072 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16); 2073 SET_H_ACCUMS (FLD (f_acc), opval); 2074 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 2075 } 2076 2077 #undef FLD 2078 } 2079 NEXT (vpc); 2080 2081 CASE (sem, INSN_MULWHI_A) : /* mulwhi $src1,$src2,$acc */ 2082 { 2083 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2084 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2085 #define FLD(f) abuf->fields.sfmt_machi_a.f 2086 int UNUSED written = 0; 2087 IADDR UNUSED pc = abuf->addr; 2088 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2089 2090 { 2091 DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))); 2092 SET_H_ACCUMS (FLD (f_acc), opval); 2093 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 2094 } 2095 2096 #undef FLD 2097 } 2098 NEXT (vpc); 2099 2100 CASE (sem, INSN_MULWLO_A) : /* mulwlo $src1,$src2,$acc */ 2101 { 2102 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2103 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2104 #define FLD(f) abuf->fields.sfmt_machi_a.f 2105 int UNUSED written = 0; 2106 IADDR UNUSED pc = abuf->addr; 2107 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2108 2109 { 2110 DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))); 2111 SET_H_ACCUMS (FLD (f_acc), opval); 2112 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 2113 } 2114 2115 #undef FLD 2116 } 2117 NEXT (vpc); 2118 2119 CASE (sem, INSN_MV) : /* mv $dr,$sr */ 2120 { 2121 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2122 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2123 #define FLD(f) abuf->fields.sfmt_ld_plus.f 2124 int UNUSED written = 0; 2125 IADDR UNUSED pc = abuf->addr; 2126 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2127 2128 { 2129 SI opval = * FLD (i_sr); 2130 * FLD (i_dr) = opval; 2131 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2132 } 2133 2134 #undef FLD 2135 } 2136 NEXT (vpc); 2137 2138 CASE (sem, INSN_MVFACHI_A) : /* mvfachi $dr,$accs */ 2139 { 2140 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2141 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2142 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f 2143 int UNUSED written = 0; 2144 IADDR UNUSED pc = abuf->addr; 2145 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2146 2147 { 2148 SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 32)); 2149 * FLD (i_dr) = opval; 2150 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2151 } 2152 2153 #undef FLD 2154 } 2155 NEXT (vpc); 2156 2157 CASE (sem, INSN_MVFACLO_A) : /* mvfaclo $dr,$accs */ 2158 { 2159 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2160 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2161 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f 2162 int UNUSED written = 0; 2163 IADDR UNUSED pc = abuf->addr; 2164 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2165 2166 { 2167 SI opval = TRUNCDISI (GET_H_ACCUMS (FLD (f_accs))); 2168 * FLD (i_dr) = opval; 2169 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2170 } 2171 2172 #undef FLD 2173 } 2174 NEXT (vpc); 2175 2176 CASE (sem, INSN_MVFACMI_A) : /* mvfacmi $dr,$accs */ 2177 { 2178 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2179 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2180 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f 2181 int UNUSED written = 0; 2182 IADDR UNUSED pc = abuf->addr; 2183 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2184 2185 { 2186 SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 16)); 2187 * FLD (i_dr) = opval; 2188 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2189 } 2190 2191 #undef FLD 2192 } 2193 NEXT (vpc); 2194 2195 CASE (sem, INSN_MVFC) : /* mvfc $dr,$scr */ 2196 { 2197 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2198 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2199 #define FLD(f) abuf->fields.sfmt_ld_plus.f 2200 int UNUSED written = 0; 2201 IADDR UNUSED pc = abuf->addr; 2202 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2203 2204 { 2205 SI opval = GET_H_CR (FLD (f_r2)); 2206 * FLD (i_dr) = opval; 2207 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2208 } 2209 2210 #undef FLD 2211 } 2212 NEXT (vpc); 2213 2214 CASE (sem, INSN_MVTACHI_A) : /* mvtachi $src1,$accs */ 2215 { 2216 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2217 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2218 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f 2219 int UNUSED written = 0; 2220 IADDR UNUSED pc = abuf->addr; 2221 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2222 2223 { 2224 DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32)); 2225 SET_H_ACCUMS (FLD (f_accs), opval); 2226 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 2227 } 2228 2229 #undef FLD 2230 } 2231 NEXT (vpc); 2232 2233 CASE (sem, INSN_MVTACLO_A) : /* mvtaclo $src1,$accs */ 2234 { 2235 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2236 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2237 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f 2238 int UNUSED written = 0; 2239 IADDR UNUSED pc = abuf->addr; 2240 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2241 2242 { 2243 DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1))); 2244 SET_H_ACCUMS (FLD (f_accs), opval); 2245 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 2246 } 2247 2248 #undef FLD 2249 } 2250 NEXT (vpc); 2251 2252 CASE (sem, INSN_MVTC) : /* mvtc $sr,$dcr */ 2253 { 2254 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2255 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2256 #define FLD(f) abuf->fields.sfmt_ld_plus.f 2257 int UNUSED written = 0; 2258 IADDR UNUSED pc = abuf->addr; 2259 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2260 2261 { 2262 USI opval = * FLD (i_sr); 2263 SET_H_CR (FLD (f_r1), opval); 2264 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 2265 } 2266 2267 #undef FLD 2268 } 2269 NEXT (vpc); 2270 2271 CASE (sem, INSN_NEG) : /* neg $dr,$sr */ 2272 { 2273 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2274 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2275 #define FLD(f) abuf->fields.sfmt_ld_plus.f 2276 int UNUSED written = 0; 2277 IADDR UNUSED pc = abuf->addr; 2278 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2279 2280 { 2281 SI opval = NEGSI (* FLD (i_sr)); 2282 * FLD (i_dr) = opval; 2283 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2284 } 2285 2286 #undef FLD 2287 } 2288 NEXT (vpc); 2289 2290 CASE (sem, INSN_NOP) : /* nop */ 2291 { 2292 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2293 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2294 #define FLD(f) abuf->fields.sfmt_empty.f 2295 int UNUSED written = 0; 2296 IADDR UNUSED pc = abuf->addr; 2297 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2298 2299 PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr); 2300 2301 #undef FLD 2302 } 2303 NEXT (vpc); 2304 2305 CASE (sem, INSN_NOT) : /* not $dr,$sr */ 2306 { 2307 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2308 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2309 #define FLD(f) abuf->fields.sfmt_ld_plus.f 2310 int UNUSED written = 0; 2311 IADDR UNUSED pc = abuf->addr; 2312 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2313 2314 { 2315 SI opval = INVSI (* FLD (i_sr)); 2316 * FLD (i_dr) = opval; 2317 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2318 } 2319 2320 #undef FLD 2321 } 2322 NEXT (vpc); 2323 2324 CASE (sem, INSN_RAC_DSI) : /* rac $accd,$accs,$imm1 */ 2325 { 2326 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2327 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2328 #define FLD(f) abuf->fields.sfmt_rac_dsi.f 2329 int UNUSED written = 0; 2330 IADDR UNUSED pc = abuf->addr; 2331 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2332 2333 { 2334 DI tmp_tmp1; 2335 tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1)); 2336 tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768)); 2337 { 2338 DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000))); 2339 SET_H_ACCUMS (FLD (f_accd), opval); 2340 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 2341 } 2342 } 2343 2344 #undef FLD 2345 } 2346 NEXT (vpc); 2347 2348 CASE (sem, INSN_RACH_DSI) : /* rach $accd,$accs,$imm1 */ 2349 { 2350 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2351 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2352 #define FLD(f) abuf->fields.sfmt_rac_dsi.f 2353 int UNUSED written = 0; 2354 IADDR UNUSED pc = abuf->addr; 2355 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2356 2357 { 2358 DI tmp_tmp1; 2359 tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1)); 2360 tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000)); 2361 { 2362 DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0))); 2363 SET_H_ACCUMS (FLD (f_accd), opval); 2364 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 2365 } 2366 } 2367 2368 #undef FLD 2369 } 2370 NEXT (vpc); 2371 2372 CASE (sem, INSN_RTE) : /* rte */ 2373 { 2374 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2375 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2376 #define FLD(f) abuf->fields.sfmt_empty.f 2377 int UNUSED written = 0; 2378 IADDR UNUSED pc = abuf->addr; 2379 SEM_BRANCH_INIT 2380 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2381 2382 { 2383 { 2384 USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4); 2385 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 2386 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 2387 } 2388 { 2389 USI opval = GET_H_CR (((UINT) 14)); 2390 SET_H_CR (((UINT) 6), opval); 2391 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 2392 } 2393 { 2394 UQI opval = CPU (h_bpsw); 2395 SET_H_PSW (opval); 2396 TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval); 2397 } 2398 { 2399 UQI opval = CPU (h_bbpsw); 2400 CPU (h_bpsw) = opval; 2401 TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval); 2402 } 2403 } 2404 2405 SEM_BRANCH_FINI (vpc); 2406 #undef FLD 2407 } 2408 NEXT (vpc); 2409 2410 CASE (sem, INSN_SETH) : /* seth $dr,$hash$hi16 */ 2411 { 2412 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2413 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2414 #define FLD(f) abuf->fields.sfmt_seth.f 2415 int UNUSED written = 0; 2416 IADDR UNUSED pc = abuf->addr; 2417 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2418 2419 { 2420 SI opval = SLLSI (FLD (f_hi16), 16); 2421 * FLD (i_dr) = opval; 2422 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2423 } 2424 2425 #undef FLD 2426 } 2427 NEXT (vpc); 2428 2429 CASE (sem, INSN_SLL) : /* sll $dr,$sr */ 2430 { 2431 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2432 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2433 #define FLD(f) abuf->fields.sfmt_add.f 2434 int UNUSED written = 0; 2435 IADDR UNUSED pc = abuf->addr; 2436 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2437 2438 { 2439 SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); 2440 * FLD (i_dr) = opval; 2441 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2442 } 2443 2444 #undef FLD 2445 } 2446 NEXT (vpc); 2447 2448 CASE (sem, INSN_SLL3) : /* sll3 $dr,$sr,$simm16 */ 2449 { 2450 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2451 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2452 #define FLD(f) abuf->fields.sfmt_add3.f 2453 int UNUSED written = 0; 2454 IADDR UNUSED pc = abuf->addr; 2455 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2456 2457 { 2458 SI opval = SLLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31)); 2459 * FLD (i_dr) = opval; 2460 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2461 } 2462 2463 #undef FLD 2464 } 2465 NEXT (vpc); 2466 2467 CASE (sem, INSN_SLLI) : /* slli $dr,$uimm5 */ 2468 { 2469 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2470 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2471 #define FLD(f) abuf->fields.sfmt_slli.f 2472 int UNUSED written = 0; 2473 IADDR UNUSED pc = abuf->addr; 2474 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2475 2476 { 2477 SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5)); 2478 * FLD (i_dr) = opval; 2479 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2480 } 2481 2482 #undef FLD 2483 } 2484 NEXT (vpc); 2485 2486 CASE (sem, INSN_SRA) : /* sra $dr,$sr */ 2487 { 2488 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2489 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2490 #define FLD(f) abuf->fields.sfmt_add.f 2491 int UNUSED written = 0; 2492 IADDR UNUSED pc = abuf->addr; 2493 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2494 2495 { 2496 SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); 2497 * FLD (i_dr) = opval; 2498 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2499 } 2500 2501 #undef FLD 2502 } 2503 NEXT (vpc); 2504 2505 CASE (sem, INSN_SRA3) : /* sra3 $dr,$sr,$simm16 */ 2506 { 2507 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2508 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2509 #define FLD(f) abuf->fields.sfmt_add3.f 2510 int UNUSED written = 0; 2511 IADDR UNUSED pc = abuf->addr; 2512 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2513 2514 { 2515 SI opval = SRASI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31)); 2516 * FLD (i_dr) = opval; 2517 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2518 } 2519 2520 #undef FLD 2521 } 2522 NEXT (vpc); 2523 2524 CASE (sem, INSN_SRAI) : /* srai $dr,$uimm5 */ 2525 { 2526 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2527 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2528 #define FLD(f) abuf->fields.sfmt_slli.f 2529 int UNUSED written = 0; 2530 IADDR UNUSED pc = abuf->addr; 2531 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2532 2533 { 2534 SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5)); 2535 * FLD (i_dr) = opval; 2536 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2537 } 2538 2539 #undef FLD 2540 } 2541 NEXT (vpc); 2542 2543 CASE (sem, INSN_SRL) : /* srl $dr,$sr */ 2544 { 2545 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2546 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2547 #define FLD(f) abuf->fields.sfmt_add.f 2548 int UNUSED written = 0; 2549 IADDR UNUSED pc = abuf->addr; 2550 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2551 2552 { 2553 SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); 2554 * FLD (i_dr) = opval; 2555 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2556 } 2557 2558 #undef FLD 2559 } 2560 NEXT (vpc); 2561 2562 CASE (sem, INSN_SRL3) : /* srl3 $dr,$sr,$simm16 */ 2563 { 2564 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2565 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2566 #define FLD(f) abuf->fields.sfmt_add3.f 2567 int UNUSED written = 0; 2568 IADDR UNUSED pc = abuf->addr; 2569 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2570 2571 { 2572 SI opval = SRLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31)); 2573 * FLD (i_dr) = opval; 2574 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2575 } 2576 2577 #undef FLD 2578 } 2579 NEXT (vpc); 2580 2581 CASE (sem, INSN_SRLI) : /* srli $dr,$uimm5 */ 2582 { 2583 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2584 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2585 #define FLD(f) abuf->fields.sfmt_slli.f 2586 int UNUSED written = 0; 2587 IADDR UNUSED pc = abuf->addr; 2588 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2589 2590 { 2591 SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5)); 2592 * FLD (i_dr) = opval; 2593 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2594 } 2595 2596 #undef FLD 2597 } 2598 NEXT (vpc); 2599 2600 CASE (sem, INSN_ST) : /* st $src1,@$src2 */ 2601 { 2602 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2603 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2604 #define FLD(f) abuf->fields.sfmt_st_plus.f 2605 int UNUSED written = 0; 2606 IADDR UNUSED pc = abuf->addr; 2607 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2608 2609 { 2610 SI opval = * FLD (i_src1); 2611 SETMEMSI (current_cpu, pc, * FLD (i_src2), opval); 2612 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2613 } 2614 2615 #undef FLD 2616 } 2617 NEXT (vpc); 2618 2619 CASE (sem, INSN_ST_D) : /* st $src1,@($slo16,$src2) */ 2620 { 2621 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2622 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2623 #define FLD(f) abuf->fields.sfmt_st_d.f 2624 int UNUSED written = 0; 2625 IADDR UNUSED pc = abuf->addr; 2626 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2627 2628 { 2629 SI opval = * FLD (i_src1); 2630 SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval); 2631 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2632 } 2633 2634 #undef FLD 2635 } 2636 NEXT (vpc); 2637 2638 CASE (sem, INSN_STB) : /* stb $src1,@$src2 */ 2639 { 2640 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2641 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2642 #define FLD(f) abuf->fields.sfmt_st_plus.f 2643 int UNUSED written = 0; 2644 IADDR UNUSED pc = abuf->addr; 2645 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2646 2647 { 2648 QI opval = * FLD (i_src1); 2649 SETMEMQI (current_cpu, pc, * FLD (i_src2), opval); 2650 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2651 } 2652 2653 #undef FLD 2654 } 2655 NEXT (vpc); 2656 2657 CASE (sem, INSN_STB_D) : /* stb $src1,@($slo16,$src2) */ 2658 { 2659 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2660 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2661 #define FLD(f) abuf->fields.sfmt_st_d.f 2662 int UNUSED written = 0; 2663 IADDR UNUSED pc = abuf->addr; 2664 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2665 2666 { 2667 QI opval = * FLD (i_src1); 2668 SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval); 2669 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2670 } 2671 2672 #undef FLD 2673 } 2674 NEXT (vpc); 2675 2676 CASE (sem, INSN_STH) : /* sth $src1,@$src2 */ 2677 { 2678 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2679 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2680 #define FLD(f) abuf->fields.sfmt_st_plus.f 2681 int UNUSED written = 0; 2682 IADDR UNUSED pc = abuf->addr; 2683 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2684 2685 { 2686 HI opval = * FLD (i_src1); 2687 SETMEMHI (current_cpu, pc, * FLD (i_src2), opval); 2688 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2689 } 2690 2691 #undef FLD 2692 } 2693 NEXT (vpc); 2694 2695 CASE (sem, INSN_STH_D) : /* sth $src1,@($slo16,$src2) */ 2696 { 2697 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2698 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2699 #define FLD(f) abuf->fields.sfmt_st_d.f 2700 int UNUSED written = 0; 2701 IADDR UNUSED pc = abuf->addr; 2702 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2703 2704 { 2705 HI opval = * FLD (i_src1); 2706 SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval); 2707 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2708 } 2709 2710 #undef FLD 2711 } 2712 NEXT (vpc); 2713 2714 CASE (sem, INSN_ST_PLUS) : /* st $src1,@+$src2 */ 2715 { 2716 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2717 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2718 #define FLD(f) abuf->fields.sfmt_st_plus.f 2719 int UNUSED written = 0; 2720 IADDR UNUSED pc = abuf->addr; 2721 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2722 2723 { 2724 SI tmp_new_src2; 2725 tmp_new_src2 = ADDSI (* FLD (i_src2), 4); 2726 { 2727 SI opval = * FLD (i_src1); 2728 SETMEMSI (current_cpu, pc, tmp_new_src2, opval); 2729 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2730 } 2731 { 2732 SI opval = tmp_new_src2; 2733 * FLD (i_src2) = opval; 2734 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2735 } 2736 } 2737 2738 #undef FLD 2739 } 2740 NEXT (vpc); 2741 2742 CASE (sem, INSN_STH_PLUS) : /* sth $src1,@$src2+ */ 2743 { 2744 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2745 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2746 #define FLD(f) abuf->fields.sfmt_st_plus.f 2747 int UNUSED written = 0; 2748 IADDR UNUSED pc = abuf->addr; 2749 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2750 2751 { 2752 SI tmp_new_src2; 2753 tmp_new_src2 = * FLD (i_src2); 2754 { 2755 HI opval = * FLD (i_src1); 2756 SETMEMHI (current_cpu, pc, tmp_new_src2, opval); 2757 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2758 } 2759 { 2760 SI opval = ADDSI (tmp_new_src2, 2); 2761 * FLD (i_src2) = opval; 2762 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2763 } 2764 } 2765 2766 #undef FLD 2767 } 2768 NEXT (vpc); 2769 2770 CASE (sem, INSN_STB_PLUS) : /* stb $src1,@$src2+ */ 2771 { 2772 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2773 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2774 #define FLD(f) abuf->fields.sfmt_st_plus.f 2775 int UNUSED written = 0; 2776 IADDR UNUSED pc = abuf->addr; 2777 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2778 2779 { 2780 SI tmp_new_src2; 2781 tmp_new_src2 = * FLD (i_src2); 2782 { 2783 QI opval = * FLD (i_src1); 2784 SETMEMQI (current_cpu, pc, tmp_new_src2, opval); 2785 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2786 } 2787 { 2788 SI opval = ADDSI (tmp_new_src2, 1); 2789 * FLD (i_src2) = opval; 2790 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2791 } 2792 } 2793 2794 #undef FLD 2795 } 2796 NEXT (vpc); 2797 2798 CASE (sem, INSN_ST_MINUS) : /* st $src1,@-$src2 */ 2799 { 2800 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2801 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2802 #define FLD(f) abuf->fields.sfmt_st_plus.f 2803 int UNUSED written = 0; 2804 IADDR UNUSED pc = abuf->addr; 2805 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2806 2807 { 2808 SI tmp_new_src2; 2809 tmp_new_src2 = SUBSI (* FLD (i_src2), 4); 2810 { 2811 SI opval = * FLD (i_src1); 2812 SETMEMSI (current_cpu, pc, tmp_new_src2, opval); 2813 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2814 } 2815 { 2816 SI opval = tmp_new_src2; 2817 * FLD (i_src2) = opval; 2818 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2819 } 2820 } 2821 2822 #undef FLD 2823 } 2824 NEXT (vpc); 2825 2826 CASE (sem, INSN_SUB) : /* sub $dr,$sr */ 2827 { 2828 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2829 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2830 #define FLD(f) abuf->fields.sfmt_add.f 2831 int UNUSED written = 0; 2832 IADDR UNUSED pc = abuf->addr; 2833 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2834 2835 { 2836 SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr)); 2837 * FLD (i_dr) = opval; 2838 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2839 } 2840 2841 #undef FLD 2842 } 2843 NEXT (vpc); 2844 2845 CASE (sem, INSN_SUBV) : /* subv $dr,$sr */ 2846 { 2847 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2848 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2849 #define FLD(f) abuf->fields.sfmt_add.f 2850 int UNUSED written = 0; 2851 IADDR UNUSED pc = abuf->addr; 2852 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2853 2854 { 2855 SI temp0;BI temp1; 2856 temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr)); 2857 temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0); 2858 { 2859 SI opval = temp0; 2860 * FLD (i_dr) = opval; 2861 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2862 } 2863 { 2864 BI opval = temp1; 2865 CPU (h_cond) = opval; 2866 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 2867 } 2868 } 2869 2870 #undef FLD 2871 } 2872 NEXT (vpc); 2873 2874 CASE (sem, INSN_SUBX) : /* subx $dr,$sr */ 2875 { 2876 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2877 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2878 #define FLD(f) abuf->fields.sfmt_add.f 2879 int UNUSED written = 0; 2880 IADDR UNUSED pc = abuf->addr; 2881 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2882 2883 { 2884 SI temp0;BI temp1; 2885 temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); 2886 temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); 2887 { 2888 SI opval = temp0; 2889 * FLD (i_dr) = opval; 2890 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2891 } 2892 { 2893 BI opval = temp1; 2894 CPU (h_cond) = opval; 2895 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 2896 } 2897 } 2898 2899 #undef FLD 2900 } 2901 NEXT (vpc); 2902 2903 CASE (sem, INSN_TRAP) : /* trap $uimm4 */ 2904 { 2905 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2906 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2907 #define FLD(f) abuf->fields.sfmt_trap.f 2908 int UNUSED written = 0; 2909 IADDR UNUSED pc = abuf->addr; 2910 SEM_BRANCH_INIT 2911 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2912 2913 { 2914 { 2915 USI opval = GET_H_CR (((UINT) 6)); 2916 SET_H_CR (((UINT) 14), opval); 2917 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 2918 } 2919 { 2920 USI opval = ADDSI (pc, 4); 2921 SET_H_CR (((UINT) 6), opval); 2922 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 2923 } 2924 { 2925 UQI opval = CPU (h_bpsw); 2926 CPU (h_bbpsw) = opval; 2927 TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval); 2928 } 2929 { 2930 UQI opval = GET_H_PSW (); 2931 CPU (h_bpsw) = opval; 2932 TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval); 2933 } 2934 { 2935 UQI opval = ANDQI (GET_H_PSW (), 128); 2936 SET_H_PSW (opval); 2937 TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval); 2938 } 2939 { 2940 SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4)); 2941 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 2942 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 2943 } 2944 } 2945 2946 SEM_BRANCH_FINI (vpc); 2947 #undef FLD 2948 } 2949 NEXT (vpc); 2950 2951 CASE (sem, INSN_UNLOCK) : /* unlock $src1,@$src2 */ 2952 { 2953 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2954 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2955 #define FLD(f) abuf->fields.sfmt_st_plus.f 2956 int UNUSED written = 0; 2957 IADDR UNUSED pc = abuf->addr; 2958 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2959 2960 { 2961 if (CPU (h_lock)) { 2962 { 2963 SI opval = * FLD (i_src1); 2964 SETMEMSI (current_cpu, pc, * FLD (i_src2), opval); 2965 written |= (1 << 4); 2966 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2967 } 2968 } 2969 { 2970 BI opval = 0; 2971 CPU (h_lock) = opval; 2972 TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval); 2973 } 2974 } 2975 2976 abuf->written = written; 2977 #undef FLD 2978 } 2979 NEXT (vpc); 2980 2981 CASE (sem, INSN_SATB) : /* satb $dr,$sr */ 2982 { 2983 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2984 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2985 #define FLD(f) abuf->fields.sfmt_ld_plus.f 2986 int UNUSED written = 0; 2987 IADDR UNUSED pc = abuf->addr; 2988 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2989 2990 { 2991 SI opval = (GESI (* FLD (i_sr), 127)) ? (127) : (LESI (* FLD (i_sr), -128)) ? (-128) : (* FLD (i_sr)); 2992 * FLD (i_dr) = opval; 2993 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2994 } 2995 2996 #undef FLD 2997 } 2998 NEXT (vpc); 2999 3000 CASE (sem, INSN_SATH) : /* sath $dr,$sr */ 3001 { 3002 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3003 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3004 #define FLD(f) abuf->fields.sfmt_ld_plus.f 3005 int UNUSED written = 0; 3006 IADDR UNUSED pc = abuf->addr; 3007 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 3008 3009 { 3010 SI opval = (GESI (* FLD (i_sr), 32767)) ? (32767) : (LESI (* FLD (i_sr), -32768)) ? (-32768) : (* FLD (i_sr)); 3011 * FLD (i_dr) = opval; 3012 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3013 } 3014 3015 #undef FLD 3016 } 3017 NEXT (vpc); 3018 3019 CASE (sem, INSN_SAT) : /* sat $dr,$sr */ 3020 { 3021 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3022 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3023 #define FLD(f) abuf->fields.sfmt_ld_plus.f 3024 int UNUSED written = 0; 3025 IADDR UNUSED pc = abuf->addr; 3026 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 3027 3028 { 3029 SI opval = ((CPU (h_cond)) ? (((LTSI (* FLD (i_sr), 0)) ? (2147483647) : (0x80000000))) : (* FLD (i_sr))); 3030 * FLD (i_dr) = opval; 3031 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3032 } 3033 3034 #undef FLD 3035 } 3036 NEXT (vpc); 3037 3038 CASE (sem, INSN_PCMPBZ) : /* pcmpbz $src2 */ 3039 { 3040 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3041 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3042 #define FLD(f) abuf->fields.sfmt_st_plus.f 3043 int UNUSED written = 0; 3044 IADDR UNUSED pc = abuf->addr; 3045 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3046 3047 { 3048 BI opval = (EQSI (ANDSI (* FLD (i_src2), 255), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 65280), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 0xff000000), 0)) ? (1) : (0); 3049 CPU (h_cond) = opval; 3050 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 3051 } 3052 3053 #undef FLD 3054 } 3055 NEXT (vpc); 3056 3057 CASE (sem, INSN_SADD) : /* sadd */ 3058 { 3059 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3060 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3061 #define FLD(f) abuf->fields.sfmt_empty.f 3062 int UNUSED written = 0; 3063 IADDR UNUSED pc = abuf->addr; 3064 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3065 3066 { 3067 DI opval = ADDDI (SRADI (GET_H_ACCUMS (((UINT) 1)), 16), GET_H_ACCUMS (((UINT) 0))); 3068 SET_H_ACCUMS (((UINT) 0), opval); 3069 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 3070 } 3071 3072 #undef FLD 3073 } 3074 NEXT (vpc); 3075 3076 CASE (sem, INSN_MACWU1) : /* macwu1 $src1,$src2 */ 3077 { 3078 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3079 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3080 #define FLD(f) abuf->fields.sfmt_st_plus.f 3081 int UNUSED written = 0; 3082 IADDR UNUSED pc = abuf->addr; 3083 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3084 3085 { 3086 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8); 3087 SET_H_ACCUMS (((UINT) 1), opval); 3088 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 3089 } 3090 3091 #undef FLD 3092 } 3093 NEXT (vpc); 3094 3095 CASE (sem, INSN_MSBLO) : /* msblo $src1,$src2 */ 3096 { 3097 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3098 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3099 #define FLD(f) abuf->fields.sfmt_st_plus.f 3100 int UNUSED written = 0; 3101 IADDR UNUSED pc = abuf->addr; 3102 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3103 3104 { 3105 DI opval = SRADI (SLLDI (SUBDI (GET_H_ACCUM (), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8); 3106 SET_H_ACCUM (opval); 3107 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 3108 } 3109 3110 #undef FLD 3111 } 3112 NEXT (vpc); 3113 3114 CASE (sem, INSN_MULWU1) : /* mulwu1 $src1,$src2 */ 3115 { 3116 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3117 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3118 #define FLD(f) abuf->fields.sfmt_st_plus.f 3119 int UNUSED written = 0; 3120 IADDR UNUSED pc = abuf->addr; 3121 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3122 3123 { 3124 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16); 3125 SET_H_ACCUMS (((UINT) 1), opval); 3126 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 3127 } 3128 3129 #undef FLD 3130 } 3131 NEXT (vpc); 3132 3133 CASE (sem, INSN_MACLH1) : /* maclh1 $src1,$src2 */ 3134 { 3135 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3136 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3137 #define FLD(f) abuf->fields.sfmt_st_plus.f 3138 int UNUSED written = 0; 3139 IADDR UNUSED pc = abuf->addr; 3140 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3141 3142 { 3143 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8); 3144 SET_H_ACCUMS (((UINT) 1), opval); 3145 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 3146 } 3147 3148 #undef FLD 3149 } 3150 NEXT (vpc); 3151 3152 CASE (sem, INSN_SC) : /* sc */ 3153 { 3154 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3155 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3156 #define FLD(f) abuf->fields.sfmt_empty.f 3157 int UNUSED written = 0; 3158 IADDR UNUSED pc = abuf->addr; 3159 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3160 3161 if (ZEXTBISI (CPU (h_cond))) 3162 SEM_SKIP_INSN (current_cpu, sem_arg, vpc); 3163 3164 #undef FLD 3165 } 3166 NEXT (vpc); 3167 3168 CASE (sem, INSN_SNC) : /* snc */ 3169 { 3170 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3171 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3172 #define FLD(f) abuf->fields.sfmt_empty.f 3173 int UNUSED written = 0; 3174 IADDR UNUSED pc = abuf->addr; 3175 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3176 3177 if (ZEXTBISI (NOTBI (CPU (h_cond)))) 3178 SEM_SKIP_INSN (current_cpu, sem_arg, vpc); 3179 3180 #undef FLD 3181 } 3182 NEXT (vpc); 3183 3184 CASE (sem, INSN_CLRPSW) : /* clrpsw $uimm8 */ 3185 { 3186 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3187 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3188 #define FLD(f) abuf->fields.sfmt_clrpsw.f 3189 int UNUSED written = 0; 3190 IADDR UNUSED pc = abuf->addr; 3191 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3192 3193 { 3194 USI opval = ANDSI (GET_H_CR (((UINT) 0)), ORSI (ZEXTQISI (INVQI (FLD (f_uimm8))), 65280)); 3195 SET_H_CR (((UINT) 0), opval); 3196 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 3197 } 3198 3199 #undef FLD 3200 } 3201 NEXT (vpc); 3202 3203 CASE (sem, INSN_SETPSW) : /* setpsw $uimm8 */ 3204 { 3205 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3206 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3207 #define FLD(f) abuf->fields.sfmt_clrpsw.f 3208 int UNUSED written = 0; 3209 IADDR UNUSED pc = abuf->addr; 3210 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3211 3212 { 3213 USI opval = FLD (f_uimm8); 3214 SET_H_CR (((UINT) 0), opval); 3215 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 3216 } 3217 3218 #undef FLD 3219 } 3220 NEXT (vpc); 3221 3222 CASE (sem, INSN_BSET) : /* bset $uimm3,@($slo16,$sr) */ 3223 { 3224 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3225 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3226 #define FLD(f) abuf->fields.sfmt_bset.f 3227 int UNUSED written = 0; 3228 IADDR UNUSED pc = abuf->addr; 3229 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 3230 3231 { 3232 QI opval = ORQI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))), SLLQI (1, SUBSI (7, FLD (f_uimm3)))); 3233 SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)), opval); 3234 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 3235 } 3236 3237 #undef FLD 3238 } 3239 NEXT (vpc); 3240 3241 CASE (sem, INSN_BCLR) : /* bclr $uimm3,@($slo16,$sr) */ 3242 { 3243 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3244 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3245 #define FLD(f) abuf->fields.sfmt_bset.f 3246 int UNUSED written = 0; 3247 IADDR UNUSED pc = abuf->addr; 3248 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 3249 3250 { 3251 QI opval = ANDQI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))), INVQI (SLLQI (1, SUBSI (7, FLD (f_uimm3))))); 3252 SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)), opval); 3253 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 3254 } 3255 3256 #undef FLD 3257 } 3258 NEXT (vpc); 3259 3260 CASE (sem, INSN_BTST) : /* btst $uimm3,$sr */ 3261 { 3262 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3263 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3264 #define FLD(f) abuf->fields.sfmt_bset.f 3265 int UNUSED written = 0; 3266 IADDR UNUSED pc = abuf->addr; 3267 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3268 3269 { 3270 BI opval = ANDQI (SRLQI (* FLD (i_sr), SUBSI (7, FLD (f_uimm3))), 1); 3271 CPU (h_cond) = opval; 3272 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 3273 } 3274 3275 #undef FLD 3276 } 3277 NEXT (vpc); 3278 3279 CASE (sem, INSN_PAR_ADD) : /* add $dr,$sr */ 3280 { 3281 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3282 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3283 #define FLD(f) abuf->fields.sfmt_add.f 3284 #define OPRND(f) par_exec->operands.sfmt_add.f 3285 int UNUSED written = 0; 3286 IADDR UNUSED pc = abuf->addr; 3287 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3288 3289 { 3290 SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr)); 3291 OPRND (dr) = opval; 3292 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3293 } 3294 3295 #undef OPRND 3296 #undef FLD 3297 } 3298 NEXT (vpc); 3299 3300 CASE (sem, INSN_WRITE_ADD) : /* add $dr,$sr */ 3301 { 3302 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3303 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3304 #define FLD(f) abuf->fields.sfmt_add.f 3305 #define OPRND(f) par_exec->operands.sfmt_add.f 3306 int UNUSED written = abuf->written; 3307 IADDR UNUSED pc = abuf->addr; 3308 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3309 3310 * FLD (i_dr) = OPRND (dr); 3311 3312 #undef OPRND 3313 #undef FLD 3314 } 3315 NEXT (vpc); 3316 3317 CASE (sem, INSN_PAR_AND) : /* and $dr,$sr */ 3318 { 3319 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3320 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3321 #define FLD(f) abuf->fields.sfmt_add.f 3322 #define OPRND(f) par_exec->operands.sfmt_add.f 3323 int UNUSED written = 0; 3324 IADDR UNUSED pc = abuf->addr; 3325 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3326 3327 { 3328 SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr)); 3329 OPRND (dr) = opval; 3330 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3331 } 3332 3333 #undef OPRND 3334 #undef FLD 3335 } 3336 NEXT (vpc); 3337 3338 CASE (sem, INSN_WRITE_AND) : /* and $dr,$sr */ 3339 { 3340 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3341 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3342 #define FLD(f) abuf->fields.sfmt_add.f 3343 #define OPRND(f) par_exec->operands.sfmt_add.f 3344 int UNUSED written = abuf->written; 3345 IADDR UNUSED pc = abuf->addr; 3346 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3347 3348 * FLD (i_dr) = OPRND (dr); 3349 3350 #undef OPRND 3351 #undef FLD 3352 } 3353 NEXT (vpc); 3354 3355 CASE (sem, INSN_PAR_OR) : /* or $dr,$sr */ 3356 { 3357 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3358 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3359 #define FLD(f) abuf->fields.sfmt_add.f 3360 #define OPRND(f) par_exec->operands.sfmt_add.f 3361 int UNUSED written = 0; 3362 IADDR UNUSED pc = abuf->addr; 3363 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3364 3365 { 3366 SI opval = ORSI (* FLD (i_dr), * FLD (i_sr)); 3367 OPRND (dr) = opval; 3368 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3369 } 3370 3371 #undef OPRND 3372 #undef FLD 3373 } 3374 NEXT (vpc); 3375 3376 CASE (sem, INSN_WRITE_OR) : /* or $dr,$sr */ 3377 { 3378 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3379 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3380 #define FLD(f) abuf->fields.sfmt_add.f 3381 #define OPRND(f) par_exec->operands.sfmt_add.f 3382 int UNUSED written = abuf->written; 3383 IADDR UNUSED pc = abuf->addr; 3384 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3385 3386 * FLD (i_dr) = OPRND (dr); 3387 3388 #undef OPRND 3389 #undef FLD 3390 } 3391 NEXT (vpc); 3392 3393 CASE (sem, INSN_PAR_XOR) : /* xor $dr,$sr */ 3394 { 3395 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3396 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3397 #define FLD(f) abuf->fields.sfmt_add.f 3398 #define OPRND(f) par_exec->operands.sfmt_add.f 3399 int UNUSED written = 0; 3400 IADDR UNUSED pc = abuf->addr; 3401 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3402 3403 { 3404 SI opval = XORSI (* FLD (i_dr), * FLD (i_sr)); 3405 OPRND (dr) = opval; 3406 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3407 } 3408 3409 #undef OPRND 3410 #undef FLD 3411 } 3412 NEXT (vpc); 3413 3414 CASE (sem, INSN_WRITE_XOR) : /* xor $dr,$sr */ 3415 { 3416 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3417 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3418 #define FLD(f) abuf->fields.sfmt_add.f 3419 #define OPRND(f) par_exec->operands.sfmt_add.f 3420 int UNUSED written = abuf->written; 3421 IADDR UNUSED pc = abuf->addr; 3422 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3423 3424 * FLD (i_dr) = OPRND (dr); 3425 3426 #undef OPRND 3427 #undef FLD 3428 } 3429 NEXT (vpc); 3430 3431 CASE (sem, INSN_PAR_ADDI) : /* addi $dr,$simm8 */ 3432 { 3433 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3434 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3435 #define FLD(f) abuf->fields.sfmt_addi.f 3436 #define OPRND(f) par_exec->operands.sfmt_addi.f 3437 int UNUSED written = 0; 3438 IADDR UNUSED pc = abuf->addr; 3439 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3440 3441 { 3442 SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8)); 3443 OPRND (dr) = opval; 3444 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3445 } 3446 3447 #undef OPRND 3448 #undef FLD 3449 } 3450 NEXT (vpc); 3451 3452 CASE (sem, INSN_WRITE_ADDI) : /* addi $dr,$simm8 */ 3453 { 3454 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3455 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3456 #define FLD(f) abuf->fields.sfmt_addi.f 3457 #define OPRND(f) par_exec->operands.sfmt_addi.f 3458 int UNUSED written = abuf->written; 3459 IADDR UNUSED pc = abuf->addr; 3460 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3461 3462 * FLD (i_dr) = OPRND (dr); 3463 3464 #undef OPRND 3465 #undef FLD 3466 } 3467 NEXT (vpc); 3468 3469 CASE (sem, INSN_PAR_ADDV) : /* addv $dr,$sr */ 3470 { 3471 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3472 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3473 #define FLD(f) abuf->fields.sfmt_add.f 3474 #define OPRND(f) par_exec->operands.sfmt_addv.f 3475 int UNUSED written = 0; 3476 IADDR UNUSED pc = abuf->addr; 3477 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3478 3479 { 3480 SI temp0;BI temp1; 3481 temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr)); 3482 temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0); 3483 { 3484 SI opval = temp0; 3485 OPRND (dr) = opval; 3486 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3487 } 3488 { 3489 BI opval = temp1; 3490 OPRND (condbit) = opval; 3491 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 3492 } 3493 } 3494 3495 #undef OPRND 3496 #undef FLD 3497 } 3498 NEXT (vpc); 3499 3500 CASE (sem, INSN_WRITE_ADDV) : /* addv $dr,$sr */ 3501 { 3502 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3503 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3504 #define FLD(f) abuf->fields.sfmt_add.f 3505 #define OPRND(f) par_exec->operands.sfmt_addv.f 3506 int UNUSED written = abuf->written; 3507 IADDR UNUSED pc = abuf->addr; 3508 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3509 3510 CPU (h_cond) = OPRND (condbit); 3511 * FLD (i_dr) = OPRND (dr); 3512 3513 #undef OPRND 3514 #undef FLD 3515 } 3516 NEXT (vpc); 3517 3518 CASE (sem, INSN_PAR_ADDX) : /* addx $dr,$sr */ 3519 { 3520 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3521 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3522 #define FLD(f) abuf->fields.sfmt_add.f 3523 #define OPRND(f) par_exec->operands.sfmt_addx.f 3524 int UNUSED written = 0; 3525 IADDR UNUSED pc = abuf->addr; 3526 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3527 3528 { 3529 SI temp0;BI temp1; 3530 temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); 3531 temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); 3532 { 3533 SI opval = temp0; 3534 OPRND (dr) = opval; 3535 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3536 } 3537 { 3538 BI opval = temp1; 3539 OPRND (condbit) = opval; 3540 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 3541 } 3542 } 3543 3544 #undef OPRND 3545 #undef FLD 3546 } 3547 NEXT (vpc); 3548 3549 CASE (sem, INSN_WRITE_ADDX) : /* addx $dr,$sr */ 3550 { 3551 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3552 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3553 #define FLD(f) abuf->fields.sfmt_add.f 3554 #define OPRND(f) par_exec->operands.sfmt_addx.f 3555 int UNUSED written = abuf->written; 3556 IADDR UNUSED pc = abuf->addr; 3557 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3558 3559 CPU (h_cond) = OPRND (condbit); 3560 * FLD (i_dr) = OPRND (dr); 3561 3562 #undef OPRND 3563 #undef FLD 3564 } 3565 NEXT (vpc); 3566 3567 CASE (sem, INSN_PAR_BC8) : /* bc.s $disp8 */ 3568 { 3569 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3570 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3571 #define FLD(f) abuf->fields.sfmt_bl8.f 3572 #define OPRND(f) par_exec->operands.sfmt_bc8.f 3573 int UNUSED written = 0; 3574 IADDR UNUSED pc = abuf->addr; 3575 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3576 3577 if (CPU (h_cond)) { 3578 { 3579 USI opval = FLD (i_disp8); 3580 OPRND (pc) = opval; 3581 written |= (1 << 2); 3582 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 3583 } 3584 } 3585 3586 abuf->written = written; 3587 #undef OPRND 3588 #undef FLD 3589 } 3590 NEXT (vpc); 3591 3592 CASE (sem, INSN_WRITE_BC8) : /* bc.s $disp8 */ 3593 { 3594 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3595 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3596 #define FLD(f) abuf->fields.sfmt_bl8.f 3597 #define OPRND(f) par_exec->operands.sfmt_bc8.f 3598 int UNUSED written = abuf->written; 3599 IADDR UNUSED pc = abuf->addr; 3600 SEM_BRANCH_INIT 3601 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3602 3603 if (written & (1 << 2)) 3604 { 3605 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); 3606 } 3607 3608 SEM_BRANCH_FINI (vpc); 3609 #undef OPRND 3610 #undef FLD 3611 } 3612 NEXT (vpc); 3613 3614 CASE (sem, INSN_PAR_BL8) : /* bl.s $disp8 */ 3615 { 3616 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3617 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3618 #define FLD(f) abuf->fields.sfmt_bl8.f 3619 #define OPRND(f) par_exec->operands.sfmt_bl8.f 3620 int UNUSED written = 0; 3621 IADDR UNUSED pc = abuf->addr; 3622 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3623 3624 { 3625 { 3626 SI opval = ADDSI (ANDSI (pc, -4), 4); 3627 OPRND (h_gr_SI_14) = opval; 3628 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3629 } 3630 { 3631 USI opval = FLD (i_disp8); 3632 OPRND (pc) = opval; 3633 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 3634 } 3635 } 3636 3637 #undef OPRND 3638 #undef FLD 3639 } 3640 NEXT (vpc); 3641 3642 CASE (sem, INSN_WRITE_BL8) : /* bl.s $disp8 */ 3643 { 3644 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3645 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3646 #define FLD(f) abuf->fields.sfmt_bl8.f 3647 #define OPRND(f) par_exec->operands.sfmt_bl8.f 3648 int UNUSED written = abuf->written; 3649 IADDR UNUSED pc = abuf->addr; 3650 SEM_BRANCH_INIT 3651 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3652 3653 CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14); 3654 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); 3655 3656 SEM_BRANCH_FINI (vpc); 3657 #undef OPRND 3658 #undef FLD 3659 } 3660 NEXT (vpc); 3661 3662 CASE (sem, INSN_PAR_BCL8) : /* bcl.s $disp8 */ 3663 { 3664 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3665 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3666 #define FLD(f) abuf->fields.sfmt_bl8.f 3667 #define OPRND(f) par_exec->operands.sfmt_bcl8.f 3668 int UNUSED written = 0; 3669 IADDR UNUSED pc = abuf->addr; 3670 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3671 3672 if (CPU (h_cond)) { 3673 { 3674 { 3675 SI opval = ADDSI (ANDSI (pc, -4), 4); 3676 OPRND (h_gr_SI_14) = opval; 3677 written |= (1 << 3); 3678 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3679 } 3680 { 3681 USI opval = FLD (i_disp8); 3682 OPRND (pc) = opval; 3683 written |= (1 << 4); 3684 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 3685 } 3686 } 3687 } 3688 3689 abuf->written = written; 3690 #undef OPRND 3691 #undef FLD 3692 } 3693 NEXT (vpc); 3694 3695 CASE (sem, INSN_WRITE_BCL8) : /* bcl.s $disp8 */ 3696 { 3697 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3698 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3699 #define FLD(f) abuf->fields.sfmt_bl8.f 3700 #define OPRND(f) par_exec->operands.sfmt_bcl8.f 3701 int UNUSED written = abuf->written; 3702 IADDR UNUSED pc = abuf->addr; 3703 SEM_BRANCH_INIT 3704 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3705 3706 if (written & (1 << 3)) 3707 { 3708 CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14); 3709 } 3710 if (written & (1 << 4)) 3711 { 3712 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); 3713 } 3714 3715 SEM_BRANCH_FINI (vpc); 3716 #undef OPRND 3717 #undef FLD 3718 } 3719 NEXT (vpc); 3720 3721 CASE (sem, INSN_PAR_BNC8) : /* bnc.s $disp8 */ 3722 { 3723 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3724 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3725 #define FLD(f) abuf->fields.sfmt_bl8.f 3726 #define OPRND(f) par_exec->operands.sfmt_bc8.f 3727 int UNUSED written = 0; 3728 IADDR UNUSED pc = abuf->addr; 3729 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3730 3731 if (NOTBI (CPU (h_cond))) { 3732 { 3733 USI opval = FLD (i_disp8); 3734 OPRND (pc) = opval; 3735 written |= (1 << 2); 3736 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 3737 } 3738 } 3739 3740 abuf->written = written; 3741 #undef OPRND 3742 #undef FLD 3743 } 3744 NEXT (vpc); 3745 3746 CASE (sem, INSN_WRITE_BNC8) : /* bnc.s $disp8 */ 3747 { 3748 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3749 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3750 #define FLD(f) abuf->fields.sfmt_bl8.f 3751 #define OPRND(f) par_exec->operands.sfmt_bc8.f 3752 int UNUSED written = abuf->written; 3753 IADDR UNUSED pc = abuf->addr; 3754 SEM_BRANCH_INIT 3755 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3756 3757 if (written & (1 << 2)) 3758 { 3759 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); 3760 } 3761 3762 SEM_BRANCH_FINI (vpc); 3763 #undef OPRND 3764 #undef FLD 3765 } 3766 NEXT (vpc); 3767 3768 CASE (sem, INSN_PAR_BRA8) : /* bra.s $disp8 */ 3769 { 3770 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3771 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3772 #define FLD(f) abuf->fields.sfmt_bl8.f 3773 #define OPRND(f) par_exec->operands.sfmt_bra8.f 3774 int UNUSED written = 0; 3775 IADDR UNUSED pc = abuf->addr; 3776 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3777 3778 { 3779 USI opval = FLD (i_disp8); 3780 OPRND (pc) = opval; 3781 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 3782 } 3783 3784 #undef OPRND 3785 #undef FLD 3786 } 3787 NEXT (vpc); 3788 3789 CASE (sem, INSN_WRITE_BRA8) : /* bra.s $disp8 */ 3790 { 3791 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3792 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3793 #define FLD(f) abuf->fields.sfmt_bl8.f 3794 #define OPRND(f) par_exec->operands.sfmt_bra8.f 3795 int UNUSED written = abuf->written; 3796 IADDR UNUSED pc = abuf->addr; 3797 SEM_BRANCH_INIT 3798 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3799 3800 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); 3801 3802 SEM_BRANCH_FINI (vpc); 3803 #undef OPRND 3804 #undef FLD 3805 } 3806 NEXT (vpc); 3807 3808 CASE (sem, INSN_PAR_BNCL8) : /* bncl.s $disp8 */ 3809 { 3810 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3811 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3812 #define FLD(f) abuf->fields.sfmt_bl8.f 3813 #define OPRND(f) par_exec->operands.sfmt_bcl8.f 3814 int UNUSED written = 0; 3815 IADDR UNUSED pc = abuf->addr; 3816 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3817 3818 if (NOTBI (CPU (h_cond))) { 3819 { 3820 { 3821 SI opval = ADDSI (ANDSI (pc, -4), 4); 3822 OPRND (h_gr_SI_14) = opval; 3823 written |= (1 << 3); 3824 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3825 } 3826 { 3827 USI opval = FLD (i_disp8); 3828 OPRND (pc) = opval; 3829 written |= (1 << 4); 3830 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 3831 } 3832 } 3833 } 3834 3835 abuf->written = written; 3836 #undef OPRND 3837 #undef FLD 3838 } 3839 NEXT (vpc); 3840 3841 CASE (sem, INSN_WRITE_BNCL8) : /* bncl.s $disp8 */ 3842 { 3843 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3844 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3845 #define FLD(f) abuf->fields.sfmt_bl8.f 3846 #define OPRND(f) par_exec->operands.sfmt_bcl8.f 3847 int UNUSED written = abuf->written; 3848 IADDR UNUSED pc = abuf->addr; 3849 SEM_BRANCH_INIT 3850 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3851 3852 if (written & (1 << 3)) 3853 { 3854 CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14); 3855 } 3856 if (written & (1 << 4)) 3857 { 3858 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); 3859 } 3860 3861 SEM_BRANCH_FINI (vpc); 3862 #undef OPRND 3863 #undef FLD 3864 } 3865 NEXT (vpc); 3866 3867 CASE (sem, INSN_PAR_CMP) : /* cmp $src1,$src2 */ 3868 { 3869 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3870 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3871 #define FLD(f) abuf->fields.sfmt_st_plus.f 3872 #define OPRND(f) par_exec->operands.sfmt_cmp.f 3873 int UNUSED written = 0; 3874 IADDR UNUSED pc = abuf->addr; 3875 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3876 3877 { 3878 BI opval = LTSI (* FLD (i_src1), * FLD (i_src2)); 3879 OPRND (condbit) = opval; 3880 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 3881 } 3882 3883 #undef OPRND 3884 #undef FLD 3885 } 3886 NEXT (vpc); 3887 3888 CASE (sem, INSN_WRITE_CMP) : /* cmp $src1,$src2 */ 3889 { 3890 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3891 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3892 #define FLD(f) abuf->fields.sfmt_st_plus.f 3893 #define OPRND(f) par_exec->operands.sfmt_cmp.f 3894 int UNUSED written = abuf->written; 3895 IADDR UNUSED pc = abuf->addr; 3896 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3897 3898 CPU (h_cond) = OPRND (condbit); 3899 3900 #undef OPRND 3901 #undef FLD 3902 } 3903 NEXT (vpc); 3904 3905 CASE (sem, INSN_PAR_CMPU) : /* cmpu $src1,$src2 */ 3906 { 3907 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3908 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3909 #define FLD(f) abuf->fields.sfmt_st_plus.f 3910 #define OPRND(f) par_exec->operands.sfmt_cmp.f 3911 int UNUSED written = 0; 3912 IADDR UNUSED pc = abuf->addr; 3913 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3914 3915 { 3916 BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2)); 3917 OPRND (condbit) = opval; 3918 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 3919 } 3920 3921 #undef OPRND 3922 #undef FLD 3923 } 3924 NEXT (vpc); 3925 3926 CASE (sem, INSN_WRITE_CMPU) : /* cmpu $src1,$src2 */ 3927 { 3928 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3929 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3930 #define FLD(f) abuf->fields.sfmt_st_plus.f 3931 #define OPRND(f) par_exec->operands.sfmt_cmp.f 3932 int UNUSED written = abuf->written; 3933 IADDR UNUSED pc = abuf->addr; 3934 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3935 3936 CPU (h_cond) = OPRND (condbit); 3937 3938 #undef OPRND 3939 #undef FLD 3940 } 3941 NEXT (vpc); 3942 3943 CASE (sem, INSN_PAR_CMPEQ) : /* cmpeq $src1,$src2 */ 3944 { 3945 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3946 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3947 #define FLD(f) abuf->fields.sfmt_st_plus.f 3948 #define OPRND(f) par_exec->operands.sfmt_cmp.f 3949 int UNUSED written = 0; 3950 IADDR UNUSED pc = abuf->addr; 3951 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3952 3953 { 3954 BI opval = EQSI (* FLD (i_src1), * FLD (i_src2)); 3955 OPRND (condbit) = opval; 3956 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 3957 } 3958 3959 #undef OPRND 3960 #undef FLD 3961 } 3962 NEXT (vpc); 3963 3964 CASE (sem, INSN_WRITE_CMPEQ) : /* cmpeq $src1,$src2 */ 3965 { 3966 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3967 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3968 #define FLD(f) abuf->fields.sfmt_st_plus.f 3969 #define OPRND(f) par_exec->operands.sfmt_cmp.f 3970 int UNUSED written = abuf->written; 3971 IADDR UNUSED pc = abuf->addr; 3972 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3973 3974 CPU (h_cond) = OPRND (condbit); 3975 3976 #undef OPRND 3977 #undef FLD 3978 } 3979 NEXT (vpc); 3980 3981 CASE (sem, INSN_PAR_CMPZ) : /* cmpz $src2 */ 3982 { 3983 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3984 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3985 #define FLD(f) abuf->fields.sfmt_st_plus.f 3986 #define OPRND(f) par_exec->operands.sfmt_cmpz.f 3987 int UNUSED written = 0; 3988 IADDR UNUSED pc = abuf->addr; 3989 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3990 3991 { 3992 BI opval = EQSI (* FLD (i_src2), 0); 3993 OPRND (condbit) = opval; 3994 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 3995 } 3996 3997 #undef OPRND 3998 #undef FLD 3999 } 4000 NEXT (vpc); 4001 4002 CASE (sem, INSN_WRITE_CMPZ) : /* cmpz $src2 */ 4003 { 4004 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4005 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4006 #define FLD(f) abuf->fields.sfmt_st_plus.f 4007 #define OPRND(f) par_exec->operands.sfmt_cmpz.f 4008 int UNUSED written = abuf->written; 4009 IADDR UNUSED pc = abuf->addr; 4010 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4011 4012 CPU (h_cond) = OPRND (condbit); 4013 4014 #undef OPRND 4015 #undef FLD 4016 } 4017 NEXT (vpc); 4018 4019 CASE (sem, INSN_PAR_JC) : /* jc $sr */ 4020 { 4021 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4022 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4023 #define FLD(f) abuf->fields.sfmt_jl.f 4024 #define OPRND(f) par_exec->operands.sfmt_jc.f 4025 int UNUSED written = 0; 4026 IADDR UNUSED pc = abuf->addr; 4027 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4028 4029 if (CPU (h_cond)) { 4030 { 4031 USI opval = ANDSI (* FLD (i_sr), -4); 4032 OPRND (pc) = opval; 4033 written |= (1 << 2); 4034 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 4035 } 4036 } 4037 4038 abuf->written = written; 4039 #undef OPRND 4040 #undef FLD 4041 } 4042 NEXT (vpc); 4043 4044 CASE (sem, INSN_WRITE_JC) : /* jc $sr */ 4045 { 4046 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4047 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4048 #define FLD(f) abuf->fields.sfmt_jl.f 4049 #define OPRND(f) par_exec->operands.sfmt_jc.f 4050 int UNUSED written = abuf->written; 4051 IADDR UNUSED pc = abuf->addr; 4052 SEM_BRANCH_INIT 4053 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4054 4055 if (written & (1 << 2)) 4056 { 4057 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); 4058 } 4059 4060 SEM_BRANCH_FINI (vpc); 4061 #undef OPRND 4062 #undef FLD 4063 } 4064 NEXT (vpc); 4065 4066 CASE (sem, INSN_PAR_JNC) : /* jnc $sr */ 4067 { 4068 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4069 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4070 #define FLD(f) abuf->fields.sfmt_jl.f 4071 #define OPRND(f) par_exec->operands.sfmt_jc.f 4072 int UNUSED written = 0; 4073 IADDR UNUSED pc = abuf->addr; 4074 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4075 4076 if (NOTBI (CPU (h_cond))) { 4077 { 4078 USI opval = ANDSI (* FLD (i_sr), -4); 4079 OPRND (pc) = opval; 4080 written |= (1 << 2); 4081 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 4082 } 4083 } 4084 4085 abuf->written = written; 4086 #undef OPRND 4087 #undef FLD 4088 } 4089 NEXT (vpc); 4090 4091 CASE (sem, INSN_WRITE_JNC) : /* jnc $sr */ 4092 { 4093 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4094 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4095 #define FLD(f) abuf->fields.sfmt_jl.f 4096 #define OPRND(f) par_exec->operands.sfmt_jc.f 4097 int UNUSED written = abuf->written; 4098 IADDR UNUSED pc = abuf->addr; 4099 SEM_BRANCH_INIT 4100 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4101 4102 if (written & (1 << 2)) 4103 { 4104 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); 4105 } 4106 4107 SEM_BRANCH_FINI (vpc); 4108 #undef OPRND 4109 #undef FLD 4110 } 4111 NEXT (vpc); 4112 4113 CASE (sem, INSN_PAR_JL) : /* jl $sr */ 4114 { 4115 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4116 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4117 #define FLD(f) abuf->fields.sfmt_jl.f 4118 #define OPRND(f) par_exec->operands.sfmt_jl.f 4119 int UNUSED written = 0; 4120 IADDR UNUSED pc = abuf->addr; 4121 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4122 4123 { 4124 SI temp0;USI temp1; 4125 temp0 = ADDSI (ANDSI (pc, -4), 4); 4126 temp1 = ANDSI (* FLD (i_sr), -4); 4127 { 4128 SI opval = temp0; 4129 OPRND (h_gr_SI_14) = opval; 4130 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4131 } 4132 { 4133 USI opval = temp1; 4134 OPRND (pc) = opval; 4135 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 4136 } 4137 } 4138 4139 #undef OPRND 4140 #undef FLD 4141 } 4142 NEXT (vpc); 4143 4144 CASE (sem, INSN_WRITE_JL) : /* jl $sr */ 4145 { 4146 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4147 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4148 #define FLD(f) abuf->fields.sfmt_jl.f 4149 #define OPRND(f) par_exec->operands.sfmt_jl.f 4150 int UNUSED written = abuf->written; 4151 IADDR UNUSED pc = abuf->addr; 4152 SEM_BRANCH_INIT 4153 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4154 4155 CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14); 4156 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); 4157 4158 SEM_BRANCH_FINI (vpc); 4159 #undef OPRND 4160 #undef FLD 4161 } 4162 NEXT (vpc); 4163 4164 CASE (sem, INSN_PAR_JMP) : /* jmp $sr */ 4165 { 4166 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4167 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4168 #define FLD(f) abuf->fields.sfmt_jl.f 4169 #define OPRND(f) par_exec->operands.sfmt_jmp.f 4170 int UNUSED written = 0; 4171 IADDR UNUSED pc = abuf->addr; 4172 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4173 4174 { 4175 USI opval = ANDSI (* FLD (i_sr), -4); 4176 OPRND (pc) = opval; 4177 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 4178 } 4179 4180 #undef OPRND 4181 #undef FLD 4182 } 4183 NEXT (vpc); 4184 4185 CASE (sem, INSN_WRITE_JMP) : /* jmp $sr */ 4186 { 4187 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4188 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4189 #define FLD(f) abuf->fields.sfmt_jl.f 4190 #define OPRND(f) par_exec->operands.sfmt_jmp.f 4191 int UNUSED written = abuf->written; 4192 IADDR UNUSED pc = abuf->addr; 4193 SEM_BRANCH_INIT 4194 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4195 4196 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); 4197 4198 SEM_BRANCH_FINI (vpc); 4199 #undef OPRND 4200 #undef FLD 4201 } 4202 NEXT (vpc); 4203 4204 CASE (sem, INSN_PAR_LD) : /* ld $dr,@$sr */ 4205 { 4206 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4207 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4208 #define FLD(f) abuf->fields.sfmt_ld_plus.f 4209 #define OPRND(f) par_exec->operands.sfmt_ld.f 4210 int UNUSED written = 0; 4211 IADDR UNUSED pc = abuf->addr; 4212 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4213 4214 { 4215 SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr)); 4216 OPRND (dr) = opval; 4217 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4218 } 4219 4220 #undef OPRND 4221 #undef FLD 4222 } 4223 NEXT (vpc); 4224 4225 CASE (sem, INSN_WRITE_LD) : /* ld $dr,@$sr */ 4226 { 4227 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4228 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4229 #define FLD(f) abuf->fields.sfmt_ld_plus.f 4230 #define OPRND(f) par_exec->operands.sfmt_ld.f 4231 int UNUSED written = abuf->written; 4232 IADDR UNUSED pc = abuf->addr; 4233 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4234 4235 * FLD (i_dr) = OPRND (dr); 4236 4237 #undef OPRND 4238 #undef FLD 4239 } 4240 NEXT (vpc); 4241 4242 CASE (sem, INSN_PAR_LDB) : /* ldb $dr,@$sr */ 4243 { 4244 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4245 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4246 #define FLD(f) abuf->fields.sfmt_ld_plus.f 4247 #define OPRND(f) par_exec->operands.sfmt_ldb.f 4248 int UNUSED written = 0; 4249 IADDR UNUSED pc = abuf->addr; 4250 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4251 4252 { 4253 SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr))); 4254 OPRND (dr) = opval; 4255 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4256 } 4257 4258 #undef OPRND 4259 #undef FLD 4260 } 4261 NEXT (vpc); 4262 4263 CASE (sem, INSN_WRITE_LDB) : /* ldb $dr,@$sr */ 4264 { 4265 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4266 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4267 #define FLD(f) abuf->fields.sfmt_ld_plus.f 4268 #define OPRND(f) par_exec->operands.sfmt_ldb.f 4269 int UNUSED written = abuf->written; 4270 IADDR UNUSED pc = abuf->addr; 4271 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4272 4273 * FLD (i_dr) = OPRND (dr); 4274 4275 #undef OPRND 4276 #undef FLD 4277 } 4278 NEXT (vpc); 4279 4280 CASE (sem, INSN_PAR_LDH) : /* ldh $dr,@$sr */ 4281 { 4282 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4283 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4284 #define FLD(f) abuf->fields.sfmt_ld_plus.f 4285 #define OPRND(f) par_exec->operands.sfmt_ldh.f 4286 int UNUSED written = 0; 4287 IADDR UNUSED pc = abuf->addr; 4288 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4289 4290 { 4291 SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr))); 4292 OPRND (dr) = opval; 4293 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4294 } 4295 4296 #undef OPRND 4297 #undef FLD 4298 } 4299 NEXT (vpc); 4300 4301 CASE (sem, INSN_WRITE_LDH) : /* ldh $dr,@$sr */ 4302 { 4303 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4304 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4305 #define FLD(f) abuf->fields.sfmt_ld_plus.f 4306 #define OPRND(f) par_exec->operands.sfmt_ldh.f 4307 int UNUSED written = abuf->written; 4308 IADDR UNUSED pc = abuf->addr; 4309 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4310 4311 * FLD (i_dr) = OPRND (dr); 4312 4313 #undef OPRND 4314 #undef FLD 4315 } 4316 NEXT (vpc); 4317 4318 CASE (sem, INSN_PAR_LDUB) : /* ldub $dr,@$sr */ 4319 { 4320 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4321 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4322 #define FLD(f) abuf->fields.sfmt_ld_plus.f 4323 #define OPRND(f) par_exec->operands.sfmt_ldb.f 4324 int UNUSED written = 0; 4325 IADDR UNUSED pc = abuf->addr; 4326 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4327 4328 { 4329 SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr))); 4330 OPRND (dr) = opval; 4331 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4332 } 4333 4334 #undef OPRND 4335 #undef FLD 4336 } 4337 NEXT (vpc); 4338 4339 CASE (sem, INSN_WRITE_LDUB) : /* ldub $dr,@$sr */ 4340 { 4341 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4342 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4343 #define FLD(f) abuf->fields.sfmt_ld_plus.f 4344 #define OPRND(f) par_exec->operands.sfmt_ldb.f 4345 int UNUSED written = abuf->written; 4346 IADDR UNUSED pc = abuf->addr; 4347 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4348 4349 * FLD (i_dr) = OPRND (dr); 4350 4351 #undef OPRND 4352 #undef FLD 4353 } 4354 NEXT (vpc); 4355 4356 CASE (sem, INSN_PAR_LDUH) : /* lduh $dr,@$sr */ 4357 { 4358 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4359 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4360 #define FLD(f) abuf->fields.sfmt_ld_plus.f 4361 #define OPRND(f) par_exec->operands.sfmt_ldh.f 4362 int UNUSED written = 0; 4363 IADDR UNUSED pc = abuf->addr; 4364 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4365 4366 { 4367 SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr))); 4368 OPRND (dr) = opval; 4369 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4370 } 4371 4372 #undef OPRND 4373 #undef FLD 4374 } 4375 NEXT (vpc); 4376 4377 CASE (sem, INSN_WRITE_LDUH) : /* lduh $dr,@$sr */ 4378 { 4379 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4380 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4381 #define FLD(f) abuf->fields.sfmt_ld_plus.f 4382 #define OPRND(f) par_exec->operands.sfmt_ldh.f 4383 int UNUSED written = abuf->written; 4384 IADDR UNUSED pc = abuf->addr; 4385 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4386 4387 * FLD (i_dr) = OPRND (dr); 4388 4389 #undef OPRND 4390 #undef FLD 4391 } 4392 NEXT (vpc); 4393 4394 CASE (sem, INSN_PAR_LD_PLUS) : /* ld $dr,@$sr+ */ 4395 { 4396 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4397 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4398 #define FLD(f) abuf->fields.sfmt_ld_plus.f 4399 #define OPRND(f) par_exec->operands.sfmt_ld_plus.f 4400 int UNUSED written = 0; 4401 IADDR UNUSED pc = abuf->addr; 4402 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4403 4404 { 4405 SI temp0;SI temp1; 4406 temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr)); 4407 temp1 = ADDSI (* FLD (i_sr), 4); 4408 { 4409 SI opval = temp0; 4410 OPRND (dr) = opval; 4411 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4412 } 4413 { 4414 SI opval = temp1; 4415 OPRND (sr) = opval; 4416 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4417 } 4418 } 4419 4420 #undef OPRND 4421 #undef FLD 4422 } 4423 NEXT (vpc); 4424 4425 CASE (sem, INSN_WRITE_LD_PLUS) : /* ld $dr,@$sr+ */ 4426 { 4427 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4428 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4429 #define FLD(f) abuf->fields.sfmt_ld_plus.f 4430 #define OPRND(f) par_exec->operands.sfmt_ld_plus.f 4431 int UNUSED written = abuf->written; 4432 IADDR UNUSED pc = abuf->addr; 4433 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4434 4435 * FLD (i_dr) = OPRND (dr); 4436 * FLD (i_sr) = OPRND (sr); 4437 4438 #undef OPRND 4439 #undef FLD 4440 } 4441 NEXT (vpc); 4442 4443 CASE (sem, INSN_PAR_LDI8) : /* ldi8 $dr,$simm8 */ 4444 { 4445 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4446 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4447 #define FLD(f) abuf->fields.sfmt_addi.f 4448 #define OPRND(f) par_exec->operands.sfmt_ldi8.f 4449 int UNUSED written = 0; 4450 IADDR UNUSED pc = abuf->addr; 4451 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4452 4453 { 4454 SI opval = FLD (f_simm8); 4455 OPRND (dr) = opval; 4456 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4457 } 4458 4459 #undef OPRND 4460 #undef FLD 4461 } 4462 NEXT (vpc); 4463 4464 CASE (sem, INSN_WRITE_LDI8) : /* ldi8 $dr,$simm8 */ 4465 { 4466 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4467 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4468 #define FLD(f) abuf->fields.sfmt_addi.f 4469 #define OPRND(f) par_exec->operands.sfmt_ldi8.f 4470 int UNUSED written = abuf->written; 4471 IADDR UNUSED pc = abuf->addr; 4472 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4473 4474 * FLD (i_dr) = OPRND (dr); 4475 4476 #undef OPRND 4477 #undef FLD 4478 } 4479 NEXT (vpc); 4480 4481 CASE (sem, INSN_PAR_LOCK) : /* lock $dr,@$sr */ 4482 { 4483 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4484 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4485 #define FLD(f) abuf->fields.sfmt_ld_plus.f 4486 #define OPRND(f) par_exec->operands.sfmt_lock.f 4487 int UNUSED written = 0; 4488 IADDR UNUSED pc = abuf->addr; 4489 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4490 4491 { 4492 { 4493 BI opval = 1; 4494 OPRND (h_lock_BI) = opval; 4495 TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval); 4496 } 4497 { 4498 SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr)); 4499 OPRND (dr) = opval; 4500 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4501 } 4502 } 4503 4504 #undef OPRND 4505 #undef FLD 4506 } 4507 NEXT (vpc); 4508 4509 CASE (sem, INSN_WRITE_LOCK) : /* lock $dr,@$sr */ 4510 { 4511 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4512 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4513 #define FLD(f) abuf->fields.sfmt_ld_plus.f 4514 #define OPRND(f) par_exec->operands.sfmt_lock.f 4515 int UNUSED written = abuf->written; 4516 IADDR UNUSED pc = abuf->addr; 4517 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4518 4519 * FLD (i_dr) = OPRND (dr); 4520 CPU (h_lock) = OPRND (h_lock_BI); 4521 4522 #undef OPRND 4523 #undef FLD 4524 } 4525 NEXT (vpc); 4526 4527 CASE (sem, INSN_PAR_MACHI_A) : /* machi $src1,$src2,$acc */ 4528 { 4529 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4530 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4531 #define FLD(f) abuf->fields.sfmt_machi_a.f 4532 #define OPRND(f) par_exec->operands.sfmt_machi_a.f 4533 int UNUSED written = 0; 4534 IADDR UNUSED pc = abuf->addr; 4535 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4536 4537 { 4538 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8); 4539 OPRND (acc) = opval; 4540 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 4541 } 4542 4543 #undef OPRND 4544 #undef FLD 4545 } 4546 NEXT (vpc); 4547 4548 CASE (sem, INSN_WRITE_MACHI_A) : /* machi $src1,$src2,$acc */ 4549 { 4550 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4551 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4552 #define FLD(f) abuf->fields.sfmt_machi_a.f 4553 #define OPRND(f) par_exec->operands.sfmt_machi_a.f 4554 int UNUSED written = abuf->written; 4555 IADDR UNUSED pc = abuf->addr; 4556 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4557 4558 SET_H_ACCUMS (FLD (f_acc), OPRND (acc)); 4559 4560 #undef OPRND 4561 #undef FLD 4562 } 4563 NEXT (vpc); 4564 4565 CASE (sem, INSN_PAR_MACLO_A) : /* maclo $src1,$src2,$acc */ 4566 { 4567 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4568 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4569 #define FLD(f) abuf->fields.sfmt_machi_a.f 4570 #define OPRND(f) par_exec->operands.sfmt_machi_a.f 4571 int UNUSED written = 0; 4572 IADDR UNUSED pc = abuf->addr; 4573 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4574 4575 { 4576 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8); 4577 OPRND (acc) = opval; 4578 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 4579 } 4580 4581 #undef OPRND 4582 #undef FLD 4583 } 4584 NEXT (vpc); 4585 4586 CASE (sem, INSN_WRITE_MACLO_A) : /* maclo $src1,$src2,$acc */ 4587 { 4588 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4589 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4590 #define FLD(f) abuf->fields.sfmt_machi_a.f 4591 #define OPRND(f) par_exec->operands.sfmt_machi_a.f 4592 int UNUSED written = abuf->written; 4593 IADDR UNUSED pc = abuf->addr; 4594 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4595 4596 SET_H_ACCUMS (FLD (f_acc), OPRND (acc)); 4597 4598 #undef OPRND 4599 #undef FLD 4600 } 4601 NEXT (vpc); 4602 4603 CASE (sem, INSN_PAR_MACWHI_A) : /* macwhi $src1,$src2,$acc */ 4604 { 4605 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4606 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4607 #define FLD(f) abuf->fields.sfmt_machi_a.f 4608 #define OPRND(f) par_exec->operands.sfmt_machi_a.f 4609 int UNUSED written = 0; 4610 IADDR UNUSED pc = abuf->addr; 4611 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4612 4613 { 4614 DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))); 4615 OPRND (acc) = opval; 4616 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 4617 } 4618 4619 #undef OPRND 4620 #undef FLD 4621 } 4622 NEXT (vpc); 4623 4624 CASE (sem, INSN_WRITE_MACWHI_A) : /* macwhi $src1,$src2,$acc */ 4625 { 4626 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4627 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4628 #define FLD(f) abuf->fields.sfmt_machi_a.f 4629 #define OPRND(f) par_exec->operands.sfmt_machi_a.f 4630 int UNUSED written = abuf->written; 4631 IADDR UNUSED pc = abuf->addr; 4632 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4633 4634 SET_H_ACCUMS (FLD (f_acc), OPRND (acc)); 4635 4636 #undef OPRND 4637 #undef FLD 4638 } 4639 NEXT (vpc); 4640 4641 CASE (sem, INSN_PAR_MACWLO_A) : /* macwlo $src1,$src2,$acc */ 4642 { 4643 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4644 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4645 #define FLD(f) abuf->fields.sfmt_machi_a.f 4646 #define OPRND(f) par_exec->operands.sfmt_machi_a.f 4647 int UNUSED written = 0; 4648 IADDR UNUSED pc = abuf->addr; 4649 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4650 4651 { 4652 DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))); 4653 OPRND (acc) = opval; 4654 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 4655 } 4656 4657 #undef OPRND 4658 #undef FLD 4659 } 4660 NEXT (vpc); 4661 4662 CASE (sem, INSN_WRITE_MACWLO_A) : /* macwlo $src1,$src2,$acc */ 4663 { 4664 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4665 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4666 #define FLD(f) abuf->fields.sfmt_machi_a.f 4667 #define OPRND(f) par_exec->operands.sfmt_machi_a.f 4668 int UNUSED written = abuf->written; 4669 IADDR UNUSED pc = abuf->addr; 4670 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4671 4672 SET_H_ACCUMS (FLD (f_acc), OPRND (acc)); 4673 4674 #undef OPRND 4675 #undef FLD 4676 } 4677 NEXT (vpc); 4678 4679 CASE (sem, INSN_PAR_MUL) : /* mul $dr,$sr */ 4680 { 4681 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4682 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4683 #define FLD(f) abuf->fields.sfmt_add.f 4684 #define OPRND(f) par_exec->operands.sfmt_add.f 4685 int UNUSED written = 0; 4686 IADDR UNUSED pc = abuf->addr; 4687 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4688 4689 { 4690 SI opval = MULSI (* FLD (i_dr), * FLD (i_sr)); 4691 OPRND (dr) = opval; 4692 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4693 } 4694 4695 #undef OPRND 4696 #undef FLD 4697 } 4698 NEXT (vpc); 4699 4700 CASE (sem, INSN_WRITE_MUL) : /* mul $dr,$sr */ 4701 { 4702 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4703 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4704 #define FLD(f) abuf->fields.sfmt_add.f 4705 #define OPRND(f) par_exec->operands.sfmt_add.f 4706 int UNUSED written = abuf->written; 4707 IADDR UNUSED pc = abuf->addr; 4708 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4709 4710 * FLD (i_dr) = OPRND (dr); 4711 4712 #undef OPRND 4713 #undef FLD 4714 } 4715 NEXT (vpc); 4716 4717 CASE (sem, INSN_PAR_MULHI_A) : /* mulhi $src1,$src2,$acc */ 4718 { 4719 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4720 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4721 #define FLD(f) abuf->fields.sfmt_machi_a.f 4722 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f 4723 int UNUSED written = 0; 4724 IADDR UNUSED pc = abuf->addr; 4725 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4726 4727 { 4728 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16); 4729 OPRND (acc) = opval; 4730 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 4731 } 4732 4733 #undef OPRND 4734 #undef FLD 4735 } 4736 NEXT (vpc); 4737 4738 CASE (sem, INSN_WRITE_MULHI_A) : /* mulhi $src1,$src2,$acc */ 4739 { 4740 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4741 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4742 #define FLD(f) abuf->fields.sfmt_machi_a.f 4743 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f 4744 int UNUSED written = abuf->written; 4745 IADDR UNUSED pc = abuf->addr; 4746 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4747 4748 SET_H_ACCUMS (FLD (f_acc), OPRND (acc)); 4749 4750 #undef OPRND 4751 #undef FLD 4752 } 4753 NEXT (vpc); 4754 4755 CASE (sem, INSN_PAR_MULLO_A) : /* mullo $src1,$src2,$acc */ 4756 { 4757 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4758 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4759 #define FLD(f) abuf->fields.sfmt_machi_a.f 4760 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f 4761 int UNUSED written = 0; 4762 IADDR UNUSED pc = abuf->addr; 4763 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4764 4765 { 4766 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16); 4767 OPRND (acc) = opval; 4768 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 4769 } 4770 4771 #undef OPRND 4772 #undef FLD 4773 } 4774 NEXT (vpc); 4775 4776 CASE (sem, INSN_WRITE_MULLO_A) : /* mullo $src1,$src2,$acc */ 4777 { 4778 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4779 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4780 #define FLD(f) abuf->fields.sfmt_machi_a.f 4781 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f 4782 int UNUSED written = abuf->written; 4783 IADDR UNUSED pc = abuf->addr; 4784 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4785 4786 SET_H_ACCUMS (FLD (f_acc), OPRND (acc)); 4787 4788 #undef OPRND 4789 #undef FLD 4790 } 4791 NEXT (vpc); 4792 4793 CASE (sem, INSN_PAR_MULWHI_A) : /* mulwhi $src1,$src2,$acc */ 4794 { 4795 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4796 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4797 #define FLD(f) abuf->fields.sfmt_machi_a.f 4798 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f 4799 int UNUSED written = 0; 4800 IADDR UNUSED pc = abuf->addr; 4801 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4802 4803 { 4804 DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))); 4805 OPRND (acc) = opval; 4806 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 4807 } 4808 4809 #undef OPRND 4810 #undef FLD 4811 } 4812 NEXT (vpc); 4813 4814 CASE (sem, INSN_WRITE_MULWHI_A) : /* mulwhi $src1,$src2,$acc */ 4815 { 4816 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4817 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4818 #define FLD(f) abuf->fields.sfmt_machi_a.f 4819 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f 4820 int UNUSED written = abuf->written; 4821 IADDR UNUSED pc = abuf->addr; 4822 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4823 4824 SET_H_ACCUMS (FLD (f_acc), OPRND (acc)); 4825 4826 #undef OPRND 4827 #undef FLD 4828 } 4829 NEXT (vpc); 4830 4831 CASE (sem, INSN_PAR_MULWLO_A) : /* mulwlo $src1,$src2,$acc */ 4832 { 4833 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4834 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4835 #define FLD(f) abuf->fields.sfmt_machi_a.f 4836 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f 4837 int UNUSED written = 0; 4838 IADDR UNUSED pc = abuf->addr; 4839 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4840 4841 { 4842 DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))); 4843 OPRND (acc) = opval; 4844 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 4845 } 4846 4847 #undef OPRND 4848 #undef FLD 4849 } 4850 NEXT (vpc); 4851 4852 CASE (sem, INSN_WRITE_MULWLO_A) : /* mulwlo $src1,$src2,$acc */ 4853 { 4854 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4855 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4856 #define FLD(f) abuf->fields.sfmt_machi_a.f 4857 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f 4858 int UNUSED written = abuf->written; 4859 IADDR UNUSED pc = abuf->addr; 4860 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4861 4862 SET_H_ACCUMS (FLD (f_acc), OPRND (acc)); 4863 4864 #undef OPRND 4865 #undef FLD 4866 } 4867 NEXT (vpc); 4868 4869 CASE (sem, INSN_PAR_MV) : /* mv $dr,$sr */ 4870 { 4871 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4872 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4873 #define FLD(f) abuf->fields.sfmt_ld_plus.f 4874 #define OPRND(f) par_exec->operands.sfmt_mv.f 4875 int UNUSED written = 0; 4876 IADDR UNUSED pc = abuf->addr; 4877 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4878 4879 { 4880 SI opval = * FLD (i_sr); 4881 OPRND (dr) = opval; 4882 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4883 } 4884 4885 #undef OPRND 4886 #undef FLD 4887 } 4888 NEXT (vpc); 4889 4890 CASE (sem, INSN_WRITE_MV) : /* mv $dr,$sr */ 4891 { 4892 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4893 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4894 #define FLD(f) abuf->fields.sfmt_ld_plus.f 4895 #define OPRND(f) par_exec->operands.sfmt_mv.f 4896 int UNUSED written = abuf->written; 4897 IADDR UNUSED pc = abuf->addr; 4898 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4899 4900 * FLD (i_dr) = OPRND (dr); 4901 4902 #undef OPRND 4903 #undef FLD 4904 } 4905 NEXT (vpc); 4906 4907 CASE (sem, INSN_PAR_MVFACHI_A) : /* mvfachi $dr,$accs */ 4908 { 4909 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4910 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4911 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f 4912 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f 4913 int UNUSED written = 0; 4914 IADDR UNUSED pc = abuf->addr; 4915 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4916 4917 { 4918 SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 32)); 4919 OPRND (dr) = opval; 4920 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4921 } 4922 4923 #undef OPRND 4924 #undef FLD 4925 } 4926 NEXT (vpc); 4927 4928 CASE (sem, INSN_WRITE_MVFACHI_A) : /* mvfachi $dr,$accs */ 4929 { 4930 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4931 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4932 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f 4933 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f 4934 int UNUSED written = abuf->written; 4935 IADDR UNUSED pc = abuf->addr; 4936 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4937 4938 * FLD (i_dr) = OPRND (dr); 4939 4940 #undef OPRND 4941 #undef FLD 4942 } 4943 NEXT (vpc); 4944 4945 CASE (sem, INSN_PAR_MVFACLO_A) : /* mvfaclo $dr,$accs */ 4946 { 4947 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4948 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4949 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f 4950 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f 4951 int UNUSED written = 0; 4952 IADDR UNUSED pc = abuf->addr; 4953 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4954 4955 { 4956 SI opval = TRUNCDISI (GET_H_ACCUMS (FLD (f_accs))); 4957 OPRND (dr) = opval; 4958 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4959 } 4960 4961 #undef OPRND 4962 #undef FLD 4963 } 4964 NEXT (vpc); 4965 4966 CASE (sem, INSN_WRITE_MVFACLO_A) : /* mvfaclo $dr,$accs */ 4967 { 4968 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4969 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4970 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f 4971 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f 4972 int UNUSED written = abuf->written; 4973 IADDR UNUSED pc = abuf->addr; 4974 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4975 4976 * FLD (i_dr) = OPRND (dr); 4977 4978 #undef OPRND 4979 #undef FLD 4980 } 4981 NEXT (vpc); 4982 4983 CASE (sem, INSN_PAR_MVFACMI_A) : /* mvfacmi $dr,$accs */ 4984 { 4985 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4986 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4987 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f 4988 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f 4989 int UNUSED written = 0; 4990 IADDR UNUSED pc = abuf->addr; 4991 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4992 4993 { 4994 SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 16)); 4995 OPRND (dr) = opval; 4996 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4997 } 4998 4999 #undef OPRND 5000 #undef FLD 5001 } 5002 NEXT (vpc); 5003 5004 CASE (sem, INSN_WRITE_MVFACMI_A) : /* mvfacmi $dr,$accs */ 5005 { 5006 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5007 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5008 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f 5009 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f 5010 int UNUSED written = abuf->written; 5011 IADDR UNUSED pc = abuf->addr; 5012 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5013 5014 * FLD (i_dr) = OPRND (dr); 5015 5016 #undef OPRND 5017 #undef FLD 5018 } 5019 NEXT (vpc); 5020 5021 CASE (sem, INSN_PAR_MVFC) : /* mvfc $dr,$scr */ 5022 { 5023 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5024 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5025 #define FLD(f) abuf->fields.sfmt_ld_plus.f 5026 #define OPRND(f) par_exec->operands.sfmt_mvfc.f 5027 int UNUSED written = 0; 5028 IADDR UNUSED pc = abuf->addr; 5029 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5030 5031 { 5032 SI opval = GET_H_CR (FLD (f_r2)); 5033 OPRND (dr) = opval; 5034 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5035 } 5036 5037 #undef OPRND 5038 #undef FLD 5039 } 5040 NEXT (vpc); 5041 5042 CASE (sem, INSN_WRITE_MVFC) : /* mvfc $dr,$scr */ 5043 { 5044 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5045 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5046 #define FLD(f) abuf->fields.sfmt_ld_plus.f 5047 #define OPRND(f) par_exec->operands.sfmt_mvfc.f 5048 int UNUSED written = abuf->written; 5049 IADDR UNUSED pc = abuf->addr; 5050 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5051 5052 * FLD (i_dr) = OPRND (dr); 5053 5054 #undef OPRND 5055 #undef FLD 5056 } 5057 NEXT (vpc); 5058 5059 CASE (sem, INSN_PAR_MVTACHI_A) : /* mvtachi $src1,$accs */ 5060 { 5061 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5062 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5063 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f 5064 #define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f 5065 int UNUSED written = 0; 5066 IADDR UNUSED pc = abuf->addr; 5067 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5068 5069 { 5070 DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32)); 5071 OPRND (accs) = opval; 5072 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 5073 } 5074 5075 #undef OPRND 5076 #undef FLD 5077 } 5078 NEXT (vpc); 5079 5080 CASE (sem, INSN_WRITE_MVTACHI_A) : /* mvtachi $src1,$accs */ 5081 { 5082 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5083 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5084 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f 5085 #define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f 5086 int UNUSED written = abuf->written; 5087 IADDR UNUSED pc = abuf->addr; 5088 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5089 5090 SET_H_ACCUMS (FLD (f_accs), OPRND (accs)); 5091 5092 #undef OPRND 5093 #undef FLD 5094 } 5095 NEXT (vpc); 5096 5097 CASE (sem, INSN_PAR_MVTACLO_A) : /* mvtaclo $src1,$accs */ 5098 { 5099 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5100 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5101 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f 5102 #define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f 5103 int UNUSED written = 0; 5104 IADDR UNUSED pc = abuf->addr; 5105 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5106 5107 { 5108 DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1))); 5109 OPRND (accs) = opval; 5110 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 5111 } 5112 5113 #undef OPRND 5114 #undef FLD 5115 } 5116 NEXT (vpc); 5117 5118 CASE (sem, INSN_WRITE_MVTACLO_A) : /* mvtaclo $src1,$accs */ 5119 { 5120 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5121 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5122 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f 5123 #define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f 5124 int UNUSED written = abuf->written; 5125 IADDR UNUSED pc = abuf->addr; 5126 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5127 5128 SET_H_ACCUMS (FLD (f_accs), OPRND (accs)); 5129 5130 #undef OPRND 5131 #undef FLD 5132 } 5133 NEXT (vpc); 5134 5135 CASE (sem, INSN_PAR_MVTC) : /* mvtc $sr,$dcr */ 5136 { 5137 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5138 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5139 #define FLD(f) abuf->fields.sfmt_ld_plus.f 5140 #define OPRND(f) par_exec->operands.sfmt_mvtc.f 5141 int UNUSED written = 0; 5142 IADDR UNUSED pc = abuf->addr; 5143 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5144 5145 { 5146 USI opval = * FLD (i_sr); 5147 OPRND (dcr) = opval; 5148 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 5149 } 5150 5151 #undef OPRND 5152 #undef FLD 5153 } 5154 NEXT (vpc); 5155 5156 CASE (sem, INSN_WRITE_MVTC) : /* mvtc $sr,$dcr */ 5157 { 5158 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5159 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5160 #define FLD(f) abuf->fields.sfmt_ld_plus.f 5161 #define OPRND(f) par_exec->operands.sfmt_mvtc.f 5162 int UNUSED written = abuf->written; 5163 IADDR UNUSED pc = abuf->addr; 5164 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5165 5166 SET_H_CR (FLD (f_r1), OPRND (dcr)); 5167 5168 #undef OPRND 5169 #undef FLD 5170 } 5171 NEXT (vpc); 5172 5173 CASE (sem, INSN_PAR_NEG) : /* neg $dr,$sr */ 5174 { 5175 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5176 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5177 #define FLD(f) abuf->fields.sfmt_ld_plus.f 5178 #define OPRND(f) par_exec->operands.sfmt_mv.f 5179 int UNUSED written = 0; 5180 IADDR UNUSED pc = abuf->addr; 5181 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5182 5183 { 5184 SI opval = NEGSI (* FLD (i_sr)); 5185 OPRND (dr) = opval; 5186 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5187 } 5188 5189 #undef OPRND 5190 #undef FLD 5191 } 5192 NEXT (vpc); 5193 5194 CASE (sem, INSN_WRITE_NEG) : /* neg $dr,$sr */ 5195 { 5196 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5197 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5198 #define FLD(f) abuf->fields.sfmt_ld_plus.f 5199 #define OPRND(f) par_exec->operands.sfmt_mv.f 5200 int UNUSED written = abuf->written; 5201 IADDR UNUSED pc = abuf->addr; 5202 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5203 5204 * FLD (i_dr) = OPRND (dr); 5205 5206 #undef OPRND 5207 #undef FLD 5208 } 5209 NEXT (vpc); 5210 5211 CASE (sem, INSN_PAR_NOP) : /* nop */ 5212 { 5213 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5214 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5215 #define FLD(f) abuf->fields.sfmt_empty.f 5216 #define OPRND(f) par_exec->operands.sfmt_nop.f 5217 int UNUSED written = 0; 5218 IADDR UNUSED pc = abuf->addr; 5219 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5220 5221 PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr); 5222 5223 #undef OPRND 5224 #undef FLD 5225 } 5226 NEXT (vpc); 5227 5228 CASE (sem, INSN_WRITE_NOP) : /* nop */ 5229 { 5230 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5231 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5232 #define FLD(f) abuf->fields.sfmt_empty.f 5233 #define OPRND(f) par_exec->operands.sfmt_nop.f 5234 int UNUSED written = abuf->written; 5235 IADDR UNUSED pc = abuf->addr; 5236 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5237 5238 5239 #undef OPRND 5240 #undef FLD 5241 } 5242 NEXT (vpc); 5243 5244 CASE (sem, INSN_PAR_NOT) : /* not $dr,$sr */ 5245 { 5246 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5247 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5248 #define FLD(f) abuf->fields.sfmt_ld_plus.f 5249 #define OPRND(f) par_exec->operands.sfmt_mv.f 5250 int UNUSED written = 0; 5251 IADDR UNUSED pc = abuf->addr; 5252 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5253 5254 { 5255 SI opval = INVSI (* FLD (i_sr)); 5256 OPRND (dr) = opval; 5257 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5258 } 5259 5260 #undef OPRND 5261 #undef FLD 5262 } 5263 NEXT (vpc); 5264 5265 CASE (sem, INSN_WRITE_NOT) : /* not $dr,$sr */ 5266 { 5267 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5268 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5269 #define FLD(f) abuf->fields.sfmt_ld_plus.f 5270 #define OPRND(f) par_exec->operands.sfmt_mv.f 5271 int UNUSED written = abuf->written; 5272 IADDR UNUSED pc = abuf->addr; 5273 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5274 5275 * FLD (i_dr) = OPRND (dr); 5276 5277 #undef OPRND 5278 #undef FLD 5279 } 5280 NEXT (vpc); 5281 5282 CASE (sem, INSN_PAR_RAC_DSI) : /* rac $accd,$accs,$imm1 */ 5283 { 5284 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5285 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5286 #define FLD(f) abuf->fields.sfmt_rac_dsi.f 5287 #define OPRND(f) par_exec->operands.sfmt_rac_dsi.f 5288 int UNUSED written = 0; 5289 IADDR UNUSED pc = abuf->addr; 5290 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5291 5292 { 5293 DI tmp_tmp1; 5294 tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1)); 5295 tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768)); 5296 { 5297 DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000))); 5298 OPRND (accd) = opval; 5299 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 5300 } 5301 } 5302 5303 #undef OPRND 5304 #undef FLD 5305 } 5306 NEXT (vpc); 5307 5308 CASE (sem, INSN_WRITE_RAC_DSI) : /* rac $accd,$accs,$imm1 */ 5309 { 5310 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5311 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5312 #define FLD(f) abuf->fields.sfmt_rac_dsi.f 5313 #define OPRND(f) par_exec->operands.sfmt_rac_dsi.f 5314 int UNUSED written = abuf->written; 5315 IADDR UNUSED pc = abuf->addr; 5316 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5317 5318 SET_H_ACCUMS (FLD (f_accd), OPRND (accd)); 5319 5320 #undef OPRND 5321 #undef FLD 5322 } 5323 NEXT (vpc); 5324 5325 CASE (sem, INSN_PAR_RACH_DSI) : /* rach $accd,$accs,$imm1 */ 5326 { 5327 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5328 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5329 #define FLD(f) abuf->fields.sfmt_rac_dsi.f 5330 #define OPRND(f) par_exec->operands.sfmt_rac_dsi.f 5331 int UNUSED written = 0; 5332 IADDR UNUSED pc = abuf->addr; 5333 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5334 5335 { 5336 DI tmp_tmp1; 5337 tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1)); 5338 tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000)); 5339 { 5340 DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0))); 5341 OPRND (accd) = opval; 5342 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 5343 } 5344 } 5345 5346 #undef OPRND 5347 #undef FLD 5348 } 5349 NEXT (vpc); 5350 5351 CASE (sem, INSN_WRITE_RACH_DSI) : /* rach $accd,$accs,$imm1 */ 5352 { 5353 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5354 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5355 #define FLD(f) abuf->fields.sfmt_rac_dsi.f 5356 #define OPRND(f) par_exec->operands.sfmt_rac_dsi.f 5357 int UNUSED written = abuf->written; 5358 IADDR UNUSED pc = abuf->addr; 5359 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5360 5361 SET_H_ACCUMS (FLD (f_accd), OPRND (accd)); 5362 5363 #undef OPRND 5364 #undef FLD 5365 } 5366 NEXT (vpc); 5367 5368 CASE (sem, INSN_PAR_RTE) : /* rte */ 5369 { 5370 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5371 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5372 #define FLD(f) abuf->fields.sfmt_empty.f 5373 #define OPRND(f) par_exec->operands.sfmt_rte.f 5374 int UNUSED written = 0; 5375 IADDR UNUSED pc = abuf->addr; 5376 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5377 5378 { 5379 { 5380 USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4); 5381 OPRND (pc) = opval; 5382 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 5383 } 5384 { 5385 USI opval = GET_H_CR (((UINT) 14)); 5386 OPRND (h_cr_USI_6) = opval; 5387 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 5388 } 5389 { 5390 UQI opval = CPU (h_bpsw); 5391 OPRND (h_psw_UQI) = opval; 5392 TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval); 5393 } 5394 { 5395 UQI opval = CPU (h_bbpsw); 5396 OPRND (h_bpsw_UQI) = opval; 5397 TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval); 5398 } 5399 } 5400 5401 #undef OPRND 5402 #undef FLD 5403 } 5404 NEXT (vpc); 5405 5406 CASE (sem, INSN_WRITE_RTE) : /* rte */ 5407 { 5408 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5409 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5410 #define FLD(f) abuf->fields.sfmt_empty.f 5411 #define OPRND(f) par_exec->operands.sfmt_rte.f 5412 int UNUSED written = abuf->written; 5413 IADDR UNUSED pc = abuf->addr; 5414 SEM_BRANCH_INIT 5415 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5416 5417 CPU (h_bpsw) = OPRND (h_bpsw_UQI); 5418 SET_H_CR (((UINT) 6), OPRND (h_cr_USI_6)); 5419 SET_H_PSW (OPRND (h_psw_UQI)); 5420 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); 5421 5422 SEM_BRANCH_FINI (vpc); 5423 #undef OPRND 5424 #undef FLD 5425 } 5426 NEXT (vpc); 5427 5428 CASE (sem, INSN_PAR_SLL) : /* sll $dr,$sr */ 5429 { 5430 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5431 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5432 #define FLD(f) abuf->fields.sfmt_add.f 5433 #define OPRND(f) par_exec->operands.sfmt_add.f 5434 int UNUSED written = 0; 5435 IADDR UNUSED pc = abuf->addr; 5436 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5437 5438 { 5439 SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); 5440 OPRND (dr) = opval; 5441 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5442 } 5443 5444 #undef OPRND 5445 #undef FLD 5446 } 5447 NEXT (vpc); 5448 5449 CASE (sem, INSN_WRITE_SLL) : /* sll $dr,$sr */ 5450 { 5451 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5452 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5453 #define FLD(f) abuf->fields.sfmt_add.f 5454 #define OPRND(f) par_exec->operands.sfmt_add.f 5455 int UNUSED written = abuf->written; 5456 IADDR UNUSED pc = abuf->addr; 5457 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5458 5459 * FLD (i_dr) = OPRND (dr); 5460 5461 #undef OPRND 5462 #undef FLD 5463 } 5464 NEXT (vpc); 5465 5466 CASE (sem, INSN_PAR_SLLI) : /* slli $dr,$uimm5 */ 5467 { 5468 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5469 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5470 #define FLD(f) abuf->fields.sfmt_slli.f 5471 #define OPRND(f) par_exec->operands.sfmt_slli.f 5472 int UNUSED written = 0; 5473 IADDR UNUSED pc = abuf->addr; 5474 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5475 5476 { 5477 SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5)); 5478 OPRND (dr) = opval; 5479 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5480 } 5481 5482 #undef OPRND 5483 #undef FLD 5484 } 5485 NEXT (vpc); 5486 5487 CASE (sem, INSN_WRITE_SLLI) : /* slli $dr,$uimm5 */ 5488 { 5489 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5490 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5491 #define FLD(f) abuf->fields.sfmt_slli.f 5492 #define OPRND(f) par_exec->operands.sfmt_slli.f 5493 int UNUSED written = abuf->written; 5494 IADDR UNUSED pc = abuf->addr; 5495 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5496 5497 * FLD (i_dr) = OPRND (dr); 5498 5499 #undef OPRND 5500 #undef FLD 5501 } 5502 NEXT (vpc); 5503 5504 CASE (sem, INSN_PAR_SRA) : /* sra $dr,$sr */ 5505 { 5506 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5507 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5508 #define FLD(f) abuf->fields.sfmt_add.f 5509 #define OPRND(f) par_exec->operands.sfmt_add.f 5510 int UNUSED written = 0; 5511 IADDR UNUSED pc = abuf->addr; 5512 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5513 5514 { 5515 SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); 5516 OPRND (dr) = opval; 5517 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5518 } 5519 5520 #undef OPRND 5521 #undef FLD 5522 } 5523 NEXT (vpc); 5524 5525 CASE (sem, INSN_WRITE_SRA) : /* sra $dr,$sr */ 5526 { 5527 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5528 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5529 #define FLD(f) abuf->fields.sfmt_add.f 5530 #define OPRND(f) par_exec->operands.sfmt_add.f 5531 int UNUSED written = abuf->written; 5532 IADDR UNUSED pc = abuf->addr; 5533 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5534 5535 * FLD (i_dr) = OPRND (dr); 5536 5537 #undef OPRND 5538 #undef FLD 5539 } 5540 NEXT (vpc); 5541 5542 CASE (sem, INSN_PAR_SRAI) : /* srai $dr,$uimm5 */ 5543 { 5544 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5545 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5546 #define FLD(f) abuf->fields.sfmt_slli.f 5547 #define OPRND(f) par_exec->operands.sfmt_slli.f 5548 int UNUSED written = 0; 5549 IADDR UNUSED pc = abuf->addr; 5550 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5551 5552 { 5553 SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5)); 5554 OPRND (dr) = opval; 5555 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5556 } 5557 5558 #undef OPRND 5559 #undef FLD 5560 } 5561 NEXT (vpc); 5562 5563 CASE (sem, INSN_WRITE_SRAI) : /* srai $dr,$uimm5 */ 5564 { 5565 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5566 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5567 #define FLD(f) abuf->fields.sfmt_slli.f 5568 #define OPRND(f) par_exec->operands.sfmt_slli.f 5569 int UNUSED written = abuf->written; 5570 IADDR UNUSED pc = abuf->addr; 5571 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5572 5573 * FLD (i_dr) = OPRND (dr); 5574 5575 #undef OPRND 5576 #undef FLD 5577 } 5578 NEXT (vpc); 5579 5580 CASE (sem, INSN_PAR_SRL) : /* srl $dr,$sr */ 5581 { 5582 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5583 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5584 #define FLD(f) abuf->fields.sfmt_add.f 5585 #define OPRND(f) par_exec->operands.sfmt_add.f 5586 int UNUSED written = 0; 5587 IADDR UNUSED pc = abuf->addr; 5588 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5589 5590 { 5591 SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); 5592 OPRND (dr) = opval; 5593 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5594 } 5595 5596 #undef OPRND 5597 #undef FLD 5598 } 5599 NEXT (vpc); 5600 5601 CASE (sem, INSN_WRITE_SRL) : /* srl $dr,$sr */ 5602 { 5603 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5604 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5605 #define FLD(f) abuf->fields.sfmt_add.f 5606 #define OPRND(f) par_exec->operands.sfmt_add.f 5607 int UNUSED written = abuf->written; 5608 IADDR UNUSED pc = abuf->addr; 5609 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5610 5611 * FLD (i_dr) = OPRND (dr); 5612 5613 #undef OPRND 5614 #undef FLD 5615 } 5616 NEXT (vpc); 5617 5618 CASE (sem, INSN_PAR_SRLI) : /* srli $dr,$uimm5 */ 5619 { 5620 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5621 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5622 #define FLD(f) abuf->fields.sfmt_slli.f 5623 #define OPRND(f) par_exec->operands.sfmt_slli.f 5624 int UNUSED written = 0; 5625 IADDR UNUSED pc = abuf->addr; 5626 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5627 5628 { 5629 SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5)); 5630 OPRND (dr) = opval; 5631 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5632 } 5633 5634 #undef OPRND 5635 #undef FLD 5636 } 5637 NEXT (vpc); 5638 5639 CASE (sem, INSN_WRITE_SRLI) : /* srli $dr,$uimm5 */ 5640 { 5641 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5642 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5643 #define FLD(f) abuf->fields.sfmt_slli.f 5644 #define OPRND(f) par_exec->operands.sfmt_slli.f 5645 int UNUSED written = abuf->written; 5646 IADDR UNUSED pc = abuf->addr; 5647 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5648 5649 * FLD (i_dr) = OPRND (dr); 5650 5651 #undef OPRND 5652 #undef FLD 5653 } 5654 NEXT (vpc); 5655 5656 CASE (sem, INSN_PAR_ST) : /* st $src1,@$src2 */ 5657 { 5658 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5659 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5660 #define FLD(f) abuf->fields.sfmt_st_plus.f 5661 #define OPRND(f) par_exec->operands.sfmt_st.f 5662 int UNUSED written = 0; 5663 IADDR UNUSED pc = abuf->addr; 5664 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5665 5666 { 5667 SI opval = * FLD (i_src1); 5668 OPRND (h_memory_SI_src2_idx) = * FLD (i_src2); 5669 OPRND (h_memory_SI_src2) = opval; 5670 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 5671 } 5672 5673 #undef OPRND 5674 #undef FLD 5675 } 5676 NEXT (vpc); 5677 5678 CASE (sem, INSN_WRITE_ST) : /* st $src1,@$src2 */ 5679 { 5680 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5681 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5682 #define FLD(f) abuf->fields.sfmt_st_plus.f 5683 #define OPRND(f) par_exec->operands.sfmt_st.f 5684 int UNUSED written = abuf->written; 5685 IADDR UNUSED pc = abuf->addr; 5686 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5687 5688 SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_src2_idx), OPRND (h_memory_SI_src2)); 5689 5690 #undef OPRND 5691 #undef FLD 5692 } 5693 NEXT (vpc); 5694 5695 CASE (sem, INSN_PAR_STB) : /* stb $src1,@$src2 */ 5696 { 5697 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5698 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5699 #define FLD(f) abuf->fields.sfmt_st_plus.f 5700 #define OPRND(f) par_exec->operands.sfmt_stb.f 5701 int UNUSED written = 0; 5702 IADDR UNUSED pc = abuf->addr; 5703 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5704 5705 { 5706 QI opval = * FLD (i_src1); 5707 OPRND (h_memory_QI_src2_idx) = * FLD (i_src2); 5708 OPRND (h_memory_QI_src2) = opval; 5709 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 5710 } 5711 5712 #undef OPRND 5713 #undef FLD 5714 } 5715 NEXT (vpc); 5716 5717 CASE (sem, INSN_WRITE_STB) : /* stb $src1,@$src2 */ 5718 { 5719 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5720 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5721 #define FLD(f) abuf->fields.sfmt_st_plus.f 5722 #define OPRND(f) par_exec->operands.sfmt_stb.f 5723 int UNUSED written = abuf->written; 5724 IADDR UNUSED pc = abuf->addr; 5725 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5726 5727 SETMEMQI (current_cpu, pc, OPRND (h_memory_QI_src2_idx), OPRND (h_memory_QI_src2)); 5728 5729 #undef OPRND 5730 #undef FLD 5731 } 5732 NEXT (vpc); 5733 5734 CASE (sem, INSN_PAR_STH) : /* sth $src1,@$src2 */ 5735 { 5736 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5737 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5738 #define FLD(f) abuf->fields.sfmt_st_plus.f 5739 #define OPRND(f) par_exec->operands.sfmt_sth.f 5740 int UNUSED written = 0; 5741 IADDR UNUSED pc = abuf->addr; 5742 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5743 5744 { 5745 HI opval = * FLD (i_src1); 5746 OPRND (h_memory_HI_src2_idx) = * FLD (i_src2); 5747 OPRND (h_memory_HI_src2) = opval; 5748 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 5749 } 5750 5751 #undef OPRND 5752 #undef FLD 5753 } 5754 NEXT (vpc); 5755 5756 CASE (sem, INSN_WRITE_STH) : /* sth $src1,@$src2 */ 5757 { 5758 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5759 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5760 #define FLD(f) abuf->fields.sfmt_st_plus.f 5761 #define OPRND(f) par_exec->operands.sfmt_sth.f 5762 int UNUSED written = abuf->written; 5763 IADDR UNUSED pc = abuf->addr; 5764 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5765 5766 SETMEMHI (current_cpu, pc, OPRND (h_memory_HI_src2_idx), OPRND (h_memory_HI_src2)); 5767 5768 #undef OPRND 5769 #undef FLD 5770 } 5771 NEXT (vpc); 5772 5773 CASE (sem, INSN_PAR_ST_PLUS) : /* st $src1,@+$src2 */ 5774 { 5775 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5776 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5777 #define FLD(f) abuf->fields.sfmt_st_plus.f 5778 #define OPRND(f) par_exec->operands.sfmt_st_plus.f 5779 int UNUSED written = 0; 5780 IADDR UNUSED pc = abuf->addr; 5781 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5782 5783 { 5784 SI tmp_new_src2; 5785 tmp_new_src2 = ADDSI (* FLD (i_src2), 4); 5786 { 5787 SI opval = * FLD (i_src1); 5788 OPRND (h_memory_SI_new_src2_idx) = tmp_new_src2; 5789 OPRND (h_memory_SI_new_src2) = opval; 5790 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 5791 } 5792 { 5793 SI opval = tmp_new_src2; 5794 OPRND (src2) = opval; 5795 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5796 } 5797 } 5798 5799 #undef OPRND 5800 #undef FLD 5801 } 5802 NEXT (vpc); 5803 5804 CASE (sem, INSN_WRITE_ST_PLUS) : /* st $src1,@+$src2 */ 5805 { 5806 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5807 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5808 #define FLD(f) abuf->fields.sfmt_st_plus.f 5809 #define OPRND(f) par_exec->operands.sfmt_st_plus.f 5810 int UNUSED written = abuf->written; 5811 IADDR UNUSED pc = abuf->addr; 5812 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5813 5814 SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_new_src2_idx), OPRND (h_memory_SI_new_src2)); 5815 * FLD (i_src2) = OPRND (src2); 5816 5817 #undef OPRND 5818 #undef FLD 5819 } 5820 NEXT (vpc); 5821 5822 CASE (sem, INSN_PAR_STH_PLUS) : /* sth $src1,@$src2+ */ 5823 { 5824 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5825 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5826 #define FLD(f) abuf->fields.sfmt_st_plus.f 5827 #define OPRND(f) par_exec->operands.sfmt_sth_plus.f 5828 int UNUSED written = 0; 5829 IADDR UNUSED pc = abuf->addr; 5830 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5831 5832 { 5833 SI tmp_new_src2; 5834 tmp_new_src2 = * FLD (i_src2); 5835 { 5836 HI opval = * FLD (i_src1); 5837 OPRND (h_memory_HI_new_src2_idx) = tmp_new_src2; 5838 OPRND (h_memory_HI_new_src2) = opval; 5839 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 5840 } 5841 { 5842 SI opval = ADDSI (tmp_new_src2, 2); 5843 OPRND (src2) = opval; 5844 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5845 } 5846 } 5847 5848 #undef OPRND 5849 #undef FLD 5850 } 5851 NEXT (vpc); 5852 5853 CASE (sem, INSN_WRITE_STH_PLUS) : /* sth $src1,@$src2+ */ 5854 { 5855 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5856 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5857 #define FLD(f) abuf->fields.sfmt_st_plus.f 5858 #define OPRND(f) par_exec->operands.sfmt_sth_plus.f 5859 int UNUSED written = abuf->written; 5860 IADDR UNUSED pc = abuf->addr; 5861 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5862 5863 SETMEMHI (current_cpu, pc, OPRND (h_memory_HI_new_src2_idx), OPRND (h_memory_HI_new_src2)); 5864 * FLD (i_src2) = OPRND (src2); 5865 5866 #undef OPRND 5867 #undef FLD 5868 } 5869 NEXT (vpc); 5870 5871 CASE (sem, INSN_PAR_STB_PLUS) : /* stb $src1,@$src2+ */ 5872 { 5873 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5874 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5875 #define FLD(f) abuf->fields.sfmt_st_plus.f 5876 #define OPRND(f) par_exec->operands.sfmt_stb_plus.f 5877 int UNUSED written = 0; 5878 IADDR UNUSED pc = abuf->addr; 5879 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5880 5881 { 5882 SI tmp_new_src2; 5883 tmp_new_src2 = * FLD (i_src2); 5884 { 5885 QI opval = * FLD (i_src1); 5886 OPRND (h_memory_QI_new_src2_idx) = tmp_new_src2; 5887 OPRND (h_memory_QI_new_src2) = opval; 5888 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 5889 } 5890 { 5891 SI opval = ADDSI (tmp_new_src2, 1); 5892 OPRND (src2) = opval; 5893 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5894 } 5895 } 5896 5897 #undef OPRND 5898 #undef FLD 5899 } 5900 NEXT (vpc); 5901 5902 CASE (sem, INSN_WRITE_STB_PLUS) : /* stb $src1,@$src2+ */ 5903 { 5904 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5905 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5906 #define FLD(f) abuf->fields.sfmt_st_plus.f 5907 #define OPRND(f) par_exec->operands.sfmt_stb_plus.f 5908 int UNUSED written = abuf->written; 5909 IADDR UNUSED pc = abuf->addr; 5910 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5911 5912 SETMEMQI (current_cpu, pc, OPRND (h_memory_QI_new_src2_idx), OPRND (h_memory_QI_new_src2)); 5913 * FLD (i_src2) = OPRND (src2); 5914 5915 #undef OPRND 5916 #undef FLD 5917 } 5918 NEXT (vpc); 5919 5920 CASE (sem, INSN_PAR_ST_MINUS) : /* st $src1,@-$src2 */ 5921 { 5922 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5923 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5924 #define FLD(f) abuf->fields.sfmt_st_plus.f 5925 #define OPRND(f) par_exec->operands.sfmt_st_plus.f 5926 int UNUSED written = 0; 5927 IADDR UNUSED pc = abuf->addr; 5928 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5929 5930 { 5931 SI tmp_new_src2; 5932 tmp_new_src2 = SUBSI (* FLD (i_src2), 4); 5933 { 5934 SI opval = * FLD (i_src1); 5935 OPRND (h_memory_SI_new_src2_idx) = tmp_new_src2; 5936 OPRND (h_memory_SI_new_src2) = opval; 5937 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 5938 } 5939 { 5940 SI opval = tmp_new_src2; 5941 OPRND (src2) = opval; 5942 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5943 } 5944 } 5945 5946 #undef OPRND 5947 #undef FLD 5948 } 5949 NEXT (vpc); 5950 5951 CASE (sem, INSN_WRITE_ST_MINUS) : /* st $src1,@-$src2 */ 5952 { 5953 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5954 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5955 #define FLD(f) abuf->fields.sfmt_st_plus.f 5956 #define OPRND(f) par_exec->operands.sfmt_st_plus.f 5957 int UNUSED written = abuf->written; 5958 IADDR UNUSED pc = abuf->addr; 5959 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5960 5961 SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_new_src2_idx), OPRND (h_memory_SI_new_src2)); 5962 * FLD (i_src2) = OPRND (src2); 5963 5964 #undef OPRND 5965 #undef FLD 5966 } 5967 NEXT (vpc); 5968 5969 CASE (sem, INSN_PAR_SUB) : /* sub $dr,$sr */ 5970 { 5971 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5972 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5973 #define FLD(f) abuf->fields.sfmt_add.f 5974 #define OPRND(f) par_exec->operands.sfmt_add.f 5975 int UNUSED written = 0; 5976 IADDR UNUSED pc = abuf->addr; 5977 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5978 5979 { 5980 SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr)); 5981 OPRND (dr) = opval; 5982 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5983 } 5984 5985 #undef OPRND 5986 #undef FLD 5987 } 5988 NEXT (vpc); 5989 5990 CASE (sem, INSN_WRITE_SUB) : /* sub $dr,$sr */ 5991 { 5992 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5993 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5994 #define FLD(f) abuf->fields.sfmt_add.f 5995 #define OPRND(f) par_exec->operands.sfmt_add.f 5996 int UNUSED written = abuf->written; 5997 IADDR UNUSED pc = abuf->addr; 5998 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5999 6000 * FLD (i_dr) = OPRND (dr); 6001 6002 #undef OPRND 6003 #undef FLD 6004 } 6005 NEXT (vpc); 6006 6007 CASE (sem, INSN_PAR_SUBV) : /* subv $dr,$sr */ 6008 { 6009 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6010 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6011 #define FLD(f) abuf->fields.sfmt_add.f 6012 #define OPRND(f) par_exec->operands.sfmt_addv.f 6013 int UNUSED written = 0; 6014 IADDR UNUSED pc = abuf->addr; 6015 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6016 6017 { 6018 SI temp0;BI temp1; 6019 temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr)); 6020 temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0); 6021 { 6022 SI opval = temp0; 6023 OPRND (dr) = opval; 6024 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6025 } 6026 { 6027 BI opval = temp1; 6028 OPRND (condbit) = opval; 6029 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 6030 } 6031 } 6032 6033 #undef OPRND 6034 #undef FLD 6035 } 6036 NEXT (vpc); 6037 6038 CASE (sem, INSN_WRITE_SUBV) : /* subv $dr,$sr */ 6039 { 6040 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6041 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6042 #define FLD(f) abuf->fields.sfmt_add.f 6043 #define OPRND(f) par_exec->operands.sfmt_addv.f 6044 int UNUSED written = abuf->written; 6045 IADDR UNUSED pc = abuf->addr; 6046 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6047 6048 CPU (h_cond) = OPRND (condbit); 6049 * FLD (i_dr) = OPRND (dr); 6050 6051 #undef OPRND 6052 #undef FLD 6053 } 6054 NEXT (vpc); 6055 6056 CASE (sem, INSN_PAR_SUBX) : /* subx $dr,$sr */ 6057 { 6058 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6059 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6060 #define FLD(f) abuf->fields.sfmt_add.f 6061 #define OPRND(f) par_exec->operands.sfmt_addx.f 6062 int UNUSED written = 0; 6063 IADDR UNUSED pc = abuf->addr; 6064 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6065 6066 { 6067 SI temp0;BI temp1; 6068 temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); 6069 temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); 6070 { 6071 SI opval = temp0; 6072 OPRND (dr) = opval; 6073 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6074 } 6075 { 6076 BI opval = temp1; 6077 OPRND (condbit) = opval; 6078 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 6079 } 6080 } 6081 6082 #undef OPRND 6083 #undef FLD 6084 } 6085 NEXT (vpc); 6086 6087 CASE (sem, INSN_WRITE_SUBX) : /* subx $dr,$sr */ 6088 { 6089 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6090 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6091 #define FLD(f) abuf->fields.sfmt_add.f 6092 #define OPRND(f) par_exec->operands.sfmt_addx.f 6093 int UNUSED written = abuf->written; 6094 IADDR UNUSED pc = abuf->addr; 6095 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6096 6097 CPU (h_cond) = OPRND (condbit); 6098 * FLD (i_dr) = OPRND (dr); 6099 6100 #undef OPRND 6101 #undef FLD 6102 } 6103 NEXT (vpc); 6104 6105 CASE (sem, INSN_PAR_TRAP) : /* trap $uimm4 */ 6106 { 6107 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6108 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6109 #define FLD(f) abuf->fields.sfmt_trap.f 6110 #define OPRND(f) par_exec->operands.sfmt_trap.f 6111 int UNUSED written = 0; 6112 IADDR UNUSED pc = abuf->addr; 6113 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6114 6115 { 6116 { 6117 USI opval = GET_H_CR (((UINT) 6)); 6118 OPRND (h_cr_USI_14) = opval; 6119 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 6120 } 6121 { 6122 USI opval = ADDSI (pc, 4); 6123 OPRND (h_cr_USI_6) = opval; 6124 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 6125 } 6126 { 6127 UQI opval = CPU (h_bpsw); 6128 OPRND (h_bbpsw_UQI) = opval; 6129 TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval); 6130 } 6131 { 6132 UQI opval = GET_H_PSW (); 6133 OPRND (h_bpsw_UQI) = opval; 6134 TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval); 6135 } 6136 { 6137 UQI opval = ANDQI (GET_H_PSW (), 128); 6138 OPRND (h_psw_UQI) = opval; 6139 TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval); 6140 } 6141 { 6142 SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4)); 6143 OPRND (pc) = opval; 6144 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 6145 } 6146 } 6147 6148 #undef OPRND 6149 #undef FLD 6150 } 6151 NEXT (vpc); 6152 6153 CASE (sem, INSN_WRITE_TRAP) : /* trap $uimm4 */ 6154 { 6155 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6156 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6157 #define FLD(f) abuf->fields.sfmt_trap.f 6158 #define OPRND(f) par_exec->operands.sfmt_trap.f 6159 int UNUSED written = abuf->written; 6160 IADDR UNUSED pc = abuf->addr; 6161 SEM_BRANCH_INIT 6162 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6163 6164 CPU (h_bbpsw) = OPRND (h_bbpsw_UQI); 6165 CPU (h_bpsw) = OPRND (h_bpsw_UQI); 6166 SET_H_CR (((UINT) 14), OPRND (h_cr_USI_14)); 6167 SET_H_CR (((UINT) 6), OPRND (h_cr_USI_6)); 6168 SET_H_PSW (OPRND (h_psw_UQI)); 6169 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); 6170 6171 SEM_BRANCH_FINI (vpc); 6172 #undef OPRND 6173 #undef FLD 6174 } 6175 NEXT (vpc); 6176 6177 CASE (sem, INSN_PAR_UNLOCK) : /* unlock $src1,@$src2 */ 6178 { 6179 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6180 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6181 #define FLD(f) abuf->fields.sfmt_st_plus.f 6182 #define OPRND(f) par_exec->operands.sfmt_unlock.f 6183 int UNUSED written = 0; 6184 IADDR UNUSED pc = abuf->addr; 6185 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6186 6187 { 6188 if (CPU (h_lock)) { 6189 { 6190 SI opval = * FLD (i_src1); 6191 OPRND (h_memory_SI_src2_idx) = * FLD (i_src2); 6192 OPRND (h_memory_SI_src2) = opval; 6193 written |= (1 << 4); 6194 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 6195 } 6196 } 6197 { 6198 BI opval = 0; 6199 OPRND (h_lock_BI) = opval; 6200 TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval); 6201 } 6202 } 6203 6204 abuf->written = written; 6205 #undef OPRND 6206 #undef FLD 6207 } 6208 NEXT (vpc); 6209 6210 CASE (sem, INSN_WRITE_UNLOCK) : /* unlock $src1,@$src2 */ 6211 { 6212 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6213 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6214 #define FLD(f) abuf->fields.sfmt_st_plus.f 6215 #define OPRND(f) par_exec->operands.sfmt_unlock.f 6216 int UNUSED written = abuf->written; 6217 IADDR UNUSED pc = abuf->addr; 6218 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6219 6220 CPU (h_lock) = OPRND (h_lock_BI); 6221 if (written & (1 << 4)) 6222 { 6223 SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_src2_idx), OPRND (h_memory_SI_src2)); 6224 } 6225 6226 #undef OPRND 6227 #undef FLD 6228 } 6229 NEXT (vpc); 6230 6231 CASE (sem, INSN_PAR_PCMPBZ) : /* pcmpbz $src2 */ 6232 { 6233 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6234 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6235 #define FLD(f) abuf->fields.sfmt_st_plus.f 6236 #define OPRND(f) par_exec->operands.sfmt_cmpz.f 6237 int UNUSED written = 0; 6238 IADDR UNUSED pc = abuf->addr; 6239 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6240 6241 { 6242 BI opval = (EQSI (ANDSI (* FLD (i_src2), 255), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 65280), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 0xff000000), 0)) ? (1) : (0); 6243 OPRND (condbit) = opval; 6244 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 6245 } 6246 6247 #undef OPRND 6248 #undef FLD 6249 } 6250 NEXT (vpc); 6251 6252 CASE (sem, INSN_WRITE_PCMPBZ) : /* pcmpbz $src2 */ 6253 { 6254 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6255 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6256 #define FLD(f) abuf->fields.sfmt_st_plus.f 6257 #define OPRND(f) par_exec->operands.sfmt_cmpz.f 6258 int UNUSED written = abuf->written; 6259 IADDR UNUSED pc = abuf->addr; 6260 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6261 6262 CPU (h_cond) = OPRND (condbit); 6263 6264 #undef OPRND 6265 #undef FLD 6266 } 6267 NEXT (vpc); 6268 6269 CASE (sem, INSN_PAR_SADD) : /* sadd */ 6270 { 6271 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6272 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6273 #define FLD(f) abuf->fields.sfmt_empty.f 6274 #define OPRND(f) par_exec->operands.sfmt_sadd.f 6275 int UNUSED written = 0; 6276 IADDR UNUSED pc = abuf->addr; 6277 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6278 6279 { 6280 DI opval = ADDDI (SRADI (GET_H_ACCUMS (((UINT) 1)), 16), GET_H_ACCUMS (((UINT) 0))); 6281 OPRND (h_accums_DI_0) = opval; 6282 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 6283 } 6284 6285 #undef OPRND 6286 #undef FLD 6287 } 6288 NEXT (vpc); 6289 6290 CASE (sem, INSN_WRITE_SADD) : /* sadd */ 6291 { 6292 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6293 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6294 #define FLD(f) abuf->fields.sfmt_empty.f 6295 #define OPRND(f) par_exec->operands.sfmt_sadd.f 6296 int UNUSED written = abuf->written; 6297 IADDR UNUSED pc = abuf->addr; 6298 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6299 6300 SET_H_ACCUMS (((UINT) 0), OPRND (h_accums_DI_0)); 6301 6302 #undef OPRND 6303 #undef FLD 6304 } 6305 NEXT (vpc); 6306 6307 CASE (sem, INSN_PAR_MACWU1) : /* macwu1 $src1,$src2 */ 6308 { 6309 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6310 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6311 #define FLD(f) abuf->fields.sfmt_st_plus.f 6312 #define OPRND(f) par_exec->operands.sfmt_macwu1.f 6313 int UNUSED written = 0; 6314 IADDR UNUSED pc = abuf->addr; 6315 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6316 6317 { 6318 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8); 6319 OPRND (h_accums_DI_1) = opval; 6320 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 6321 } 6322 6323 #undef OPRND 6324 #undef FLD 6325 } 6326 NEXT (vpc); 6327 6328 CASE (sem, INSN_WRITE_MACWU1) : /* macwu1 $src1,$src2 */ 6329 { 6330 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6331 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6332 #define FLD(f) abuf->fields.sfmt_st_plus.f 6333 #define OPRND(f) par_exec->operands.sfmt_macwu1.f 6334 int UNUSED written = abuf->written; 6335 IADDR UNUSED pc = abuf->addr; 6336 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6337 6338 SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1)); 6339 6340 #undef OPRND 6341 #undef FLD 6342 } 6343 NEXT (vpc); 6344 6345 CASE (sem, INSN_PAR_MSBLO) : /* msblo $src1,$src2 */ 6346 { 6347 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6348 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6349 #define FLD(f) abuf->fields.sfmt_st_plus.f 6350 #define OPRND(f) par_exec->operands.sfmt_msblo.f 6351 int UNUSED written = 0; 6352 IADDR UNUSED pc = abuf->addr; 6353 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6354 6355 { 6356 DI opval = SRADI (SLLDI (SUBDI (GET_H_ACCUM (), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8); 6357 OPRND (accum) = opval; 6358 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 6359 } 6360 6361 #undef OPRND 6362 #undef FLD 6363 } 6364 NEXT (vpc); 6365 6366 CASE (sem, INSN_WRITE_MSBLO) : /* msblo $src1,$src2 */ 6367 { 6368 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6369 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6370 #define FLD(f) abuf->fields.sfmt_st_plus.f 6371 #define OPRND(f) par_exec->operands.sfmt_msblo.f 6372 int UNUSED written = abuf->written; 6373 IADDR UNUSED pc = abuf->addr; 6374 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6375 6376 SET_H_ACCUM (OPRND (accum)); 6377 6378 #undef OPRND 6379 #undef FLD 6380 } 6381 NEXT (vpc); 6382 6383 CASE (sem, INSN_PAR_MULWU1) : /* mulwu1 $src1,$src2 */ 6384 { 6385 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6386 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6387 #define FLD(f) abuf->fields.sfmt_st_plus.f 6388 #define OPRND(f) par_exec->operands.sfmt_mulwu1.f 6389 int UNUSED written = 0; 6390 IADDR UNUSED pc = abuf->addr; 6391 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6392 6393 { 6394 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16); 6395 OPRND (h_accums_DI_1) = opval; 6396 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 6397 } 6398 6399 #undef OPRND 6400 #undef FLD 6401 } 6402 NEXT (vpc); 6403 6404 CASE (sem, INSN_WRITE_MULWU1) : /* mulwu1 $src1,$src2 */ 6405 { 6406 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6407 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6408 #define FLD(f) abuf->fields.sfmt_st_plus.f 6409 #define OPRND(f) par_exec->operands.sfmt_mulwu1.f 6410 int UNUSED written = abuf->written; 6411 IADDR UNUSED pc = abuf->addr; 6412 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6413 6414 SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1)); 6415 6416 #undef OPRND 6417 #undef FLD 6418 } 6419 NEXT (vpc); 6420 6421 CASE (sem, INSN_PAR_MACLH1) : /* maclh1 $src1,$src2 */ 6422 { 6423 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6424 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6425 #define FLD(f) abuf->fields.sfmt_st_plus.f 6426 #define OPRND(f) par_exec->operands.sfmt_macwu1.f 6427 int UNUSED written = 0; 6428 IADDR UNUSED pc = abuf->addr; 6429 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6430 6431 { 6432 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8); 6433 OPRND (h_accums_DI_1) = opval; 6434 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 6435 } 6436 6437 #undef OPRND 6438 #undef FLD 6439 } 6440 NEXT (vpc); 6441 6442 CASE (sem, INSN_WRITE_MACLH1) : /* maclh1 $src1,$src2 */ 6443 { 6444 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6445 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6446 #define FLD(f) abuf->fields.sfmt_st_plus.f 6447 #define OPRND(f) par_exec->operands.sfmt_macwu1.f 6448 int UNUSED written = abuf->written; 6449 IADDR UNUSED pc = abuf->addr; 6450 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6451 6452 SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1)); 6453 6454 #undef OPRND 6455 #undef FLD 6456 } 6457 NEXT (vpc); 6458 6459 CASE (sem, INSN_PAR_SC) : /* sc */ 6460 { 6461 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6462 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6463 #define FLD(f) abuf->fields.sfmt_empty.f 6464 #define OPRND(f) par_exec->operands.sfmt_sc.f 6465 int UNUSED written = 0; 6466 IADDR UNUSED pc = abuf->addr; 6467 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6468 6469 if (ZEXTBISI (CPU (h_cond))) 6470 SEM_SKIP_INSN (current_cpu, sem_arg, vpc); 6471 6472 #undef OPRND 6473 #undef FLD 6474 } 6475 NEXT (vpc); 6476 6477 CASE (sem, INSN_WRITE_SC) : /* sc */ 6478 { 6479 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6480 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6481 #define FLD(f) abuf->fields.sfmt_empty.f 6482 #define OPRND(f) par_exec->operands.sfmt_sc.f 6483 int UNUSED written = abuf->written; 6484 IADDR UNUSED pc = abuf->addr; 6485 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6486 6487 6488 #undef OPRND 6489 #undef FLD 6490 } 6491 NEXT (vpc); 6492 6493 CASE (sem, INSN_PAR_SNC) : /* snc */ 6494 { 6495 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6496 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6497 #define FLD(f) abuf->fields.sfmt_empty.f 6498 #define OPRND(f) par_exec->operands.sfmt_sc.f 6499 int UNUSED written = 0; 6500 IADDR UNUSED pc = abuf->addr; 6501 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6502 6503 if (ZEXTBISI (NOTBI (CPU (h_cond)))) 6504 SEM_SKIP_INSN (current_cpu, sem_arg, vpc); 6505 6506 #undef OPRND 6507 #undef FLD 6508 } 6509 NEXT (vpc); 6510 6511 CASE (sem, INSN_WRITE_SNC) : /* snc */ 6512 { 6513 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6514 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6515 #define FLD(f) abuf->fields.sfmt_empty.f 6516 #define OPRND(f) par_exec->operands.sfmt_sc.f 6517 int UNUSED written = abuf->written; 6518 IADDR UNUSED pc = abuf->addr; 6519 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6520 6521 6522 #undef OPRND 6523 #undef FLD 6524 } 6525 NEXT (vpc); 6526 6527 CASE (sem, INSN_PAR_CLRPSW) : /* clrpsw $uimm8 */ 6528 { 6529 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6530 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6531 #define FLD(f) abuf->fields.sfmt_clrpsw.f 6532 #define OPRND(f) par_exec->operands.sfmt_clrpsw.f 6533 int UNUSED written = 0; 6534 IADDR UNUSED pc = abuf->addr; 6535 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6536 6537 { 6538 USI opval = ANDSI (GET_H_CR (((UINT) 0)), ORSI (ZEXTQISI (INVQI (FLD (f_uimm8))), 65280)); 6539 OPRND (h_cr_USI_0) = opval; 6540 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 6541 } 6542 6543 #undef OPRND 6544 #undef FLD 6545 } 6546 NEXT (vpc); 6547 6548 CASE (sem, INSN_WRITE_CLRPSW) : /* clrpsw $uimm8 */ 6549 { 6550 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6551 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6552 #define FLD(f) abuf->fields.sfmt_clrpsw.f 6553 #define OPRND(f) par_exec->operands.sfmt_clrpsw.f 6554 int UNUSED written = abuf->written; 6555 IADDR UNUSED pc = abuf->addr; 6556 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6557 6558 SET_H_CR (((UINT) 0), OPRND (h_cr_USI_0)); 6559 6560 #undef OPRND 6561 #undef FLD 6562 } 6563 NEXT (vpc); 6564 6565 CASE (sem, INSN_PAR_SETPSW) : /* setpsw $uimm8 */ 6566 { 6567 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6568 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6569 #define FLD(f) abuf->fields.sfmt_clrpsw.f 6570 #define OPRND(f) par_exec->operands.sfmt_setpsw.f 6571 int UNUSED written = 0; 6572 IADDR UNUSED pc = abuf->addr; 6573 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6574 6575 { 6576 USI opval = FLD (f_uimm8); 6577 OPRND (h_cr_USI_0) = opval; 6578 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 6579 } 6580 6581 #undef OPRND 6582 #undef FLD 6583 } 6584 NEXT (vpc); 6585 6586 CASE (sem, INSN_WRITE_SETPSW) : /* setpsw $uimm8 */ 6587 { 6588 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6589 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6590 #define FLD(f) abuf->fields.sfmt_clrpsw.f 6591 #define OPRND(f) par_exec->operands.sfmt_setpsw.f 6592 int UNUSED written = abuf->written; 6593 IADDR UNUSED pc = abuf->addr; 6594 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6595 6596 SET_H_CR (((UINT) 0), OPRND (h_cr_USI_0)); 6597 6598 #undef OPRND 6599 #undef FLD 6600 } 6601 NEXT (vpc); 6602 6603 CASE (sem, INSN_PAR_BTST) : /* btst $uimm3,$sr */ 6604 { 6605 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6606 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6607 #define FLD(f) abuf->fields.sfmt_bset.f 6608 #define OPRND(f) par_exec->operands.sfmt_btst.f 6609 int UNUSED written = 0; 6610 IADDR UNUSED pc = abuf->addr; 6611 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6612 6613 { 6614 BI opval = ANDQI (SRLQI (* FLD (i_sr), SUBSI (7, FLD (f_uimm3))), 1); 6615 OPRND (condbit) = opval; 6616 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 6617 } 6618 6619 #undef OPRND 6620 #undef FLD 6621 } 6622 NEXT (vpc); 6623 6624 CASE (sem, INSN_WRITE_BTST) : /* btst $uimm3,$sr */ 6625 { 6626 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6627 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6628 #define FLD(f) abuf->fields.sfmt_bset.f 6629 #define OPRND(f) par_exec->operands.sfmt_btst.f 6630 int UNUSED written = abuf->written; 6631 IADDR UNUSED pc = abuf->addr; 6632 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6633 6634 CPU (h_cond) = OPRND (condbit); 6635 6636 #undef OPRND 6637 #undef FLD 6638 } 6639 NEXT (vpc); 6640 6641 6642 } 6643 ENDSWITCH (sem) /* End of semantic switch. */ 6644 6645 /* At this point `vpc' contains the next insn to execute. */ 6646 } 6647 6648 #undef DEFINE_SWITCH 6649 #endif /* DEFINE_SWITCH */ 6650
Indexes created Tue May 05 00:25:04 UTC 2026