s13.s revision 1.1
1 // Test rl3 = ashift (rh0 by r5; 2 // Test rl3 = lshift (rh0 by r5); 3 # mach: bfin 4 5 .include "testutils.inc" 6 start 7 8 init_r_regs 0; 9 10 R0 = 0; 11 ASTAT = R0; 12 R0.L = 0x1; 13 R0.H = 0x1; 14 R5.L = 4; 15 R7.L = ASHIFT R0.L BY R5.L; 16 DBGA ( R7.L , 0x0010 ); 17 DBGA ( R7.H , 0x0000 ); 18 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); 19 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); 20 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); 21 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); 22 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); 23 24 R0 = 0; 25 ASTAT = R0; 26 R0.L = 0x8000; 27 R0.H = 0x1; 28 R5.L = -4; 29 R5.H = 0; 30 R7.L = ASHIFT R0.L BY R5.L; 31 DBGA ( R7.L , 0xf800 ); 32 DBGA ( R7.H , 0x0000 ); 33 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); 34 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); 35 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); 36 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); 37 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); 38 39 R0 = 0; 40 ASTAT = R0; 41 R0.L = 0x0; 42 R0.H = 0x1; 43 R5.L = 0; 44 R5.H = 0; 45 R7.L = ASHIFT R0.L BY R5.L; 46 DBGA ( R7.L , 0x0000 ); 47 DBGA ( R7.H , 0x0000 ); 48 CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 ); 49 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); 50 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); 51 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); 52 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); 53 54 R0 = 0; 55 ASTAT = R0; 56 R7 = 0; 57 R0.L = 0x1; 58 R0.H = 0x8000; 59 R5.L = -4; 60 R5.H = 0; 61 R7.H = ASHIFT R0.H BY R5.L; 62 DBGA ( R7.L , 0x0000 ); 63 DBGA ( R7.H , 0xf800 ); 64 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); 65 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); 66 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); 67 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); 68 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); 69 70 R0 = 0; 71 ASTAT = R0; 72 R7 = 0; 73 R0.L = 0x1; 74 R0.H = 0x8000; 75 R5.L = -4; 76 R5.H = 0; 77 R7.L = ASHIFT R0.H BY R5.L; 78 DBGA ( R7.L , 0xf800 ); 79 DBGA ( R7.H , 0x0000 ); 80 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); 81 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); 82 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); 83 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); 84 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); 85 86 R0 = 0; 87 ASTAT = R0; 88 R7 = 0; 89 R0.L = 0x1; 90 R0.H = 0xffff; 91 R5.L = 31; // should accept mag of +31 92 R5.H = 0; 93 R7.L = ASHIFT R0.H BY R5.L; 94 DBGA ( R7.L , 0x0000 ); 95 DBGA ( R7.H , 0x0000 ); 96 CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 ); 97 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); 98 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); 99 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); 100 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); 101 102 R0 = 0; 103 ASTAT = R0; 104 R7 = 0; 105 R0.L = 0x1; 106 R0.H = 0x0100; 107 R5.L = 63; // mag of 63 will appear as -1 since 6 bits are masked 108 R5.H = 0; 109 R7.L = ASHIFT R0.H BY R5.L; 110 DBGA ( R7.L , 0x0080 ); 111 DBGA ( R7.H , 0x0000 ); 112 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); 113 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); 114 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); 115 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); 116 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); 117 118 // logic shifts 119 R0 = 0; 120 ASTAT = R0; 121 R7 = 0; 122 R0.L = 0x1; 123 R0.H = 0x8000; 124 R5.L = -4; 125 R5.H = 0; 126 R7.L = LSHIFT R0.H BY R5.L; 127 DBGA ( R7.L , 0x0800 ); 128 DBGA ( R7.H , 0x0000 ); 129 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); 130 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); 131 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); 132 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); 133 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); 134 135 R0 = 0; 136 ASTAT = R0; 137 R7 = 0; 138 R0.L = 0x1; 139 R0.H = 0x1; 140 R5.L = 4; 141 R5.H = 0; 142 R7.H = LSHIFT R0.L BY R5.L; 143 DBGA ( R7.L , 0x0000 ); 144 DBGA ( R7.H , 0x0010 ); 145 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); 146 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); 147 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); 148 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); 149 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); 150 151 R0 = 0; 152 ASTAT = R0; 153 R7 = 1; 154 R0.L = 0x0; 155 R0.H = 0x0; 156 R5.L = 0; 157 R5.H = 0; 158 R7.L = LSHIFT R0.L BY R5.L; 159 DBGA ( R7.L , 0x0000 ); 160 DBGA ( R7.H , 0x0000 ); 161 CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 ); 162 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); 163 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); 164 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); 165 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); 166 167 R0 = 0; 168 ASTAT = R0; 169 R7 = 1; 170 R0.L = 0x1; 171 R0.H = 0x0; 172 R5.L = 15; 173 R5.H = 0; 174 R7.L = LSHIFT R0.L BY R5.L; 175 DBGA ( R7.L , 0x8000 ); 176 DBGA ( R7.H , 0x0000 ); 177 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); 178 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); 179 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); 180 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); 181 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); 182 183 R0 = 0; 184 ASTAT = R0; 185 R7 = 1; 186 R0.L = 0x0100; 187 R0.H = 0x0; 188 R5.L = 63; // mag of 63 will appear as -1 since 6 bits are masked 189 R5.H = 0; 190 R7.L = LSHIFT R0.L BY R5.L; 191 DBGA ( R7.L , 0x0080 ); 192 DBGA ( R7.H , 0x0000 ); 193 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); 194 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); 195 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); 196 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); 197 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); 198 199 R0 = 0; 200 ASTAT = R0; 201 R7 = 1; 202 R0.L = 0x0100; 203 R0.H = 0x0; 204 R5.L = 31; // should accept mag of +31 205 R5.H = 0; 206 R7.L = LSHIFT R0.L BY R5.L; 207 DBGA ( R7.L , 0x0000 ); 208 DBGA ( R7.H , 0x0000 ); 209 CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 ); 210 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); 211 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); 212 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); 213 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); 214 215 pass 216
Indexes created Mon Apr 06 00:22:49 UTC 2026