1 1.1 christos # FRV testcase for handling of shadow registers SR0-SR4 2 1.1 christos # mach: frv 3 1.1 christos 4 1.1 christos .include "testutils.inc" 5 1.1 christos 6 1.1 christos start 7 1.1 christos 8 1.1 christos .global tra 9 1.1 christos tra: 10 1.1 christos test_spr_bits 0x800,11,1,psr ; PSR.ESR set 11 1.1 christos test_spr_bits 0x4,2,1,psr ; PSR.S set 12 1.1 christos 13 1.1 christos ; Set up exception handler for later 14 1.1 christos and_spr_immed -4081,tbr ; clear tbr.tt 15 1.1 christos set_gr_spr tbr,gr7 16 1.1 christos inc_gr_immed 2112,gr7 ; address of exception handler 17 1.1 christos set_bctrlr_0_0 gr7 ; bctrlr 0,0 18 1.1 christos set_spr_immed 128,lcr 19 1.1 christos set_psr_et 1 20 1.1 christos 21 1.1 christos set_gr_immed 0x11111111,gr4 ; SGR4-7 22 1.1 christos set_gr_immed 0x22222222,gr5 23 1.1 christos set_gr_immed 0x33333333,gr6 24 1.1 christos set_gr_immed 0x44444444,gr7 25 1.1 christos set_spr_immed 0x55555555,sr0 ; UGR4-7 26 1.1 christos set_spr_immed 0x66666666,sr1 27 1.1 christos set_spr_immed 0x77777777,sr2 28 1.1 christos set_spr_immed 0x88888888,sr3 29 1.1 christos 30 1.1 christos and_spr_immed 0xfffff7ff,psr ; turn off PSR.ESR 31 1.1 christos test_gr_immed 0x11111111,gr4 ; SGR4-7 32 1.1 christos test_gr_immed 0x22222222,gr5 33 1.1 christos test_gr_immed 0x33333333,gr6 34 1.1 christos test_gr_immed 0x44444444,gr7 35 1.1 christos test_spr_immed 0x11111111,sr0 ; SGR4-7 36 1.1 christos test_spr_immed 0x22222222,sr1 37 1.1 christos test_spr_immed 0x33333333,sr2 38 1.1 christos test_spr_immed 0x44444444,sr3 39 1.1 christos 40 1.1 christos set_spr_immed 0x55555555,sr0 ; SGR4-7 41 1.1 christos set_spr_immed 0x66666666,sr1 42 1.1 christos set_spr_immed 0x77777777,sr2 43 1.1 christos set_spr_immed 0x88888888,sr3 44 1.1 christos test_gr_immed 0x55555555,gr4 ; SGR4-7 45 1.1 christos test_gr_immed 0x66666666,gr5 46 1.1 christos test_gr_immed 0x77777777,gr6 47 1.1 christos test_gr_immed 0x88888888,gr7 48 1.1 christos test_spr_immed 0x55555555,sr0 ; SGR4-7 49 1.1 christos test_spr_immed 0x66666666,sr1 50 1.1 christos test_spr_immed 0x77777777,sr2 51 1.1 christos test_spr_immed 0x88888888,sr3 52 1.1 christos 53 1.1 christos set_gr_immed 0x11111111,gr4 ; SGR4-7 54 1.1 christos set_gr_immed 0x22222222,gr5 55 1.1 christos set_gr_immed 0x33333333,gr6 56 1.1 christos set_gr_immed 0x44444444,gr7 57 1.1 christos test_gr_immed 0x11111111,gr4 ; SGR4-7 58 1.1 christos test_gr_immed 0x22222222,gr5 59 1.1 christos test_gr_immed 0x33333333,gr6 60 1.1 christos test_gr_immed 0x44444444,gr7 61 1.1 christos test_spr_immed 0x11111111,sr0 ; SGR4-7 62 1.1 christos test_spr_immed 0x22222222,sr1 63 1.1 christos test_spr_immed 0x33333333,sr2 64 1.1 christos test_spr_immed 0x44444444,sr3 65 1.1 christos 66 1.1 christos or_spr_immed 0x00000800,psr ; turn on PSR.ESR 67 1.1 christos test_gr_immed 0x11111111,gr4 ; SGR4-7 -- SR0-3 (UGR4-7) are undefined 68 1.1 christos test_gr_immed 0x22222222,gr5 69 1.1 christos test_gr_immed 0x33333333,gr6 70 1.1 christos test_gr_immed 0x44444444,gr7 71 1.1 christos 72 1.1 christos set_spr_immed 0x55555555,sr0 ; UGR4-7 73 1.1 christos set_spr_immed 0x66666666,sr1 74 1.1 christos set_spr_immed 0x77777777,sr2 75 1.1 christos set_spr_immed 0x88888888,sr3 76 1.1 christos test_gr_immed 0x11111111,gr4 ; SGR4-7 77 1.1 christos test_gr_immed 0x22222222,gr5 78 1.1 christos test_gr_immed 0x33333333,gr6 79 1.1 christos test_gr_immed 0x44444444,gr7 80 1.1 christos test_spr_immed 0x55555555,sr0 ; UGR4-7 81 1.1 christos test_spr_immed 0x66666666,sr1 82 1.1 christos test_spr_immed 0x77777777,sr2 83 1.1 christos test_spr_immed 0x88888888,sr3 84 1.1 christos 85 1.1 christos and_spr_immed 0xfffffffb,psr ; turn off PSR.S 86 1.1 christos test_spr_immed 0x11111111,sr0 ; SGR4-7 87 1.1 christos test_spr_immed 0x22222222,sr1 88 1.1 christos test_spr_immed 0x33333333,sr2 89 1.1 christos test_spr_immed 0x44444444,sr3 90 1.1 christos test_gr_immed 0x55555555,gr4 ; UGR4-7 91 1.1 christos test_gr_immed 0x66666666,gr5 92 1.1 christos test_gr_immed 0x77777777,gr6 93 1.1 christos test_gr_immed 0x88888888,gr7 94 1.1 christos 95 1.1 christos ; need to generate a trap to return to supervisor mode 96 1.1 christos set_spr_addr ok0,lr 97 1.1 christos tira gr0,4 ; should branch to tbr + (128 + 4)*16 98 1.1 christos 99 1.1 christos test_spr_bits 0x800,11,0,psr ; PSR.ESR clear 100 1.1 christos test_spr_bits 0x4,2,0,psr ; PSR.S clear 101 1.1 christos test_gr_immed 0x11111111,gr4 ; SGR4-7 102 1.1 christos test_gr_immed 0x22222222,gr5 103 1.1 christos test_gr_immed 0x33333333,gr6 104 1.1 christos test_gr_immed 0x44444444,gr7 105 1.1 christos test_spr_immed 0x11111111,sr0 ; SGR4-7 106 1.1 christos test_spr_immed 0x22222222,sr1 107 1.1 christos test_spr_immed 0x33333333,sr2 108 1.1 christos test_spr_immed 0x44444444,sr3 109 1.1 christos 110 1.1 christos set_gr_immed 0x55555555,gr4 ; SGR4-7 111 1.1 christos set_gr_immed 0x66666666,gr5 112 1.1 christos set_gr_immed 0x77777777,gr6 113 1.1 christos set_gr_immed 0x88888888,gr7 114 1.1 christos test_gr_immed 0x55555555,gr4 ; SGR4-7 115 1.1 christos test_gr_immed 0x66666666,gr5 116 1.1 christos test_gr_immed 0x77777777,gr6 117 1.1 christos test_gr_immed 0x88888888,gr7 118 1.1 christos test_spr_immed 0x55555555,sr0 ; SGR4-7 119 1.1 christos test_spr_immed 0x66666666,sr1 120 1.1 christos test_spr_immed 0x77777777,sr2 121 1.1 christos test_spr_immed 0x88888888,sr3 122 1.1 christos 123 1.1 christos set_gr_immed 0x11111111,gr4 ; SGR4-7 124 1.1 christos set_gr_immed 0x22222222,gr5 125 1.1 christos set_gr_immed 0x33333333,gr6 126 1.1 christos set_gr_immed 0x44444444,gr7 127 1.1 christos test_gr_immed 0x11111111,gr4 ; SGR4-7 128 1.1 christos test_gr_immed 0x22222222,gr5 129 1.1 christos test_gr_immed 0x33333333,gr6 130 1.1 christos test_gr_immed 0x44444444,gr7 131 1.1 christos test_spr_immed 0x11111111,sr0 ; SGR4-7 132 1.1 christos test_spr_immed 0x22222222,sr1 133 1.1 christos test_spr_immed 0x33333333,sr2 134 1.1 christos test_spr_immed 0x44444444,sr3 135 1.1 christos 136 1.1 christos ; need to generate a trap to return to supervisor mode 137 1.1 christos set_spr_addr ok1,lr 138 1.1 christos tira gr0,4 ; should branch to tbr + (128 + 4)*16 139 1.1 christos 140 1.1 christos pass 141 1.1 christos 142 1.1 christos ok0: ; exception handler should branch here the first time 143 1.1 christos test_spr_bits 0x800,11,1,psr ; PSR.ESR set 144 1.1 christos test_spr_bits 0x4,2,1,psr ; PSR.S set 145 1.1 christos test_gr_immed 0x11111111,gr4 ; SGR4-7 146 1.1 christos test_gr_immed 0x22222222,gr5 147 1.1 christos test_gr_immed 0x33333333,gr6 148 1.1 christos test_gr_immed 0x44444444,gr7 149 1.1 christos test_spr_immed 0x55555555,sr0 ; UGR4-7 150 1.1 christos test_spr_immed 0x66666666,sr1 151 1.1 christos test_spr_immed 0x77777777,sr2 152 1.1 christos test_spr_immed 0x88888888,sr3 153 1.1 christos 154 1.1 christos and_spr_immed 0xfffff7ff,psr ; turn off PSR.ESR 155 1.1 christos test_gr_immed 0x11111111,gr4 ; SGR4-7 156 1.1 christos test_gr_immed 0x22222222,gr5 157 1.1 christos test_gr_immed 0x33333333,gr6 158 1.1 christos test_gr_immed 0x44444444,gr7 159 1.1 christos test_spr_immed 0x11111111,sr0 ; SGR4-7 160 1.1 christos test_spr_immed 0x22222222,sr1 161 1.1 christos test_spr_immed 0x33333333,sr2 162 1.1 christos test_spr_immed 0x44444444,sr3 163 1.1 christos rett 0 164 1.1 christos fail 165 1.1 christos 166 1.1 christos ok1: ; exception handler should branch here the second time 167 1.1 christos test_spr_bits 0x800,11,0,psr ; PSR.ESR clear 168 1.1 christos test_spr_bits 0x4,2,1,psr ; PSR.S set 169 1.1 christos 170 1.1 christos test_gr_immed 0x11111111,gr4 ; SGR4-7 171 1.1 christos test_gr_immed 0x22222222,gr5 172 1.1 christos test_gr_immed 0x33333333,gr6 173 1.1 christos test_gr_immed 0x44444444,gr7 174 1.1 christos test_spr_immed 0x11111111,sr0 ; SGR4-7 175 1.1 christos test_spr_immed 0x22222222,sr1 176 1.1 christos test_spr_immed 0x33333333,sr2 177 1.1 christos test_spr_immed 0x44444444,sr3 178 1.1 christos 179 1.1 christos set_spr_immed 0x55555555,sr0 ; SGR4-7 180 1.1 christos set_spr_immed 0x66666666,sr1 181 1.1 christos set_spr_immed 0x77777777,sr2 182 1.1 christos set_spr_immed 0x88888888,sr3 183 1.1 christos test_gr_immed 0x55555555,gr4 ; SGR4-7 184 1.1 christos test_gr_immed 0x66666666,gr5 185 1.1 christos test_gr_immed 0x77777777,gr6 186 1.1 christos test_gr_immed 0x88888888,gr7 187 1.1 christos test_spr_immed 0x55555555,sr0 ; SGR4-7 188 1.1 christos test_spr_immed 0x66666666,sr1 189 1.1 christos test_spr_immed 0x77777777,sr2 190 1.1 christos test_spr_immed 0x88888888,sr3 191 1.1 christos 192 1.1 christos set_gr_immed 0x11111111,gr4 ; SGR4-7 193 1.1 christos set_gr_immed 0x22222222,gr5 194 1.1 christos set_gr_immed 0x33333333,gr6 195 1.1 christos set_gr_immed 0x44444444,gr7 196 1.1 christos test_gr_immed 0x11111111,gr4 ; SGR4-7 197 1.1 christos test_gr_immed 0x22222222,gr5 198 1.1 christos test_gr_immed 0x33333333,gr6 199 1.1 christos test_gr_immed 0x44444444,gr7 200 1.1 christos test_spr_immed 0x11111111,sr0 ; SGR4-7 201 1.1 christos test_spr_immed 0x22222222,sr1 202 1.1 christos test_spr_immed 0x33333333,sr2 203 1.1 christos test_spr_immed 0x44444444,sr3 204 1.1 christos rett 0 205 1.1 christos fail 206
Indexes created Thu Sep 10 00:26:39 UTC 2026