m32c-asm.c revision 1.1.1.5
1 /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */ 2 /* Assembler interface for targets using CGEN. -*- C -*- 3 CGEN: Cpu tools GENerator 4 5 THIS FILE IS MACHINE GENERATED WITH CGEN. 6 - the resultant file is machine generated, cgen-asm.in isn't 7 8 Copyright (C) 1996-2019 Free Software Foundation, Inc. 9 10 This file is part of libopcodes. 11 12 This library is free software; you can redistribute it and/or modify 13 it under the terms of the GNU General Public License as published by 14 the Free Software Foundation; either version 3, or (at your option) 15 any later version. 16 17 It is distributed in the hope that it will be useful, but WITHOUT 18 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 19 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 20 License for more details. 21 22 You should have received a copy of the GNU General Public License 23 along with this program; if not, write to the Free Software Foundation, Inc., 24 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 25 26 27 /* ??? Eventually more and more of this stuff can go to cpu-independent files. 28 Keep that in mind. */ 29 30 #include "sysdep.h" 31 #include <stdio.h> 32 #include "ansidecl.h" 33 #include "bfd.h" 34 #include "symcat.h" 35 #include "m32c-desc.h" 36 #include "m32c-opc.h" 37 #include "opintl.h" 38 #include "xregex.h" 39 #include "libiberty.h" 40 #include "safe-ctype.h" 41 42 #undef min 43 #define min(a,b) ((a) < (b) ? (a) : (b)) 44 #undef max 45 #define max(a,b) ((a) > (b) ? (a) : (b)) 46 47 static const char * parse_insn_normal 48 (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *); 49 50 /* -- assembler routines inserted here. */ 52 53 /* -- asm.c */ 54 #include "safe-ctype.h" 55 56 #define MACH_M32C 5 /* Must match md_begin. */ 57 58 static int 59 m32c_cgen_isa_register (const char **strp) 60 { 61 int u; 62 const char *s = *strp; 63 static char * m32c_register_names [] = 64 { 65 "r0", "r1", "r2", "r3", "r0l", "r0h", "r1l", "r1h", 66 "a0", "a1", "r2r0", "r3r1", "sp", "fb", "dct0", "dct1", "flg", "svf", 67 "drc0", "drc1", "dmd0", "dmd1", "intb", "svp", "vct", "isp", "dma0", 68 "dma1", "dra0", "dra1", "dsa0", "dsa1", 0 69 }; 70 71 for (u = 0; m32c_register_names[u]; u++) 72 { 73 int len = strlen (m32c_register_names[u]); 74 75 if (memcmp (m32c_register_names[u], s, len) == 0 76 && (s[len] == 0 || ! ISALNUM (s[len]))) 77 return 1; 78 } 79 return 0; 80 } 81 82 #define PARSE_UNSIGNED \ 83 do \ 84 { \ 85 /* Don't successfully parse literals beginning with '['. */ \ 86 if (**strp == '[') \ 87 return "Invalid literal"; /* Anything -- will not be seen. */ \ 88 \ 89 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);\ 90 if (errmsg) \ 91 return errmsg; \ 92 } \ 93 while (0) 94 95 #define PARSE_SIGNED \ 96 do \ 97 { \ 98 /* Don't successfully parse literals beginning with '['. */ \ 99 if (**strp == '[') \ 100 return "Invalid literal"; /* Anything -- will not be seen. */ \ 101 \ 102 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); \ 103 if (errmsg) \ 104 return errmsg; \ 105 } \ 106 while (0) 107 108 static const char * 109 parse_unsigned6 (CGEN_CPU_DESC cd, const char **strp, 110 int opindex, unsigned long *valuep) 111 { 112 const char *errmsg = 0; 113 unsigned long value; 114 115 PARSE_UNSIGNED; 116 117 if (value > 0x3f) 118 return _("imm:6 immediate is out of range"); 119 120 *valuep = value; 121 return 0; 122 } 123 124 static const char * 125 parse_unsigned8 (CGEN_CPU_DESC cd, const char **strp, 126 int opindex, unsigned long *valuep) 127 { 128 const char *errmsg = 0; 129 unsigned long value = 0; 130 long have_zero = 0; 131 132 if (strncasecmp (*strp, "%dsp8(", 6) == 0) 133 { 134 enum cgen_parse_operand_result result_type; 135 bfd_vma val; 136 137 *strp += 6; 138 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_8, 139 & result_type, & val); 140 if (**strp != ')') 141 return _("missing `)'"); 142 (*strp) ++; 143 144 if (errmsg == NULL 145 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) 146 return _("%dsp8() takes a symbolic address, not a number"); 147 148 value = val; 149 *valuep = value; 150 return errmsg; 151 } 152 153 if (strncmp (*strp, "0x0", 3) == 0 154 || (**strp == '0' && *(*strp + 1) != 'x')) 155 have_zero = 1; 156 157 PARSE_UNSIGNED; 158 159 if (value > 0xff) 160 return _("dsp:8 immediate is out of range"); 161 162 /* If this field may require a relocation then use larger dsp16. */ 163 if (! have_zero && value == 0) 164 return _("dsp:8 immediate is out of range"); 165 166 *valuep = value; 167 return 0; 168 } 169 170 static const char * 171 parse_signed4 (CGEN_CPU_DESC cd, const char **strp, 172 int opindex, signed long *valuep) 173 { 174 const char *errmsg = 0; 175 signed long value; 176 long have_zero = 0; 177 178 if (strncmp (*strp, "0x0", 3) == 0 179 || (**strp == '0' && *(*strp + 1) != 'x')) 180 have_zero = 1; 181 182 PARSE_SIGNED; 183 184 if (value < -8 || value > 7) 185 return _("Immediate is out of range -8 to 7"); 186 187 /* If this field may require a relocation then use larger dsp16. */ 188 if (! have_zero && value == 0) 189 return _("Immediate is out of range -8 to 7"); 190 191 *valuep = value; 192 return 0; 193 } 194 195 static const char * 196 parse_signed4n (CGEN_CPU_DESC cd, const char **strp, 197 int opindex, signed long *valuep) 198 { 199 const char *errmsg = 0; 200 signed long value; 201 long have_zero = 0; 202 203 if (strncmp (*strp, "0x0", 3) == 0 204 || (**strp == '0' && *(*strp + 1) != 'x')) 205 have_zero = 1; 206 207 PARSE_SIGNED; 208 209 if (value < -7 || value > 8) 210 return _("Immediate is out of range -7 to 8"); 211 212 /* If this field may require a relocation then use larger dsp16. */ 213 if (! have_zero && value == 0) 214 return _("Immediate is out of range -7 to 8"); 215 216 *valuep = -value; 217 return 0; 218 } 219 220 static const char * 221 parse_signed8 (CGEN_CPU_DESC cd, const char **strp, 222 int opindex, signed long *valuep) 223 { 224 const char *errmsg = 0; 225 signed long value = 0; 226 227 if (strncasecmp (*strp, "%hi8(", 5) == 0) 228 { 229 enum cgen_parse_operand_result result_type; 230 bfd_vma val; 231 232 *strp += 5; 233 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32C_HI8, 234 & result_type, & val); 235 if (**strp != ')') 236 return _("missing `)'"); 237 (*strp) ++; 238 239 if (errmsg == NULL 240 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) 241 val >>= 16; 242 243 value = val; 244 *valuep = value; 245 return errmsg; 246 } 247 248 PARSE_SIGNED; 249 250 if (value <= 255 && value > 127) 251 value -= 0x100; 252 253 if (value < -128 || value > 127) 254 return _("dsp:8 immediate is out of range"); 255 256 *valuep = value; 257 return 0; 258 } 259 260 static const char * 261 parse_unsigned16 (CGEN_CPU_DESC cd, const char **strp, 262 int opindex, unsigned long *valuep) 263 { 264 const char *errmsg = 0; 265 unsigned long value = 0; 266 long have_zero = 0; 267 268 if (strncasecmp (*strp, "%dsp16(", 7) == 0) 269 { 270 enum cgen_parse_operand_result result_type; 271 bfd_vma val; 272 273 *strp += 7; 274 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_16, 275 & result_type, & val); 276 if (**strp != ')') 277 return _("missing `)'"); 278 (*strp) ++; 279 280 if (errmsg == NULL 281 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) 282 return _("%dsp16() takes a symbolic address, not a number"); 283 284 value = val; 285 *valuep = value; 286 return errmsg; 287 } 288 289 /* Don't successfully parse literals beginning with '['. */ 290 if (**strp == '[') 291 return "Invalid literal"; /* Anything -- will not be seen. */ 292 293 /* Don't successfully parse register names. */ 294 if (m32c_cgen_isa_register (strp)) 295 return "Invalid literal"; /* Anything -- will not be seen. */ 296 297 if (strncmp (*strp, "0x0", 3) == 0 298 || (**strp == '0' && *(*strp + 1) != 'x')) 299 have_zero = 1; 300 301 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value); 302 if (errmsg) 303 return errmsg; 304 305 if (value > 0xffff) 306 return _("dsp:16 immediate is out of range"); 307 308 /* If this field may require a relocation then use larger dsp24. */ 309 if (cd->machs == MACH_M32C && ! have_zero && value == 0 310 && (strncmp (*strp, "[a", 2) == 0 311 || **strp == ',' 312 || **strp == 0)) 313 return _("dsp:16 immediate is out of range"); 314 315 *valuep = value; 316 return 0; 317 } 318 319 static const char * 320 parse_signed16 (CGEN_CPU_DESC cd, const char **strp, 321 int opindex, signed long *valuep) 322 { 323 const char *errmsg = 0; 324 signed long value = 0; 325 326 if (strncasecmp (*strp, "%lo16(", 6) == 0) 327 { 328 enum cgen_parse_operand_result result_type; 329 bfd_vma val; 330 331 *strp += 6; 332 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16, 333 & result_type, & val); 334 if (**strp != ')') 335 return _("missing `)'"); 336 (*strp) ++; 337 338 if (errmsg == NULL 339 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) 340 val &= 0xffff; 341 342 value = val; 343 *valuep = value; 344 return errmsg; 345 } 346 347 if (strncasecmp (*strp, "%hi16(", 6) == 0) 348 { 349 enum cgen_parse_operand_result result_type; 350 bfd_vma val; 351 352 *strp += 6; 353 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16, 354 & result_type, & val); 355 if (**strp != ')') 356 return _("missing `)'"); 357 (*strp) ++; 358 359 if (errmsg == NULL 360 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) 361 val >>= 16; 362 363 value = val; 364 *valuep = value; 365 return errmsg; 366 } 367 368 PARSE_SIGNED; 369 370 if (value <= 65535 && value > 32767) 371 value -= 0x10000; 372 373 if (value < -32768 || value > 32767) 374 return _("dsp:16 immediate is out of range"); 375 376 *valuep = value; 377 return 0; 378 } 379 380 static const char * 381 parse_unsigned20 (CGEN_CPU_DESC cd, const char **strp, 382 int opindex, unsigned long *valuep) 383 { 384 const char *errmsg = 0; 385 unsigned long value; 386 387 /* Don't successfully parse literals beginning with '['. */ 388 if (**strp == '[') 389 return "Invalid literal"; /* Anything -- will not be seen. */ 390 391 /* Don't successfully parse register names. */ 392 if (m32c_cgen_isa_register (strp)) 393 return "Invalid literal"; /* Anything -- will not be seen. */ 394 395 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value); 396 if (errmsg) 397 return errmsg; 398 399 if (value > 0xfffff) 400 return _("dsp:20 immediate is out of range"); 401 402 *valuep = value; 403 return 0; 404 } 405 406 static const char * 407 parse_unsigned24 (CGEN_CPU_DESC cd, const char **strp, 408 int opindex, unsigned long *valuep) 409 { 410 const char *errmsg = 0; 411 unsigned long value; 412 413 /* Don't successfully parse literals beginning with '['. */ 414 if (**strp == '[') 415 return "Invalid literal"; /* Anything -- will not be seen. */ 416 417 /* Don't successfully parse register names. */ 418 if (m32c_cgen_isa_register (strp)) 419 return "Invalid literal"; /* Anything -- will not be seen. */ 420 421 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value); 422 if (errmsg) 423 return errmsg; 424 425 if (value > 0xffffff) 426 return _("dsp:24 immediate is out of range"); 427 428 *valuep = value; 429 return 0; 430 } 431 432 /* This should only be used for #imm->reg. */ 433 static const char * 434 parse_signed24 (CGEN_CPU_DESC cd, const char **strp, 435 int opindex, signed long *valuep) 436 { 437 const char *errmsg = 0; 438 signed long value; 439 440 PARSE_SIGNED; 441 442 if (value <= 0xffffff && value > 0x7fffff) 443 value -= 0x1000000; 444 445 if (value > 0xffffff) 446 return _("dsp:24 immediate is out of range"); 447 448 *valuep = value; 449 return 0; 450 } 451 452 static const char * 453 parse_signed32 (CGEN_CPU_DESC cd, const char **strp, 454 int opindex, signed long *valuep) 455 { 456 const char *errmsg = 0; 457 signed long value; 458 459 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); 460 if (errmsg) 461 return errmsg; 462 463 *valuep = value; 464 return 0; 465 } 466 467 static const char * 468 parse_imm1_S (CGEN_CPU_DESC cd, const char **strp, 469 int opindex, signed long *valuep) 470 { 471 const char *errmsg = 0; 472 signed long value; 473 474 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); 475 if (errmsg) 476 return errmsg; 477 478 if (value < 1 || value > 2) 479 return _("immediate is out of range 1-2"); 480 481 *valuep = value; 482 return 0; 483 } 484 485 static const char * 486 parse_imm3_S (CGEN_CPU_DESC cd, const char **strp, 487 int opindex, signed long *valuep) 488 { 489 const char *errmsg = 0; 490 signed long value; 491 492 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); 493 if (errmsg) 494 return errmsg; 495 496 if (value < 1 || value > 8) 497 return _("immediate is out of range 1-8"); 498 499 *valuep = value; 500 return 0; 501 } 502 503 static const char * 504 parse_bit3_S (CGEN_CPU_DESC cd, const char **strp, 505 int opindex, signed long *valuep) 506 { 507 const char *errmsg = 0; 508 signed long value; 509 510 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); 511 if (errmsg) 512 return errmsg; 513 514 if (value < 0 || value > 7) 515 return _("immediate is out of range 0-7"); 516 517 *valuep = value; 518 return 0; 519 } 520 521 static const char * 522 parse_lab_5_3 (CGEN_CPU_DESC cd, 523 const char **strp, 524 int opindex ATTRIBUTE_UNUSED, 525 int opinfo, 526 enum cgen_parse_operand_result *type_addr, 527 bfd_vma *valuep) 528 { 529 const char *errmsg = 0; 530 bfd_vma value; 531 enum cgen_parse_operand_result op_res; 532 533 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_5_3, 534 opinfo, & op_res, & value); 535 536 if (type_addr) 537 *type_addr = op_res; 538 539 if (op_res == CGEN_PARSE_OPERAND_RESULT_QUEUED) 540 { 541 /* This is a hack; the field cannot handle near-zero signed 542 offsets that CGEN wants to put in to indicate an "empty" 543 operand at first. */ 544 *valuep = 2; 545 return 0; 546 } 547 if (errmsg) 548 return errmsg; 549 550 if (value < 2 || value > 9) 551 return _("immediate is out of range 2-9"); 552 553 *valuep = value; 554 return 0; 555 } 556 557 static const char * 558 parse_Bitno16R (CGEN_CPU_DESC cd, const char **strp, 559 int opindex, unsigned long *valuep) 560 { 561 const char *errmsg = 0; 562 unsigned long value; 563 564 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value); 565 if (errmsg) 566 return errmsg; 567 568 if (value > 15) 569 return _("Bit number for indexing general register is out of range 0-15"); 570 571 *valuep = value; 572 return 0; 573 } 574 575 static const char * 576 parse_unsigned_bitbase (CGEN_CPU_DESC cd, const char **strp, 577 int opindex, unsigned long *valuep, 578 unsigned bits, int allow_syms) 579 { 580 const char *errmsg = 0; 581 unsigned long bit; 582 unsigned long base; 583 const char *newp = *strp; 584 unsigned long long bitbase; 585 long have_zero = 0; 586 587 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit); 588 if (errmsg) 589 return errmsg; 590 591 if (*newp != ',') 592 return "Missing base for bit,base:8"; 593 594 ++newp; 595 596 if (strncmp (newp, "0x0", 3) == 0 597 || (newp[0] == '0' && newp[1] != 'x')) 598 have_zero = 1; 599 600 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & base); 601 if (errmsg) 602 return errmsg; 603 604 bitbase = (unsigned long long) bit + ((unsigned long long) base * 8); 605 606 if (bitbase >= (1ull << bits)) 607 return _("bit,base is out of range"); 608 609 /* If this field may require a relocation then use larger displacement. */ 610 if (! have_zero && base == 0) 611 { 612 switch (allow_syms) { 613 case 0: 614 return _("bit,base out of range for symbol"); 615 case 1: 616 break; 617 case 2: 618 if (strncmp (newp, "[sb]", 4) != 0) 619 return _("bit,base out of range for symbol"); 620 break; 621 } 622 } 623 624 *valuep = bitbase; 625 *strp = newp; 626 return 0; 627 } 628 629 static const char * 630 parse_signed_bitbase (CGEN_CPU_DESC cd, const char **strp, 631 int opindex, signed long *valuep, 632 unsigned bits, int allow_syms) 633 { 634 const char *errmsg = 0; 635 unsigned long bit; 636 signed long base; 637 const char *newp = *strp; 638 long long bitbase; 639 long long limit; 640 long have_zero = 0; 641 642 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit); 643 if (errmsg) 644 return errmsg; 645 646 if (*newp != ',') 647 return "Missing base for bit,base:8"; 648 649 ++newp; 650 651 if (strncmp (newp, "0x0", 3) == 0 652 || (newp[0] == '0' && newp[1] != 'x')) 653 have_zero = 1; 654 655 errmsg = cgen_parse_signed_integer (cd, & newp, opindex, & base); 656 if (errmsg) 657 return errmsg; 658 659 bitbase = (long long)bit + ((long long)base * 8); 660 661 limit = 1ll << (bits - 1); 662 if (bitbase < -limit || bitbase >= limit) 663 return _("bit,base is out of range"); 664 665 /* If this field may require a relocation then use larger displacement. */ 666 if (! have_zero && base == 0 && ! allow_syms) 667 return _("bit,base out of range for symbol"); 668 669 *valuep = bitbase; 670 *strp = newp; 671 return 0; 672 } 673 674 static const char * 675 parse_unsigned_bitbase8 (CGEN_CPU_DESC cd, const char **strp, 676 int opindex, unsigned long *valuep) 677 { 678 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 8, 0); 679 } 680 681 static const char * 682 parse_unsigned_bitbase11 (CGEN_CPU_DESC cd, const char **strp, 683 int opindex, unsigned long *valuep) 684 { 685 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 11, 0); 686 } 687 688 static const char * 689 parse_unsigned_bitbase16 (CGEN_CPU_DESC cd, const char **strp, 690 int opindex, unsigned long *valuep) 691 { 692 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 16, 1); 693 } 694 695 static const char * 696 parse_unsigned_bitbase19 (CGEN_CPU_DESC cd, const char **strp, 697 int opindex, unsigned long *valuep) 698 { 699 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 19, 2); 700 } 701 702 static const char * 703 parse_unsigned_bitbase27 (CGEN_CPU_DESC cd, const char **strp, 704 int opindex, unsigned long *valuep) 705 { 706 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 27, 1); 707 } 708 709 static const char * 710 parse_signed_bitbase8 (CGEN_CPU_DESC cd, const char **strp, 711 int opindex, signed long *valuep) 712 { 713 return parse_signed_bitbase (cd, strp, opindex, valuep, 8, 1); 714 } 715 716 static const char * 717 parse_signed_bitbase11 (CGEN_CPU_DESC cd, const char **strp, 718 int opindex, signed long *valuep) 719 { 720 return parse_signed_bitbase (cd, strp, opindex, valuep, 11, 0); 721 } 722 723 static const char * 724 parse_signed_bitbase19 (CGEN_CPU_DESC cd, const char **strp, 725 int opindex, signed long *valuep) 726 { 727 return parse_signed_bitbase (cd, strp, opindex, valuep, 19, 1); 728 } 729 730 /* Parse the suffix as :<char> or as nothing followed by a whitespace. */ 731 732 static const char * 733 parse_suffix (const char **strp, char suffix) 734 { 735 const char *newp = *strp; 736 737 if (**strp == ':' && TOLOWER (*(*strp + 1)) == suffix) 738 newp = *strp + 2; 739 740 if (ISSPACE (*newp)) 741 { 742 *strp = newp; 743 return 0; 744 } 745 746 return "Invalid suffix"; /* Anything -- will not be seen. */ 747 } 748 749 static const char * 750 parse_S (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, 751 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED) 752 { 753 return parse_suffix (strp, 's'); 754 } 755 756 static const char * 757 parse_G (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, 758 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED) 759 { 760 return parse_suffix (strp, 'g'); 761 } 762 763 static const char * 764 parse_Q (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, 765 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED) 766 { 767 return parse_suffix (strp, 'q'); 768 } 769 770 static const char * 771 parse_Z (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, 772 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED) 773 { 774 return parse_suffix (strp, 'z'); 775 } 776 777 /* Parse an empty suffix. Fail if the next char is ':'. */ 778 779 static const char * 780 parse_X (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, 781 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED) 782 { 783 if (**strp == ':') 784 return "Unexpected suffix"; 785 return 0; 786 } 787 788 static const char * 789 parse_r0l_r0h (CGEN_CPU_DESC cd, const char **strp, 790 int opindex ATTRIBUTE_UNUSED, signed long *valuep) 791 { 792 const char *errmsg; 793 signed long value; 794 signed long junk; 795 const char *newp = *strp; 796 797 /* Parse r0[hl]. */ 798 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l_r0h, & value); 799 if (errmsg) 800 return errmsg; 801 802 if (*newp != ',') 803 return _("not a valid r0l/r0h pair"); 804 ++newp; 805 806 /* Parse the second register in the pair. */ 807 if (value == 0) /* r0l */ 808 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0h, & junk); 809 else 810 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l, & junk); 811 if (errmsg) 812 return errmsg; 813 814 *strp = newp; 815 *valuep = ! value; 816 return 0; 817 } 818 819 /* Accept .b or .w in any case. */ 820 821 static const char * 822 parse_size (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, 823 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED) 824 { 825 if (**strp == '.' 826 && (*(*strp + 1) == 'b' || *(*strp + 1) == 'B' 827 || *(*strp + 1) == 'w' || *(*strp + 1) == 'W')) 828 { 829 *strp += 2; 830 return NULL; 831 } 832 833 return _("Invalid size specifier"); 834 } 835 836 /* Special check to ensure that instruction exists for given machine. */ 837 838 int 839 m32c_cgen_insn_supported (CGEN_CPU_DESC cd, 840 const CGEN_INSN *insn) 841 { 842 int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH); 843 CGEN_BITSET isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA); 844 845 /* If attributes are absent, assume no restriction. */ 846 if (machs == 0) 847 machs = ~0; 848 849 return ((machs & cd->machs) 850 && cgen_bitset_intersect_p (& isas, cd->isas)); 851 } 852 853 /* Parse a set of registers, R0,R1,A0,A1,SB,FB. */ 854 855 static const char * 856 parse_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 857 const char **strp, 858 int opindex ATTRIBUTE_UNUSED, 859 unsigned long *valuep, 860 int push) 861 { 862 const char *errmsg = 0; 863 int regno = 0; 864 865 *valuep = 0; 866 while (**strp && **strp != ')') 867 { 868 if (**strp == 'r' || **strp == 'R') 869 { 870 ++*strp; 871 regno = **strp - '0'; 872 if (regno > 4) 873 errmsg = _("Register number is not valid"); 874 } 875 else if (**strp == 'a' || **strp == 'A') 876 { 877 ++*strp; 878 regno = **strp - '0'; 879 if (regno > 2) 880 errmsg = _("Register number is not valid"); 881 regno = **strp - '0' + 4; 882 } 883 884 else if (strncasecmp (*strp, "sb", 2) == 0 || strncasecmp (*strp, "SB", 2) == 0) 885 { 886 regno = 6; 887 ++*strp; 888 } 889 890 else if (strncasecmp (*strp, "fb", 2) == 0 || strncasecmp (*strp, "FB", 2) == 0) 891 { 892 regno = 7; 893 ++*strp; 894 } 895 896 if (push) /* Mask is reversed for push. */ 897 *valuep |= 0x80 >> regno; 898 else 899 *valuep |= 1 << regno; 900 901 ++*strp; 902 if (**strp == ',') 903 { 904 if (*(*strp + 1) == ')') 905 break; 906 ++*strp; 907 } 908 } 909 910 if (!*strp) 911 errmsg = _("Register list is not valid"); 912 913 return errmsg; 914 } 915 916 #define POP 0 917 #define PUSH 1 918 919 static const char * 920 parse_pop_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 921 const char **strp, 922 int opindex ATTRIBUTE_UNUSED, 923 unsigned long *valuep) 924 { 925 return parse_regset (cd, strp, opindex, valuep, POP); 926 } 927 928 static const char * 929 parse_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 930 const char **strp, 931 int opindex ATTRIBUTE_UNUSED, 932 unsigned long *valuep) 933 { 934 return parse_regset (cd, strp, opindex, valuep, PUSH); 935 } 936 937 /* -- dis.c */ 938 939 const char * m32c_cgen_parse_operand 940 (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *); 941 942 /* Main entry point for operand parsing. 943 944 This function is basically just a big switch statement. Earlier versions 945 used tables to look up the function to use, but 946 - if the table contains both assembler and disassembler functions then 947 the disassembler contains much of the assembler and vice-versa, 948 - there's a lot of inlining possibilities as things grow, 949 - using a switch statement avoids the function call overhead. 950 951 This function could be moved into `parse_insn_normal', but keeping it 952 separate makes clear the interface between `parse_insn_normal' and each of 953 the handlers. */ 954 955 const char * 956 m32c_cgen_parse_operand (CGEN_CPU_DESC cd, 957 int opindex, 958 const char ** strp, 959 CGEN_FIELDS * fields) 960 { 961 const char * errmsg = NULL; 962 /* Used by scalar operands that still need to be parsed. */ 963 long junk ATTRIBUTE_UNUSED; 964 965 switch (opindex) 966 { 967 case M32C_OPERAND_A0 : 968 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_a0, & junk); 969 break; 970 case M32C_OPERAND_A1 : 971 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_a1, & junk); 972 break; 973 case M32C_OPERAND_AN16_PUSH_S : 974 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_4_1); 975 break; 976 case M32C_OPERAND_BIT16AN : 977 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst16_an); 978 break; 979 case M32C_OPERAND_BIT16RN : 980 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn); 981 break; 982 case M32C_OPERAND_BIT3_S : 983 errmsg = parse_bit3_S (cd, strp, M32C_OPERAND_BIT3_S, (long *) (& fields->f_imm3_S)); 984 break; 985 case M32C_OPERAND_BIT32ANPREFIXED : 986 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed); 987 break; 988 case M32C_OPERAND_BIT32ANUNPREFIXED : 989 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed); 990 break; 991 case M32C_OPERAND_BIT32RNPREFIXED : 992 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_prefixed_QI); 993 break; 994 case M32C_OPERAND_BIT32RNUNPREFIXED : 995 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_unprefixed_QI); 996 break; 997 case M32C_OPERAND_BITBASE16_16_S8 : 998 errmsg = parse_signed_bitbase8 (cd, strp, M32C_OPERAND_BITBASE16_16_S8, (long *) (& fields->f_dsp_16_s8)); 999 break; 1000 case M32C_OPERAND_BITBASE16_16_U16 : 1001 errmsg = parse_unsigned_bitbase16 (cd, strp, M32C_OPERAND_BITBASE16_16_U16, (unsigned long *) (& fields->f_dsp_16_u16)); 1002 break; 1003 case M32C_OPERAND_BITBASE16_16_U8 : 1004 errmsg = parse_unsigned_bitbase8 (cd, strp, M32C_OPERAND_BITBASE16_16_U8, (unsigned long *) (& fields->f_dsp_16_u8)); 1005 break; 1006 case M32C_OPERAND_BITBASE16_8_U11_S : 1007 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE16_8_U11_S, (unsigned long *) (& fields->f_bitbase16_u11_S)); 1008 break; 1009 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : 1010 errmsg = parse_signed_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED, (long *) (& fields->f_bitbase32_16_s11_unprefixed)); 1011 break; 1012 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : 1013 errmsg = parse_signed_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED, (long *) (& fields->f_bitbase32_16_s19_unprefixed)); 1014 break; 1015 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : 1016 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u11_unprefixed)); 1017 break; 1018 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : 1019 errmsg = parse_unsigned_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u19_unprefixed)); 1020 break; 1021 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : 1022 errmsg = parse_unsigned_bitbase27 (cd, strp, M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u27_unprefixed)); 1023 break; 1024 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : 1025 errmsg = parse_signed_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_24_S11_PREFIXED, (long *) (& fields->f_bitbase32_24_s11_prefixed)); 1026 break; 1027 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : 1028 errmsg = parse_signed_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_24_S19_PREFIXED, (long *) (& fields->f_bitbase32_24_s19_prefixed)); 1029 break; 1030 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : 1031 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_24_U11_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u11_prefixed)); 1032 break; 1033 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : 1034 errmsg = parse_unsigned_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_24_U19_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u19_prefixed)); 1035 break; 1036 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : 1037 errmsg = parse_unsigned_bitbase27 (cd, strp, M32C_OPERAND_BITBASE32_24_U27_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u27_prefixed)); 1038 break; 1039 case M32C_OPERAND_BITNO16R : 1040 errmsg = parse_Bitno16R (cd, strp, M32C_OPERAND_BITNO16R, (unsigned long *) (& fields->f_dsp_16_u8)); 1041 break; 1042 case M32C_OPERAND_BITNO32PREFIXED : 1043 errmsg = cgen_parse_unsigned_integer (cd, strp, M32C_OPERAND_BITNO32PREFIXED, (unsigned long *) (& fields->f_bitno32_prefixed)); 1044 break; 1045 case M32C_OPERAND_BITNO32UNPREFIXED : 1046 errmsg = cgen_parse_unsigned_integer (cd, strp, M32C_OPERAND_BITNO32UNPREFIXED, (unsigned long *) (& fields->f_bitno32_unprefixed)); 1047 break; 1048 case M32C_OPERAND_DSP_10_U6 : 1049 errmsg = parse_unsigned6 (cd, strp, M32C_OPERAND_DSP_10_U6, (unsigned long *) (& fields->f_dsp_10_u6)); 1050 break; 1051 case M32C_OPERAND_DSP_16_S16 : 1052 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_16_S16, (long *) (& fields->f_dsp_16_s16)); 1053 break; 1054 case M32C_OPERAND_DSP_16_S8 : 1055 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_16_S8, (long *) (& fields->f_dsp_16_s8)); 1056 break; 1057 case M32C_OPERAND_DSP_16_U16 : 1058 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_16_U16, (unsigned long *) (& fields->f_dsp_16_u16)); 1059 break; 1060 case M32C_OPERAND_DSP_16_U20 : 1061 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_16_U20, (unsigned long *) (& fields->f_dsp_16_u24)); 1062 break; 1063 case M32C_OPERAND_DSP_16_U24 : 1064 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_16_U24, (unsigned long *) (& fields->f_dsp_16_u24)); 1065 break; 1066 case M32C_OPERAND_DSP_16_U8 : 1067 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_16_U8, (unsigned long *) (& fields->f_dsp_16_u8)); 1068 break; 1069 case M32C_OPERAND_DSP_24_S16 : 1070 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_24_S16, (long *) (& fields->f_dsp_24_s16)); 1071 break; 1072 case M32C_OPERAND_DSP_24_S8 : 1073 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_24_S8, (long *) (& fields->f_dsp_24_s8)); 1074 break; 1075 case M32C_OPERAND_DSP_24_U16 : 1076 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_24_U16, (unsigned long *) (& fields->f_dsp_24_u16)); 1077 break; 1078 case M32C_OPERAND_DSP_24_U20 : 1079 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_24_U20, (unsigned long *) (& fields->f_dsp_24_u24)); 1080 break; 1081 case M32C_OPERAND_DSP_24_U24 : 1082 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_24_U24, (unsigned long *) (& fields->f_dsp_24_u24)); 1083 break; 1084 case M32C_OPERAND_DSP_24_U8 : 1085 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_24_U8, (unsigned long *) (& fields->f_dsp_24_u8)); 1086 break; 1087 case M32C_OPERAND_DSP_32_S16 : 1088 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_32_S16, (long *) (& fields->f_dsp_32_s16)); 1089 break; 1090 case M32C_OPERAND_DSP_32_S8 : 1091 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_32_S8, (long *) (& fields->f_dsp_32_s8)); 1092 break; 1093 case M32C_OPERAND_DSP_32_U16 : 1094 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_32_U16, (unsigned long *) (& fields->f_dsp_32_u16)); 1095 break; 1096 case M32C_OPERAND_DSP_32_U20 : 1097 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_32_U20, (unsigned long *) (& fields->f_dsp_32_u24)); 1098 break; 1099 case M32C_OPERAND_DSP_32_U24 : 1100 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_32_U24, (unsigned long *) (& fields->f_dsp_32_u24)); 1101 break; 1102 case M32C_OPERAND_DSP_32_U8 : 1103 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_32_U8, (unsigned long *) (& fields->f_dsp_32_u8)); 1104 break; 1105 case M32C_OPERAND_DSP_40_S16 : 1106 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_40_S16, (long *) (& fields->f_dsp_40_s16)); 1107 break; 1108 case M32C_OPERAND_DSP_40_S8 : 1109 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_40_S8, (long *) (& fields->f_dsp_40_s8)); 1110 break; 1111 case M32C_OPERAND_DSP_40_U16 : 1112 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_40_U16, (unsigned long *) (& fields->f_dsp_40_u16)); 1113 break; 1114 case M32C_OPERAND_DSP_40_U20 : 1115 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_40_U20, (unsigned long *) (& fields->f_dsp_40_u20)); 1116 break; 1117 case M32C_OPERAND_DSP_40_U24 : 1118 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_40_U24, (unsigned long *) (& fields->f_dsp_40_u24)); 1119 break; 1120 case M32C_OPERAND_DSP_40_U8 : 1121 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_40_U8, (unsigned long *) (& fields->f_dsp_40_u8)); 1122 break; 1123 case M32C_OPERAND_DSP_48_S16 : 1124 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_48_S16, (long *) (& fields->f_dsp_48_s16)); 1125 break; 1126 case M32C_OPERAND_DSP_48_S8 : 1127 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_48_S8, (long *) (& fields->f_dsp_48_s8)); 1128 break; 1129 case M32C_OPERAND_DSP_48_U16 : 1130 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_48_U16, (unsigned long *) (& fields->f_dsp_48_u16)); 1131 break; 1132 case M32C_OPERAND_DSP_48_U20 : 1133 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_48_U20, (unsigned long *) (& fields->f_dsp_48_u20)); 1134 break; 1135 case M32C_OPERAND_DSP_48_U24 : 1136 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_48_U24, (unsigned long *) (& fields->f_dsp_48_u24)); 1137 break; 1138 case M32C_OPERAND_DSP_48_U8 : 1139 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_48_U8, (unsigned long *) (& fields->f_dsp_48_u8)); 1140 break; 1141 case M32C_OPERAND_DSP_8_S24 : 1142 errmsg = parse_signed24 (cd, strp, M32C_OPERAND_DSP_8_S24, (long *) (& fields->f_dsp_8_s24)); 1143 break; 1144 case M32C_OPERAND_DSP_8_S8 : 1145 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_8_S8, (long *) (& fields->f_dsp_8_s8)); 1146 break; 1147 case M32C_OPERAND_DSP_8_U16 : 1148 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_8_U16, (unsigned long *) (& fields->f_dsp_8_u16)); 1149 break; 1150 case M32C_OPERAND_DSP_8_U24 : 1151 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_8_U24, (unsigned long *) (& fields->f_dsp_8_u24)); 1152 break; 1153 case M32C_OPERAND_DSP_8_U6 : 1154 errmsg = parse_unsigned6 (cd, strp, M32C_OPERAND_DSP_8_U6, (unsigned long *) (& fields->f_dsp_8_u6)); 1155 break; 1156 case M32C_OPERAND_DSP_8_U8 : 1157 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_8_U8, (unsigned long *) (& fields->f_dsp_8_u8)); 1158 break; 1159 case M32C_OPERAND_DST16AN : 1160 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst16_an); 1161 break; 1162 case M32C_OPERAND_DST16AN_S : 1163 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst16_an_s); 1164 break; 1165 case M32C_OPERAND_DST16ANHI : 1166 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst16_an); 1167 break; 1168 case M32C_OPERAND_DST16ANQI : 1169 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst16_an); 1170 break; 1171 case M32C_OPERAND_DST16ANQI_S : 1172 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst16_rn_QI_s); 1173 break; 1174 case M32C_OPERAND_DST16ANSI : 1175 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_SI, & fields->f_dst16_an); 1176 break; 1177 case M32C_OPERAND_DST16RNEXTQI : 1178 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_QI, & fields->f_dst16_rn_ext); 1179 break; 1180 case M32C_OPERAND_DST16RNHI : 1181 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn); 1182 break; 1183 case M32C_OPERAND_DST16RNQI : 1184 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst16_rn); 1185 break; 1186 case M32C_OPERAND_DST16RNQI_S : 1187 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l_r0h, & fields->f_dst16_rn_QI_s); 1188 break; 1189 case M32C_OPERAND_DST16RNSI : 1190 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst16_rn); 1191 break; 1192 case M32C_OPERAND_DST32ANEXTUNPREFIXED : 1193 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed); 1194 break; 1195 case M32C_OPERAND_DST32ANPREFIXED : 1196 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed); 1197 break; 1198 case M32C_OPERAND_DST32ANPREFIXEDHI : 1199 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst32_an_prefixed); 1200 break; 1201 case M32C_OPERAND_DST32ANPREFIXEDQI : 1202 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst32_an_prefixed); 1203 break; 1204 case M32C_OPERAND_DST32ANPREFIXEDSI : 1205 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed); 1206 break; 1207 case M32C_OPERAND_DST32ANUNPREFIXED : 1208 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed); 1209 break; 1210 case M32C_OPERAND_DST32ANUNPREFIXEDHI : 1211 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst32_an_unprefixed); 1212 break; 1213 case M32C_OPERAND_DST32ANUNPREFIXEDQI : 1214 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst32_an_unprefixed); 1215 break; 1216 case M32C_OPERAND_DST32ANUNPREFIXEDSI : 1217 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed); 1218 break; 1219 case M32C_OPERAND_DST32R0HI_S : 1220 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0, & junk); 1221 break; 1222 case M32C_OPERAND_DST32R0QI_S : 1223 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l, & junk); 1224 break; 1225 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : 1226 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_HI, & fields->f_dst32_rn_ext_unprefixed); 1227 break; 1228 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : 1229 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_QI, & fields->f_dst32_rn_ext_unprefixed); 1230 break; 1231 case M32C_OPERAND_DST32RNPREFIXEDHI : 1232 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst32_rn_prefixed_HI); 1233 break; 1234 case M32C_OPERAND_DST32RNPREFIXEDQI : 1235 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_prefixed_QI); 1236 break; 1237 case M32C_OPERAND_DST32RNPREFIXEDSI : 1238 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst32_rn_prefixed_SI); 1239 break; 1240 case M32C_OPERAND_DST32RNUNPREFIXEDHI : 1241 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst32_rn_unprefixed_HI); 1242 break; 1243 case M32C_OPERAND_DST32RNUNPREFIXEDQI : 1244 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_unprefixed_QI); 1245 break; 1246 case M32C_OPERAND_DST32RNUNPREFIXEDSI : 1247 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst32_rn_unprefixed_SI); 1248 break; 1249 case M32C_OPERAND_G : 1250 errmsg = parse_G (cd, strp, M32C_OPERAND_G, (long *) (& junk)); 1251 break; 1252 case M32C_OPERAND_IMM_12_S4 : 1253 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_12_S4, (long *) (& fields->f_imm_12_s4)); 1254 break; 1255 case M32C_OPERAND_IMM_12_S4N : 1256 errmsg = parse_signed4n (cd, strp, M32C_OPERAND_IMM_12_S4N, (long *) (& fields->f_imm_12_s4)); 1257 break; 1258 case M32C_OPERAND_IMM_13_U3 : 1259 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_13_U3, (long *) (& fields->f_imm_13_u3)); 1260 break; 1261 case M32C_OPERAND_IMM_16_HI : 1262 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_16_HI, (long *) (& fields->f_dsp_16_s16)); 1263 break; 1264 case M32C_OPERAND_IMM_16_QI : 1265 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_16_QI, (long *) (& fields->f_dsp_16_s8)); 1266 break; 1267 case M32C_OPERAND_IMM_16_SI : 1268 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_16_SI, (long *) (& fields->f_dsp_16_s32)); 1269 break; 1270 case M32C_OPERAND_IMM_20_S4 : 1271 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_20_S4, (long *) (& fields->f_imm_20_s4)); 1272 break; 1273 case M32C_OPERAND_IMM_24_HI : 1274 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_24_HI, (long *) (& fields->f_dsp_24_s16)); 1275 break; 1276 case M32C_OPERAND_IMM_24_QI : 1277 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_24_QI, (long *) (& fields->f_dsp_24_s8)); 1278 break; 1279 case M32C_OPERAND_IMM_24_SI : 1280 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_24_SI, (long *) (& fields->f_dsp_24_s32)); 1281 break; 1282 case M32C_OPERAND_IMM_32_HI : 1283 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_32_HI, (long *) (& fields->f_dsp_32_s16)); 1284 break; 1285 case M32C_OPERAND_IMM_32_QI : 1286 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_32_QI, (long *) (& fields->f_dsp_32_s8)); 1287 break; 1288 case M32C_OPERAND_IMM_32_SI : 1289 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_32_SI, (long *) (& fields->f_dsp_32_s32)); 1290 break; 1291 case M32C_OPERAND_IMM_40_HI : 1292 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_40_HI, (long *) (& fields->f_dsp_40_s16)); 1293 break; 1294 case M32C_OPERAND_IMM_40_QI : 1295 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_40_QI, (long *) (& fields->f_dsp_40_s8)); 1296 break; 1297 case M32C_OPERAND_IMM_40_SI : 1298 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_40_SI, (long *) (& fields->f_dsp_40_s32)); 1299 break; 1300 case M32C_OPERAND_IMM_48_HI : 1301 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_48_HI, (long *) (& fields->f_dsp_48_s16)); 1302 break; 1303 case M32C_OPERAND_IMM_48_QI : 1304 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_48_QI, (long *) (& fields->f_dsp_48_s8)); 1305 break; 1306 case M32C_OPERAND_IMM_48_SI : 1307 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_48_SI, (long *) (& fields->f_dsp_48_s32)); 1308 break; 1309 case M32C_OPERAND_IMM_56_HI : 1310 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_56_HI, (long *) (& fields->f_dsp_56_s16)); 1311 break; 1312 case M32C_OPERAND_IMM_56_QI : 1313 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_56_QI, (long *) (& fields->f_dsp_56_s8)); 1314 break; 1315 case M32C_OPERAND_IMM_64_HI : 1316 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_64_HI, (long *) (& fields->f_dsp_64_s16)); 1317 break; 1318 case M32C_OPERAND_IMM_8_HI : 1319 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_8_HI, (long *) (& fields->f_dsp_8_s16)); 1320 break; 1321 case M32C_OPERAND_IMM_8_QI : 1322 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_8_QI, (long *) (& fields->f_dsp_8_s8)); 1323 break; 1324 case M32C_OPERAND_IMM_8_S4 : 1325 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_8_S4, (long *) (& fields->f_imm_8_s4)); 1326 break; 1327 case M32C_OPERAND_IMM_8_S4N : 1328 errmsg = parse_signed4n (cd, strp, M32C_OPERAND_IMM_8_S4N, (long *) (& fields->f_imm_8_s4)); 1329 break; 1330 case M32C_OPERAND_IMM_SH_12_S4 : 1331 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_12_s4); 1332 break; 1333 case M32C_OPERAND_IMM_SH_20_S4 : 1334 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_20_s4); 1335 break; 1336 case M32C_OPERAND_IMM_SH_8_S4 : 1337 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_8_s4); 1338 break; 1339 case M32C_OPERAND_IMM1_S : 1340 errmsg = parse_imm1_S (cd, strp, M32C_OPERAND_IMM1_S, (long *) (& fields->f_imm1_S)); 1341 break; 1342 case M32C_OPERAND_IMM3_S : 1343 errmsg = parse_imm3_S (cd, strp, M32C_OPERAND_IMM3_S, (long *) (& fields->f_imm3_S)); 1344 break; 1345 case M32C_OPERAND_LAB_16_8 : 1346 { 1347 bfd_vma value = 0; 1348 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_16_8, 0, NULL, & value); 1349 fields->f_lab_16_8 = value; 1350 } 1351 break; 1352 case M32C_OPERAND_LAB_24_8 : 1353 { 1354 bfd_vma value = 0; 1355 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_24_8, 0, NULL, & value); 1356 fields->f_lab_24_8 = value; 1357 } 1358 break; 1359 case M32C_OPERAND_LAB_32_8 : 1360 { 1361 bfd_vma value = 0; 1362 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_32_8, 0, NULL, & value); 1363 fields->f_lab_32_8 = value; 1364 } 1365 break; 1366 case M32C_OPERAND_LAB_40_8 : 1367 { 1368 bfd_vma value = 0; 1369 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_40_8, 0, NULL, & value); 1370 fields->f_lab_40_8 = value; 1371 } 1372 break; 1373 case M32C_OPERAND_LAB_5_3 : 1374 { 1375 bfd_vma value = 0; 1376 errmsg = parse_lab_5_3 (cd, strp, M32C_OPERAND_LAB_5_3, 0, NULL, & value); 1377 fields->f_lab_5_3 = value; 1378 } 1379 break; 1380 case M32C_OPERAND_LAB_8_16 : 1381 { 1382 bfd_vma value = 0; 1383 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_16, 0, NULL, & value); 1384 fields->f_lab_8_16 = value; 1385 } 1386 break; 1387 case M32C_OPERAND_LAB_8_24 : 1388 { 1389 bfd_vma value = 0; 1390 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_24, 0, NULL, & value); 1391 fields->f_lab_8_24 = value; 1392 } 1393 break; 1394 case M32C_OPERAND_LAB_8_8 : 1395 { 1396 bfd_vma value = 0; 1397 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_8, 0, NULL, & value); 1398 fields->f_lab_8_8 = value; 1399 } 1400 break; 1401 case M32C_OPERAND_LAB32_JMP_S : 1402 { 1403 bfd_vma value = 0; 1404 errmsg = parse_lab_5_3 (cd, strp, M32C_OPERAND_LAB32_JMP_S, 0, NULL, & value); 1405 fields->f_lab32_jmp_s = value; 1406 } 1407 break; 1408 case M32C_OPERAND_Q : 1409 errmsg = parse_Q (cd, strp, M32C_OPERAND_Q, (long *) (& junk)); 1410 break; 1411 case M32C_OPERAND_R0 : 1412 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0, & junk); 1413 break; 1414 case M32C_OPERAND_R0H : 1415 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0h, & junk); 1416 break; 1417 case M32C_OPERAND_R0L : 1418 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l, & junk); 1419 break; 1420 case M32C_OPERAND_R1 : 1421 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r1, & junk); 1422 break; 1423 case M32C_OPERAND_R1R2R0 : 1424 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r1r2r0, & junk); 1425 break; 1426 case M32C_OPERAND_R2 : 1427 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r2, & junk); 1428 break; 1429 case M32C_OPERAND_R2R0 : 1430 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r2r0, & junk); 1431 break; 1432 case M32C_OPERAND_R3 : 1433 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r3, & junk); 1434 break; 1435 case M32C_OPERAND_R3R1 : 1436 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r3r1, & junk); 1437 break; 1438 case M32C_OPERAND_REGSETPOP : 1439 errmsg = parse_pop_regset (cd, strp, M32C_OPERAND_REGSETPOP, (unsigned long *) (& fields->f_8_8)); 1440 break; 1441 case M32C_OPERAND_REGSETPUSH : 1442 errmsg = parse_push_regset (cd, strp, M32C_OPERAND_REGSETPUSH, (unsigned long *) (& fields->f_8_8)); 1443 break; 1444 case M32C_OPERAND_RN16_PUSH_S : 1445 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_4_1); 1446 break; 1447 case M32C_OPERAND_S : 1448 errmsg = parse_S (cd, strp, M32C_OPERAND_S, (long *) (& junk)); 1449 break; 1450 case M32C_OPERAND_SRC16AN : 1451 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src16_an); 1452 break; 1453 case M32C_OPERAND_SRC16ANHI : 1454 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src16_an); 1455 break; 1456 case M32C_OPERAND_SRC16ANQI : 1457 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src16_an); 1458 break; 1459 case M32C_OPERAND_SRC16RNHI : 1460 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src16_rn); 1461 break; 1462 case M32C_OPERAND_SRC16RNQI : 1463 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src16_rn); 1464 break; 1465 case M32C_OPERAND_SRC32ANPREFIXED : 1466 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_prefixed); 1467 break; 1468 case M32C_OPERAND_SRC32ANPREFIXEDHI : 1469 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src32_an_prefixed); 1470 break; 1471 case M32C_OPERAND_SRC32ANPREFIXEDQI : 1472 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src32_an_prefixed); 1473 break; 1474 case M32C_OPERAND_SRC32ANPREFIXEDSI : 1475 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_prefixed); 1476 break; 1477 case M32C_OPERAND_SRC32ANUNPREFIXED : 1478 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_unprefixed); 1479 break; 1480 case M32C_OPERAND_SRC32ANUNPREFIXEDHI : 1481 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src32_an_unprefixed); 1482 break; 1483 case M32C_OPERAND_SRC32ANUNPREFIXEDQI : 1484 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src32_an_unprefixed); 1485 break; 1486 case M32C_OPERAND_SRC32ANUNPREFIXEDSI : 1487 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_unprefixed); 1488 break; 1489 case M32C_OPERAND_SRC32RNPREFIXEDHI : 1490 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src32_rn_prefixed_HI); 1491 break; 1492 case M32C_OPERAND_SRC32RNPREFIXEDQI : 1493 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src32_rn_prefixed_QI); 1494 break; 1495 case M32C_OPERAND_SRC32RNPREFIXEDSI : 1496 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_src32_rn_prefixed_SI); 1497 break; 1498 case M32C_OPERAND_SRC32RNUNPREFIXEDHI : 1499 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src32_rn_unprefixed_HI); 1500 break; 1501 case M32C_OPERAND_SRC32RNUNPREFIXEDQI : 1502 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src32_rn_unprefixed_QI); 1503 break; 1504 case M32C_OPERAND_SRC32RNUNPREFIXEDSI : 1505 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_src32_rn_unprefixed_SI); 1506 break; 1507 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : 1508 errmsg = parse_r0l_r0h (cd, strp, M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL, (long *) (& fields->f_5_1)); 1509 break; 1510 case M32C_OPERAND_X : 1511 errmsg = parse_X (cd, strp, M32C_OPERAND_X, (long *) (& junk)); 1512 break; 1513 case M32C_OPERAND_Z : 1514 errmsg = parse_Z (cd, strp, M32C_OPERAND_Z, (long *) (& junk)); 1515 break; 1516 case M32C_OPERAND_COND16_16 : 1517 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_16_u8); 1518 break; 1519 case M32C_OPERAND_COND16_24 : 1520 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_24_u8); 1521 break; 1522 case M32C_OPERAND_COND16_32 : 1523 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_32_u8); 1524 break; 1525 case M32C_OPERAND_COND16C : 1526 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16c, & fields->f_cond16); 1527 break; 1528 case M32C_OPERAND_COND16J : 1529 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16j, & fields->f_cond16); 1530 break; 1531 case M32C_OPERAND_COND16J5 : 1532 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16j_5, & fields->f_cond16j_5); 1533 break; 1534 case M32C_OPERAND_COND32 : 1535 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond32); 1536 break; 1537 case M32C_OPERAND_COND32_16 : 1538 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_16_u8); 1539 break; 1540 case M32C_OPERAND_COND32_24 : 1541 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_24_u8); 1542 break; 1543 case M32C_OPERAND_COND32_32 : 1544 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_32_u8); 1545 break; 1546 case M32C_OPERAND_COND32_40 : 1547 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_40_u8); 1548 break; 1549 case M32C_OPERAND_COND32J : 1550 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond32j); 1551 break; 1552 case M32C_OPERAND_CR1_PREFIXED_32 : 1553 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr1_32, & fields->f_21_3); 1554 break; 1555 case M32C_OPERAND_CR1_UNPREFIXED_32 : 1556 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr1_32, & fields->f_13_3); 1557 break; 1558 case M32C_OPERAND_CR16 : 1559 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr_16, & fields->f_9_3); 1560 break; 1561 case M32C_OPERAND_CR2_32 : 1562 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr2_32, & fields->f_13_3); 1563 break; 1564 case M32C_OPERAND_CR3_PREFIXED_32 : 1565 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr3_32, & fields->f_21_3); 1566 break; 1567 case M32C_OPERAND_CR3_UNPREFIXED_32 : 1568 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr3_32, & fields->f_13_3); 1569 break; 1570 case M32C_OPERAND_FLAGS16 : 1571 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_flags, & fields->f_9_3); 1572 break; 1573 case M32C_OPERAND_FLAGS32 : 1574 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_flags, & fields->f_13_3); 1575 break; 1576 case M32C_OPERAND_SCCOND32 : 1577 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond16); 1578 break; 1579 case M32C_OPERAND_SIZE : 1580 errmsg = parse_size (cd, strp, M32C_OPERAND_SIZE, (long *) (& junk)); 1581 break; 1582 1583 default : 1584 /* xgettext:c-format */ 1585 opcodes_error_handler 1586 (_("internal error: unrecognized field %d while parsing"), 1587 opindex); 1588 abort (); 1589 } 1590 1591 return errmsg; 1592 } 1593 1594 cgen_parse_fn * const m32c_cgen_parse_handlers[] = 1595 { 1596 parse_insn_normal, 1597 }; 1598 1599 void 1600 m32c_cgen_init_asm (CGEN_CPU_DESC cd) 1601 { 1602 m32c_cgen_init_opcode_table (cd); 1603 m32c_cgen_init_ibld_table (cd); 1604 cd->parse_handlers = & m32c_cgen_parse_handlers[0]; 1605 cd->parse_operand = m32c_cgen_parse_operand; 1606 #ifdef CGEN_ASM_INIT_HOOK 1607 CGEN_ASM_INIT_HOOK 1608 #endif 1609 } 1610 1611 1612 1614 /* Regex construction routine. 1615 1616 This translates an opcode syntax string into a regex string, 1617 by replacing any non-character syntax element (such as an 1618 opcode) with the pattern '.*' 1619 1620 It then compiles the regex and stores it in the opcode, for 1621 later use by m32c_cgen_assemble_insn 1622 1623 Returns NULL for success, an error message for failure. */ 1624 1625 char * 1626 m32c_cgen_build_insn_regex (CGEN_INSN *insn) 1627 { 1628 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); 1629 const char *mnem = CGEN_INSN_MNEMONIC (insn); 1630 char rxbuf[CGEN_MAX_RX_ELEMENTS]; 1631 char *rx = rxbuf; 1632 const CGEN_SYNTAX_CHAR_TYPE *syn; 1633 int reg_err; 1634 1635 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc)); 1636 1637 /* Mnemonics come first in the syntax string. */ 1638 if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) 1639 return _("missing mnemonic in syntax string"); 1640 ++syn; 1641 1642 /* Generate a case sensitive regular expression that emulates case 1643 insensitive matching in the "C" locale. We cannot generate a case 1644 insensitive regular expression because in Turkish locales, 'i' and 'I' 1645 are not equal modulo case conversion. */ 1646 1647 /* Copy the literal mnemonic out of the insn. */ 1648 for (; *mnem; mnem++) 1649 { 1650 char c = *mnem; 1651 1652 if (ISALPHA (c)) 1653 { 1654 *rx++ = '['; 1655 *rx++ = TOLOWER (c); 1656 *rx++ = TOUPPER (c); 1657 *rx++ = ']'; 1658 } 1659 else 1660 *rx++ = c; 1661 } 1662 1663 /* Copy any remaining literals from the syntax string into the rx. */ 1664 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) 1665 { 1666 if (CGEN_SYNTAX_CHAR_P (* syn)) 1667 { 1668 char c = CGEN_SYNTAX_CHAR (* syn); 1669 1670 switch (c) 1671 { 1672 /* Escape any regex metacharacters in the syntax. */ 1673 case '.': case '[': case '\\': 1674 case '*': case '^': case '$': 1675 1676 #ifdef CGEN_ESCAPE_EXTENDED_REGEX 1677 case '?': case '{': case '}': 1678 case '(': case ')': case '*': 1679 case '|': case '+': case ']': 1680 #endif 1681 *rx++ = '\\'; 1682 *rx++ = c; 1683 break; 1684 1685 default: 1686 if (ISALPHA (c)) 1687 { 1688 *rx++ = '['; 1689 *rx++ = TOLOWER (c); 1690 *rx++ = TOUPPER (c); 1691 *rx++ = ']'; 1692 } 1693 else 1694 *rx++ = c; 1695 break; 1696 } 1697 } 1698 else 1699 { 1700 /* Replace non-syntax fields with globs. */ 1701 *rx++ = '.'; 1702 *rx++ = '*'; 1703 } 1704 } 1705 1706 /* Trailing whitespace ok. */ 1707 * rx++ = '['; 1708 * rx++ = ' '; 1709 * rx++ = '\t'; 1710 * rx++ = ']'; 1711 * rx++ = '*'; 1712 1713 /* But anchor it after that. */ 1714 * rx++ = '$'; 1715 * rx = '\0'; 1716 1717 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t)); 1718 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB); 1719 1720 if (reg_err == 0) 1721 return NULL; 1722 else 1723 { 1724 static char msg[80]; 1725 1726 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80); 1727 regfree ((regex_t *) CGEN_INSN_RX (insn)); 1728 free (CGEN_INSN_RX (insn)); 1729 (CGEN_INSN_RX (insn)) = NULL; 1730 return msg; 1731 } 1732 } 1733 1734 1735 /* Default insn parser. 1737 1738 The syntax string is scanned and operands are parsed and stored in FIELDS. 1739 Relocs are queued as we go via other callbacks. 1740 1741 ??? Note that this is currently an all-or-nothing parser. If we fail to 1742 parse the instruction, we return 0 and the caller will start over from 1743 the beginning. Backtracking will be necessary in parsing subexpressions, 1744 but that can be handled there. Not handling backtracking here may get 1745 expensive in the case of the m68k. Deal with later. 1746 1747 Returns NULL for success, an error message for failure. */ 1748 1749 static const char * 1750 parse_insn_normal (CGEN_CPU_DESC cd, 1751 const CGEN_INSN *insn, 1752 const char **strp, 1753 CGEN_FIELDS *fields) 1754 { 1755 /* ??? Runtime added insns not handled yet. */ 1756 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 1757 const char *str = *strp; 1758 const char *errmsg; 1759 const char *p; 1760 const CGEN_SYNTAX_CHAR_TYPE * syn; 1761 #ifdef CGEN_MNEMONIC_OPERANDS 1762 /* FIXME: wip */ 1763 int past_opcode_p; 1764 #endif 1765 1766 /* For now we assume the mnemonic is first (there are no leading operands). 1767 We can parse it without needing to set up operand parsing. 1768 GAS's input scrubber will ensure mnemonics are lowercase, but we may 1769 not be called from GAS. */ 1770 p = CGEN_INSN_MNEMONIC (insn); 1771 while (*p && TOLOWER (*p) == TOLOWER (*str)) 1772 ++p, ++str; 1773 1774 if (* p) 1775 return _("unrecognized instruction"); 1776 1777 #ifndef CGEN_MNEMONIC_OPERANDS 1778 if (* str && ! ISSPACE (* str)) 1779 return _("unrecognized instruction"); 1780 #endif 1781 1782 CGEN_INIT_PARSE (cd); 1783 cgen_init_parse_operand (cd); 1784 #ifdef CGEN_MNEMONIC_OPERANDS 1785 past_opcode_p = 0; 1786 #endif 1787 1788 /* We don't check for (*str != '\0') here because we want to parse 1789 any trailing fake arguments in the syntax string. */ 1790 syn = CGEN_SYNTAX_STRING (syntax); 1791 1792 /* Mnemonics come first for now, ensure valid string. */ 1793 if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) 1794 abort (); 1795 1796 ++syn; 1797 1798 while (* syn != 0) 1799 { 1800 /* Non operand chars must match exactly. */ 1801 if (CGEN_SYNTAX_CHAR_P (* syn)) 1802 { 1803 /* FIXME: While we allow for non-GAS callers above, we assume the 1804 first char after the mnemonic part is a space. */ 1805 /* FIXME: We also take inappropriate advantage of the fact that 1806 GAS's input scrubber will remove extraneous blanks. */ 1807 if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn))) 1808 { 1809 #ifdef CGEN_MNEMONIC_OPERANDS 1810 if (CGEN_SYNTAX_CHAR(* syn) == ' ') 1811 past_opcode_p = 1; 1812 #endif 1813 ++ syn; 1814 ++ str; 1815 } 1816 else if (*str) 1817 { 1818 /* Syntax char didn't match. Can't be this insn. */ 1819 static char msg [80]; 1820 1821 /* xgettext:c-format */ 1822 sprintf (msg, _("syntax error (expected char `%c', found `%c')"), 1823 CGEN_SYNTAX_CHAR(*syn), *str); 1824 return msg; 1825 } 1826 else 1827 { 1828 /* Ran out of input. */ 1829 static char msg [80]; 1830 1831 /* xgettext:c-format */ 1832 sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"), 1833 CGEN_SYNTAX_CHAR(*syn)); 1834 return msg; 1835 } 1836 continue; 1837 } 1838 1839 #ifdef CGEN_MNEMONIC_OPERANDS 1840 (void) past_opcode_p; 1841 #endif 1842 /* We have an operand of some sort. */ 1843 errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn), &str, fields); 1844 if (errmsg) 1845 return errmsg; 1846 1847 /* Done with this operand, continue with next one. */ 1848 ++ syn; 1849 } 1850 1851 /* If we're at the end of the syntax string, we're done. */ 1852 if (* syn == 0) 1853 { 1854 /* FIXME: For the moment we assume a valid `str' can only contain 1855 blanks now. IE: We needn't try again with a longer version of 1856 the insn and it is assumed that longer versions of insns appear 1857 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */ 1858 while (ISSPACE (* str)) 1859 ++ str; 1860 1861 if (* str != '\0') 1862 return _("junk at end of line"); /* FIXME: would like to include `str' */ 1863 1864 return NULL; 1865 } 1866 1867 /* We couldn't parse it. */ 1868 return _("unrecognized instruction"); 1869 } 1870 1871 /* Main entry point. 1873 This routine is called for each instruction to be assembled. 1874 STR points to the insn to be assembled. 1875 We assume all necessary tables have been initialized. 1876 The assembled instruction, less any fixups, is stored in BUF. 1877 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value 1878 still needs to be converted to target byte order, otherwise BUF is an array 1879 of bytes in target byte order. 1880 The result is a pointer to the insn's entry in the opcode table, 1881 or NULL if an error occured (an error message will have already been 1882 printed). 1883 1884 Note that when processing (non-alias) macro-insns, 1885 this function recurses. 1886 1887 ??? It's possible to make this cpu-independent. 1888 One would have to deal with a few minor things. 1889 At this point in time doing so would be more of a curiosity than useful 1890 [for example this file isn't _that_ big], but keeping the possibility in 1891 mind helps keep the design clean. */ 1892 1893 const CGEN_INSN * 1894 m32c_cgen_assemble_insn (CGEN_CPU_DESC cd, 1895 const char *str, 1896 CGEN_FIELDS *fields, 1897 CGEN_INSN_BYTES_PTR buf, 1898 char **errmsg) 1899 { 1900 const char *start; 1901 CGEN_INSN_LIST *ilist; 1902 const char *parse_errmsg = NULL; 1903 const char *insert_errmsg = NULL; 1904 int recognized_mnemonic = 0; 1905 1906 /* Skip leading white space. */ 1907 while (ISSPACE (* str)) 1908 ++ str; 1909 1910 /* The instructions are stored in hashed lists. 1911 Get the first in the list. */ 1912 ilist = CGEN_ASM_LOOKUP_INSN (cd, str); 1913 1914 /* Keep looking until we find a match. */ 1915 start = str; 1916 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist)) 1917 { 1918 const CGEN_INSN *insn = ilist->insn; 1919 recognized_mnemonic = 1; 1920 1921 #ifdef CGEN_VALIDATE_INSN_SUPPORTED 1922 /* Not usually needed as unsupported opcodes 1923 shouldn't be in the hash lists. */ 1924 /* Is this insn supported by the selected cpu? */ 1925 if (! m32c_cgen_insn_supported (cd, insn)) 1926 continue; 1927 #endif 1928 /* If the RELAXED attribute is set, this is an insn that shouldn't be 1929 chosen immediately. Instead, it is used during assembler/linker 1930 relaxation if possible. */ 1931 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0) 1932 continue; 1933 1934 str = start; 1935 1936 /* Skip this insn if str doesn't look right lexically. */ 1937 if (CGEN_INSN_RX (insn) != NULL && 1938 regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH) 1939 continue; 1940 1941 /* Allow parse/insert handlers to obtain length of insn. */ 1942 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); 1943 1944 parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields); 1945 if (parse_errmsg != NULL) 1946 continue; 1947 1948 /* ??? 0 is passed for `pc'. */ 1949 insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf, 1950 (bfd_vma) 0); 1951 if (insert_errmsg != NULL) 1952 continue; 1953 1954 /* It is up to the caller to actually output the insn and any 1955 queued relocs. */ 1956 return insn; 1957 } 1958 1959 { 1960 static char errbuf[150]; 1961 const char *tmp_errmsg; 1962 #ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS 1963 #define be_verbose 1 1964 #else 1965 #define be_verbose 0 1966 #endif 1967 1968 if (be_verbose) 1969 { 1970 /* If requesting verbose error messages, use insert_errmsg. 1971 Failing that, use parse_errmsg. */ 1972 tmp_errmsg = (insert_errmsg ? insert_errmsg : 1973 parse_errmsg ? parse_errmsg : 1974 recognized_mnemonic ? 1975 _("unrecognized form of instruction") : 1976 _("unrecognized instruction")); 1977 1978 if (strlen (start) > 50) 1979 /* xgettext:c-format */ 1980 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start); 1981 else 1982 /* xgettext:c-format */ 1983 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start); 1984 } 1985 else 1986 { 1987 if (strlen (start) > 50) 1988 /* xgettext:c-format */ 1989 sprintf (errbuf, _("bad instruction `%.50s...'"), start); 1990 else 1991 /* xgettext:c-format */ 1992 sprintf (errbuf, _("bad instruction `%.50s'"), start); 1993 } 1994 1995 *errmsg = errbuf; 1996 return NULL; 1997 } 1998 } 1999
Indexes created Wed Apr 22 00:22:44 UTC 2026