s12z-opc.c revision 1.1.1.1
1 /* s12z-decode.c -- Freescale S12Z disassembly 2 Copyright (C) 2018 Free Software Foundation, Inc. 3 4 This file is part of the GNU opcodes library. 5 6 This library is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 It is distributed in the hope that it will be useful, but WITHOUT 12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 14 License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with this program; if not, write to the Free Software 18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 19 MA 02110-1301, USA. */ 20 21 #include "sysdep.h" 22 #include <stdio.h> 23 #include <stdint.h> 24 #include <stdbool.h> 25 #include <assert.h> 26 27 #include "opcode/s12z.h" 28 29 #include "bfd.h" 30 31 #include "s12z-opc.h" 32 33 34 typedef int (* insn_bytes_f) (struct mem_read_abstraction_base *); 35 36 typedef void (*operands_f) (struct mem_read_abstraction_base *, 37 int *n_operands, struct operand **operand); 38 39 typedef enum operator (*discriminator_f) (struct mem_read_abstraction_base *, 40 enum operator hint); 41 42 enum OPR_MODE 43 { 44 OPR_IMMe4, 45 OPR_REG, 46 OPR_OFXYS, 47 OPR_XY_PRE_INC, 48 OPR_XY_POST_INC, 49 OPR_XY_PRE_DEC, 50 OPR_XY_POST_DEC, 51 OPR_S_PRE_DEC, 52 OPR_S_POST_INC, 53 OPR_REG_DIRECT, 54 OPR_REG_INDIRECT, 55 OPR_IDX_DIRECT, 56 OPR_IDX_INDIRECT, 57 OPR_EXT1, 58 OPR_IDX2_REG, 59 OPR_IDX3_DIRECT, 60 OPR_IDX3_INDIRECT, 61 62 OPR_EXT18, 63 OPR_IDX3_DIRECT_REG, 64 OPR_EXT3_DIRECT, 65 OPR_EXT3_INDIRECT 66 }; 67 68 struct opr_pb 69 { 70 uint8_t mask; 71 uint8_t value; 72 int n_operands; 73 enum OPR_MODE mode; 74 }; 75 76 static const struct opr_pb opr_pb[] = { 77 {0xF0, 0x70, 1, OPR_IMMe4}, 78 {0xF8, 0xB8, 1, OPR_REG}, 79 {0xC0, 0x40, 1, OPR_OFXYS}, 80 {0xEF, 0xE3, 1, OPR_XY_PRE_INC}, 81 {0xEF, 0xE7, 1, OPR_XY_POST_INC}, 82 {0xEF, 0xC3, 1, OPR_XY_PRE_DEC}, 83 {0xEF, 0xC7, 1, OPR_XY_POST_DEC}, 84 {0xFF, 0xFB, 1, OPR_S_PRE_DEC}, 85 {0xFF, 0xFF, 1, OPR_S_POST_INC}, 86 {0xC8, 0x88, 1, OPR_REG_DIRECT}, 87 {0xE8, 0xC8, 1, OPR_REG_INDIRECT}, 88 89 {0xCE, 0xC0, 2, OPR_IDX_DIRECT}, 90 {0xCE, 0xC4, 2, OPR_IDX_INDIRECT}, 91 {0xC0, 0x00, 2, OPR_EXT1}, 92 93 {0xC8, 0x80, 3, OPR_IDX2_REG}, 94 {0xFA, 0xF8, 3, OPR_EXT18}, 95 96 {0xCF, 0xC2, 4, OPR_IDX3_DIRECT}, 97 {0xCF, 0xC6, 4, OPR_IDX3_INDIRECT}, 98 99 {0xF8, 0xE8, 4, OPR_IDX3_DIRECT_REG}, 100 {0xFF, 0xFA, 4, OPR_EXT3_DIRECT}, 101 {0xFF, 0xFE, 4, OPR_EXT3_INDIRECT}, 102 }; 103 104 /* Return the number of bytes in a OPR operand, including the XB postbyte. 105 It does not include any preceeding opcodes. */ 106 static int 107 x_opr_n_bytes (struct mem_read_abstraction_base *mra, int offset) 108 { 109 bfd_byte xb; 110 int status = mra->read (mra, offset, 1, &xb); 111 if (status < 0) 112 return status; 113 114 size_t i; 115 for (i = 0; i < sizeof (opr_pb) / sizeof (opr_pb[0]); ++i) 116 { 117 const struct opr_pb *pb = opr_pb + i; 118 if ((xb & pb->mask) == pb->value) 119 { 120 return pb->n_operands; 121 } 122 } 123 124 return 1; 125 } 126 127 static int 128 opr_n_bytes_p1 (struct mem_read_abstraction_base *mra) 129 { 130 return 1 + x_opr_n_bytes (mra, 0); 131 } 132 133 static int 134 opr_n_bytes2 (struct mem_read_abstraction_base *mra) 135 { 136 int s = x_opr_n_bytes (mra, 0); 137 s += x_opr_n_bytes (mra, s); 138 return s + 1; 139 } 140 141 enum BB_MODE 142 { 143 BB_REG_REG_REG, 144 BB_REG_REG_IMM, 145 BB_REG_OPR_REG, 146 BB_OPR_REG_REG, 147 BB_REG_OPR_IMM, 148 BB_OPR_REG_IMM 149 }; 150 151 struct opr_bb 152 { 153 uint8_t mask; 154 uint8_t value; 155 int n_operands; 156 bool opr; 157 enum BB_MODE mode; 158 }; 159 160 static const struct opr_bb bb_modes[] = 161 { 162 {0x60, 0x00, 2, false, BB_REG_REG_REG}, 163 {0x60, 0x20, 3, false, BB_REG_REG_IMM}, 164 {0x70, 0x40, 2, true, BB_REG_OPR_REG}, 165 {0x70, 0x50, 2, true, BB_OPR_REG_REG}, 166 {0x70, 0x60, 3, true, BB_REG_OPR_IMM}, 167 {0x70, 0x70, 3, true, BB_OPR_REG_IMM} 168 }; 169 170 static int 171 bfextins_n_bytes (struct mem_read_abstraction_base *mra) 172 { 173 bfd_byte bb; 174 int status = mra->read (mra, 0, 1, &bb); 175 if (status < 0) 176 return status; 177 178 size_t i; 179 const struct opr_bb *bbs = 0; 180 for (i = 0; i < sizeof (bb_modes) / sizeof (bb_modes[0]); ++i) 181 { 182 bbs = bb_modes + i; 183 if ((bb & bbs->mask) == bbs->value) 184 { 185 break; 186 } 187 } 188 189 int n = bbs->n_operands; 190 if (bbs->opr) 191 n += x_opr_n_bytes (mra, n - 1); 192 193 return n; 194 } 195 196 static int 197 single (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED) 198 { 199 return 1; 200 } 201 202 static int 203 two (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED) 204 { 205 return 2; 206 } 207 208 static int 209 three (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED) 210 { 211 return 3; 212 } 213 214 static int 215 four (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED) 216 { 217 return 4; 218 } 219 220 static int 221 five (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED) 222 { 223 return 5; 224 } 225 226 static int 227 pcrel_15bit (struct mem_read_abstraction_base *mra) 228 { 229 bfd_byte byte; 230 int status = mra->read (mra, 0, 1, &byte); 231 if (status < 0) 232 return status; 233 return (byte & 0x80) ? 3 : 2; 234 } 235 236 237 238 static int 240 xysp_reg_from_postbyte (uint8_t postbyte) 241 { 242 int reg = -1; 243 switch ((postbyte & 0x30) >> 4) 244 { 245 case 0: 246 reg = REG_X; 247 break; 248 case 1: 249 reg = REG_Y; 250 break; 251 case 2: 252 reg = REG_S; 253 break; 254 default: 255 reg = REG_P; 256 } 257 return reg; 258 } 259 260 static struct operand * create_immediate_operand (int value) 261 { 262 struct immediate_operand *op = malloc (sizeof (*op)); 263 264 ((struct operand *)op)->cl = OPND_CL_IMMEDIATE; 265 op->value = value; 266 ((struct operand *)op)->osize = -1; 267 268 return (struct operand *) op; 269 } 270 271 static struct operand * create_bitfield_operand (int width, int offset) 272 { 273 struct bitfield_operand *op = malloc (sizeof (*op)); 274 275 ((struct operand *)op)->cl = OPND_CL_BIT_FIELD; 276 op->width = width; 277 op->offset = offset; 278 ((struct operand *)op)->osize = -1; 279 280 return (struct operand *) op; 281 } 282 283 static struct operand * 284 create_register_operand_with_size (int reg, short osize) 285 { 286 struct register_operand *op = malloc (sizeof (*op)); 287 288 ((struct operand *)op)->cl = OPND_CL_REGISTER; 289 op->reg = reg; 290 ((struct operand *)op)->osize = osize; 291 292 return (struct operand *) op; 293 } 294 295 static struct operand * 296 create_register_operand (int reg) 297 { 298 return create_register_operand_with_size (reg, -1); 299 } 300 301 static struct operand * create_register_all_operand (void) 302 { 303 struct register_operand *op = malloc (sizeof (*op)); 304 305 ((struct operand *)op)->cl = OPND_CL_REGISTER_ALL; 306 ((struct operand *)op)->osize = -1; 307 308 return (struct operand *) op; 309 } 310 311 static struct operand * create_register_all16_operand (void) 312 { 313 struct register_operand *op = malloc (sizeof (*op)); 314 315 ((struct operand *)op)->cl = OPND_CL_REGISTER_ALL16; 316 ((struct operand *)op)->osize = -1; 317 318 return (struct operand *) op; 319 } 320 321 322 static struct operand * 323 create_simple_memory_operand (bfd_vma addr, bfd_vma base, bool relative) 324 { 325 struct simple_memory_operand *op = malloc (sizeof (*op)); 326 327 ((struct operand *)op)->cl = OPND_CL_SIMPLE_MEMORY; 328 op->addr = addr; 329 op->base = base; 330 op->relative = relative; 331 ((struct operand *)op)->osize = -1; 332 333 assert (relative || base == 0); 334 335 return (struct operand *) op; 336 } 337 338 static struct operand * 339 create_memory_operand (bool indirect, int base, int n_regs, int reg0, int reg1) 340 { 341 struct memory_operand *op = malloc (sizeof (*op)); 342 343 ((struct operand *)op)->cl = OPND_CL_MEMORY; 344 op->indirect = indirect; 345 op->base_offset = base; 346 op->mutation = OPND_RM_NONE; 347 op->n_regs = n_regs; 348 op->regs[0] = reg0; 349 op->regs[1] = reg1; 350 ((struct operand *)op)->osize = -1; 351 352 return (struct operand *) op; 353 } 354 355 static struct operand * 356 create_memory_auto_operand (enum op_reg_mutation mutation, int reg) 357 { 358 struct memory_operand *op = malloc (sizeof (*op)); 359 360 ((struct operand *)op)->cl = OPND_CL_MEMORY; 361 op->indirect = false; 362 op->base_offset = 0; 363 op->mutation = mutation; 364 op->n_regs = 1; 365 op->regs[0] = reg; 366 op->regs[1] = -1; 367 ((struct operand *)op)->osize = -1; 368 369 return (struct operand *) op; 370 } 371 372 373 375 static void 376 z_ext24_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand) 377 { 378 uint8_t buffer[3]; 379 int status = mra->read (mra, 0, 3, buffer); 380 if (status < 0) 381 return; 382 383 int i; 384 uint32_t addr = 0; 385 for (i = 0; i < 3; ++i) 386 { 387 addr <<= 8; 388 addr |= buffer[i]; 389 } 390 391 operand[(*n_operands)++] = create_simple_memory_operand (addr, 0, false); 392 } 393 394 395 static uint32_t 396 z_decode_signed_value (struct mem_read_abstraction_base *mra, int offset, short size) 397 { 398 assert (size >0); 399 assert (size <= 4); 400 bfd_byte buffer[4]; 401 if (0 > mra->read (mra, offset, size, buffer)) 402 { 403 return 0; 404 } 405 406 int i; 407 uint32_t value = 0; 408 for (i = 0; i < size; ++i) 409 { 410 value |= buffer[i] << (8 * (size - i - 1)); 411 } 412 413 if (buffer[0] & 0x80) 414 { 415 /* Deal with negative values */ 416 value -= 0x1UL << (size * 8); 417 } 418 return value; 419 } 420 421 static uint32_t 422 decode_signed_value (struct mem_read_abstraction_base *mra, short size) 423 { 424 return z_decode_signed_value (mra, 0, size); 425 } 426 427 static void 428 x_imm1 (struct mem_read_abstraction_base *mra, 429 int offset, 430 int *n_operands, struct operand **operand) 431 { 432 bfd_byte byte; 433 int status = mra->read (mra, offset, 1, &byte); 434 if (status < 0) 435 return; 436 437 operand[(*n_operands)++] = create_immediate_operand (byte); 438 } 439 440 /* An eight bit immediate operand. */ 441 static void 442 imm1_decode (struct mem_read_abstraction_base *mra, 443 int *n_operands, struct operand **operand) 444 { 445 x_imm1 (mra, 0, n_operands, operand); 446 } 447 448 static void 449 trap_decode (struct mem_read_abstraction_base *mra, 450 int *n_operands, struct operand **operand) 451 { 452 x_imm1 (mra, -1, n_operands, operand); 453 } 454 455 456 static struct operand * 457 x_opr_decode_with_size (struct mem_read_abstraction_base *mra, int offset, 458 short osize) 459 { 460 bfd_byte postbyte; 461 int status = mra->read (mra, offset, 1, &postbyte); 462 if (status < 0) 463 return NULL; 464 offset++; 465 466 enum OPR_MODE mode = -1; 467 size_t i; 468 for (i = 0; i < sizeof (opr_pb) / sizeof (opr_pb[0]); ++i) 469 { 470 const struct opr_pb *pb = opr_pb + i; 471 if ((postbyte & pb->mask) == pb->value) 472 { 473 mode = pb->mode; 474 break; 475 } 476 } 477 478 struct operand *operand = NULL; 479 switch (mode) 480 { 481 case OPR_IMMe4: 482 { 483 int n; 484 uint8_t x = (postbyte & 0x0F); 485 if (x == 0) 486 n = -1; 487 else 488 n = x; 489 490 operand = create_immediate_operand (n); 491 break; 492 } 493 case OPR_REG: 494 { 495 uint8_t x = (postbyte & 0x07); 496 operand = create_register_operand (x); 497 break; 498 } 499 case OPR_OFXYS: 500 { 501 operand = create_memory_operand (false, postbyte & 0x0F, 1, 502 xysp_reg_from_postbyte (postbyte), -1); 503 break; 504 } 505 case OPR_REG_DIRECT: 506 { 507 operand = create_memory_operand (false, 0, 2, postbyte & 0x07, 508 xysp_reg_from_postbyte (postbyte)); 509 break; 510 } 511 case OPR_REG_INDIRECT: 512 { 513 operand = create_memory_operand (true, 0, 2, postbyte & 0x07, 514 (postbyte & 0x10) ? REG_Y : REG_X); 515 break; 516 } 517 518 case OPR_IDX_INDIRECT: 519 { 520 uint8_t x1; 521 mra->read (mra, offset, 1, &x1); 522 int idx = x1; 523 524 if (postbyte & 0x01) 525 { 526 /* Deal with negative values */ 527 idx -= 0x1UL << 8; 528 } 529 530 operand = create_memory_operand (true, idx, 1, 531 xysp_reg_from_postbyte (postbyte), -1); 532 break; 533 } 534 535 case OPR_IDX3_DIRECT: 536 { 537 uint8_t x[3]; 538 mra->read (mra, offset, 3, x); 539 int idx = x[0] << 16 | x[1] << 8 | x[2]; 540 541 if (x[0] & 0x80) 542 { 543 /* Deal with negative values */ 544 idx -= 0x1UL << 24; 545 } 546 547 operand = create_memory_operand (false, idx, 1, 548 xysp_reg_from_postbyte (postbyte), -1); 549 break; 550 } 551 552 case OPR_IDX3_DIRECT_REG: 553 { 554 uint8_t x[3]; 555 mra->read (mra, offset, 3, x); 556 int idx = x[0] << 16 | x[1] << 8 | x[2]; 557 558 if (x[0] & 0x80) 559 { 560 /* Deal with negative values */ 561 idx -= 0x1UL << 24; 562 } 563 564 operand = create_memory_operand (false, idx, 1, postbyte & 0x07, -1); 565 break; 566 } 567 568 case OPR_IDX3_INDIRECT: 569 { 570 uint8_t x[3]; 571 mra->read (mra, offset, 3, x); 572 int idx = x[0] << 16 | x[1] << 8 | x[2]; 573 574 if (x[0] & 0x80) 575 { 576 /* Deal with negative values */ 577 idx -= 0x1UL << 24; 578 } 579 580 operand = create_memory_operand (true, idx, 1, 581 xysp_reg_from_postbyte (postbyte), -1); 582 break; 583 } 584 585 case OPR_IDX_DIRECT: 586 { 587 uint8_t x1; 588 mra->read (mra, offset, 1, &x1); 589 int idx = x1; 590 591 if (postbyte & 0x01) 592 { 593 /* Deal with negative values */ 594 idx -= 0x1UL << 8; 595 } 596 597 operand = create_memory_operand (false, idx, 1, 598 xysp_reg_from_postbyte (postbyte), -1); 599 break; 600 } 601 602 case OPR_IDX2_REG: 603 { 604 uint8_t x[2]; 605 mra->read (mra, offset, 2, x); 606 uint32_t idx = x[1] | x[0] << 8 ; 607 idx |= (postbyte & 0x30) << 12; 608 609 operand = create_memory_operand (false, idx, 1, postbyte & 0x07, -1); 610 break; 611 } 612 613 case OPR_XY_PRE_INC: 614 { 615 operand = create_memory_auto_operand (OPND_RM_PRE_INC, 616 (postbyte & 0x10) ? REG_Y: REG_X); 617 break; 618 } 619 case OPR_XY_POST_INC: 620 { 621 operand = create_memory_auto_operand (OPND_RM_POST_INC, 622 (postbyte & 0x10) ? REG_Y: REG_X); 623 break; 624 } 625 case OPR_XY_PRE_DEC: 626 { 627 operand = create_memory_auto_operand (OPND_RM_PRE_DEC, 628 (postbyte & 0x10) ? REG_Y: REG_X); 629 break; 630 } 631 case OPR_XY_POST_DEC: 632 { 633 operand = create_memory_auto_operand (OPND_RM_POST_DEC, 634 (postbyte & 0x10) ? REG_Y: REG_X); 635 break; 636 } 637 case OPR_S_PRE_DEC: 638 { 639 operand = create_memory_auto_operand (OPND_RM_PRE_DEC, REG_S); 640 break; 641 } 642 case OPR_S_POST_INC: 643 { 644 operand = create_memory_auto_operand (OPND_RM_POST_INC, REG_S); 645 break; 646 } 647 648 case OPR_EXT18: 649 { 650 const size_t size = 2; 651 bfd_byte buffer[4]; 652 status = mra->read (mra, offset, size, buffer); 653 if (status < 0) 654 operand = NULL; 655 656 uint32_t ext18 = 0; 657 for (i = 0; i < size; ++i) 658 { 659 ext18 <<= 8; 660 ext18 |= buffer[i]; 661 } 662 663 ext18 |= (postbyte & 0x01) << 16; 664 ext18 |= (postbyte & 0x04) << 15; 665 666 operand = create_simple_memory_operand (ext18, 0, false); 667 break; 668 } 669 670 case OPR_EXT1: 671 { 672 uint8_t x1 = 0; 673 mra->read (mra, offset, 1, &x1); 674 int16_t addr; 675 addr = x1; 676 addr |= (postbyte & 0x3f) << 8; 677 678 operand = create_simple_memory_operand (addr, 0, false); 679 break; 680 } 681 682 case OPR_EXT3_DIRECT: 683 { 684 const size_t size = 3; 685 bfd_byte buffer[4]; 686 status = mra->read (mra, offset, size, buffer); 687 if (status < 0) 688 operand = NULL; 689 690 uint32_t ext24 = 0; 691 for (i = 0; i < size; ++i) 692 { 693 ext24 |= buffer[i] << (8 * (size - i - 1)); 694 } 695 696 operand = create_simple_memory_operand (ext24, 0, false); 697 break; 698 } 699 700 case OPR_EXT3_INDIRECT: 701 { 702 const size_t size = 3; 703 bfd_byte buffer[4]; 704 status = mra->read (mra, offset, size, buffer); 705 if (status < 0) 706 operand = NULL; 707 708 uint32_t ext24 = 0; 709 for (i = 0; i < size; ++i) 710 { 711 ext24 |= buffer[i] << (8 * (size - i - 1)); 712 } 713 714 operand = create_memory_operand (true, ext24, 0, -1, -1); 715 break; 716 } 717 718 default: 719 printf ("Unknown OPR mode #0x%x (%d)", postbyte, mode); 720 abort (); 721 } 722 723 operand->osize = osize; 724 725 return operand; 726 } 727 728 static struct operand * 729 x_opr_decode (struct mem_read_abstraction_base *mra, int offset) 730 { 731 return x_opr_decode_with_size (mra, offset, -1); 732 } 733 734 static void 735 z_opr_decode (struct mem_read_abstraction_base *mra, 736 int *n_operands, struct operand **operand) 737 { 738 operand[(*n_operands)++] = x_opr_decode (mra, 0); 739 } 740 741 static void 742 z_opr_decode2 (struct mem_read_abstraction_base *mra, 743 int *n_operands, struct operand **operand) 744 { 745 int n = x_opr_n_bytes (mra, 0); 746 747 operand[(*n_operands)++] = x_opr_decode (mra, 0); 748 operand[(*n_operands)++] = x_opr_decode (mra, n); 749 } 750 751 static void 752 imm1234 (struct mem_read_abstraction_base *mra, int base, 753 int *n_operands, struct operand **operand) 754 { 755 bfd_byte opcode; 756 int status = mra->read (mra, -1, 1, &opcode); 757 if (status < 0) 758 return; 759 760 opcode -= base; 761 762 int size = registers[opcode & 0xF].bytes; 763 764 uint32_t imm = decode_signed_value (mra, size); 765 766 operand[(*n_operands)++] = create_immediate_operand (imm); 767 } 768 769 770 /* Special case of LD and CMP with register S and IMM operand */ 771 static void 772 reg_s_imm (struct mem_read_abstraction_base *mra, int *n_operands, 773 struct operand **operand) 774 { 775 operand[(*n_operands)++] = create_register_operand (REG_S); 776 777 uint32_t imm = decode_signed_value (mra, 3); 778 operand[(*n_operands)++] = create_immediate_operand (imm); 779 } 780 781 /* Special case of LD, CMP and ST with register S and OPR operand */ 782 static void 783 reg_s_opr (struct mem_read_abstraction_base *mra, int *n_operands, 784 struct operand **operand) 785 { 786 operand[(*n_operands)++] = create_register_operand (REG_S); 787 operand[(*n_operands)++] = x_opr_decode (mra, 0); 788 } 789 790 static void 791 z_imm1234_8base (struct mem_read_abstraction_base *mra, int *n_operands, 792 struct operand **operand) 793 { 794 imm1234 (mra, 8, n_operands, operand); 795 } 796 797 static void 798 z_imm1234_0base (struct mem_read_abstraction_base *mra, int *n_operands, 799 struct operand **operand) 800 { 801 imm1234 (mra, 0, n_operands, operand); 802 } 803 804 805 static void 806 z_tfr (struct mem_read_abstraction_base *mra, int *n_operands, 807 struct operand **operand) 808 { 809 bfd_byte byte; 810 int status = mra->read (mra, 0, 1, &byte); 811 if (status < 0) 812 return; 813 814 operand[(*n_operands)++] = create_register_operand (byte >> 4); 815 operand[(*n_operands)++] = create_register_operand (byte & 0x0F); 816 } 817 818 static void 819 z_reg (struct mem_read_abstraction_base *mra, int *n_operands, 820 struct operand **operand) 821 { 822 bfd_byte byte; 823 int status = mra->read (mra, -1, 1, &byte); 824 if (status < 0) 825 return; 826 827 operand[(*n_operands)++] = create_register_operand (byte & 0x07); 828 } 829 830 831 static void 832 reg_xy (struct mem_read_abstraction_base *mra, 833 int *n_operands, struct operand **operand) 834 { 835 bfd_byte byte; 836 int status = mra->read (mra, -1, 1, &byte); 837 if (status < 0) 838 return; 839 840 operand[(*n_operands)++] = 841 create_register_operand ((byte & 0x01) ? REG_Y : REG_X); 842 } 843 844 static void 845 lea_reg_xys_opr (struct mem_read_abstraction_base *mra, 846 int *n_operands, struct operand **operand) 847 { 848 bfd_byte byte; 849 int status = mra->read (mra, -1, 1, &byte); 850 if (status < 0) 851 return; 852 853 int reg_xys = -1; 854 switch (byte & 0x03) 855 { 856 case 0x00: 857 reg_xys = REG_X; 858 break; 859 case 0x01: 860 reg_xys = REG_Y; 861 break; 862 case 0x02: 863 reg_xys = REG_S; 864 break; 865 } 866 867 operand[(*n_operands)++] = create_register_operand (reg_xys); 868 operand[(*n_operands)++] = x_opr_decode (mra, 0); 869 } 870 871 static void 872 lea_reg_xys (struct mem_read_abstraction_base *mra, 873 int *n_operands, struct operand **operand) 874 { 875 bfd_byte byte; 876 int status = mra->read (mra, -1, 1, &byte); 877 if (status < 0) 878 return; 879 880 int reg_n = -1; 881 switch (byte & 0x03) 882 { 883 case 0x00: 884 reg_n = REG_X; 885 break; 886 case 0x01: 887 reg_n = REG_Y; 888 break; 889 case 0x02: 890 reg_n = REG_S; 891 break; 892 } 893 894 status = mra->read (mra, 0, 1, &byte); 895 if (status < 0) 896 return; 897 898 operand[(*n_operands)++] = create_register_operand (reg_n); 899 operand[(*n_operands)++] = create_memory_operand (false, (int8_t) byte, 900 1, reg_n, -1); 901 } 902 903 904 /* PC Relative offsets of size 15 or 7 bits */ 905 static void 906 rel_15_7 (struct mem_read_abstraction_base *mra, int offset, 907 int *n_operands, struct operand **operands) 908 { 909 bfd_byte upper; 910 int status = mra->read (mra, offset - 1, 1, &upper); 911 if (status < 0) 912 return; 913 914 bool rel_size = (upper & 0x80); 915 916 int16_t addr = upper; 917 if (rel_size) 918 { 919 /* 15 bits. Get the next byte */ 920 bfd_byte lower; 921 status = mra->read (mra, offset, 1, &lower); 922 if (status < 0) 923 return; 924 925 addr <<= 8; 926 addr |= lower; 927 addr &= 0x7FFF; 928 929 bool negative = (addr & 0x4000); 930 addr &= 0x3FFF; 931 if (negative) 932 addr = addr - 0x4000; 933 } 934 else 935 { 936 /* 7 bits. */ 937 bool negative = (addr & 0x40); 938 addr &= 0x3F; 939 if (negative) 940 addr = addr - 0x40; 941 } 942 943 operands[(*n_operands)++] = 944 create_simple_memory_operand (addr, mra->posn (mra) - 1, true); 945 } 946 947 948 /* PC Relative offsets of size 15 or 7 bits */ 949 static void 950 decode_rel_15_7 (struct mem_read_abstraction_base *mra, 951 int *n_operands, struct operand **operand) 952 { 953 rel_15_7 (mra, 1, n_operands, operand); 954 } 955 956 static int shift_n_bytes (struct mem_read_abstraction_base *); 957 static int mov_imm_opr_n_bytes (struct mem_read_abstraction_base *); 958 static int loop_prim_n_bytes (struct mem_read_abstraction_base *); 959 static int bm_rel_n_bytes (struct mem_read_abstraction_base *); 960 static int mul_n_bytes (struct mem_read_abstraction_base *); 961 static int bm_n_bytes (struct mem_read_abstraction_base *); 962 963 static void psh_pul_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand); 964 static void shift_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand); 965 static void mul_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand); 966 static void bm_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand); 967 static void bm_rel_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand); 968 static void mov_imm_opr (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand); 969 static void loop_primitive_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operands); 970 static void bit_field_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operands); 971 static void exg_sex_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operands); 972 973 974 static enum operator shift_discrim (struct mem_read_abstraction_base *mra, enum operator hint); 975 static enum operator psh_pul_discrim (struct mem_read_abstraction_base *mra, enum operator hint); 976 static enum operator mul_discrim (struct mem_read_abstraction_base *mra, enum operator hint); 977 static enum operator loop_primitive_discrim (struct mem_read_abstraction_base *mra, enum operator hint); 978 static enum operator bit_field_discrim (struct mem_read_abstraction_base *mra, enum operator hint); 979 static enum operator exg_sex_discrim (struct mem_read_abstraction_base *mra, enum operator hint); 980 981 982 static void 983 cmp_xy (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED, 984 int *n_operands, struct operand **operand) 985 { 986 operand[(*n_operands)++] = create_register_operand (REG_X); 987 operand[(*n_operands)++] = create_register_operand (REG_Y); 988 } 989 990 static void 991 sub_d6_x_y (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED, 992 int *n_operands, struct operand **operand) 993 { 994 operand[(*n_operands)++] = create_register_operand (REG_D6); 995 operand[(*n_operands)++] = create_register_operand (REG_X); 996 operand[(*n_operands)++] = create_register_operand (REG_Y); 997 } 998 999 static void 1000 sub_d6_y_x (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED, 1001 int *n_operands, struct operand **operand) 1002 { 1003 operand[(*n_operands)++] = create_register_operand (REG_D6); 1004 operand[(*n_operands)++] = create_register_operand (REG_Y); 1005 operand[(*n_operands)++] = create_register_operand (REG_X); 1006 } 1007 1008 static void ld_18bit_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand); 1009 1010 static enum operator 1011 mul_discrim (struct mem_read_abstraction_base *mra, enum operator hint) 1012 { 1013 uint8_t mb; 1014 int status = mra->read (mra, 0, 1, &mb); 1015 if (status < 0) 1016 return OP_INVALID; 1017 1018 bool signed_op = (mb & 0x80); 1019 1020 switch (hint) 1021 { 1022 case OPBASE_mul: 1023 return signed_op ? OP_muls : OP_mulu; 1024 break; 1025 case OPBASE_div: 1026 return signed_op ? OP_divs : OP_divu; 1027 break; 1028 case OPBASE_mod: 1029 return signed_op ? OP_mods : OP_modu; 1030 break; 1031 case OPBASE_mac: 1032 return signed_op ? OP_macs : OP_macu; 1033 break; 1034 case OPBASE_qmul: 1035 return signed_op ? OP_qmuls : OP_qmulu; 1036 break; 1037 default: 1038 abort (); 1039 } 1040 1041 return OP_INVALID; 1042 } 1043 1044 struct opcode 1045 { 1046 /* The operation that this opcode performs. */ 1047 enum operator operator; 1048 1049 /* The size of this operation. May be -1 if it is implied 1050 in the operands or if size is not applicable. */ 1051 short osize; 1052 1053 /* Some operations need this function to work out which operation 1054 is intended. */ 1055 discriminator_f discriminator; 1056 1057 /* A function returning the number of bytes in this instruction. */ 1058 insn_bytes_f insn_bytes; 1059 1060 operands_f operands; 1061 operands_f operands2; 1062 }; 1063 1064 static const struct opcode page2[] = 1065 { 1066 [0x00] = {OP_ld, -1, 0, opr_n_bytes_p1, reg_s_opr, 0}, 1067 [0x01] = {OP_st, -1, 0, opr_n_bytes_p1, reg_s_opr, 0}, 1068 [0x02] = {OP_cmp, -1, 0, opr_n_bytes_p1, reg_s_opr, 0}, 1069 [0x03] = {OP_ld, -1, 0, four, reg_s_imm, 0}, 1070 [0x04] = {OP_cmp, -1, 0, four, reg_s_imm, 0}, 1071 [0x05] = {OP_stop, -1, 0, single, 0, 0}, 1072 [0x06] = {OP_wai, -1, 0, single, 0, 0}, 1073 [0x07] = {OP_sys, -1, 0, single, 0, 0}, 1074 [0x08] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0}, /* BFEXT / BFINS */ 1075 [0x09] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0}, 1076 [0x0a] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0}, 1077 [0x0b] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0}, 1078 [0x0c] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0}, 1079 [0x0d] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0}, 1080 [0x0e] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0}, 1081 [0x0f] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0}, 1082 [0x10] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1083 [0x11] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1084 [0x12] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1085 [0x13] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1086 [0x14] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1087 [0x15] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1088 [0x16] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1089 [0x17] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1090 [0x18] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1091 [0x19] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1092 [0x1a] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1093 [0x1b] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1094 [0x1c] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1095 [0x1d] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1096 [0x1e] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1097 [0x1f] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1098 [0x20] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1099 [0x21] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1100 [0x22] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1101 [0x23] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1102 [0x24] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1103 [0x25] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1104 [0x26] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1105 [0x27] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1106 [0x28] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1107 [0x29] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1108 [0x2a] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1109 [0x2b] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1110 [0x2c] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1111 [0x2d] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1112 [0x2e] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1113 [0x2f] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1114 [0x30] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1115 [0x31] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1116 [0x32] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1117 [0x33] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1118 [0x34] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1119 [0x35] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1120 [0x36] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1121 [0x37] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1122 [0x38] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1123 [0x39] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1124 [0x3a] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1125 [0x3b] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1126 [0x3c] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1127 [0x3d] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1128 [0x3e] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1129 [0x3f] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1130 [0x40] = {OP_abs, -1, 0, single, z_reg, 0}, 1131 [0x41] = {OP_abs, -1, 0, single, z_reg, 0}, 1132 [0x42] = {OP_abs, -1, 0, single, z_reg, 0}, 1133 [0x43] = {OP_abs, -1, 0, single, z_reg, 0}, 1134 [0x44] = {OP_abs, -1, 0, single, z_reg, 0}, 1135 [0x45] = {OP_abs, -1, 0, single, z_reg, 0}, 1136 [0x46] = {OP_abs, -1, 0, single, z_reg, 0}, 1137 [0x47] = {OP_abs, -1, 0, single, z_reg, 0}, 1138 [0x48] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1139 [0x49] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1140 [0x4a] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1141 [0x4b] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1142 [0x4c] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1143 [0x4d] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1144 [0x4e] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1145 [0x4f] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1146 [0x50] = {OP_adc, -1, 0, three, z_reg, z_imm1234_0base}, 1147 [0x51] = {OP_adc, -1, 0, three, z_reg, z_imm1234_0base}, 1148 [0x52] = {OP_adc, -1, 0, three, z_reg, z_imm1234_0base}, 1149 [0x53] = {OP_adc, -1, 0, three, z_reg, z_imm1234_0base}, 1150 [0x54] = {OP_adc, -1, 0, two, z_reg, z_imm1234_0base}, 1151 [0x55] = {OP_adc, -1, 0, two, z_reg, z_imm1234_0base}, 1152 [0x56] = {OP_adc, -1, 0, five, z_reg, z_imm1234_0base}, 1153 [0x57] = {OP_adc, -1, 0, five, z_reg, z_imm1234_0base}, 1154 [0x58] = {OP_bit, -1, 0, three, z_reg, z_imm1234_8base}, 1155 [0x59] = {OP_bit, -1, 0, three, z_reg, z_imm1234_8base}, 1156 [0x5a] = {OP_bit, -1, 0, three, z_reg, z_imm1234_8base}, 1157 [0x5b] = {OP_bit, -1, 0, three, z_reg, z_imm1234_8base}, 1158 [0x5c] = {OP_bit, -1, 0, two, z_reg, z_imm1234_8base}, 1159 [0x5d] = {OP_bit, -1, 0, two, z_reg, z_imm1234_8base}, 1160 [0x5e] = {OP_bit, -1, 0, five, z_reg, z_imm1234_8base}, 1161 [0x5f] = {OP_bit, -1, 0, five, z_reg, z_imm1234_8base}, 1162 [0x60] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1163 [0x61] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1164 [0x62] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1165 [0x63] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1166 [0x64] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1167 [0x65] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1168 [0x66] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1169 [0x67] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1170 [0x68] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1171 [0x69] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1172 [0x6a] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1173 [0x6b] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1174 [0x6c] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1175 [0x6d] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1176 [0x6e] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1177 [0x6f] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1178 [0x70] = {OP_sbc, -1, 0, three, z_reg, z_imm1234_0base}, 1179 [0x71] = {OP_sbc, -1, 0, three, z_reg, z_imm1234_0base}, 1180 [0x72] = {OP_sbc, -1, 0, three, z_reg, z_imm1234_0base}, 1181 [0x73] = {OP_sbc, -1, 0, three, z_reg, z_imm1234_0base}, 1182 [0x74] = {OP_sbc, -1, 0, two, z_reg, z_imm1234_0base}, 1183 [0x75] = {OP_sbc, -1, 0, two, z_reg, z_imm1234_0base}, 1184 [0x76] = {OP_sbc, -1, 0, five, z_reg, z_imm1234_0base}, 1185 [0x77] = {OP_sbc, -1, 0, five, z_reg, z_imm1234_0base}, 1186 [0x78] = {OP_eor, -1, 0, three, z_reg, z_imm1234_8base}, 1187 [0x79] = {OP_eor, -1, 0, three, z_reg, z_imm1234_8base}, 1188 [0x7a] = {OP_eor, -1, 0, three, z_reg, z_imm1234_8base}, 1189 [0x7b] = {OP_eor, -1, 0, three, z_reg, z_imm1234_8base}, 1190 [0x7c] = {OP_eor, -1, 0, two, z_reg, z_imm1234_8base}, 1191 [0x7d] = {OP_eor, -1, 0, two, z_reg, z_imm1234_8base}, 1192 [0x7e] = {OP_eor, -1, 0, five, z_reg, z_imm1234_8base}, 1193 [0x7f] = {OP_eor, -1, 0, five, z_reg, z_imm1234_8base}, 1194 [0x80] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1195 [0x81] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1196 [0x82] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1197 [0x83] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1198 [0x84] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1199 [0x85] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1200 [0x86] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1201 [0x87] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1202 [0x88] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1203 [0x89] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1204 [0x8a] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1205 [0x8b] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1206 [0x8c] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1207 [0x8d] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1208 [0x8e] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1209 [0x8f] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1210 [0x90] = {OP_rti, -1, 0, single, 0, 0}, 1211 [0x91] = {OP_clb, -1, 0, two, z_tfr, 0}, 1212 [0x92] = {OP_trap, -1, 0, single, trap_decode, 0}, 1213 [0x93] = {OP_trap, -1, 0, single, trap_decode, 0}, 1214 [0x94] = {OP_trap, -1, 0, single, trap_decode, 0}, 1215 [0x95] = {OP_trap, -1, 0, single, trap_decode, 0}, 1216 [0x96] = {OP_trap, -1, 0, single, trap_decode, 0}, 1217 [0x97] = {OP_trap, -1, 0, single, trap_decode, 0}, 1218 [0x98] = {OP_trap, -1, 0, single, trap_decode, 0}, 1219 [0x99] = {OP_trap, -1, 0, single, trap_decode, 0}, 1220 [0x9a] = {OP_trap, -1, 0, single, trap_decode, 0}, 1221 [0x9b] = {OP_trap, -1, 0, single, trap_decode, 0}, 1222 [0x9c] = {OP_trap, -1, 0, single, trap_decode, 0}, 1223 [0x9d] = {OP_trap, -1, 0, single, trap_decode, 0}, 1224 [0x9e] = {OP_trap, -1, 0, single, trap_decode, 0}, 1225 [0x9f] = {OP_trap, -1, 0, single, trap_decode, 0}, 1226 [0xa0] = {OP_sat, -1, 0, single, z_reg, 0}, 1227 [0xa1] = {OP_sat, -1, 0, single, z_reg, 0}, 1228 [0xa2] = {OP_sat, -1, 0, single, z_reg, 0}, 1229 [0xa3] = {OP_sat, -1, 0, single, z_reg, 0}, 1230 [0xa4] = {OP_sat, -1, 0, single, z_reg, 0}, 1231 [0xa5] = {OP_sat, -1, 0, single, z_reg, 0}, 1232 [0xa6] = {OP_sat, -1, 0, single, z_reg, 0}, 1233 [0xa7] = {OP_sat, -1, 0, single, z_reg, 0}, 1234 [0xa8] = {OP_trap, -1, 0, single, trap_decode, 0}, 1235 [0xa9] = {OP_trap, -1, 0, single, trap_decode, 0}, 1236 [0xaa] = {OP_trap, -1, 0, single, trap_decode, 0}, 1237 [0xab] = {OP_trap, -1, 0, single, trap_decode, 0}, 1238 [0xac] = {OP_trap, -1, 0, single, trap_decode, 0}, 1239 [0xad] = {OP_trap, -1, 0, single, trap_decode, 0}, 1240 [0xae] = {OP_trap, -1, 0, single, trap_decode, 0}, 1241 [0xaf] = {OP_trap, -1, 0, single, trap_decode, 0}, 1242 [0xb0] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1243 [0xb1] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1244 [0xb2] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1245 [0xb3] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1246 [0xb4] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1247 [0xb5] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1248 [0xb6] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1249 [0xb7] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1250 [0xb8] = {OP_trap, -1, 0, single, trap_decode, 0}, 1251 [0xb9] = {OP_trap, -1, 0, single, trap_decode, 0}, 1252 [0xba] = {OP_trap, -1, 0, single, trap_decode, 0}, 1253 [0xbb] = {OP_trap, -1, 0, single, trap_decode, 0}, 1254 [0xbc] = {OP_trap, -1, 0, single, trap_decode, 0}, 1255 [0xbd] = {OP_trap, -1, 0, single, trap_decode, 0}, 1256 [0xbe] = {OP_trap, -1, 0, single, trap_decode, 0}, 1257 [0xbf] = {OP_trap, -1, 0, single, trap_decode, 0}, 1258 [0xc0] = {OP_trap, -1, 0, single, trap_decode, 0}, 1259 [0xc1] = {OP_trap, -1, 0, single, trap_decode, 0}, 1260 [0xc2] = {OP_trap, -1, 0, single, trap_decode, 0}, 1261 [0xc3] = {OP_trap, -1, 0, single, trap_decode, 0}, 1262 [0xc4] = {OP_trap, -1, 0, single, trap_decode, 0}, 1263 [0xc5] = {OP_trap, -1, 0, single, trap_decode, 0}, 1264 [0xc6] = {OP_trap, -1, 0, single, trap_decode, 0}, 1265 [0xc7] = {OP_trap, -1, 0, single, trap_decode, 0}, 1266 [0xc8] = {OP_trap, -1, 0, single, trap_decode, 0}, 1267 [0xc9] = {OP_trap, -1, 0, single, trap_decode, 0}, 1268 [0xca] = {OP_trap, -1, 0, single, trap_decode, 0}, 1269 [0xcb] = {OP_trap, -1, 0, single, trap_decode, 0}, 1270 [0xcc] = {OP_trap, -1, 0, single, trap_decode, 0}, 1271 [0xcd] = {OP_trap, -1, 0, single, trap_decode, 0}, 1272 [0xce] = {OP_trap, -1, 0, single, trap_decode, 0}, 1273 [0xcf] = {OP_trap, -1, 0, single, trap_decode, 0}, 1274 [0xd0] = {OP_trap, -1, 0, single, trap_decode, 0}, 1275 [0xd1] = {OP_trap, -1, 0, single, trap_decode, 0}, 1276 [0xd2] = {OP_trap, -1, 0, single, trap_decode, 0}, 1277 [0xd3] = {OP_trap, -1, 0, single, trap_decode, 0}, 1278 [0xd4] = {OP_trap, -1, 0, single, trap_decode, 0}, 1279 [0xd5] = {OP_trap, -1, 0, single, trap_decode, 0}, 1280 [0xd6] = {OP_trap, -1, 0, single, trap_decode, 0}, 1281 [0xd7] = {OP_trap, -1, 0, single, trap_decode, 0}, 1282 [0xd8] = {OP_trap, -1, 0, single, trap_decode, 0}, 1283 [0xd9] = {OP_trap, -1, 0, single, trap_decode, 0}, 1284 [0xda] = {OP_trap, -1, 0, single, trap_decode, 0}, 1285 [0xdb] = {OP_trap, -1, 0, single, trap_decode, 0}, 1286 [0xdc] = {OP_trap, -1, 0, single, trap_decode, 0}, 1287 [0xdd] = {OP_trap, -1, 0, single, trap_decode, 0}, 1288 [0xde] = {OP_trap, -1, 0, single, trap_decode, 0}, 1289 [0xdf] = {OP_trap, -1, 0, single, trap_decode, 0}, 1290 [0xe0] = {OP_trap, -1, 0, single, trap_decode, 0}, 1291 [0xe1] = {OP_trap, -1, 0, single, trap_decode, 0}, 1292 [0xe2] = {OP_trap, -1, 0, single, trap_decode, 0}, 1293 [0xe3] = {OP_trap, -1, 0, single, trap_decode, 0}, 1294 [0xe4] = {OP_trap, -1, 0, single, trap_decode, 0}, 1295 [0xe5] = {OP_trap, -1, 0, single, trap_decode, 0}, 1296 [0xe6] = {OP_trap, -1, 0, single, trap_decode, 0}, 1297 [0xe7] = {OP_trap, -1, 0, single, trap_decode, 0}, 1298 [0xe8] = {OP_trap, -1, 0, single, trap_decode, 0}, 1299 [0xe9] = {OP_trap, -1, 0, single, trap_decode, 0}, 1300 [0xea] = {OP_trap, -1, 0, single, trap_decode, 0}, 1301 [0xeb] = {OP_trap, -1, 0, single, trap_decode, 0}, 1302 [0xec] = {OP_trap, -1, 0, single, trap_decode, 0}, 1303 [0xed] = {OP_trap, -1, 0, single, trap_decode, 0}, 1304 [0xee] = {OP_trap, -1, 0, single, trap_decode, 0}, 1305 [0xef] = {OP_trap, -1, 0, single, trap_decode, 0}, 1306 [0xf0] = {OP_trap, -1, 0, single, trap_decode, 0}, 1307 [0xf1] = {OP_trap, -1, 0, single, trap_decode, 0}, 1308 [0xf2] = {OP_trap, -1, 0, single, trap_decode, 0}, 1309 [0xf3] = {OP_trap, -1, 0, single, trap_decode, 0}, 1310 [0xf4] = {OP_trap, -1, 0, single, trap_decode, 0}, 1311 [0xf5] = {OP_trap, -1, 0, single, trap_decode, 0}, 1312 [0xf6] = {OP_trap, -1, 0, single, trap_decode, 0}, 1313 [0xf7] = {OP_trap, -1, 0, single, trap_decode, 0}, 1314 [0xf8] = {OP_trap, -1, 0, single, trap_decode, 0}, 1315 [0xf9] = {OP_trap, -1, 0, single, trap_decode, 0}, 1316 [0xfa] = {OP_trap, -1, 0, single, trap_decode, 0}, 1317 [0xfb] = {OP_trap, -1, 0, single, trap_decode, 0}, 1318 [0xfc] = {OP_trap, -1, 0, single, trap_decode, 0}, 1319 [0xfd] = {OP_trap, -1, 0, single, trap_decode, 0}, 1320 [0xfe] = {OP_trap, -1, 0, single, trap_decode, 0}, 1321 [0xff] = {OP_trap, -1, 0, single, trap_decode, 0}, 1322 }; 1323 1324 static const struct opcode page1[] = 1325 { 1326 [0x00] = {OP_bgnd, -1, 0, single, 0, 0}, 1327 [0x01] = {OP_nop, -1, 0, single, 0, 0}, 1328 [0x02] = {OP_brclr, -1, 0, bm_rel_n_bytes, bm_rel_decode, 0}, 1329 [0x03] = {OP_brset, -1, 0, bm_rel_n_bytes, bm_rel_decode, 0}, 1330 [0x04] = {0xFFFF, -1, psh_pul_discrim, two, psh_pul_decode, 0}, /* psh/pul */ 1331 [0x05] = {OP_rts, -1, 0, single, 0, 0}, 1332 [0x06] = {OP_lea, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1333 [0x07] = {OP_lea, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1334 [0x08] = {OP_lea, -1, 0, opr_n_bytes_p1, lea_reg_xys_opr, 0}, 1335 [0x09] = {OP_lea, -1, 0, opr_n_bytes_p1, lea_reg_xys_opr, 0}, 1336 [0x0a] = {OP_lea, -1, 0, opr_n_bytes_p1, lea_reg_xys_opr, 0}, 1337 [0x0b] = {0xFFFF, -1, loop_primitive_discrim, loop_prim_n_bytes, loop_primitive_decode, 0}, /* Loop primitives TBcc / DBcc */ 1338 [0x0c] = {OP_mov, 0, 0, mov_imm_opr_n_bytes, mov_imm_opr, 0}, 1339 [0x0d] = {OP_mov, 1, 0, mov_imm_opr_n_bytes, mov_imm_opr, 0}, 1340 [0x0e] = {OP_mov, 2, 0, mov_imm_opr_n_bytes, mov_imm_opr, 0}, 1341 [0x0f] = {OP_mov, 3, 0, mov_imm_opr_n_bytes, mov_imm_opr, 0}, 1342 [0x10] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0}, /* lsr/lsl/asl/asr/rol/ror */ 1343 [0x11] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0}, 1344 [0x12] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0}, 1345 [0x13] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0}, 1346 [0x14] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0}, 1347 [0x15] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0}, 1348 [0x16] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0}, 1349 [0x17] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0}, 1350 [0x18] = {OP_lea, -1, 0, two, lea_reg_xys, NULL}, 1351 [0x19] = {OP_lea, -1, 0, two, lea_reg_xys, NULL}, 1352 [0x1a] = {OP_lea, -1, 0, two, lea_reg_xys, NULL}, 1353 /* 0x1b PG2 */ 1354 [0x1c] = {OP_mov, 0, 0, opr_n_bytes2, z_opr_decode2, 0}, 1355 [0x1d] = {OP_mov, 1, 0, opr_n_bytes2, z_opr_decode2, 0}, 1356 [0x1e] = {OP_mov, 2, 0, opr_n_bytes2, z_opr_decode2, 0}, 1357 [0x1f] = {OP_mov, 3, 0, opr_n_bytes2, z_opr_decode2, 0}, 1358 [0x20] = {OP_bra, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1359 [0x21] = {OP_bsr, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1360 [0x22] = {OP_bhi, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1361 [0x23] = {OP_bls, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1362 [0x24] = {OP_bcc, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1363 [0x25] = {OP_bcs, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1364 [0x26] = {OP_bne, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1365 [0x27] = {OP_beq, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1366 [0x28] = {OP_bvc, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1367 [0x29] = {OP_bvs, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1368 [0x2a] = {OP_bpl, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1369 [0x2b] = {OP_bmi, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1370 [0x2c] = {OP_bge, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1371 [0x2d] = {OP_blt, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1372 [0x2e] = {OP_bgt, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1373 [0x2f] = {OP_ble, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1374 [0x30] = {OP_inc, -1, 0, single, z_reg, 0}, 1375 [0x31] = {OP_inc, -1, 0, single, z_reg, 0}, 1376 [0x32] = {OP_inc, -1, 0, single, z_reg, 0}, 1377 [0x33] = {OP_inc, -1, 0, single, z_reg, 0}, 1378 [0x34] = {OP_inc, -1, 0, single, z_reg, 0}, 1379 [0x35] = {OP_inc, -1, 0, single, z_reg, 0}, 1380 [0x36] = {OP_inc, -1, 0, single, z_reg, 0}, 1381 [0x37] = {OP_inc, -1, 0, single, z_reg, 0}, 1382 [0x38] = {OP_clr, -1, 0, single, z_reg, 0}, 1383 [0x39] = {OP_clr, -1, 0, single, z_reg, 0}, 1384 [0x3a] = {OP_clr, -1, 0, single, z_reg, 0}, 1385 [0x3b] = {OP_clr, -1, 0, single, z_reg, 0}, 1386 [0x3c] = {OP_clr, -1, 0, single, z_reg, 0}, 1387 [0x3d] = {OP_clr, -1, 0, single, z_reg, 0}, 1388 [0x3e] = {OP_clr, -1, 0, single, z_reg, 0}, 1389 [0x3f] = {OP_clr, -1, 0, single, z_reg, 0}, 1390 [0x40] = {OP_dec, -1, 0, single, z_reg, 0}, 1391 [0x41] = {OP_dec, -1, 0, single, z_reg, 0}, 1392 [0x42] = {OP_dec, -1, 0, single, z_reg, 0}, 1393 [0x43] = {OP_dec, -1, 0, single, z_reg, 0}, 1394 [0x44] = {OP_dec, -1, 0, single, z_reg, 0}, 1395 [0x45] = {OP_dec, -1, 0, single, z_reg, 0}, 1396 [0x46] = {OP_dec, -1, 0, single, z_reg, 0}, 1397 [0x47] = {OP_dec, -1, 0, single, z_reg, 0}, 1398 [0x48] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1399 [0x49] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1400 [0x4a] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1401 [0x4b] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1402 [0x4c] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1403 [0x4d] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1404 [0x4e] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1405 [0x4f] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1406 [0x50] = {OP_add, -1, 0, three, z_reg, z_imm1234_0base}, 1407 [0x51] = {OP_add, -1, 0, three, z_reg, z_imm1234_0base}, 1408 [0x52] = {OP_add, -1, 0, three, z_reg, z_imm1234_0base}, 1409 [0x53] = {OP_add, -1, 0, three, z_reg, z_imm1234_0base}, 1410 [0x54] = {OP_add, -1, 0, two, z_reg, z_imm1234_0base}, 1411 [0x55] = {OP_add, -1, 0, two, z_reg, z_imm1234_0base}, 1412 [0x56] = {OP_add, -1, 0, five, z_reg, z_imm1234_0base}, 1413 [0x57] = {OP_add, -1, 0, five, z_reg, z_imm1234_0base}, 1414 [0x58] = {OP_and, -1, 0, three, z_reg, z_imm1234_8base}, 1415 [0x59] = {OP_and, -1, 0, three, z_reg, z_imm1234_8base}, 1416 [0x5a] = {OP_and, -1, 0, three, z_reg, z_imm1234_8base}, 1417 [0x5b] = {OP_and, -1, 0, three, z_reg, z_imm1234_8base}, 1418 [0x5c] = {OP_and, -1, 0, two, z_reg, z_imm1234_8base}, 1419 [0x5d] = {OP_and, -1, 0, two, z_reg, z_imm1234_8base}, 1420 [0x5e] = {OP_and, -1, 0, five, z_reg, z_imm1234_8base}, 1421 [0x5f] = {OP_and, -1, 0, five, z_reg, z_imm1234_8base}, 1422 [0x60] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1423 [0x61] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1424 [0x62] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1425 [0x63] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1426 [0x64] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1427 [0x65] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1428 [0x66] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1429 [0x67] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1430 [0x68] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1431 [0x69] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1432 [0x6a] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1433 [0x6b] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1434 [0x6c] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1435 [0x6d] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1436 [0x6e] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1437 [0x6f] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1438 [0x70] = {OP_sub, -1, 0, three, z_reg, z_imm1234_0base}, 1439 [0x71] = {OP_sub, -1, 0, three, z_reg, z_imm1234_0base}, 1440 [0x72] = {OP_sub, -1, 0, three, z_reg, z_imm1234_0base}, 1441 [0x73] = {OP_sub, -1, 0, three, z_reg, z_imm1234_0base}, 1442 [0x74] = {OP_sub, -1, 0, two, z_reg, z_imm1234_0base}, 1443 [0x75] = {OP_sub, -1, 0, two, z_reg, z_imm1234_0base}, 1444 [0x76] = {OP_sub, -1, 0, five, z_reg, z_imm1234_0base}, 1445 [0x77] = {OP_sub, -1, 0, five, z_reg, z_imm1234_0base}, 1446 [0x78] = {OP_or, -1, 0, three, z_reg, z_imm1234_8base}, 1447 [0x79] = {OP_or, -1, 0, three, z_reg, z_imm1234_8base}, 1448 [0x7a] = {OP_or, -1, 0, three, z_reg, z_imm1234_8base}, 1449 [0x7b] = {OP_or, -1, 0, three, z_reg, z_imm1234_8base}, 1450 [0x7c] = {OP_or, -1, 0, two, z_reg, z_imm1234_8base}, 1451 [0x7d] = {OP_or, -1, 0, two, z_reg, z_imm1234_8base}, 1452 [0x7e] = {OP_or, -1, 0, five, z_reg, z_imm1234_8base}, 1453 [0x7f] = {OP_or, -1, 0, five, z_reg, z_imm1234_8base}, 1454 [0x80] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1455 [0x81] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1456 [0x82] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1457 [0x83] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1458 [0x84] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1459 [0x85] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1460 [0x86] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1461 [0x87] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1462 [0x88] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1463 [0x89] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1464 [0x8a] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1465 [0x8b] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1466 [0x8c] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1467 [0x8d] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1468 [0x8e] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1469 [0x8f] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1470 [0x90] = {OP_ld, -1, 0, three, z_reg, z_imm1234_0base}, 1471 [0x91] = {OP_ld, -1, 0, three, z_reg, z_imm1234_0base}, 1472 [0x92] = {OP_ld, -1, 0, three, z_reg, z_imm1234_0base}, 1473 [0x93] = {OP_ld, -1, 0, three, z_reg, z_imm1234_0base}, 1474 [0x94] = {OP_ld, -1, 0, two, z_reg, z_imm1234_0base}, 1475 [0x95] = {OP_ld, -1, 0, two, z_reg, z_imm1234_0base}, 1476 [0x96] = {OP_ld, -1, 0, five, z_reg, z_imm1234_0base}, 1477 [0x97] = {OP_ld, -1, 0, five, z_reg, z_imm1234_0base}, 1478 [0x98] = {OP_ld, -1, 0, four, reg_xy, z_imm1234_0base}, 1479 [0x99] = {OP_ld, -1, 0, four, reg_xy, z_imm1234_0base}, 1480 [0x9a] = {OP_clr, -1, 0, single, reg_xy, 0}, 1481 [0x9b] = {OP_clr, -1, 0, single, reg_xy, 0}, 1482 [0x9c] = {OP_inc, 0, 0, opr_n_bytes_p1, z_opr_decode, 0}, 1483 [0x9d] = {OP_inc, 1, 0, opr_n_bytes_p1, z_opr_decode, 0}, 1484 [0x9e] = {OP_tfr, -1, 0, two, z_tfr, NULL}, 1485 [0x9f] = {OP_inc, 3, 0, opr_n_bytes_p1, z_opr_decode, 0}, 1486 [0xa0] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1487 [0xa1] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1488 [0xa2] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1489 [0xa3] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1490 [0xa4] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1491 [0xa5] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1492 [0xa6] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1493 [0xa7] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1494 [0xa8] = {OP_ld, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode}, 1495 [0xa9] = {OP_ld, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode}, 1496 [0xaa] = {OP_jmp, -1, 0, opr_n_bytes_p1, z_opr_decode, 0}, 1497 [0xab] = {OP_jsr, -1, 0, opr_n_bytes_p1, z_opr_decode, 0}, 1498 [0xac] = {OP_dec, 0, 0, opr_n_bytes_p1, z_opr_decode, 0}, 1499 [0xad] = {OP_dec, 1, 0, opr_n_bytes_p1, z_opr_decode, 0}, 1500 [0xae] = {0xFFFF, -1, exg_sex_discrim, two, exg_sex_decode, 0}, /* EXG / SEX */ 1501 [0xaf] = {OP_dec, 3, 0, opr_n_bytes_p1, 0, z_opr_decode}, 1502 [0xb0] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode}, 1503 [0xb1] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode}, 1504 [0xb2] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode}, 1505 [0xb3] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode}, 1506 [0xb4] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode}, 1507 [0xb5] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode}, 1508 [0xb6] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode}, 1509 [0xb7] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode}, 1510 [0xb8] = {OP_ld, -1, 0, four, reg_xy, z_ext24_decode}, 1511 [0xb9] = {OP_ld, -1, 0, four, reg_xy, z_ext24_decode}, 1512 [0xba] = {OP_jmp, -1, 0, four, z_ext24_decode, 0}, 1513 [0xbb] = {OP_jsr, -1, 0, four, z_ext24_decode, 0}, 1514 [0xbc] = {OP_clr, 0, 0, opr_n_bytes_p1, z_opr_decode, 0}, 1515 [0xbd] = {OP_clr, 1, 0, opr_n_bytes_p1, z_opr_decode, 0}, 1516 [0xbe] = {OP_clr, 2, 0, opr_n_bytes_p1, z_opr_decode, 0}, 1517 [0xbf] = {OP_clr, 3, 0, opr_n_bytes_p1, z_opr_decode, 0}, 1518 [0xc0] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1519 [0xc1] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1520 [0xc2] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1521 [0xc3] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1522 [0xc4] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1523 [0xc5] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1524 [0xc6] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1525 [0xc7] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1526 [0xc8] = {OP_st, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode}, 1527 [0xc9] = {OP_st, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode}, 1528 [0xca] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode}, 1529 [0xcb] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode}, 1530 [0xcc] = {OP_com, 0, 0, opr_n_bytes_p1, NULL, z_opr_decode}, 1531 [0xcd] = {OP_com, 1, 0, opr_n_bytes_p1, NULL, z_opr_decode}, 1532 [0xce] = {OP_andcc, -1, 0, two, imm1_decode, 0}, 1533 [0xcf] = {OP_com, 3, 0, opr_n_bytes_p1, NULL, z_opr_decode}, 1534 [0xd0] = {OP_st, -1, 0, four, z_reg, z_ext24_decode}, 1535 [0xd1] = {OP_st, -1, 0, four, z_reg, z_ext24_decode}, 1536 [0xd2] = {OP_st, -1, 0, four, z_reg, z_ext24_decode}, 1537 [0xd3] = {OP_st, -1, 0, four, z_reg, z_ext24_decode}, 1538 [0xd4] = {OP_st, -1, 0, four, z_reg, z_ext24_decode}, 1539 [0xd5] = {OP_st, -1, 0, four, z_reg, z_ext24_decode}, 1540 [0xd6] = {OP_st, -1, 0, four, z_reg, z_ext24_decode}, 1541 [0xd7] = {OP_st, -1, 0, four, z_reg, z_ext24_decode}, 1542 [0xd8] = {OP_st, -1, 0, four, reg_xy, z_ext24_decode}, 1543 [0xd9] = {OP_st, -1, 0, four, reg_xy, z_ext24_decode}, 1544 [0xda] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode}, 1545 [0xdb] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode}, 1546 [0xdc] = {OP_neg, 0, 0, opr_n_bytes_p1, NULL, z_opr_decode}, 1547 [0xdd] = {OP_neg, 1, 0, opr_n_bytes_p1, NULL, z_opr_decode}, 1548 [0xde] = {OP_orcc, -1, 0, two, imm1_decode, 0}, 1549 [0xdf] = {OP_neg, 3, 0, opr_n_bytes_p1, NULL, z_opr_decode}, 1550 [0xe0] = {OP_cmp, -1, 0, three, z_reg, z_imm1234_0base}, 1551 [0xe1] = {OP_cmp, -1, 0, three, z_reg, z_imm1234_0base}, 1552 [0xe2] = {OP_cmp, -1, 0, three, z_reg, z_imm1234_0base}, 1553 [0xe3] = {OP_cmp, -1, 0, three, z_reg, z_imm1234_0base}, 1554 [0xe4] = {OP_cmp, -1, 0, two, z_reg, z_imm1234_0base}, 1555 [0xe5] = {OP_cmp, -1, 0, two, z_reg, z_imm1234_0base}, 1556 [0xe6] = {OP_cmp, -1, 0, five, z_reg, z_imm1234_0base}, 1557 [0xe7] = {OP_cmp, -1, 0, five, z_reg, z_imm1234_0base}, 1558 [0xe8] = {OP_cmp, -1, 0, four, reg_xy, z_imm1234_0base}, 1559 [0xe9] = {OP_cmp, -1, 0, four, reg_xy, z_imm1234_0base}, 1560 [0xea] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode}, 1561 [0xeb] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode}, 1562 [0xec] = {OP_bclr, -1, 0, bm_n_bytes, bm_decode, 0}, 1563 [0xed] = {OP_bset, -1, 0, bm_n_bytes, bm_decode, 0}, 1564 [0xee] = {OP_btgl, -1, 0, bm_n_bytes, bm_decode, 0}, 1565 [0xef] = {OP_INVALID, -1, 0, NULL, NULL, NULL}, /* SPARE */ 1566 [0xf0] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1567 [0xf1] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1568 [0xf2] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1569 [0xf3] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1570 [0xf4] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1571 [0xf5] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1572 [0xf6] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1573 [0xf7] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1574 [0xf8] = {OP_cmp, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode}, 1575 [0xf9] = {OP_cmp, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode}, 1576 [0xfa] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode}, 1577 [0xfb] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode}, 1578 [0xfc] = {OP_cmp, -1, 0, single, cmp_xy, 0}, 1579 [0xfd] = {OP_sub, -1, 0, single, sub_d6_x_y, 0}, 1580 [0xfe] = {OP_sub, -1, 0, single, sub_d6_y_x, 0}, 1581 [0xff] = {OP_swi, -1, 0, single, 0, 0} 1582 }; 1583 1584 static const int oprregs1[] = 1585 { 1586 REG_D3, REG_D2, REG_D1, REG_D0, REG_CCL, REG_CCH 1587 }; 1588 1589 static const int oprregs2[] = 1590 { 1591 REG_Y, REG_X, REG_D7, REG_D6, REG_D5, REG_D4 1592 }; 1593 1594 1595 1596 1598 enum MUL_MODE 1599 { 1600 MUL_REG_REG, 1601 MUL_REG_OPR, 1602 MUL_REG_IMM, 1603 MUL_OPR_OPR 1604 }; 1605 1606 struct mb 1607 { 1608 uint8_t mask; 1609 uint8_t value; 1610 enum MUL_MODE mode; 1611 }; 1612 1613 static const struct mb mul_table[] = { 1614 {0x40, 0x00, MUL_REG_REG}, 1615 1616 {0x47, 0x40, MUL_REG_OPR}, 1617 {0x47, 0x41, MUL_REG_OPR}, 1618 {0x47, 0x43, MUL_REG_OPR}, 1619 1620 {0x47, 0x44, MUL_REG_IMM}, 1621 {0x47, 0x45, MUL_REG_IMM}, 1622 {0x47, 0x47, MUL_REG_IMM}, 1623 1624 {0x43, 0x42, MUL_OPR_OPR}, 1625 }; 1626 1627 1628 static void 1629 mul_decode (struct mem_read_abstraction_base *mra, 1630 int *n_operands, struct operand **operand) 1631 { 1632 uint8_t mb; 1633 int status = mra->read (mra, 0, 1, &mb); 1634 if (status < 0) 1635 return; 1636 1637 uint8_t byte; 1638 status = mra->read (mra, -1, 1, &byte); 1639 if (status < 0) 1640 return; 1641 1642 enum MUL_MODE mode = -1; 1643 size_t i; 1644 for (i = 0; i < sizeof (mul_table) / sizeof (mul_table[0]); ++i) 1645 { 1646 const struct mb *mm = mul_table + i; 1647 if ((mb & mm->mask) == mm->value) 1648 { 1649 mode = mm->mode; 1650 break; 1651 } 1652 } 1653 operand[(*n_operands)++] = create_register_operand (byte & 0x07); 1654 1655 switch (mode) 1656 { 1657 case MUL_REG_IMM: 1658 { 1659 int size = (mb & 0x3); 1660 operand[(*n_operands)++] = 1661 create_register_operand_with_size ((mb & 0x38) >> 3, size); 1662 uint32_t imm = z_decode_signed_value (mra, 1, size + 1); 1663 operand[(*n_operands)++] = create_immediate_operand (imm); 1664 } 1665 break; 1666 case MUL_REG_REG: 1667 operand[(*n_operands)++] = create_register_operand ((mb & 0x38) >> 3); 1668 operand[(*n_operands)++] = create_register_operand (mb & 0x07); 1669 break; 1670 case MUL_REG_OPR: 1671 operand[(*n_operands)++] = create_register_operand ((mb & 0x38) >> 3); 1672 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1, mb & 0x3); 1673 break; 1674 case MUL_OPR_OPR: 1675 { 1676 int first = x_opr_n_bytes (mra, 1); 1677 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1, 1678 (mb & 0x30) >> 4); 1679 operand[(*n_operands)++] = x_opr_decode_with_size (mra, first + 1, 1680 (mb & 0x0c) >> 2); 1681 break; 1682 } 1683 } 1684 } 1685 1686 1687 static int 1688 mul_n_bytes (struct mem_read_abstraction_base *mra) 1689 { 1690 int nx = 2; 1691 uint8_t mb; 1692 int status = mra->read (mra, 0, 1, &mb); 1693 if (status < 0) 1694 return 0; 1695 1696 enum MUL_MODE mode = -1; 1697 size_t i; 1698 for (i = 0; i < sizeof (mul_table) / sizeof (mul_table[0]); ++i) 1699 { 1700 const struct mb *mm = mul_table + i; 1701 if ((mb & mm->mask) == mm->value) 1702 { 1703 mode = mm->mode; 1704 break; 1705 } 1706 } 1707 1708 int size = (mb & 0x3) + 1; 1709 1710 switch (mode) 1711 { 1712 case MUL_REG_IMM: 1713 nx += size; 1714 break; 1715 case MUL_REG_REG: 1716 break; 1717 case MUL_REG_OPR: 1718 nx += x_opr_n_bytes (mra, 1); 1719 break; 1720 case MUL_OPR_OPR: 1721 { 1722 int first = x_opr_n_bytes (mra, nx - 1); 1723 nx += first; 1724 int second = x_opr_n_bytes (mra, nx - 1); 1725 nx += second; 1726 } 1727 break; 1728 } 1729 1730 return nx; 1731 } 1732 1733 1734 /* The NXP documentation is vague about BM_RESERVED0 and BM_RESERVED1, 1736 and contains obvious typos. 1737 However the Freescale tools and experiments with the chip itself 1738 seem to indicate that they behave like BM_REG_IMM and BM_OPR_REG 1739 respectively. */ 1740 1741 enum BM_MODE 1742 { 1743 BM_REG_IMM, 1744 BM_RESERVED0, 1745 BM_OPR_B, 1746 BM_OPR_W, 1747 BM_OPR_L, 1748 BM_OPR_REG, 1749 BM_RESERVED1 1750 }; 1751 1752 struct bm 1753 { 1754 uint8_t mask; 1755 uint8_t value; 1756 enum BM_MODE mode; 1757 }; 1758 1759 static const struct bm bm_table[] = { 1760 { 0xC6, 0x04, BM_REG_IMM}, 1761 { 0x84, 0x00, BM_REG_IMM}, 1762 { 0x06, 0x06, BM_REG_IMM}, 1763 { 0xC6, 0x44, BM_RESERVED0}, 1764 // 00 1765 { 0x8F, 0x80, BM_OPR_B}, 1766 { 0x8E, 0x82, BM_OPR_W}, 1767 { 0x8C, 0x88, BM_OPR_L}, 1768 1769 { 0x83, 0x81, BM_OPR_REG}, 1770 { 0x87, 0x84, BM_RESERVED1}, 1771 }; 1772 1773 static void 1774 bm_decode (struct mem_read_abstraction_base *mra, 1775 int *n_operands, struct operand **operand) 1776 { 1777 uint8_t bm; 1778 int status = mra->read (mra, 0, 1, &bm); 1779 if (status < 0) 1780 return; 1781 1782 size_t i; 1783 enum BM_MODE mode = -1; 1784 for (i = 0; i < sizeof (bm_table) / sizeof (bm_table[0]); ++i) 1785 { 1786 const struct bm *bme = bm_table + i; 1787 if ((bm & bme->mask) == bme->value) 1788 { 1789 mode = bme->mode; 1790 break; 1791 } 1792 } 1793 1794 switch (mode) 1795 { 1796 case BM_REG_IMM: 1797 case BM_RESERVED0: 1798 operand[(*n_operands)++] = create_register_operand (bm & 0x07); 1799 break; 1800 case BM_OPR_B: 1801 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1, 0); 1802 break; 1803 case BM_OPR_W: 1804 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1, 1); 1805 break; 1806 case BM_OPR_L: 1807 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1, 3); 1808 break; 1809 case BM_OPR_REG: 1810 case BM_RESERVED1: 1811 { 1812 uint8_t xb; 1813 mra->read (mra, 1, 1, &xb); 1814 /* Don't emit a size suffix for register operands */ 1815 if ((xb & 0xF8) != 0xB8) 1816 operand[(*n_operands)++] = 1817 x_opr_decode_with_size (mra, 1, (bm & 0x0c) >> 2); 1818 else 1819 operand[(*n_operands)++] = x_opr_decode (mra, 1); 1820 } 1821 break; 1822 } 1823 1824 uint8_t imm = 0; 1825 switch (mode) 1826 { 1827 case BM_REG_IMM: 1828 imm = (bm & 0x38) >> 3; 1829 operand[(*n_operands)++] = create_immediate_operand (imm); 1830 break; 1831 case BM_OPR_L: 1832 imm |= (bm & 0x03) << 3; 1833 /* fallthrough */ 1834 case BM_OPR_W: 1835 imm |= (bm & 0x01) << 3; 1836 /* fallthrough */ 1837 case BM_OPR_B: 1838 imm |= (bm & 0x70) >> 4; 1839 operand[(*n_operands)++] = create_immediate_operand (imm); 1840 break; 1841 case BM_OPR_REG: 1842 case BM_RESERVED1: 1843 operand[(*n_operands)++] = create_register_operand ((bm & 0x70) >> 4); 1844 break; 1845 case BM_RESERVED0: 1846 assert (0); 1847 break; 1848 } 1849 } 1850 1851 1852 static void 1853 bm_rel_decode (struct mem_read_abstraction_base *mra, 1854 int *n_operands, struct operand **operand) 1855 { 1856 uint8_t bm; 1857 int status = mra->read (mra, 0, 1, &bm); 1858 if (status < 0) 1859 return; 1860 1861 size_t i; 1862 enum BM_MODE mode = -1; 1863 for (i = 0; i < sizeof (bm_table) / sizeof (bm_table[0]); ++i) 1864 { 1865 const struct bm *bme = bm_table + i; 1866 if ((bm & bme->mask) == bme->value) 1867 { 1868 mode = bme->mode; 1869 break; 1870 } 1871 } 1872 1873 int n = 1; 1874 switch (mode) 1875 { 1876 case BM_REG_IMM: 1877 case BM_RESERVED0: 1878 operand[(*n_operands)++] = create_register_operand (bm & 0x07); 1879 break; 1880 case BM_OPR_B: 1881 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1, 0); 1882 n = 1 + x_opr_n_bytes (mra, 1); 1883 break; 1884 case BM_OPR_W: 1885 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1, 1); 1886 n = 1 + x_opr_n_bytes (mra, 1); 1887 break; 1888 case BM_OPR_L: 1889 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1, 3); 1890 n = 1 + x_opr_n_bytes (mra, 1); 1891 break; 1892 case BM_OPR_REG: 1893 case BM_RESERVED1: 1894 { 1895 uint8_t xb; 1896 mra->read (mra, +1, 1, &xb); 1897 /* Don't emit a size suffix for register operands */ 1898 if ((xb & 0xF8) != 0xB8) 1899 { 1900 short os = (bm & 0x0c) >> 2; 1901 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1, os); 1902 } 1903 else 1904 operand[(*n_operands)++] = x_opr_decode (mra, 1); 1905 1906 } 1907 break; 1908 } 1909 1910 int imm = 0; 1911 switch (mode) 1912 { 1913 case BM_OPR_L: 1914 imm |= (bm & 0x02) << 3; 1915 /* fall through */ 1916 case BM_OPR_W: 1917 imm |= (bm & 0x01) << 3; 1918 /* fall through */ 1919 case BM_OPR_B: 1920 imm |= (bm & 0x70) >> 4; 1921 operand[(*n_operands)++] = create_immediate_operand (imm); 1922 break; 1923 case BM_RESERVED0: 1924 imm = (bm & 0x38) >> 3; 1925 operand[(*n_operands)++] = create_immediate_operand (imm); 1926 break; 1927 case BM_REG_IMM: 1928 imm = (bm & 0xF8) >> 3; 1929 operand[(*n_operands)++] = create_immediate_operand (imm); 1930 break; 1931 case BM_OPR_REG: 1932 case BM_RESERVED1: 1933 operand[(*n_operands)++] = create_register_operand ((bm & 0x70) >> 4); 1934 n += x_opr_n_bytes (mra, 1); 1935 break; 1936 } 1937 1938 rel_15_7 (mra, n + 1, n_operands, operand); 1939 } 1940 1941 static int 1942 bm_n_bytes (struct mem_read_abstraction_base *mra) 1943 { 1944 uint8_t bm; 1945 int status = mra->read (mra, 0, 1, &bm); 1946 if (status < 0) 1947 return status; 1948 1949 size_t i; 1950 enum BM_MODE mode = -1; 1951 for (i = 0; i < sizeof (bm_table) / sizeof (bm_table[0]); ++i) 1952 { 1953 const struct bm *bme = bm_table + i; 1954 if ((bm & bme->mask) == bme->value) 1955 { 1956 mode = bme->mode; 1957 break; 1958 } 1959 } 1960 1961 int n = 2; 1962 switch (mode) 1963 { 1964 case BM_REG_IMM: 1965 case BM_RESERVED0: 1966 break; 1967 1968 case BM_OPR_B: 1969 case BM_OPR_W: 1970 case BM_OPR_L: 1971 n += x_opr_n_bytes (mra, 1); 1972 break; 1973 case BM_OPR_REG: 1974 case BM_RESERVED1: 1975 n += x_opr_n_bytes (mra, 1); 1976 break; 1977 } 1978 1979 return n; 1980 } 1981 1982 static int 1983 bm_rel_n_bytes (struct mem_read_abstraction_base *mra) 1984 { 1985 int n = 1 + bm_n_bytes (mra); 1986 1987 bfd_byte rb; 1988 int status = mra->read (mra, n - 2, 1, &rb); 1989 if (status != 0) 1990 return status; 1991 1992 if (rb & 0x80) 1993 n++; 1994 1995 return n; 1996 } 1997 1998 1999 2000 2002 2003 /* shift direction */ 2004 enum SB_DIR 2005 { 2006 SB_LEFT, 2007 SB_RIGHT 2008 }; 2009 2010 enum SB_TYPE 2011 { 2012 SB_ARITHMETIC, 2013 SB_LOGICAL 2014 }; 2015 2016 2017 enum SB_MODE 2018 { 2019 SB_REG_REG_N_EFF, 2020 SB_REG_REG_N, 2021 SB_REG_OPR_EFF, 2022 SB_ROT, 2023 SB_REG_OPR_OPR, 2024 SB_OPR_N 2025 }; 2026 2027 struct sb 2028 { 2029 uint8_t mask; 2030 uint8_t value; 2031 enum SB_MODE mode; 2032 }; 2033 2034 static const struct sb sb_table[] = { 2035 {0x30, 0x00, SB_REG_REG_N_EFF}, 2036 {0x30, 0x10, SB_REG_REG_N}, 2037 {0x34, 0x20, SB_REG_OPR_EFF}, 2038 {0x34, 0x24, SB_ROT}, 2039 {0x34, 0x30, SB_REG_OPR_OPR}, 2040 {0x34, 0x34, SB_OPR_N}, 2041 }; 2042 2043 static int 2044 shift_n_bytes (struct mem_read_abstraction_base *mra) 2045 { 2046 bfd_byte sb; 2047 int status = mra->read (mra, 0, 1, &sb); 2048 if (status != 0) 2049 return status; 2050 2051 size_t i; 2052 enum SB_MODE mode = -1; 2053 for (i = 0; i < sizeof (sb_table) / sizeof (sb_table[0]); ++i) 2054 { 2055 const struct sb *sbe = sb_table + i; 2056 if ((sb & sbe->mask) == sbe->value) 2057 mode = sbe->mode; 2058 } 2059 2060 switch (mode) 2061 { 2062 case SB_REG_REG_N_EFF: 2063 return 2; 2064 break; 2065 case SB_REG_OPR_EFF: 2066 case SB_ROT: 2067 return 2 + x_opr_n_bytes (mra, 1); 2068 break; 2069 case SB_REG_OPR_OPR: 2070 { 2071 int opr1 = x_opr_n_bytes (mra, 1); 2072 int opr2 = 0; 2073 if ((sb & 0x30) != 0x20) 2074 opr2 = x_opr_n_bytes (mra, opr1 + 1); 2075 return 2 + opr1 + opr2; 2076 } 2077 break; 2078 default: 2079 return 3; 2080 } 2081 2082 /* not reached */ 2083 return -1; 2084 } 2085 2086 2088 static int 2089 2090 mov_imm_opr_n_bytes (struct mem_read_abstraction_base *mra) 2091 { 2092 bfd_byte byte; 2093 int status = mra->read (mra, -1, 1, &byte); 2094 if (status < 0) 2095 return status; 2096 2097 int size = byte - 0x0c + 1; 2098 2099 return size + x_opr_n_bytes (mra, size) + 1; 2100 } 2101 2102 static void 2103 mov_imm_opr (struct mem_read_abstraction_base *mra, 2104 int *n_operands, struct operand **operand) 2105 { 2106 bfd_byte byte; 2107 int status = mra->read (mra, -1, 1, &byte); 2108 if (status < 0) 2109 return ; 2110 2111 int size = byte - 0x0c + 1; 2112 uint32_t imm = decode_signed_value (mra, size); 2113 2114 operand[(*n_operands)++] = create_immediate_operand (imm); 2115 operand[(*n_operands)++] = x_opr_decode (mra, size); 2116 } 2117 2118 2119 2121 static void 2122 ld_18bit_decode (struct mem_read_abstraction_base *mra, 2123 int *n_operands, struct operand **operand) 2124 { 2125 size_t size = 3; 2126 bfd_byte buffer[3]; 2127 int status = mra->read (mra, 0, 2, buffer + 1); 2128 if (status < 0) 2129 return ; 2130 2131 status = mra->read (mra, -1, 1, buffer); 2132 if (status < 0) 2133 return ; 2134 2135 buffer[0] = (buffer[0] & 0x30) >> 4; 2136 2137 size_t i; 2138 uint32_t imm = 0; 2139 for (i = 0; i < size; ++i) 2140 { 2141 imm |= buffer[i] << (8 * (size - i - 1)); 2142 } 2143 2144 operand[(*n_operands)++] = create_immediate_operand (imm); 2145 } 2146 2147 2148 2150 /* Loop Primitives */ 2151 2152 enum LP_MODE { 2153 LP_REG, 2154 LP_XY, 2155 LP_OPR 2156 }; 2157 2158 struct lp 2159 { 2160 uint8_t mask; 2161 uint8_t value; 2162 enum LP_MODE mode; 2163 }; 2164 2165 static const struct lp lp_mode[] = { 2166 {0x08, 0x00, LP_REG}, 2167 {0x0C, 0x08, LP_XY}, 2168 {0x0C, 0x0C, LP_OPR}, 2169 }; 2170 2171 2172 static int 2173 loop_prim_n_bytes (struct mem_read_abstraction_base *mra) 2174 { 2175 int mx = 0; 2176 uint8_t lb; 2177 mra->read (mra, mx++, 1, &lb); 2178 2179 enum LP_MODE mode = -1; 2180 size_t i; 2181 for (i = 0; i < sizeof (lp_mode) / sizeof (lp_mode[0]); ++i) 2182 { 2183 const struct lp *pb = lp_mode + i; 2184 if ((lb & pb->mask) == pb->value) 2185 { 2186 mode = pb->mode; 2187 break; 2188 } 2189 } 2190 2191 if (mode == LP_OPR) 2192 { 2193 mx += x_opr_n_bytes (mra, mx) ; 2194 } 2195 2196 uint8_t rb; 2197 mra->read (mra, mx++, 1, &rb); 2198 if (rb & 0x80) 2199 mx++; 2200 2201 return mx + 1; 2202 } 2203 2204 2205 2206 2208 static enum operator 2209 exg_sex_discrim (struct mem_read_abstraction_base *mra, enum operator hint ATTRIBUTE_UNUSED) 2210 { 2211 uint8_t eb; 2212 int status = mra->read (mra, 0, 1, &eb); 2213 if (status < 0) 2214 return OP_INVALID; 2215 2216 struct operand *op0 = create_register_operand ((eb & 0xf0) >> 4); 2217 struct operand *op1 = create_register_operand (eb & 0xf); 2218 2219 const struct reg *r0 = registers + ((struct register_operand *) op0)->reg; 2220 const struct reg *r1 = registers + ((struct register_operand *) op1)->reg; 2221 2222 enum operator operator = (r0->bytes < r1->bytes) ? OP_sex : OP_exg; 2223 2224 free (op0); 2225 free (op1); 2226 2227 return operator; 2228 } 2229 2230 2231 static void 2232 exg_sex_decode (struct mem_read_abstraction_base *mra, 2233 int *n_operands, struct operand **operands) 2234 { 2235 uint8_t eb; 2236 int status = mra->read (mra, 0, 1, &eb); 2237 if (status < 0) 2238 return; 2239 2240 /* Ship out the operands. */ 2241 operands[(*n_operands)++] = create_register_operand ((eb & 0xf0) >> 4); 2242 operands[(*n_operands)++] = create_register_operand (eb & 0xf); 2243 } 2244 2245 static enum operator 2246 loop_primitive_discrim (struct mem_read_abstraction_base *mra, 2247 enum operator hint ATTRIBUTE_UNUSED) 2248 { 2249 uint8_t lb; 2250 int status = mra->read (mra, 0, 1, &lb); 2251 if (status < 0) 2252 return OP_INVALID; 2253 2254 enum operator opbase = (lb & 0x80) ? OP_dbNE : OP_tbNE; 2255 return opbase + ((lb & 0x70) >> 4); 2256 } 2257 2258 static void 2259 loop_primitive_decode (struct mem_read_abstraction_base *mra, 2260 int *n_operands, struct operand **operands) 2261 { 2262 int offs = 1; 2263 uint8_t lb; 2264 int status = mra->read (mra, 0, 1, &lb); 2265 if (status < 0) 2266 return ; 2267 2268 enum LP_MODE mode = -1; 2269 size_t i; 2270 for (i = 0; i < sizeof (lp_mode) / sizeof (lp_mode[0]); ++i) 2271 { 2272 const struct lp *pb = lp_mode + i; 2273 if ((lb & pb->mask) == pb->value) 2274 { 2275 mode = pb->mode; 2276 break; 2277 } 2278 } 2279 2280 switch (mode) 2281 { 2282 case LP_REG: 2283 operands[(*n_operands)++] = create_register_operand (lb & 0x07); 2284 break; 2285 case LP_XY: 2286 operands[(*n_operands)++] = 2287 create_register_operand ((lb & 0x01) + REG_X); 2288 break; 2289 case LP_OPR: 2290 offs += x_opr_n_bytes (mra, 1); 2291 operands[(*n_operands)++] = x_opr_decode_with_size (mra, 1, lb & 0x03); 2292 break; 2293 } 2294 2295 rel_15_7 (mra, offs + 1, n_operands, operands); 2296 } 2297 2298 2299 static enum operator 2300 shift_discrim (struct mem_read_abstraction_base *mra, enum operator hint ATTRIBUTE_UNUSED) 2301 { 2302 size_t i; 2303 uint8_t sb; 2304 int status = mra->read (mra, 0, 1, &sb); 2305 if (status < 0) 2306 return status; 2307 2308 enum SB_DIR dir = (sb & 0x40) ? SB_LEFT : SB_RIGHT; 2309 enum SB_TYPE type = (sb & 0x80) ? SB_ARITHMETIC : SB_LOGICAL; 2310 enum SB_MODE mode = -1; 2311 for (i = 0; i < sizeof (sb_table) / sizeof (sb_table[0]); ++i) 2312 { 2313 const struct sb *sbe = sb_table + i; 2314 if ((sb & sbe->mask) == sbe->value) 2315 mode = sbe->mode; 2316 } 2317 2318 if (mode == SB_ROT) 2319 return (dir == SB_LEFT) ? OP_rol : OP_ror; 2320 2321 if (type == SB_LOGICAL) 2322 return (dir == SB_LEFT) ? OP_lsl : OP_lsr; 2323 2324 return (dir == SB_LEFT) ? OP_asl : OP_asr; 2325 } 2326 2327 2328 static void 2329 shift_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operands) 2330 { 2331 size_t i; 2332 2333 uint8_t byte; 2334 int status = mra->read (mra, -1, 1, &byte); 2335 if (status < 0) 2336 return ; 2337 2338 uint8_t sb; 2339 status = mra->read (mra, 0, 1, &sb); 2340 if (status < 0) 2341 return ; 2342 2343 enum SB_MODE mode = -1; 2344 for (i = 0; i < sizeof (sb_table) / sizeof (sb_table[0]); ++i) 2345 { 2346 const struct sb *sbe = sb_table + i; 2347 if ((sb & sbe->mask) == sbe->value) 2348 mode = sbe->mode; 2349 } 2350 2351 short osize = -1; 2352 switch (mode) 2353 { 2354 case SB_REG_OPR_EFF: 2355 case SB_ROT: 2356 case SB_REG_OPR_OPR: 2357 osize = sb & 0x03; 2358 break; 2359 case SB_OPR_N: 2360 { 2361 uint8_t xb; 2362 mra->read (mra, 1, 1, &xb); 2363 /* The size suffix is not printed if the OPR operand refers 2364 directly to a register, because the size is implied by the 2365 size of that register. */ 2366 if ((xb & 0xF8) != 0xB8) 2367 osize = sb & 0x03; 2368 } 2369 break; 2370 default: 2371 break; 2372 }; 2373 2374 /* Destination register */ 2375 switch (mode) 2376 { 2377 case SB_REG_REG_N_EFF: 2378 case SB_REG_REG_N: 2379 operands[(*n_operands)++] = create_register_operand (byte & 0x07); 2380 break; 2381 case SB_REG_OPR_EFF: 2382 case SB_REG_OPR_OPR: 2383 operands[(*n_operands)++] = create_register_operand (byte & 0x07); 2384 break; 2385 2386 case SB_ROT: 2387 operands[(*n_operands)++] = x_opr_decode_with_size (mra, 1, osize); 2388 break; 2389 2390 default: 2391 break; 2392 } 2393 2394 /* Source register */ 2395 switch (mode) 2396 { 2397 case SB_REG_REG_N_EFF: 2398 case SB_REG_REG_N: 2399 operands[(*n_operands)++] = 2400 create_register_operand_with_size (sb & 0x07, osize); 2401 break; 2402 2403 case SB_REG_OPR_OPR: 2404 operands[(*n_operands)++] = x_opr_decode_with_size (mra, 1, osize); 2405 break; 2406 2407 default: 2408 break; 2409 } 2410 2411 /* 3rd arg */ 2412 switch (mode) 2413 { 2414 case SB_REG_OPR_EFF: 2415 case SB_OPR_N: 2416 operands[(*n_operands)++] = x_opr_decode_with_size (mra, 1, osize); 2417 break; 2418 2419 case SB_REG_REG_N: 2420 { 2421 uint8_t xb; 2422 mra->read (mra, 1, 1, &xb); 2423 2424 /* This case is slightly unusual. 2425 If XB matches the binary pattern 0111XXXX, then instead of 2426 interpreting this as a general OPR postbyte in the IMMe4 mode, 2427 the XB byte is interpreted in s special way. */ 2428 if ((xb & 0xF0) == 0x70) 2429 { 2430 if (byte & 0x10) 2431 { 2432 int shift = ((sb & 0x08) >> 3) | ((xb & 0x0f) << 1); 2433 operands[(*n_operands)++] = create_immediate_operand (shift); 2434 } 2435 else 2436 { 2437 /* This should not happen. */ 2438 abort (); 2439 } 2440 } 2441 else 2442 { 2443 operands[(*n_operands)++] = x_opr_decode (mra, 1); 2444 } 2445 } 2446 break; 2447 case SB_REG_OPR_OPR: 2448 { 2449 uint8_t xb; 2450 int n = x_opr_n_bytes (mra, 1); 2451 mra->read (mra, 1 + n, 1, &xb); 2452 2453 if ((xb & 0xF0) == 0x70) 2454 { 2455 int imm = xb & 0x0F; 2456 imm <<= 1; 2457 imm |= (sb & 0x08) >> 3; 2458 operands[(*n_operands)++] = create_immediate_operand (imm); 2459 } 2460 else 2461 { 2462 operands[(*n_operands)++] = x_opr_decode (mra, 1 + n); 2463 } 2464 } 2465 break; 2466 default: 2467 break; 2468 } 2469 2470 switch (mode) 2471 { 2472 case SB_REG_REG_N_EFF: 2473 case SB_REG_OPR_EFF: 2474 case SB_OPR_N: 2475 { 2476 int imm = (sb & 0x08) ? 2 : 1; 2477 operands[(*n_operands)++] = create_immediate_operand (imm); 2478 } 2479 break; 2480 2481 default: 2482 break; 2483 } 2484 } 2485 2486 static enum operator 2487 psh_pul_discrim (struct mem_read_abstraction_base *mra, 2488 enum operator hint ATTRIBUTE_UNUSED) 2489 { 2490 uint8_t byte; 2491 int status = mra->read (mra, 0, 1, &byte); 2492 if (status != 0) 2493 return OP_INVALID; 2494 2495 return (byte & 0x80) ? OP_pull: OP_push; 2496 } 2497 2498 2499 static void 2500 psh_pul_decode (struct mem_read_abstraction_base *mra, 2501 int *n_operands, struct operand **operand) 2502 { 2503 uint8_t byte; 2504 int status = mra->read (mra, 0, 1, &byte); 2505 if (status != 0) 2506 return; 2507 int bit; 2508 if (byte & 0x40) 2509 { 2510 if ((byte & 0x3F) == 0) 2511 { 2512 operand[(*n_operands)++] = create_register_all16_operand (); 2513 } 2514 else 2515 for (bit = 5; bit >= 0; --bit) 2516 { 2517 if (byte & (0x1 << bit)) 2518 { 2519 operand[(*n_operands)++] = create_register_operand (oprregs2[bit]); 2520 } 2521 } 2522 } 2523 else 2524 { 2525 if ((byte & 0x3F) == 0) 2526 { 2527 operand[(*n_operands)++] = create_register_all_operand (); 2528 } 2529 else 2530 for (bit = 5; bit >= 0; --bit) 2531 { 2532 if (byte & (0x1 << bit)) 2533 { 2534 operand[(*n_operands)++] = create_register_operand (oprregs1[bit]); 2535 } 2536 } 2537 } 2538 } 2539 2540 static enum operator 2541 bit_field_discrim (struct mem_read_abstraction_base *mra, enum operator hint ATTRIBUTE_UNUSED) 2542 { 2543 int status; 2544 bfd_byte bb; 2545 status = mra->read (mra, 0, 1, &bb); 2546 if (status != 0) 2547 return OP_INVALID; 2548 2549 return (bb & 0x80) ? OP_bfins : OP_bfext; 2550 } 2551 2552 static void 2553 bit_field_decode (struct mem_read_abstraction_base *mra, 2554 int *n_operands, struct operand **operands) 2555 { 2556 int status; 2557 2558 bfd_byte byte2; 2559 status = mra->read (mra, -1, 1, &byte2); 2560 if (status != 0) 2561 return; 2562 2563 bfd_byte bb; 2564 status = mra->read (mra, 0, 1, &bb); 2565 if (status != 0) 2566 return; 2567 2568 enum BB_MODE mode = -1; 2569 size_t i; 2570 const struct opr_bb *bbs = 0; 2571 for (i = 0; i < sizeof (bb_modes) / sizeof (bb_modes[0]); ++i) 2572 { 2573 bbs = bb_modes + i; 2574 if ((bb & bbs->mask) == bbs->value) 2575 { 2576 mode = bbs->mode; 2577 break; 2578 } 2579 } 2580 int reg1 = byte2 & 0x07; 2581 /* First operand */ 2582 switch (mode) 2583 { 2584 case BB_REG_REG_REG: 2585 case BB_REG_REG_IMM: 2586 case BB_REG_OPR_REG: 2587 case BB_REG_OPR_IMM: 2588 operands[(*n_operands)++] = create_register_operand (reg1); 2589 break; 2590 case BB_OPR_REG_REG: 2591 operands[(*n_operands)++] = x_opr_decode_with_size (mra, 1, 2592 (bb >> 2) & 0x03); 2593 break; 2594 case BB_OPR_REG_IMM: 2595 operands[(*n_operands)++] = x_opr_decode_with_size (mra, 2, 2596 (bb >> 2) & 0x03); 2597 break; 2598 } 2599 2600 /* Second operand */ 2601 switch (mode) 2602 { 2603 case BB_REG_REG_REG: 2604 case BB_REG_REG_IMM: 2605 { 2606 int reg_src = (bb >> 2) & 0x07; 2607 operands[(*n_operands)++] = create_register_operand (reg_src); 2608 } 2609 break; 2610 case BB_OPR_REG_REG: 2611 case BB_OPR_REG_IMM: 2612 { 2613 int reg_src = (byte2 & 0x07); 2614 operands[(*n_operands)++] = create_register_operand (reg_src); 2615 } 2616 break; 2617 case BB_REG_OPR_REG: 2618 operands[(*n_operands)++] = x_opr_decode_with_size (mra, 1, 2619 (bb >> 2) & 0x03); 2620 break; 2621 case BB_REG_OPR_IMM: 2622 operands[(*n_operands)++] = x_opr_decode_with_size (mra, 2, 2623 (bb >> 2) & 0x03); 2624 break; 2625 } 2626 2627 /* Third operand */ 2628 switch (mode) 2629 { 2630 case BB_REG_REG_REG: 2631 case BB_OPR_REG_REG: 2632 case BB_REG_OPR_REG: 2633 { 2634 int reg_parm = bb & 0x03; 2635 operands[(*n_operands)++] = create_register_operand (reg_parm); 2636 } 2637 break; 2638 case BB_REG_REG_IMM: 2639 case BB_OPR_REG_IMM: 2640 case BB_REG_OPR_IMM: 2641 { 2642 bfd_byte i1; 2643 mra->read (mra, 1, 1, &i1); 2644 int offset = i1 & 0x1f; 2645 int width = bb & 0x03; 2646 width <<= 3; 2647 width |= i1 >> 5; 2648 operands[(*n_operands)++] = create_bitfield_operand (width, offset); 2649 } 2650 break; 2651 } 2652 } 2653 2654 2655 /* Decode the next instruction at MRA, according to OPC. 2656 The operation to be performed is returned. 2657 The number of operands, will be placed in N_OPERANDS. 2658 The operands themselved into OPERANDS. */ 2659 static enum operator 2660 decode_operation (const struct opcode *opc, 2661 struct mem_read_abstraction_base *mra, 2662 int *n_operands, struct operand **operands) 2663 { 2664 enum operator op = opc->operator; 2665 if (opc->discriminator) 2666 op = opc->discriminator (mra, opc->operator); 2667 2668 if (opc->operands) 2669 opc->operands (mra, n_operands, operands); 2670 2671 if (opc->operands2) 2672 opc->operands2 (mra, n_operands, operands); 2673 2674 return op; 2675 } 2676 2677 int 2678 decode_s12z (enum operator *myoperator, short *osize, 2679 int *n_operands, struct operand **operands, 2680 struct mem_read_abstraction_base *mra) 2681 { 2682 int n_bytes = 0; 2683 bfd_byte byte; 2684 2685 int status = mra->read (mra, 0, 1, &byte); 2686 if (status != 0) 2687 return status; 2688 2689 mra->advance (mra); 2690 2691 const struct opcode *opc = page1 + byte; 2692 if (byte == PAGE2_PREBYTE) 2693 { 2694 /* Opcodes in page2 have an additional byte */ 2695 n_bytes++; 2696 2697 bfd_byte byte2; 2698 mra->read (mra, 0, 1, &byte2); 2699 mra->advance (mra); 2700 opc = page2 + byte2; 2701 } 2702 *myoperator = decode_operation (opc, mra, n_operands, operands); 2703 *osize = opc->osize; 2704 2705 /* Return the number of bytes in the instruction. */ 2706 n_bytes += (opc && opc->insn_bytes) ? opc->insn_bytes (mra) : 0; 2707 2708 return n_bytes; 2709 } 2710 2711
Indexes created Fri Apr 10 00:22:58 UTC 2026