semcrisv32f-switch.c revision 1.1.1.10.2.1
1 /* Simulator instruction semantics for crisv32f. 2 3 THIS FILE IS MACHINE GENERATED WITH CGEN. 4 5 Copyright (C) 1996-2024 Free Software Foundation, Inc. 6 7 This file is part of the GNU simulators. 8 9 This file is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 3, or (at your option) 12 any later version. 13 14 It is distributed in the hope that it will be useful, but WITHOUT 15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 17 License for more details. 18 19 You should have received a copy of the GNU General Public License along 20 with this program; if not, write to the Free Software Foundation, Inc., 21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. 22 23 */ 24 25 #ifdef DEFINE_LABELS 26 27 /* The labels have the case they have because the enum of insn types 28 is all uppercase and in the non-stdc case the insn symbol is built 29 into the enum name. */ 30 31 static struct { 32 int index; 33 void *label; 34 } labels[] = { 35 { CRISV32F_INSN_X_INVALID, && case_sem_INSN_X_INVALID }, 36 { CRISV32F_INSN_X_AFTER, && case_sem_INSN_X_AFTER }, 37 { CRISV32F_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE }, 38 { CRISV32F_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN }, 39 { CRISV32F_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN }, 40 { CRISV32F_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN }, 41 { CRISV32F_INSN_MOVE_B_R, && case_sem_INSN_MOVE_B_R }, 42 { CRISV32F_INSN_MOVE_W_R, && case_sem_INSN_MOVE_W_R }, 43 { CRISV32F_INSN_MOVE_D_R, && case_sem_INSN_MOVE_D_R }, 44 { CRISV32F_INSN_MOVEQ, && case_sem_INSN_MOVEQ }, 45 { CRISV32F_INSN_MOVS_B_R, && case_sem_INSN_MOVS_B_R }, 46 { CRISV32F_INSN_MOVS_W_R, && case_sem_INSN_MOVS_W_R }, 47 { CRISV32F_INSN_MOVU_B_R, && case_sem_INSN_MOVU_B_R }, 48 { CRISV32F_INSN_MOVU_W_R, && case_sem_INSN_MOVU_W_R }, 49 { CRISV32F_INSN_MOVECBR, && case_sem_INSN_MOVECBR }, 50 { CRISV32F_INSN_MOVECWR, && case_sem_INSN_MOVECWR }, 51 { CRISV32F_INSN_MOVECDR, && case_sem_INSN_MOVECDR }, 52 { CRISV32F_INSN_MOVSCBR, && case_sem_INSN_MOVSCBR }, 53 { CRISV32F_INSN_MOVSCWR, && case_sem_INSN_MOVSCWR }, 54 { CRISV32F_INSN_MOVUCBR, && case_sem_INSN_MOVUCBR }, 55 { CRISV32F_INSN_MOVUCWR, && case_sem_INSN_MOVUCWR }, 56 { CRISV32F_INSN_ADDQ, && case_sem_INSN_ADDQ }, 57 { CRISV32F_INSN_SUBQ, && case_sem_INSN_SUBQ }, 58 { CRISV32F_INSN_CMP_R_B_R, && case_sem_INSN_CMP_R_B_R }, 59 { CRISV32F_INSN_CMP_R_W_R, && case_sem_INSN_CMP_R_W_R }, 60 { CRISV32F_INSN_CMP_R_D_R, && case_sem_INSN_CMP_R_D_R }, 61 { CRISV32F_INSN_CMP_M_B_M, && case_sem_INSN_CMP_M_B_M }, 62 { CRISV32F_INSN_CMP_M_W_M, && case_sem_INSN_CMP_M_W_M }, 63 { CRISV32F_INSN_CMP_M_D_M, && case_sem_INSN_CMP_M_D_M }, 64 { CRISV32F_INSN_CMPCBR, && case_sem_INSN_CMPCBR }, 65 { CRISV32F_INSN_CMPCWR, && case_sem_INSN_CMPCWR }, 66 { CRISV32F_INSN_CMPCDR, && case_sem_INSN_CMPCDR }, 67 { CRISV32F_INSN_CMPQ, && case_sem_INSN_CMPQ }, 68 { CRISV32F_INSN_CMPS_M_B_M, && case_sem_INSN_CMPS_M_B_M }, 69 { CRISV32F_INSN_CMPS_M_W_M, && case_sem_INSN_CMPS_M_W_M }, 70 { CRISV32F_INSN_CMPSCBR, && case_sem_INSN_CMPSCBR }, 71 { CRISV32F_INSN_CMPSCWR, && case_sem_INSN_CMPSCWR }, 72 { CRISV32F_INSN_CMPU_M_B_M, && case_sem_INSN_CMPU_M_B_M }, 73 { CRISV32F_INSN_CMPU_M_W_M, && case_sem_INSN_CMPU_M_W_M }, 74 { CRISV32F_INSN_CMPUCBR, && case_sem_INSN_CMPUCBR }, 75 { CRISV32F_INSN_CMPUCWR, && case_sem_INSN_CMPUCWR }, 76 { CRISV32F_INSN_MOVE_M_B_M, && case_sem_INSN_MOVE_M_B_M }, 77 { CRISV32F_INSN_MOVE_M_W_M, && case_sem_INSN_MOVE_M_W_M }, 78 { CRISV32F_INSN_MOVE_M_D_M, && case_sem_INSN_MOVE_M_D_M }, 79 { CRISV32F_INSN_MOVS_M_B_M, && case_sem_INSN_MOVS_M_B_M }, 80 { CRISV32F_INSN_MOVS_M_W_M, && case_sem_INSN_MOVS_M_W_M }, 81 { CRISV32F_INSN_MOVU_M_B_M, && case_sem_INSN_MOVU_M_B_M }, 82 { CRISV32F_INSN_MOVU_M_W_M, && case_sem_INSN_MOVU_M_W_M }, 83 { CRISV32F_INSN_MOVE_R_SPRV32, && case_sem_INSN_MOVE_R_SPRV32 }, 84 { CRISV32F_INSN_MOVE_SPR_RV32, && case_sem_INSN_MOVE_SPR_RV32 }, 85 { CRISV32F_INSN_MOVE_M_SPRV32, && case_sem_INSN_MOVE_M_SPRV32 }, 86 { CRISV32F_INSN_MOVE_C_SPRV32_P2, && case_sem_INSN_MOVE_C_SPRV32_P2 }, 87 { CRISV32F_INSN_MOVE_C_SPRV32_P3, && case_sem_INSN_MOVE_C_SPRV32_P3 }, 88 { CRISV32F_INSN_MOVE_C_SPRV32_P5, && case_sem_INSN_MOVE_C_SPRV32_P5 }, 89 { CRISV32F_INSN_MOVE_C_SPRV32_P6, && case_sem_INSN_MOVE_C_SPRV32_P6 }, 90 { CRISV32F_INSN_MOVE_C_SPRV32_P7, && case_sem_INSN_MOVE_C_SPRV32_P7 }, 91 { CRISV32F_INSN_MOVE_C_SPRV32_P9, && case_sem_INSN_MOVE_C_SPRV32_P9 }, 92 { CRISV32F_INSN_MOVE_C_SPRV32_P10, && case_sem_INSN_MOVE_C_SPRV32_P10 }, 93 { CRISV32F_INSN_MOVE_C_SPRV32_P11, && case_sem_INSN_MOVE_C_SPRV32_P11 }, 94 { CRISV32F_INSN_MOVE_C_SPRV32_P12, && case_sem_INSN_MOVE_C_SPRV32_P12 }, 95 { CRISV32F_INSN_MOVE_C_SPRV32_P13, && case_sem_INSN_MOVE_C_SPRV32_P13 }, 96 { CRISV32F_INSN_MOVE_C_SPRV32_P14, && case_sem_INSN_MOVE_C_SPRV32_P14 }, 97 { CRISV32F_INSN_MOVE_C_SPRV32_P15, && case_sem_INSN_MOVE_C_SPRV32_P15 }, 98 { CRISV32F_INSN_MOVE_SPR_MV32, && case_sem_INSN_MOVE_SPR_MV32 }, 99 { CRISV32F_INSN_MOVE_SS_R, && case_sem_INSN_MOVE_SS_R }, 100 { CRISV32F_INSN_MOVE_R_SS, && case_sem_INSN_MOVE_R_SS }, 101 { CRISV32F_INSN_MOVEM_R_M_V32, && case_sem_INSN_MOVEM_R_M_V32 }, 102 { CRISV32F_INSN_MOVEM_M_R_V32, && case_sem_INSN_MOVEM_M_R_V32 }, 103 { CRISV32F_INSN_ADD_B_R, && case_sem_INSN_ADD_B_R }, 104 { CRISV32F_INSN_ADD_W_R, && case_sem_INSN_ADD_W_R }, 105 { CRISV32F_INSN_ADD_D_R, && case_sem_INSN_ADD_D_R }, 106 { CRISV32F_INSN_ADD_M_B_M, && case_sem_INSN_ADD_M_B_M }, 107 { CRISV32F_INSN_ADD_M_W_M, && case_sem_INSN_ADD_M_W_M }, 108 { CRISV32F_INSN_ADD_M_D_M, && case_sem_INSN_ADD_M_D_M }, 109 { CRISV32F_INSN_ADDCBR, && case_sem_INSN_ADDCBR }, 110 { CRISV32F_INSN_ADDCWR, && case_sem_INSN_ADDCWR }, 111 { CRISV32F_INSN_ADDCDR, && case_sem_INSN_ADDCDR }, 112 { CRISV32F_INSN_ADDS_B_R, && case_sem_INSN_ADDS_B_R }, 113 { CRISV32F_INSN_ADDS_W_R, && case_sem_INSN_ADDS_W_R }, 114 { CRISV32F_INSN_ADDS_M_B_M, && case_sem_INSN_ADDS_M_B_M }, 115 { CRISV32F_INSN_ADDS_M_W_M, && case_sem_INSN_ADDS_M_W_M }, 116 { CRISV32F_INSN_ADDSCBR, && case_sem_INSN_ADDSCBR }, 117 { CRISV32F_INSN_ADDSCWR, && case_sem_INSN_ADDSCWR }, 118 { CRISV32F_INSN_ADDU_B_R, && case_sem_INSN_ADDU_B_R }, 119 { CRISV32F_INSN_ADDU_W_R, && case_sem_INSN_ADDU_W_R }, 120 { CRISV32F_INSN_ADDU_M_B_M, && case_sem_INSN_ADDU_M_B_M }, 121 { CRISV32F_INSN_ADDU_M_W_M, && case_sem_INSN_ADDU_M_W_M }, 122 { CRISV32F_INSN_ADDUCBR, && case_sem_INSN_ADDUCBR }, 123 { CRISV32F_INSN_ADDUCWR, && case_sem_INSN_ADDUCWR }, 124 { CRISV32F_INSN_SUB_B_R, && case_sem_INSN_SUB_B_R }, 125 { CRISV32F_INSN_SUB_W_R, && case_sem_INSN_SUB_W_R }, 126 { CRISV32F_INSN_SUB_D_R, && case_sem_INSN_SUB_D_R }, 127 { CRISV32F_INSN_SUB_M_B_M, && case_sem_INSN_SUB_M_B_M }, 128 { CRISV32F_INSN_SUB_M_W_M, && case_sem_INSN_SUB_M_W_M }, 129 { CRISV32F_INSN_SUB_M_D_M, && case_sem_INSN_SUB_M_D_M }, 130 { CRISV32F_INSN_SUBCBR, && case_sem_INSN_SUBCBR }, 131 { CRISV32F_INSN_SUBCWR, && case_sem_INSN_SUBCWR }, 132 { CRISV32F_INSN_SUBCDR, && case_sem_INSN_SUBCDR }, 133 { CRISV32F_INSN_SUBS_B_R, && case_sem_INSN_SUBS_B_R }, 134 { CRISV32F_INSN_SUBS_W_R, && case_sem_INSN_SUBS_W_R }, 135 { CRISV32F_INSN_SUBS_M_B_M, && case_sem_INSN_SUBS_M_B_M }, 136 { CRISV32F_INSN_SUBS_M_W_M, && case_sem_INSN_SUBS_M_W_M }, 137 { CRISV32F_INSN_SUBSCBR, && case_sem_INSN_SUBSCBR }, 138 { CRISV32F_INSN_SUBSCWR, && case_sem_INSN_SUBSCWR }, 139 { CRISV32F_INSN_SUBU_B_R, && case_sem_INSN_SUBU_B_R }, 140 { CRISV32F_INSN_SUBU_W_R, && case_sem_INSN_SUBU_W_R }, 141 { CRISV32F_INSN_SUBU_M_B_M, && case_sem_INSN_SUBU_M_B_M }, 142 { CRISV32F_INSN_SUBU_M_W_M, && case_sem_INSN_SUBU_M_W_M }, 143 { CRISV32F_INSN_SUBUCBR, && case_sem_INSN_SUBUCBR }, 144 { CRISV32F_INSN_SUBUCWR, && case_sem_INSN_SUBUCWR }, 145 { CRISV32F_INSN_ADDC_R, && case_sem_INSN_ADDC_R }, 146 { CRISV32F_INSN_ADDC_M, && case_sem_INSN_ADDC_M }, 147 { CRISV32F_INSN_ADDC_C, && case_sem_INSN_ADDC_C }, 148 { CRISV32F_INSN_LAPC_D, && case_sem_INSN_LAPC_D }, 149 { CRISV32F_INSN_LAPCQ, && case_sem_INSN_LAPCQ }, 150 { CRISV32F_INSN_ADDI_B_R, && case_sem_INSN_ADDI_B_R }, 151 { CRISV32F_INSN_ADDI_W_R, && case_sem_INSN_ADDI_W_R }, 152 { CRISV32F_INSN_ADDI_D_R, && case_sem_INSN_ADDI_D_R }, 153 { CRISV32F_INSN_NEG_B_R, && case_sem_INSN_NEG_B_R }, 154 { CRISV32F_INSN_NEG_W_R, && case_sem_INSN_NEG_W_R }, 155 { CRISV32F_INSN_NEG_D_R, && case_sem_INSN_NEG_D_R }, 156 { CRISV32F_INSN_TEST_M_B_M, && case_sem_INSN_TEST_M_B_M }, 157 { CRISV32F_INSN_TEST_M_W_M, && case_sem_INSN_TEST_M_W_M }, 158 { CRISV32F_INSN_TEST_M_D_M, && case_sem_INSN_TEST_M_D_M }, 159 { CRISV32F_INSN_MOVE_R_M_B_M, && case_sem_INSN_MOVE_R_M_B_M }, 160 { CRISV32F_INSN_MOVE_R_M_W_M, && case_sem_INSN_MOVE_R_M_W_M }, 161 { CRISV32F_INSN_MOVE_R_M_D_M, && case_sem_INSN_MOVE_R_M_D_M }, 162 { CRISV32F_INSN_MULS_B, && case_sem_INSN_MULS_B }, 163 { CRISV32F_INSN_MULS_W, && case_sem_INSN_MULS_W }, 164 { CRISV32F_INSN_MULS_D, && case_sem_INSN_MULS_D }, 165 { CRISV32F_INSN_MULU_B, && case_sem_INSN_MULU_B }, 166 { CRISV32F_INSN_MULU_W, && case_sem_INSN_MULU_W }, 167 { CRISV32F_INSN_MULU_D, && case_sem_INSN_MULU_D }, 168 { CRISV32F_INSN_MCP, && case_sem_INSN_MCP }, 169 { CRISV32F_INSN_DSTEP, && case_sem_INSN_DSTEP }, 170 { CRISV32F_INSN_ABS, && case_sem_INSN_ABS }, 171 { CRISV32F_INSN_AND_B_R, && case_sem_INSN_AND_B_R }, 172 { CRISV32F_INSN_AND_W_R, && case_sem_INSN_AND_W_R }, 173 { CRISV32F_INSN_AND_D_R, && case_sem_INSN_AND_D_R }, 174 { CRISV32F_INSN_AND_M_B_M, && case_sem_INSN_AND_M_B_M }, 175 { CRISV32F_INSN_AND_M_W_M, && case_sem_INSN_AND_M_W_M }, 176 { CRISV32F_INSN_AND_M_D_M, && case_sem_INSN_AND_M_D_M }, 177 { CRISV32F_INSN_ANDCBR, && case_sem_INSN_ANDCBR }, 178 { CRISV32F_INSN_ANDCWR, && case_sem_INSN_ANDCWR }, 179 { CRISV32F_INSN_ANDCDR, && case_sem_INSN_ANDCDR }, 180 { CRISV32F_INSN_ANDQ, && case_sem_INSN_ANDQ }, 181 { CRISV32F_INSN_ORR_B_R, && case_sem_INSN_ORR_B_R }, 182 { CRISV32F_INSN_ORR_W_R, && case_sem_INSN_ORR_W_R }, 183 { CRISV32F_INSN_ORR_D_R, && case_sem_INSN_ORR_D_R }, 184 { CRISV32F_INSN_OR_M_B_M, && case_sem_INSN_OR_M_B_M }, 185 { CRISV32F_INSN_OR_M_W_M, && case_sem_INSN_OR_M_W_M }, 186 { CRISV32F_INSN_OR_M_D_M, && case_sem_INSN_OR_M_D_M }, 187 { CRISV32F_INSN_ORCBR, && case_sem_INSN_ORCBR }, 188 { CRISV32F_INSN_ORCWR, && case_sem_INSN_ORCWR }, 189 { CRISV32F_INSN_ORCDR, && case_sem_INSN_ORCDR }, 190 { CRISV32F_INSN_ORQ, && case_sem_INSN_ORQ }, 191 { CRISV32F_INSN_XOR, && case_sem_INSN_XOR }, 192 { CRISV32F_INSN_SWAP, && case_sem_INSN_SWAP }, 193 { CRISV32F_INSN_ASRR_B_R, && case_sem_INSN_ASRR_B_R }, 194 { CRISV32F_INSN_ASRR_W_R, && case_sem_INSN_ASRR_W_R }, 195 { CRISV32F_INSN_ASRR_D_R, && case_sem_INSN_ASRR_D_R }, 196 { CRISV32F_INSN_ASRQ, && case_sem_INSN_ASRQ }, 197 { CRISV32F_INSN_LSRR_B_R, && case_sem_INSN_LSRR_B_R }, 198 { CRISV32F_INSN_LSRR_W_R, && case_sem_INSN_LSRR_W_R }, 199 { CRISV32F_INSN_LSRR_D_R, && case_sem_INSN_LSRR_D_R }, 200 { CRISV32F_INSN_LSRQ, && case_sem_INSN_LSRQ }, 201 { CRISV32F_INSN_LSLR_B_R, && case_sem_INSN_LSLR_B_R }, 202 { CRISV32F_INSN_LSLR_W_R, && case_sem_INSN_LSLR_W_R }, 203 { CRISV32F_INSN_LSLR_D_R, && case_sem_INSN_LSLR_D_R }, 204 { CRISV32F_INSN_LSLQ, && case_sem_INSN_LSLQ }, 205 { CRISV32F_INSN_BTST, && case_sem_INSN_BTST }, 206 { CRISV32F_INSN_BTSTQ, && case_sem_INSN_BTSTQ }, 207 { CRISV32F_INSN_SETF, && case_sem_INSN_SETF }, 208 { CRISV32F_INSN_CLEARF, && case_sem_INSN_CLEARF }, 209 { CRISV32F_INSN_RFE, && case_sem_INSN_RFE }, 210 { CRISV32F_INSN_SFE, && case_sem_INSN_SFE }, 211 { CRISV32F_INSN_RFG, && case_sem_INSN_RFG }, 212 { CRISV32F_INSN_RFN, && case_sem_INSN_RFN }, 213 { CRISV32F_INSN_HALT, && case_sem_INSN_HALT }, 214 { CRISV32F_INSN_BCC_B, && case_sem_INSN_BCC_B }, 215 { CRISV32F_INSN_BA_B, && case_sem_INSN_BA_B }, 216 { CRISV32F_INSN_BCC_W, && case_sem_INSN_BCC_W }, 217 { CRISV32F_INSN_BA_W, && case_sem_INSN_BA_W }, 218 { CRISV32F_INSN_JAS_R, && case_sem_INSN_JAS_R }, 219 { CRISV32F_INSN_JAS_C, && case_sem_INSN_JAS_C }, 220 { CRISV32F_INSN_JUMP_P, && case_sem_INSN_JUMP_P }, 221 { CRISV32F_INSN_BAS_C, && case_sem_INSN_BAS_C }, 222 { CRISV32F_INSN_JASC_R, && case_sem_INSN_JASC_R }, 223 { CRISV32F_INSN_JASC_C, && case_sem_INSN_JASC_C }, 224 { CRISV32F_INSN_BASC_C, && case_sem_INSN_BASC_C }, 225 { CRISV32F_INSN_BREAK, && case_sem_INSN_BREAK }, 226 { CRISV32F_INSN_BOUND_R_B_R, && case_sem_INSN_BOUND_R_B_R }, 227 { CRISV32F_INSN_BOUND_R_W_R, && case_sem_INSN_BOUND_R_W_R }, 228 { CRISV32F_INSN_BOUND_R_D_R, && case_sem_INSN_BOUND_R_D_R }, 229 { CRISV32F_INSN_BOUND_CB, && case_sem_INSN_BOUND_CB }, 230 { CRISV32F_INSN_BOUND_CW, && case_sem_INSN_BOUND_CW }, 231 { CRISV32F_INSN_BOUND_CD, && case_sem_INSN_BOUND_CD }, 232 { CRISV32F_INSN_SCC, && case_sem_INSN_SCC }, 233 { CRISV32F_INSN_LZ, && case_sem_INSN_LZ }, 234 { CRISV32F_INSN_ADDOQ, && case_sem_INSN_ADDOQ }, 235 { CRISV32F_INSN_ADDO_M_B_M, && case_sem_INSN_ADDO_M_B_M }, 236 { CRISV32F_INSN_ADDO_M_W_M, && case_sem_INSN_ADDO_M_W_M }, 237 { CRISV32F_INSN_ADDO_M_D_M, && case_sem_INSN_ADDO_M_D_M }, 238 { CRISV32F_INSN_ADDO_CB, && case_sem_INSN_ADDO_CB }, 239 { CRISV32F_INSN_ADDO_CW, && case_sem_INSN_ADDO_CW }, 240 { CRISV32F_INSN_ADDO_CD, && case_sem_INSN_ADDO_CD }, 241 { CRISV32F_INSN_ADDI_ACR_B_R, && case_sem_INSN_ADDI_ACR_B_R }, 242 { CRISV32F_INSN_ADDI_ACR_W_R, && case_sem_INSN_ADDI_ACR_W_R }, 243 { CRISV32F_INSN_ADDI_ACR_D_R, && case_sem_INSN_ADDI_ACR_D_R }, 244 { CRISV32F_INSN_FIDXI, && case_sem_INSN_FIDXI }, 245 { CRISV32F_INSN_FTAGI, && case_sem_INSN_FTAGI }, 246 { CRISV32F_INSN_FIDXD, && case_sem_INSN_FIDXD }, 247 { CRISV32F_INSN_FTAGD, && case_sem_INSN_FTAGD }, 248 { 0, 0 } 249 }; 250 int i; 251 252 for (i = 0; labels[i].label != 0; ++i) 253 { 254 #if FAST_P 255 CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label; 256 #else 257 CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label; 258 #endif 259 } 260 261 #undef DEFINE_LABELS 262 #endif /* DEFINE_LABELS */ 263 264 #ifdef DEFINE_SWITCH 265 266 /* If hyper-fast [well not unnecessarily slow] execution is selected, turn 267 off frills like tracing and profiling. */ 268 /* FIXME: A better way would be to have CGEN_TRACE_RESULT check for something 269 that can cause it to be optimized out. Another way would be to emit 270 special handlers into the instruction "stream". */ 271 272 #if FAST_P 273 #undef CGEN_TRACE_RESULT 274 #define CGEN_TRACE_RESULT(cpu, abuf, name, type, val) 275 #endif 276 277 #undef GET_ATTR 278 #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) 279 280 { 281 282 #if WITH_SCACHE_PBB 283 284 /* Branch to next handler without going around main loop. */ 285 #define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case 286 SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) 287 288 #else /* ! WITH_SCACHE_PBB */ 289 290 #define NEXT(vpc) BREAK (sem) 291 #ifdef __GNUC__ 292 #if FAST_P 293 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab) 294 #else 295 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab) 296 #endif 297 #else 298 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num) 299 #endif 300 301 #endif /* ! WITH_SCACHE_PBB */ 302 303 { 304 305 CASE (sem, INSN_X_INVALID) : /* --invalid-- */ 306 { 307 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 308 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 309 #define FLD(f) abuf->fields.sfmt_empty.f 310 int UNUSED written = 0; 311 IADDR UNUSED pc = abuf->addr; 312 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 313 314 { 315 /* Update the recorded pc in the cpu state struct. 316 Only necessary for WITH_SCACHE case, but to avoid the 317 conditional compilation .... */ 318 SET_H_PC (pc); 319 /* Virtual insns have zero size. Overwrite vpc with address of next insn 320 using the default-insn-bitsize spec. When executing insns in parallel 321 we may want to queue the fault and continue execution. */ 322 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 323 vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); 324 } 325 326 #undef FLD 327 } 328 NEXT (vpc); 329 330 CASE (sem, INSN_X_AFTER) : /* --after-- */ 331 { 332 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 333 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 334 #define FLD(f) abuf->fields.sfmt_empty.f 335 int UNUSED written = 0; 336 IADDR UNUSED pc = abuf->addr; 337 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 338 339 { 340 #if WITH_SCACHE_PBB_CRISV32F 341 crisv32f_pbb_after (current_cpu, sem_arg); 342 #endif 343 } 344 345 #undef FLD 346 } 347 NEXT (vpc); 348 349 CASE (sem, INSN_X_BEFORE) : /* --before-- */ 350 { 351 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 352 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 353 #define FLD(f) abuf->fields.sfmt_empty.f 354 int UNUSED written = 0; 355 IADDR UNUSED pc = abuf->addr; 356 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 357 358 { 359 #if WITH_SCACHE_PBB_CRISV32F 360 crisv32f_pbb_before (current_cpu, sem_arg); 361 #endif 362 } 363 364 #undef FLD 365 } 366 NEXT (vpc); 367 368 CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */ 369 { 370 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 371 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 372 #define FLD(f) abuf->fields.sfmt_empty.f 373 int UNUSED written = 0; 374 IADDR UNUSED pc = abuf->addr; 375 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 376 377 { 378 #if WITH_SCACHE_PBB_CRISV32F 379 #ifdef DEFINE_SWITCH 380 vpc = crisv32f_pbb_cti_chain (current_cpu, sem_arg, 381 pbb_br_type, pbb_br_npc); 382 BREAK (sem); 383 #else 384 /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ 385 vpc = crisv32f_pbb_cti_chain (current_cpu, sem_arg, 386 CPU_PBB_BR_TYPE (current_cpu), 387 CPU_PBB_BR_NPC (current_cpu)); 388 #endif 389 #endif 390 } 391 392 #undef FLD 393 } 394 NEXT (vpc); 395 396 CASE (sem, INSN_X_CHAIN) : /* --chain-- */ 397 { 398 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 399 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 400 #define FLD(f) abuf->fields.sfmt_empty.f 401 int UNUSED written = 0; 402 IADDR UNUSED pc = abuf->addr; 403 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 404 405 { 406 #if WITH_SCACHE_PBB_CRISV32F 407 vpc = crisv32f_pbb_chain (current_cpu, sem_arg); 408 #ifdef DEFINE_SWITCH 409 BREAK (sem); 410 #endif 411 #endif 412 } 413 414 #undef FLD 415 } 416 NEXT (vpc); 417 418 CASE (sem, INSN_X_BEGIN) : /* --begin-- */ 419 { 420 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 421 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 422 #define FLD(f) abuf->fields.sfmt_empty.f 423 int UNUSED written = 0; 424 IADDR UNUSED pc = abuf->addr; 425 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 426 427 { 428 #if WITH_SCACHE_PBB_CRISV32F 429 #if defined DEFINE_SWITCH || defined FAST_P 430 /* In the switch case FAST_P is a constant, allowing several optimizations 431 in any called inline functions. */ 432 vpc = crisv32f_pbb_begin (current_cpu, FAST_P); 433 #else 434 #if 0 /* cgen engine can't handle dynamic fast/full switching yet. */ 435 vpc = crisv32f_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); 436 #else 437 vpc = crisv32f_pbb_begin (current_cpu, 0); 438 #endif 439 #endif 440 #endif 441 } 442 443 #undef FLD 444 } 445 NEXT (vpc); 446 447 CASE (sem, INSN_MOVE_B_R) : /* move.b move.m ${Rs},${Rd} */ 448 { 449 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 450 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 451 #define FLD(f) abuf->fields.sfmt_addc_m.f 452 int UNUSED written = 0; 453 IADDR UNUSED pc = abuf->addr; 454 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 455 456 { 457 QI tmp_newval; 458 tmp_newval = GET_H_GR (FLD (f_operand1)); 459 { 460 SI tmp_oldregval; 461 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 462 { 463 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00)); 464 SET_H_GR (FLD (f_operand2), opval); 465 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 466 } 467 } 468 { 469 { 470 BI opval = LTQI (tmp_newval, 0); 471 CPU (h_nbit) = opval; 472 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 473 } 474 { 475 BI opval = ANDIF (EQQI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 476 CPU (h_zbit) = opval; 477 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 478 } 479 SET_H_CBIT_MOVE (0); 480 SET_H_VBIT_MOVE (0); 481 { 482 { 483 BI opval = 0; 484 CPU (h_xbit) = opval; 485 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 486 } 487 { 488 BI opval = 0; 489 SET_H_INSN_PREFIXED_P (opval); 490 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 491 } 492 } 493 } 494 } 495 496 #undef FLD 497 } 498 NEXT (vpc); 499 500 CASE (sem, INSN_MOVE_W_R) : /* move.w move.m ${Rs},${Rd} */ 501 { 502 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 503 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 504 #define FLD(f) abuf->fields.sfmt_addc_m.f 505 int UNUSED written = 0; 506 IADDR UNUSED pc = abuf->addr; 507 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 508 509 { 510 HI tmp_newval; 511 tmp_newval = GET_H_GR (FLD (f_operand1)); 512 { 513 SI tmp_oldregval; 514 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 515 { 516 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 517 SET_H_GR (FLD (f_operand2), opval); 518 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 519 } 520 } 521 { 522 { 523 BI opval = LTHI (tmp_newval, 0); 524 CPU (h_nbit) = opval; 525 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 526 } 527 { 528 BI opval = ANDIF (EQHI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 529 CPU (h_zbit) = opval; 530 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 531 } 532 SET_H_CBIT_MOVE (0); 533 SET_H_VBIT_MOVE (0); 534 { 535 { 536 BI opval = 0; 537 CPU (h_xbit) = opval; 538 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 539 } 540 { 541 BI opval = 0; 542 SET_H_INSN_PREFIXED_P (opval); 543 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 544 } 545 } 546 } 547 } 548 549 #undef FLD 550 } 551 NEXT (vpc); 552 553 CASE (sem, INSN_MOVE_D_R) : /* move.d move.m ${Rs},${Rd} */ 554 { 555 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 556 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 557 #define FLD(f) abuf->fields.sfmt_addc_m.f 558 int UNUSED written = 0; 559 IADDR UNUSED pc = abuf->addr; 560 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 561 562 { 563 SI tmp_newval; 564 tmp_newval = GET_H_GR (FLD (f_operand1)); 565 { 566 SI opval = tmp_newval; 567 SET_H_GR (FLD (f_operand2), opval); 568 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 569 } 570 { 571 { 572 BI opval = LTSI (tmp_newval, 0); 573 CPU (h_nbit) = opval; 574 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 575 } 576 { 577 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 578 CPU (h_zbit) = opval; 579 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 580 } 581 SET_H_CBIT_MOVE (0); 582 SET_H_VBIT_MOVE (0); 583 { 584 { 585 BI opval = 0; 586 CPU (h_xbit) = opval; 587 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 588 } 589 { 590 BI opval = 0; 591 SET_H_INSN_PREFIXED_P (opval); 592 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 593 } 594 } 595 } 596 } 597 598 #undef FLD 599 } 600 NEXT (vpc); 601 602 CASE (sem, INSN_MOVEQ) : /* moveq $i,$Rd */ 603 { 604 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 605 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 606 #define FLD(f) abuf->fields.sfmt_moveq.f 607 int UNUSED written = 0; 608 IADDR UNUSED pc = abuf->addr; 609 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 610 611 { 612 SI tmp_newval; 613 tmp_newval = FLD (f_s6); 614 { 615 SI opval = tmp_newval; 616 SET_H_GR (FLD (f_operand2), opval); 617 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 618 } 619 { 620 SET_H_NBIT_MOVE (LTSI (tmp_newval, 0)); 621 SET_H_ZBIT_MOVE (ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)))); 622 SET_H_CBIT_MOVE (0); 623 SET_H_VBIT_MOVE (0); 624 { 625 { 626 BI opval = 0; 627 CPU (h_xbit) = opval; 628 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 629 } 630 { 631 BI opval = 0; 632 SET_H_INSN_PREFIXED_P (opval); 633 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 634 } 635 } 636 } 637 } 638 639 #undef FLD 640 } 641 NEXT (vpc); 642 643 CASE (sem, INSN_MOVS_B_R) : /* movs.b movs.m ${Rs},${Rd} */ 644 { 645 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 646 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 647 #define FLD(f) abuf->fields.sfmt_muls_b.f 648 int UNUSED written = 0; 649 IADDR UNUSED pc = abuf->addr; 650 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 651 652 { 653 QI tmp_tmpops; 654 SI tmp_newval; 655 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 656 tmp_newval = EXTQISI (tmp_tmpops); 657 { 658 SI opval = tmp_newval; 659 SET_H_GR (FLD (f_operand2), opval); 660 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 661 } 662 { 663 { 664 BI opval = LTSI (tmp_newval, 0); 665 CPU (h_nbit) = opval; 666 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 667 } 668 { 669 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 670 CPU (h_zbit) = opval; 671 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 672 } 673 SET_H_CBIT_MOVE (0); 674 SET_H_VBIT_MOVE (0); 675 { 676 { 677 BI opval = 0; 678 CPU (h_xbit) = opval; 679 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 680 } 681 { 682 BI opval = 0; 683 SET_H_INSN_PREFIXED_P (opval); 684 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 685 } 686 } 687 } 688 } 689 690 #undef FLD 691 } 692 NEXT (vpc); 693 694 CASE (sem, INSN_MOVS_W_R) : /* movs.w movs.m ${Rs},${Rd} */ 695 { 696 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 697 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 698 #define FLD(f) abuf->fields.sfmt_muls_b.f 699 int UNUSED written = 0; 700 IADDR UNUSED pc = abuf->addr; 701 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 702 703 { 704 HI tmp_tmpops; 705 SI tmp_newval; 706 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 707 tmp_newval = EXTHISI (tmp_tmpops); 708 { 709 SI opval = tmp_newval; 710 SET_H_GR (FLD (f_operand2), opval); 711 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 712 } 713 { 714 { 715 BI opval = LTSI (tmp_newval, 0); 716 CPU (h_nbit) = opval; 717 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 718 } 719 { 720 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 721 CPU (h_zbit) = opval; 722 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 723 } 724 SET_H_CBIT_MOVE (0); 725 SET_H_VBIT_MOVE (0); 726 { 727 { 728 BI opval = 0; 729 CPU (h_xbit) = opval; 730 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 731 } 732 { 733 BI opval = 0; 734 SET_H_INSN_PREFIXED_P (opval); 735 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 736 } 737 } 738 } 739 } 740 741 #undef FLD 742 } 743 NEXT (vpc); 744 745 CASE (sem, INSN_MOVU_B_R) : /* movu.b movu.m ${Rs},${Rd} */ 746 { 747 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 748 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 749 #define FLD(f) abuf->fields.sfmt_muls_b.f 750 int UNUSED written = 0; 751 IADDR UNUSED pc = abuf->addr; 752 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 753 754 { 755 QI tmp_tmpops; 756 SI tmp_newval; 757 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 758 tmp_newval = ZEXTQISI (tmp_tmpops); 759 { 760 SI opval = tmp_newval; 761 SET_H_GR (FLD (f_operand2), opval); 762 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 763 } 764 { 765 { 766 BI opval = LTSI (tmp_newval, 0); 767 CPU (h_nbit) = opval; 768 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 769 } 770 { 771 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 772 CPU (h_zbit) = opval; 773 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 774 } 775 SET_H_CBIT_MOVE (0); 776 SET_H_VBIT_MOVE (0); 777 { 778 { 779 BI opval = 0; 780 CPU (h_xbit) = opval; 781 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 782 } 783 { 784 BI opval = 0; 785 SET_H_INSN_PREFIXED_P (opval); 786 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 787 } 788 } 789 } 790 } 791 792 #undef FLD 793 } 794 NEXT (vpc); 795 796 CASE (sem, INSN_MOVU_W_R) : /* movu.w movu.m ${Rs},${Rd} */ 797 { 798 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 799 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 800 #define FLD(f) abuf->fields.sfmt_muls_b.f 801 int UNUSED written = 0; 802 IADDR UNUSED pc = abuf->addr; 803 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 804 805 { 806 HI tmp_tmpops; 807 SI tmp_newval; 808 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 809 tmp_newval = ZEXTHISI (tmp_tmpops); 810 { 811 SI opval = tmp_newval; 812 SET_H_GR (FLD (f_operand2), opval); 813 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 814 } 815 { 816 { 817 BI opval = LTSI (tmp_newval, 0); 818 CPU (h_nbit) = opval; 819 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 820 } 821 { 822 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 823 CPU (h_zbit) = opval; 824 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 825 } 826 SET_H_CBIT_MOVE (0); 827 SET_H_VBIT_MOVE (0); 828 { 829 { 830 BI opval = 0; 831 CPU (h_xbit) = opval; 832 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 833 } 834 { 835 BI opval = 0; 836 SET_H_INSN_PREFIXED_P (opval); 837 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 838 } 839 } 840 } 841 } 842 843 #undef FLD 844 } 845 NEXT (vpc); 846 847 CASE (sem, INSN_MOVECBR) : /* move.b ${sconst8},${Rd} */ 848 { 849 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 850 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 851 #define FLD(f) abuf->fields.sfmt_addcbr.f 852 int UNUSED written = 0; 853 IADDR UNUSED pc = abuf->addr; 854 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 855 856 { 857 QI tmp_newval; 858 tmp_newval = FLD (f_indir_pc__byte); 859 { 860 SI tmp_oldregval; 861 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 862 { 863 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00)); 864 SET_H_GR (FLD (f_operand2), opval); 865 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 866 } 867 } 868 { 869 { 870 BI opval = LTQI (tmp_newval, 0); 871 CPU (h_nbit) = opval; 872 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 873 } 874 { 875 BI opval = ANDIF (EQQI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 876 CPU (h_zbit) = opval; 877 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 878 } 879 SET_H_CBIT_MOVE (0); 880 SET_H_VBIT_MOVE (0); 881 { 882 { 883 BI opval = 0; 884 CPU (h_xbit) = opval; 885 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 886 } 887 { 888 BI opval = 0; 889 SET_H_INSN_PREFIXED_P (opval); 890 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 891 } 892 } 893 } 894 } 895 896 #undef FLD 897 } 898 NEXT (vpc); 899 900 CASE (sem, INSN_MOVECWR) : /* move.w ${sconst16},${Rd} */ 901 { 902 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 903 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 904 #define FLD(f) abuf->fields.sfmt_addcwr.f 905 int UNUSED written = 0; 906 IADDR UNUSED pc = abuf->addr; 907 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 908 909 { 910 HI tmp_newval; 911 tmp_newval = FLD (f_indir_pc__word); 912 { 913 SI tmp_oldregval; 914 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 915 { 916 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 917 SET_H_GR (FLD (f_operand2), opval); 918 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 919 } 920 } 921 { 922 { 923 BI opval = LTHI (tmp_newval, 0); 924 CPU (h_nbit) = opval; 925 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 926 } 927 { 928 BI opval = ANDIF (EQHI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 929 CPU (h_zbit) = opval; 930 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 931 } 932 SET_H_CBIT_MOVE (0); 933 SET_H_VBIT_MOVE (0); 934 { 935 { 936 BI opval = 0; 937 CPU (h_xbit) = opval; 938 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 939 } 940 { 941 BI opval = 0; 942 SET_H_INSN_PREFIXED_P (opval); 943 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 944 } 945 } 946 } 947 } 948 949 #undef FLD 950 } 951 NEXT (vpc); 952 953 CASE (sem, INSN_MOVECDR) : /* move.d ${const32},${Rd} */ 954 { 955 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 956 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 957 #define FLD(f) abuf->fields.sfmt_bound_cd.f 958 int UNUSED written = 0; 959 IADDR UNUSED pc = abuf->addr; 960 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 961 962 { 963 SI tmp_newval; 964 tmp_newval = FLD (f_indir_pc__dword); 965 { 966 SI opval = tmp_newval; 967 SET_H_GR (FLD (f_operand2), opval); 968 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 969 } 970 { 971 { 972 BI opval = LTSI (tmp_newval, 0); 973 CPU (h_nbit) = opval; 974 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 975 } 976 { 977 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 978 CPU (h_zbit) = opval; 979 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 980 } 981 SET_H_CBIT_MOVE (0); 982 SET_H_VBIT_MOVE (0); 983 { 984 { 985 BI opval = 0; 986 CPU (h_xbit) = opval; 987 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 988 } 989 { 990 BI opval = 0; 991 SET_H_INSN_PREFIXED_P (opval); 992 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 993 } 994 } 995 } 996 } 997 998 #undef FLD 999 } 1000 NEXT (vpc); 1001 1002 CASE (sem, INSN_MOVSCBR) : /* movs.b ${sconst8},${Rd} */ 1003 { 1004 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1005 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1006 #define FLD(f) abuf->fields.sfmt_bound_cb.f 1007 int UNUSED written = 0; 1008 IADDR UNUSED pc = abuf->addr; 1009 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1010 1011 { 1012 SI tmp_newval; 1013 tmp_newval = EXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte))); 1014 { 1015 SI opval = tmp_newval; 1016 SET_H_GR (FLD (f_operand2), opval); 1017 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1018 } 1019 { 1020 { 1021 BI opval = LTSI (tmp_newval, 0); 1022 CPU (h_nbit) = opval; 1023 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1024 } 1025 { 1026 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 1027 CPU (h_zbit) = opval; 1028 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1029 } 1030 SET_H_CBIT_MOVE (0); 1031 SET_H_VBIT_MOVE (0); 1032 { 1033 { 1034 BI opval = 0; 1035 CPU (h_xbit) = opval; 1036 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1037 } 1038 { 1039 BI opval = 0; 1040 SET_H_INSN_PREFIXED_P (opval); 1041 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1042 } 1043 } 1044 } 1045 } 1046 1047 #undef FLD 1048 } 1049 NEXT (vpc); 1050 1051 CASE (sem, INSN_MOVSCWR) : /* movs.w ${sconst16},${Rd} */ 1052 { 1053 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1054 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1055 #define FLD(f) abuf->fields.sfmt_bound_cw.f 1056 int UNUSED written = 0; 1057 IADDR UNUSED pc = abuf->addr; 1058 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1059 1060 { 1061 SI tmp_newval; 1062 tmp_newval = EXTHISI (TRUNCSIHI (FLD (f_indir_pc__word))); 1063 { 1064 SI opval = tmp_newval; 1065 SET_H_GR (FLD (f_operand2), opval); 1066 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1067 } 1068 { 1069 { 1070 BI opval = LTSI (tmp_newval, 0); 1071 CPU (h_nbit) = opval; 1072 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1073 } 1074 { 1075 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 1076 CPU (h_zbit) = opval; 1077 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1078 } 1079 SET_H_CBIT_MOVE (0); 1080 SET_H_VBIT_MOVE (0); 1081 { 1082 { 1083 BI opval = 0; 1084 CPU (h_xbit) = opval; 1085 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1086 } 1087 { 1088 BI opval = 0; 1089 SET_H_INSN_PREFIXED_P (opval); 1090 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1091 } 1092 } 1093 } 1094 } 1095 1096 #undef FLD 1097 } 1098 NEXT (vpc); 1099 1100 CASE (sem, INSN_MOVUCBR) : /* movu.b ${uconst8},${Rd} */ 1101 { 1102 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1103 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1104 #define FLD(f) abuf->fields.sfmt_bound_cb.f 1105 int UNUSED written = 0; 1106 IADDR UNUSED pc = abuf->addr; 1107 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1108 1109 { 1110 SI tmp_newval; 1111 tmp_newval = ZEXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte))); 1112 { 1113 SI opval = tmp_newval; 1114 SET_H_GR (FLD (f_operand2), opval); 1115 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1116 } 1117 { 1118 { 1119 BI opval = LTSI (tmp_newval, 0); 1120 CPU (h_nbit) = opval; 1121 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1122 } 1123 { 1124 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 1125 CPU (h_zbit) = opval; 1126 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1127 } 1128 SET_H_CBIT_MOVE (0); 1129 SET_H_VBIT_MOVE (0); 1130 { 1131 { 1132 BI opval = 0; 1133 CPU (h_xbit) = opval; 1134 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1135 } 1136 { 1137 BI opval = 0; 1138 SET_H_INSN_PREFIXED_P (opval); 1139 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1140 } 1141 } 1142 } 1143 } 1144 1145 #undef FLD 1146 } 1147 NEXT (vpc); 1148 1149 CASE (sem, INSN_MOVUCWR) : /* movu.w ${uconst16},${Rd} */ 1150 { 1151 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1152 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1153 #define FLD(f) abuf->fields.sfmt_bound_cw.f 1154 int UNUSED written = 0; 1155 IADDR UNUSED pc = abuf->addr; 1156 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1157 1158 { 1159 SI tmp_newval; 1160 tmp_newval = ZEXTHISI (TRUNCSIHI (FLD (f_indir_pc__word))); 1161 { 1162 SI opval = tmp_newval; 1163 SET_H_GR (FLD (f_operand2), opval); 1164 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1165 } 1166 { 1167 { 1168 BI opval = LTSI (tmp_newval, 0); 1169 CPU (h_nbit) = opval; 1170 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1171 } 1172 { 1173 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 1174 CPU (h_zbit) = opval; 1175 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1176 } 1177 SET_H_CBIT_MOVE (0); 1178 SET_H_VBIT_MOVE (0); 1179 { 1180 { 1181 BI opval = 0; 1182 CPU (h_xbit) = opval; 1183 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1184 } 1185 { 1186 BI opval = 0; 1187 SET_H_INSN_PREFIXED_P (opval); 1188 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1189 } 1190 } 1191 } 1192 } 1193 1194 #undef FLD 1195 } 1196 NEXT (vpc); 1197 1198 CASE (sem, INSN_ADDQ) : /* addq $j,$Rd */ 1199 { 1200 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1201 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1202 #define FLD(f) abuf->fields.sfmt_addq.f 1203 int UNUSED written = 0; 1204 IADDR UNUSED pc = abuf->addr; 1205 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1206 1207 { 1208 SI tmp_tmpopd; 1209 SI tmp_tmpops; 1210 BI tmp_carry; 1211 SI tmp_newval; 1212 tmp_tmpops = FLD (f_u6); 1213 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 1214 tmp_carry = CPU (h_cbit); 1215 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 1216 { 1217 SI opval = tmp_newval; 1218 SET_H_GR (FLD (f_operand2), opval); 1219 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1220 } 1221 { 1222 { 1223 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 1224 CPU (h_cbit) = opval; 1225 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 1226 } 1227 { 1228 BI opval = LTSI (tmp_newval, 0); 1229 CPU (h_nbit) = opval; 1230 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1231 } 1232 { 1233 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 1234 CPU (h_zbit) = opval; 1235 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1236 } 1237 { 1238 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 1239 CPU (h_vbit) = opval; 1240 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 1241 } 1242 { 1243 { 1244 BI opval = 0; 1245 CPU (h_xbit) = opval; 1246 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1247 } 1248 { 1249 BI opval = 0; 1250 SET_H_INSN_PREFIXED_P (opval); 1251 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1252 } 1253 } 1254 } 1255 } 1256 1257 #undef FLD 1258 } 1259 NEXT (vpc); 1260 1261 CASE (sem, INSN_SUBQ) : /* subq $j,$Rd */ 1262 { 1263 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1264 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1265 #define FLD(f) abuf->fields.sfmt_addq.f 1266 int UNUSED written = 0; 1267 IADDR UNUSED pc = abuf->addr; 1268 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1269 1270 { 1271 SI tmp_tmpopd; 1272 SI tmp_tmpops; 1273 BI tmp_carry; 1274 SI tmp_newval; 1275 tmp_tmpops = FLD (f_u6); 1276 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 1277 tmp_carry = CPU (h_cbit); 1278 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 1279 { 1280 SI opval = tmp_newval; 1281 SET_H_GR (FLD (f_operand2), opval); 1282 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1283 } 1284 { 1285 { 1286 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 1287 CPU (h_cbit) = opval; 1288 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 1289 } 1290 { 1291 BI opval = LTSI (tmp_newval, 0); 1292 CPU (h_nbit) = opval; 1293 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1294 } 1295 { 1296 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 1297 CPU (h_zbit) = opval; 1298 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1299 } 1300 { 1301 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 1302 CPU (h_vbit) = opval; 1303 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 1304 } 1305 { 1306 { 1307 BI opval = 0; 1308 CPU (h_xbit) = opval; 1309 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1310 } 1311 { 1312 BI opval = 0; 1313 SET_H_INSN_PREFIXED_P (opval); 1314 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1315 } 1316 } 1317 } 1318 } 1319 1320 #undef FLD 1321 } 1322 NEXT (vpc); 1323 1324 CASE (sem, INSN_CMP_R_B_R) : /* cmp-r.b $Rs,$Rd */ 1325 { 1326 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1327 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1328 #define FLD(f) abuf->fields.sfmt_muls_b.f 1329 int UNUSED written = 0; 1330 IADDR UNUSED pc = abuf->addr; 1331 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1332 1333 { 1334 QI tmp_tmpopd; 1335 QI tmp_tmpops; 1336 BI tmp_carry; 1337 QI tmp_newval; 1338 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 1339 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 1340 tmp_carry = CPU (h_cbit); 1341 tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 1342 ((void) 0); /*nop*/ 1343 { 1344 { 1345 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0)))); 1346 CPU (h_cbit) = opval; 1347 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 1348 } 1349 { 1350 BI opval = LTQI (tmp_newval, 0); 1351 CPU (h_nbit) = opval; 1352 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1353 } 1354 { 1355 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 1356 CPU (h_zbit) = opval; 1357 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1358 } 1359 { 1360 BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0))); 1361 CPU (h_vbit) = opval; 1362 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 1363 } 1364 { 1365 { 1366 BI opval = 0; 1367 CPU (h_xbit) = opval; 1368 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1369 } 1370 { 1371 BI opval = 0; 1372 SET_H_INSN_PREFIXED_P (opval); 1373 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1374 } 1375 } 1376 } 1377 } 1378 1379 #undef FLD 1380 } 1381 NEXT (vpc); 1382 1383 CASE (sem, INSN_CMP_R_W_R) : /* cmp-r.w $Rs,$Rd */ 1384 { 1385 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1386 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1387 #define FLD(f) abuf->fields.sfmt_muls_b.f 1388 int UNUSED written = 0; 1389 IADDR UNUSED pc = abuf->addr; 1390 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1391 1392 { 1393 HI tmp_tmpopd; 1394 HI tmp_tmpops; 1395 BI tmp_carry; 1396 HI tmp_newval; 1397 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 1398 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 1399 tmp_carry = CPU (h_cbit); 1400 tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 1401 ((void) 0); /*nop*/ 1402 { 1403 { 1404 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0)))); 1405 CPU (h_cbit) = opval; 1406 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 1407 } 1408 { 1409 BI opval = LTHI (tmp_newval, 0); 1410 CPU (h_nbit) = opval; 1411 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1412 } 1413 { 1414 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 1415 CPU (h_zbit) = opval; 1416 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1417 } 1418 { 1419 BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0))); 1420 CPU (h_vbit) = opval; 1421 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 1422 } 1423 { 1424 { 1425 BI opval = 0; 1426 CPU (h_xbit) = opval; 1427 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1428 } 1429 { 1430 BI opval = 0; 1431 SET_H_INSN_PREFIXED_P (opval); 1432 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1433 } 1434 } 1435 } 1436 } 1437 1438 #undef FLD 1439 } 1440 NEXT (vpc); 1441 1442 CASE (sem, INSN_CMP_R_D_R) : /* cmp-r.d $Rs,$Rd */ 1443 { 1444 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1445 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1446 #define FLD(f) abuf->fields.sfmt_muls_b.f 1447 int UNUSED written = 0; 1448 IADDR UNUSED pc = abuf->addr; 1449 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1450 1451 { 1452 SI tmp_tmpopd; 1453 SI tmp_tmpops; 1454 BI tmp_carry; 1455 SI tmp_newval; 1456 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 1457 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 1458 tmp_carry = CPU (h_cbit); 1459 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 1460 ((void) 0); /*nop*/ 1461 { 1462 { 1463 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 1464 CPU (h_cbit) = opval; 1465 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 1466 } 1467 { 1468 BI opval = LTSI (tmp_newval, 0); 1469 CPU (h_nbit) = opval; 1470 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1471 } 1472 { 1473 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 1474 CPU (h_zbit) = opval; 1475 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1476 } 1477 { 1478 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 1479 CPU (h_vbit) = opval; 1480 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 1481 } 1482 { 1483 { 1484 BI opval = 0; 1485 CPU (h_xbit) = opval; 1486 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1487 } 1488 { 1489 BI opval = 0; 1490 SET_H_INSN_PREFIXED_P (opval); 1491 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1492 } 1493 } 1494 } 1495 } 1496 1497 #undef FLD 1498 } 1499 NEXT (vpc); 1500 1501 CASE (sem, INSN_CMP_M_B_M) : /* cmp-m.b [${Rs}${inc}],${Rd} */ 1502 { 1503 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1504 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1505 #define FLD(f) abuf->fields.sfmt_addc_m.f 1506 int UNUSED written = 0; 1507 IADDR UNUSED pc = abuf->addr; 1508 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1509 1510 { 1511 QI tmp_tmpopd; 1512 QI tmp_tmpops; 1513 BI tmp_carry; 1514 QI tmp_newval; 1515 tmp_tmpops = ({ SI tmp_addr; 1516 QI tmp_tmp_mem; 1517 BI tmp_postinc; 1518 tmp_postinc = FLD (f_memmode); 1519 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 1520 ; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 1521 ; if (NEBI (tmp_postinc, 0)) { 1522 { 1523 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 1524 tmp_addr = ADDSI (tmp_addr, 1); 1525 } 1526 { 1527 SI opval = tmp_addr; 1528 SET_H_GR (FLD (f_operand1), opval); 1529 written |= (1 << 9); 1530 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1531 } 1532 } 1533 } 1534 ; tmp_tmp_mem; }); 1535 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 1536 tmp_carry = CPU (h_cbit); 1537 tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 1538 ((void) 0); /*nop*/ 1539 { 1540 { 1541 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0)))); 1542 CPU (h_cbit) = opval; 1543 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 1544 } 1545 { 1546 BI opval = LTQI (tmp_newval, 0); 1547 CPU (h_nbit) = opval; 1548 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1549 } 1550 { 1551 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 1552 CPU (h_zbit) = opval; 1553 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1554 } 1555 { 1556 BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0))); 1557 CPU (h_vbit) = opval; 1558 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 1559 } 1560 { 1561 { 1562 BI opval = 0; 1563 CPU (h_xbit) = opval; 1564 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1565 } 1566 { 1567 BI opval = 0; 1568 SET_H_INSN_PREFIXED_P (opval); 1569 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1570 } 1571 } 1572 } 1573 } 1574 1575 abuf->written = written; 1576 #undef FLD 1577 } 1578 NEXT (vpc); 1579 1580 CASE (sem, INSN_CMP_M_W_M) : /* cmp-m.w [${Rs}${inc}],${Rd} */ 1581 { 1582 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1583 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1584 #define FLD(f) abuf->fields.sfmt_addc_m.f 1585 int UNUSED written = 0; 1586 IADDR UNUSED pc = abuf->addr; 1587 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1588 1589 { 1590 HI tmp_tmpopd; 1591 HI tmp_tmpops; 1592 BI tmp_carry; 1593 HI tmp_newval; 1594 tmp_tmpops = ({ SI tmp_addr; 1595 HI tmp_tmp_mem; 1596 BI tmp_postinc; 1597 tmp_postinc = FLD (f_memmode); 1598 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 1599 ; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 1600 ; if (NEBI (tmp_postinc, 0)) { 1601 { 1602 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 1603 tmp_addr = ADDSI (tmp_addr, 2); 1604 } 1605 { 1606 SI opval = tmp_addr; 1607 SET_H_GR (FLD (f_operand1), opval); 1608 written |= (1 << 9); 1609 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1610 } 1611 } 1612 } 1613 ; tmp_tmp_mem; }); 1614 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 1615 tmp_carry = CPU (h_cbit); 1616 tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 1617 ((void) 0); /*nop*/ 1618 { 1619 { 1620 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0)))); 1621 CPU (h_cbit) = opval; 1622 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 1623 } 1624 { 1625 BI opval = LTHI (tmp_newval, 0); 1626 CPU (h_nbit) = opval; 1627 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1628 } 1629 { 1630 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 1631 CPU (h_zbit) = opval; 1632 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1633 } 1634 { 1635 BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0))); 1636 CPU (h_vbit) = opval; 1637 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 1638 } 1639 { 1640 { 1641 BI opval = 0; 1642 CPU (h_xbit) = opval; 1643 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1644 } 1645 { 1646 BI opval = 0; 1647 SET_H_INSN_PREFIXED_P (opval); 1648 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1649 } 1650 } 1651 } 1652 } 1653 1654 abuf->written = written; 1655 #undef FLD 1656 } 1657 NEXT (vpc); 1658 1659 CASE (sem, INSN_CMP_M_D_M) : /* cmp-m.d [${Rs}${inc}],${Rd} */ 1660 { 1661 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1662 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1663 #define FLD(f) abuf->fields.sfmt_addc_m.f 1664 int UNUSED written = 0; 1665 IADDR UNUSED pc = abuf->addr; 1666 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1667 1668 { 1669 SI tmp_tmpopd; 1670 SI tmp_tmpops; 1671 BI tmp_carry; 1672 SI tmp_newval; 1673 tmp_tmpops = ({ SI tmp_addr; 1674 SI tmp_tmp_mem; 1675 BI tmp_postinc; 1676 tmp_postinc = FLD (f_memmode); 1677 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 1678 ; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 1679 ; if (NEBI (tmp_postinc, 0)) { 1680 { 1681 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 1682 tmp_addr = ADDSI (tmp_addr, 4); 1683 } 1684 { 1685 SI opval = tmp_addr; 1686 SET_H_GR (FLD (f_operand1), opval); 1687 written |= (1 << 9); 1688 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1689 } 1690 } 1691 } 1692 ; tmp_tmp_mem; }); 1693 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 1694 tmp_carry = CPU (h_cbit); 1695 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 1696 ((void) 0); /*nop*/ 1697 { 1698 { 1699 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 1700 CPU (h_cbit) = opval; 1701 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 1702 } 1703 { 1704 BI opval = LTSI (tmp_newval, 0); 1705 CPU (h_nbit) = opval; 1706 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1707 } 1708 { 1709 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 1710 CPU (h_zbit) = opval; 1711 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1712 } 1713 { 1714 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 1715 CPU (h_vbit) = opval; 1716 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 1717 } 1718 { 1719 { 1720 BI opval = 0; 1721 CPU (h_xbit) = opval; 1722 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1723 } 1724 { 1725 BI opval = 0; 1726 SET_H_INSN_PREFIXED_P (opval); 1727 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1728 } 1729 } 1730 } 1731 } 1732 1733 abuf->written = written; 1734 #undef FLD 1735 } 1736 NEXT (vpc); 1737 1738 CASE (sem, INSN_CMPCBR) : /* cmp.b $sconst8,$Rd */ 1739 { 1740 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1741 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1742 #define FLD(f) abuf->fields.sfmt_bound_cb.f 1743 int UNUSED written = 0; 1744 IADDR UNUSED pc = abuf->addr; 1745 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1746 1747 { 1748 QI tmp_tmpopd; 1749 QI tmp_tmpops; 1750 BI tmp_carry; 1751 QI tmp_newval; 1752 tmp_tmpops = TRUNCSIQI (FLD (f_indir_pc__byte)); 1753 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 1754 tmp_carry = CPU (h_cbit); 1755 tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 1756 ((void) 0); /*nop*/ 1757 { 1758 { 1759 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0)))); 1760 CPU (h_cbit) = opval; 1761 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 1762 } 1763 { 1764 BI opval = LTQI (tmp_newval, 0); 1765 CPU (h_nbit) = opval; 1766 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1767 } 1768 { 1769 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 1770 CPU (h_zbit) = opval; 1771 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1772 } 1773 { 1774 BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0))); 1775 CPU (h_vbit) = opval; 1776 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 1777 } 1778 { 1779 { 1780 BI opval = 0; 1781 CPU (h_xbit) = opval; 1782 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1783 } 1784 { 1785 BI opval = 0; 1786 SET_H_INSN_PREFIXED_P (opval); 1787 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1788 } 1789 } 1790 } 1791 } 1792 1793 #undef FLD 1794 } 1795 NEXT (vpc); 1796 1797 CASE (sem, INSN_CMPCWR) : /* cmp.w $sconst16,$Rd */ 1798 { 1799 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1800 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1801 #define FLD(f) abuf->fields.sfmt_bound_cw.f 1802 int UNUSED written = 0; 1803 IADDR UNUSED pc = abuf->addr; 1804 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1805 1806 { 1807 HI tmp_tmpopd; 1808 HI tmp_tmpops; 1809 BI tmp_carry; 1810 HI tmp_newval; 1811 tmp_tmpops = TRUNCSIHI (FLD (f_indir_pc__word)); 1812 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 1813 tmp_carry = CPU (h_cbit); 1814 tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 1815 ((void) 0); /*nop*/ 1816 { 1817 { 1818 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0)))); 1819 CPU (h_cbit) = opval; 1820 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 1821 } 1822 { 1823 BI opval = LTHI (tmp_newval, 0); 1824 CPU (h_nbit) = opval; 1825 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1826 } 1827 { 1828 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 1829 CPU (h_zbit) = opval; 1830 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1831 } 1832 { 1833 BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0))); 1834 CPU (h_vbit) = opval; 1835 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 1836 } 1837 { 1838 { 1839 BI opval = 0; 1840 CPU (h_xbit) = opval; 1841 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1842 } 1843 { 1844 BI opval = 0; 1845 SET_H_INSN_PREFIXED_P (opval); 1846 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1847 } 1848 } 1849 } 1850 } 1851 1852 #undef FLD 1853 } 1854 NEXT (vpc); 1855 1856 CASE (sem, INSN_CMPCDR) : /* cmp.d $const32,$Rd */ 1857 { 1858 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1859 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1860 #define FLD(f) abuf->fields.sfmt_bound_cd.f 1861 int UNUSED written = 0; 1862 IADDR UNUSED pc = abuf->addr; 1863 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 1864 1865 { 1866 SI tmp_tmpopd; 1867 SI tmp_tmpops; 1868 BI tmp_carry; 1869 SI tmp_newval; 1870 tmp_tmpops = FLD (f_indir_pc__dword); 1871 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 1872 tmp_carry = CPU (h_cbit); 1873 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 1874 ((void) 0); /*nop*/ 1875 { 1876 { 1877 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 1878 CPU (h_cbit) = opval; 1879 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 1880 } 1881 { 1882 BI opval = LTSI (tmp_newval, 0); 1883 CPU (h_nbit) = opval; 1884 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1885 } 1886 { 1887 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 1888 CPU (h_zbit) = opval; 1889 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1890 } 1891 { 1892 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 1893 CPU (h_vbit) = opval; 1894 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 1895 } 1896 { 1897 { 1898 BI opval = 0; 1899 CPU (h_xbit) = opval; 1900 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1901 } 1902 { 1903 BI opval = 0; 1904 SET_H_INSN_PREFIXED_P (opval); 1905 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1906 } 1907 } 1908 } 1909 } 1910 1911 #undef FLD 1912 } 1913 NEXT (vpc); 1914 1915 CASE (sem, INSN_CMPQ) : /* cmpq $i,$Rd */ 1916 { 1917 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1918 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1919 #define FLD(f) abuf->fields.sfmt_andq.f 1920 int UNUSED written = 0; 1921 IADDR UNUSED pc = abuf->addr; 1922 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1923 1924 { 1925 SI tmp_tmpopd; 1926 SI tmp_tmpops; 1927 BI tmp_carry; 1928 SI tmp_newval; 1929 tmp_tmpops = FLD (f_s6); 1930 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 1931 tmp_carry = CPU (h_cbit); 1932 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 1933 ((void) 0); /*nop*/ 1934 { 1935 { 1936 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 1937 CPU (h_cbit) = opval; 1938 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 1939 } 1940 { 1941 BI opval = LTSI (tmp_newval, 0); 1942 CPU (h_nbit) = opval; 1943 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 1944 } 1945 { 1946 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 1947 CPU (h_zbit) = opval; 1948 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 1949 } 1950 { 1951 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 1952 CPU (h_vbit) = opval; 1953 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 1954 } 1955 { 1956 { 1957 BI opval = 0; 1958 CPU (h_xbit) = opval; 1959 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 1960 } 1961 { 1962 BI opval = 0; 1963 SET_H_INSN_PREFIXED_P (opval); 1964 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 1965 } 1966 } 1967 } 1968 } 1969 1970 #undef FLD 1971 } 1972 NEXT (vpc); 1973 1974 CASE (sem, INSN_CMPS_M_B_M) : /* cmps-m.b [${Rs}${inc}],$Rd */ 1975 { 1976 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1977 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1978 #define FLD(f) abuf->fields.sfmt_addc_m.f 1979 int UNUSED written = 0; 1980 IADDR UNUSED pc = abuf->addr; 1981 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1982 1983 { 1984 SI tmp_tmpopd; 1985 SI tmp_tmpops; 1986 BI tmp_carry; 1987 SI tmp_newval; 1988 tmp_tmpops = EXTQISI (({ SI tmp_addr; 1989 QI tmp_tmp_mem; 1990 BI tmp_postinc; 1991 tmp_postinc = FLD (f_memmode); 1992 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 1993 ; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 1994 ; if (NEBI (tmp_postinc, 0)) { 1995 { 1996 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 1997 tmp_addr = ADDSI (tmp_addr, 1); 1998 } 1999 { 2000 SI opval = tmp_addr; 2001 SET_H_GR (FLD (f_operand1), opval); 2002 written |= (1 << 9); 2003 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2004 } 2005 } 2006 } 2007 ; tmp_tmp_mem; })); 2008 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 2009 tmp_carry = CPU (h_cbit); 2010 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 2011 ((void) 0); /*nop*/ 2012 { 2013 { 2014 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 2015 CPU (h_cbit) = opval; 2016 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 2017 } 2018 { 2019 BI opval = LTSI (tmp_newval, 0); 2020 CPU (h_nbit) = opval; 2021 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2022 } 2023 { 2024 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 2025 CPU (h_zbit) = opval; 2026 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2027 } 2028 { 2029 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 2030 CPU (h_vbit) = opval; 2031 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 2032 } 2033 { 2034 { 2035 BI opval = 0; 2036 CPU (h_xbit) = opval; 2037 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2038 } 2039 { 2040 BI opval = 0; 2041 SET_H_INSN_PREFIXED_P (opval); 2042 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2043 } 2044 } 2045 } 2046 } 2047 2048 abuf->written = written; 2049 #undef FLD 2050 } 2051 NEXT (vpc); 2052 2053 CASE (sem, INSN_CMPS_M_W_M) : /* cmps-m.w [${Rs}${inc}],$Rd */ 2054 { 2055 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2056 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2057 #define FLD(f) abuf->fields.sfmt_addc_m.f 2058 int UNUSED written = 0; 2059 IADDR UNUSED pc = abuf->addr; 2060 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2061 2062 { 2063 SI tmp_tmpopd; 2064 SI tmp_tmpops; 2065 BI tmp_carry; 2066 SI tmp_newval; 2067 tmp_tmpops = EXTHISI (({ SI tmp_addr; 2068 HI tmp_tmp_mem; 2069 BI tmp_postinc; 2070 tmp_postinc = FLD (f_memmode); 2071 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 2072 ; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 2073 ; if (NEBI (tmp_postinc, 0)) { 2074 { 2075 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 2076 tmp_addr = ADDSI (tmp_addr, 2); 2077 } 2078 { 2079 SI opval = tmp_addr; 2080 SET_H_GR (FLD (f_operand1), opval); 2081 written |= (1 << 9); 2082 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2083 } 2084 } 2085 } 2086 ; tmp_tmp_mem; })); 2087 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 2088 tmp_carry = CPU (h_cbit); 2089 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 2090 ((void) 0); /*nop*/ 2091 { 2092 { 2093 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 2094 CPU (h_cbit) = opval; 2095 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 2096 } 2097 { 2098 BI opval = LTSI (tmp_newval, 0); 2099 CPU (h_nbit) = opval; 2100 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2101 } 2102 { 2103 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 2104 CPU (h_zbit) = opval; 2105 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2106 } 2107 { 2108 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 2109 CPU (h_vbit) = opval; 2110 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 2111 } 2112 { 2113 { 2114 BI opval = 0; 2115 CPU (h_xbit) = opval; 2116 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2117 } 2118 { 2119 BI opval = 0; 2120 SET_H_INSN_PREFIXED_P (opval); 2121 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2122 } 2123 } 2124 } 2125 } 2126 2127 abuf->written = written; 2128 #undef FLD 2129 } 2130 NEXT (vpc); 2131 2132 CASE (sem, INSN_CMPSCBR) : /* [${Rs}${inc}],$Rd */ 2133 { 2134 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2135 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2136 #define FLD(f) abuf->fields.sfmt_bound_cb.f 2137 int UNUSED written = 0; 2138 IADDR UNUSED pc = abuf->addr; 2139 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2140 2141 { 2142 SI tmp_tmpopd; 2143 SI tmp_tmpops; 2144 BI tmp_carry; 2145 SI tmp_newval; 2146 tmp_tmpops = EXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte))); 2147 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 2148 tmp_carry = CPU (h_cbit); 2149 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 2150 ((void) 0); /*nop*/ 2151 { 2152 { 2153 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 2154 CPU (h_cbit) = opval; 2155 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 2156 } 2157 { 2158 BI opval = LTSI (tmp_newval, 0); 2159 CPU (h_nbit) = opval; 2160 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2161 } 2162 { 2163 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 2164 CPU (h_zbit) = opval; 2165 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2166 } 2167 { 2168 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 2169 CPU (h_vbit) = opval; 2170 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 2171 } 2172 { 2173 { 2174 BI opval = 0; 2175 CPU (h_xbit) = opval; 2176 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2177 } 2178 { 2179 BI opval = 0; 2180 SET_H_INSN_PREFIXED_P (opval); 2181 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2182 } 2183 } 2184 } 2185 } 2186 2187 #undef FLD 2188 } 2189 NEXT (vpc); 2190 2191 CASE (sem, INSN_CMPSCWR) : /* [${Rs}${inc}],$Rd */ 2192 { 2193 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2194 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2195 #define FLD(f) abuf->fields.sfmt_bound_cw.f 2196 int UNUSED written = 0; 2197 IADDR UNUSED pc = abuf->addr; 2198 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2199 2200 { 2201 SI tmp_tmpopd; 2202 SI tmp_tmpops; 2203 BI tmp_carry; 2204 SI tmp_newval; 2205 tmp_tmpops = EXTHISI (TRUNCSIHI (FLD (f_indir_pc__word))); 2206 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 2207 tmp_carry = CPU (h_cbit); 2208 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 2209 ((void) 0); /*nop*/ 2210 { 2211 { 2212 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 2213 CPU (h_cbit) = opval; 2214 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 2215 } 2216 { 2217 BI opval = LTSI (tmp_newval, 0); 2218 CPU (h_nbit) = opval; 2219 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2220 } 2221 { 2222 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 2223 CPU (h_zbit) = opval; 2224 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2225 } 2226 { 2227 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 2228 CPU (h_vbit) = opval; 2229 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 2230 } 2231 { 2232 { 2233 BI opval = 0; 2234 CPU (h_xbit) = opval; 2235 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2236 } 2237 { 2238 BI opval = 0; 2239 SET_H_INSN_PREFIXED_P (opval); 2240 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2241 } 2242 } 2243 } 2244 } 2245 2246 #undef FLD 2247 } 2248 NEXT (vpc); 2249 2250 CASE (sem, INSN_CMPU_M_B_M) : /* cmpu-m.b [${Rs}${inc}],$Rd */ 2251 { 2252 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2253 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2254 #define FLD(f) abuf->fields.sfmt_addc_m.f 2255 int UNUSED written = 0; 2256 IADDR UNUSED pc = abuf->addr; 2257 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2258 2259 { 2260 SI tmp_tmpopd; 2261 SI tmp_tmpops; 2262 BI tmp_carry; 2263 SI tmp_newval; 2264 tmp_tmpops = ZEXTQISI (({ SI tmp_addr; 2265 QI tmp_tmp_mem; 2266 BI tmp_postinc; 2267 tmp_postinc = FLD (f_memmode); 2268 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 2269 ; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 2270 ; if (NEBI (tmp_postinc, 0)) { 2271 { 2272 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 2273 tmp_addr = ADDSI (tmp_addr, 1); 2274 } 2275 { 2276 SI opval = tmp_addr; 2277 SET_H_GR (FLD (f_operand1), opval); 2278 written |= (1 << 9); 2279 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2280 } 2281 } 2282 } 2283 ; tmp_tmp_mem; })); 2284 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 2285 tmp_carry = CPU (h_cbit); 2286 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 2287 ((void) 0); /*nop*/ 2288 { 2289 { 2290 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 2291 CPU (h_cbit) = opval; 2292 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 2293 } 2294 { 2295 BI opval = LTSI (tmp_newval, 0); 2296 CPU (h_nbit) = opval; 2297 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2298 } 2299 { 2300 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 2301 CPU (h_zbit) = opval; 2302 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2303 } 2304 { 2305 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 2306 CPU (h_vbit) = opval; 2307 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 2308 } 2309 { 2310 { 2311 BI opval = 0; 2312 CPU (h_xbit) = opval; 2313 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2314 } 2315 { 2316 BI opval = 0; 2317 SET_H_INSN_PREFIXED_P (opval); 2318 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2319 } 2320 } 2321 } 2322 } 2323 2324 abuf->written = written; 2325 #undef FLD 2326 } 2327 NEXT (vpc); 2328 2329 CASE (sem, INSN_CMPU_M_W_M) : /* cmpu-m.w [${Rs}${inc}],$Rd */ 2330 { 2331 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2332 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2333 #define FLD(f) abuf->fields.sfmt_addc_m.f 2334 int UNUSED written = 0; 2335 IADDR UNUSED pc = abuf->addr; 2336 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2337 2338 { 2339 SI tmp_tmpopd; 2340 SI tmp_tmpops; 2341 BI tmp_carry; 2342 SI tmp_newval; 2343 tmp_tmpops = ZEXTHISI (({ SI tmp_addr; 2344 HI tmp_tmp_mem; 2345 BI tmp_postinc; 2346 tmp_postinc = FLD (f_memmode); 2347 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 2348 ; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 2349 ; if (NEBI (tmp_postinc, 0)) { 2350 { 2351 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 2352 tmp_addr = ADDSI (tmp_addr, 2); 2353 } 2354 { 2355 SI opval = tmp_addr; 2356 SET_H_GR (FLD (f_operand1), opval); 2357 written |= (1 << 9); 2358 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2359 } 2360 } 2361 } 2362 ; tmp_tmp_mem; })); 2363 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 2364 tmp_carry = CPU (h_cbit); 2365 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 2366 ((void) 0); /*nop*/ 2367 { 2368 { 2369 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 2370 CPU (h_cbit) = opval; 2371 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 2372 } 2373 { 2374 BI opval = LTSI (tmp_newval, 0); 2375 CPU (h_nbit) = opval; 2376 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2377 } 2378 { 2379 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 2380 CPU (h_zbit) = opval; 2381 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2382 } 2383 { 2384 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 2385 CPU (h_vbit) = opval; 2386 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 2387 } 2388 { 2389 { 2390 BI opval = 0; 2391 CPU (h_xbit) = opval; 2392 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2393 } 2394 { 2395 BI opval = 0; 2396 SET_H_INSN_PREFIXED_P (opval); 2397 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2398 } 2399 } 2400 } 2401 } 2402 2403 abuf->written = written; 2404 #undef FLD 2405 } 2406 NEXT (vpc); 2407 2408 CASE (sem, INSN_CMPUCBR) : /* [${Rs}${inc}],$Rd */ 2409 { 2410 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2411 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2412 #define FLD(f) abuf->fields.sfmt_bound_cb.f 2413 int UNUSED written = 0; 2414 IADDR UNUSED pc = abuf->addr; 2415 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2416 2417 { 2418 SI tmp_tmpopd; 2419 SI tmp_tmpops; 2420 BI tmp_carry; 2421 SI tmp_newval; 2422 tmp_tmpops = ZEXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte))); 2423 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 2424 tmp_carry = CPU (h_cbit); 2425 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 2426 ((void) 0); /*nop*/ 2427 { 2428 { 2429 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 2430 CPU (h_cbit) = opval; 2431 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 2432 } 2433 { 2434 BI opval = LTSI (tmp_newval, 0); 2435 CPU (h_nbit) = opval; 2436 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2437 } 2438 { 2439 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 2440 CPU (h_zbit) = opval; 2441 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2442 } 2443 { 2444 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 2445 CPU (h_vbit) = opval; 2446 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 2447 } 2448 { 2449 { 2450 BI opval = 0; 2451 CPU (h_xbit) = opval; 2452 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2453 } 2454 { 2455 BI opval = 0; 2456 SET_H_INSN_PREFIXED_P (opval); 2457 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2458 } 2459 } 2460 } 2461 } 2462 2463 #undef FLD 2464 } 2465 NEXT (vpc); 2466 2467 CASE (sem, INSN_CMPUCWR) : /* [${Rs}${inc}],$Rd */ 2468 { 2469 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2470 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2471 #define FLD(f) abuf->fields.sfmt_bound_cw.f 2472 int UNUSED written = 0; 2473 IADDR UNUSED pc = abuf->addr; 2474 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2475 2476 { 2477 SI tmp_tmpopd; 2478 SI tmp_tmpops; 2479 BI tmp_carry; 2480 SI tmp_newval; 2481 tmp_tmpops = ZEXTHISI (TRUNCSIHI (FLD (f_indir_pc__word))); 2482 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 2483 tmp_carry = CPU (h_cbit); 2484 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 2485 ((void) 0); /*nop*/ 2486 { 2487 { 2488 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 2489 CPU (h_cbit) = opval; 2490 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 2491 } 2492 { 2493 BI opval = LTSI (tmp_newval, 0); 2494 CPU (h_nbit) = opval; 2495 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2496 } 2497 { 2498 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 2499 CPU (h_zbit) = opval; 2500 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2501 } 2502 { 2503 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 2504 CPU (h_vbit) = opval; 2505 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 2506 } 2507 { 2508 { 2509 BI opval = 0; 2510 CPU (h_xbit) = opval; 2511 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2512 } 2513 { 2514 BI opval = 0; 2515 SET_H_INSN_PREFIXED_P (opval); 2516 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2517 } 2518 } 2519 } 2520 } 2521 2522 #undef FLD 2523 } 2524 NEXT (vpc); 2525 2526 CASE (sem, INSN_MOVE_M_B_M) : /* move-m.b [${Rs}${inc}],${Rd} */ 2527 { 2528 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2529 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2530 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f 2531 int UNUSED written = 0; 2532 IADDR UNUSED pc = abuf->addr; 2533 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2534 2535 { 2536 SI tmp_tmp; 2537 tmp_tmp = ({ SI tmp_addr; 2538 QI tmp_tmp_mem; 2539 BI tmp_postinc; 2540 tmp_postinc = FLD (f_memmode); 2541 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 2542 ; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 2543 ; if (NEBI (tmp_postinc, 0)) { 2544 { 2545 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 2546 tmp_addr = ADDSI (tmp_addr, 1); 2547 } 2548 { 2549 SI opval = tmp_addr; 2550 SET_H_GR (FLD (f_operand1), opval); 2551 written |= (1 << 10); 2552 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2553 } 2554 } 2555 } 2556 ; tmp_tmp_mem; }); 2557 { 2558 SI tmp_oldregval; 2559 tmp_oldregval = GET_H_RAW_GR_ACR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2)))); 2560 { 2561 SI opval = ORSI (ANDSI (tmp_tmp, 255), ANDSI (tmp_oldregval, 0xffffff00)); 2562 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 2563 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2564 } 2565 } 2566 { 2567 { 2568 BI opval = LTQI (tmp_tmp, 0); 2569 CPU (h_nbit) = opval; 2570 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2571 } 2572 { 2573 BI opval = ANDIF (EQQI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 2574 CPU (h_zbit) = opval; 2575 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2576 } 2577 SET_H_CBIT_MOVE (0); 2578 SET_H_VBIT_MOVE (0); 2579 { 2580 { 2581 BI opval = 0; 2582 CPU (h_xbit) = opval; 2583 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2584 } 2585 { 2586 BI opval = 0; 2587 SET_H_INSN_PREFIXED_P (opval); 2588 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2589 } 2590 } 2591 } 2592 } 2593 2594 abuf->written = written; 2595 #undef FLD 2596 } 2597 NEXT (vpc); 2598 2599 CASE (sem, INSN_MOVE_M_W_M) : /* move-m.w [${Rs}${inc}],${Rd} */ 2600 { 2601 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2602 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2603 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f 2604 int UNUSED written = 0; 2605 IADDR UNUSED pc = abuf->addr; 2606 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2607 2608 { 2609 SI tmp_tmp; 2610 tmp_tmp = ({ SI tmp_addr; 2611 HI tmp_tmp_mem; 2612 BI tmp_postinc; 2613 tmp_postinc = FLD (f_memmode); 2614 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 2615 ; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 2616 ; if (NEBI (tmp_postinc, 0)) { 2617 { 2618 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 2619 tmp_addr = ADDSI (tmp_addr, 2); 2620 } 2621 { 2622 SI opval = tmp_addr; 2623 SET_H_GR (FLD (f_operand1), opval); 2624 written |= (1 << 10); 2625 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2626 } 2627 } 2628 } 2629 ; tmp_tmp_mem; }); 2630 { 2631 SI tmp_oldregval; 2632 tmp_oldregval = GET_H_RAW_GR_ACR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2)))); 2633 { 2634 SI opval = ORSI (ANDSI (tmp_tmp, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 2635 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 2636 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2637 } 2638 } 2639 { 2640 { 2641 BI opval = LTHI (tmp_tmp, 0); 2642 CPU (h_nbit) = opval; 2643 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2644 } 2645 { 2646 BI opval = ANDIF (EQHI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 2647 CPU (h_zbit) = opval; 2648 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2649 } 2650 SET_H_CBIT_MOVE (0); 2651 SET_H_VBIT_MOVE (0); 2652 { 2653 { 2654 BI opval = 0; 2655 CPU (h_xbit) = opval; 2656 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2657 } 2658 { 2659 BI opval = 0; 2660 SET_H_INSN_PREFIXED_P (opval); 2661 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2662 } 2663 } 2664 } 2665 } 2666 2667 abuf->written = written; 2668 #undef FLD 2669 } 2670 NEXT (vpc); 2671 2672 CASE (sem, INSN_MOVE_M_D_M) : /* move-m.d [${Rs}${inc}],${Rd} */ 2673 { 2674 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2675 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2676 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f 2677 int UNUSED written = 0; 2678 IADDR UNUSED pc = abuf->addr; 2679 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2680 2681 { 2682 SI tmp_tmp; 2683 tmp_tmp = ({ SI tmp_addr; 2684 SI tmp_tmp_mem; 2685 BI tmp_postinc; 2686 tmp_postinc = FLD (f_memmode); 2687 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 2688 ; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 2689 ; if (NEBI (tmp_postinc, 0)) { 2690 { 2691 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 2692 tmp_addr = ADDSI (tmp_addr, 4); 2693 } 2694 { 2695 SI opval = tmp_addr; 2696 SET_H_GR (FLD (f_operand1), opval); 2697 written |= (1 << 9); 2698 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2699 } 2700 } 2701 } 2702 ; tmp_tmp_mem; }); 2703 { 2704 SI opval = tmp_tmp; 2705 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 2706 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2707 } 2708 { 2709 { 2710 BI opval = LTSI (tmp_tmp, 0); 2711 CPU (h_nbit) = opval; 2712 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2713 } 2714 { 2715 BI opval = ANDIF (EQSI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 2716 CPU (h_zbit) = opval; 2717 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2718 } 2719 SET_H_CBIT_MOVE (0); 2720 SET_H_VBIT_MOVE (0); 2721 { 2722 { 2723 BI opval = 0; 2724 CPU (h_xbit) = opval; 2725 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2726 } 2727 { 2728 BI opval = 0; 2729 SET_H_INSN_PREFIXED_P (opval); 2730 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2731 } 2732 } 2733 } 2734 } 2735 2736 abuf->written = written; 2737 #undef FLD 2738 } 2739 NEXT (vpc); 2740 2741 CASE (sem, INSN_MOVS_M_B_M) : /* movs-m.b [${Rs}${inc}],${Rd} */ 2742 { 2743 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2744 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2745 #define FLD(f) abuf->fields.sfmt_movs_m_b_m.f 2746 int UNUSED written = 0; 2747 IADDR UNUSED pc = abuf->addr; 2748 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2749 2750 { 2751 SI tmp_tmp; 2752 tmp_tmp = EXTQISI (({ SI tmp_addr; 2753 QI tmp_tmp_mem; 2754 BI tmp_postinc; 2755 tmp_postinc = FLD (f_memmode); 2756 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 2757 ; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 2758 ; if (NEBI (tmp_postinc, 0)) { 2759 { 2760 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 2761 tmp_addr = ADDSI (tmp_addr, 1); 2762 } 2763 { 2764 SI opval = tmp_addr; 2765 SET_H_GR (FLD (f_operand1), opval); 2766 written |= (1 << 8); 2767 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2768 } 2769 } 2770 } 2771 ; tmp_tmp_mem; })); 2772 if (ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) { 2773 { 2774 SI opval = tmp_tmp; 2775 SET_H_GR (FLD (f_operand1), opval); 2776 written |= (1 << 8); 2777 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2778 } 2779 } else { 2780 { 2781 SI opval = tmp_tmp; 2782 SET_H_GR (FLD (f_operand2), opval); 2783 written |= (1 << 7); 2784 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2785 } 2786 } 2787 { 2788 { 2789 BI opval = LTSI (tmp_tmp, 0); 2790 CPU (h_nbit) = opval; 2791 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2792 } 2793 { 2794 BI opval = ANDIF (EQSI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 2795 CPU (h_zbit) = opval; 2796 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2797 } 2798 SET_H_CBIT_MOVE (0); 2799 SET_H_VBIT_MOVE (0); 2800 { 2801 { 2802 BI opval = 0; 2803 CPU (h_xbit) = opval; 2804 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2805 } 2806 { 2807 BI opval = 0; 2808 SET_H_INSN_PREFIXED_P (opval); 2809 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2810 } 2811 } 2812 } 2813 } 2814 2815 abuf->written = written; 2816 #undef FLD 2817 } 2818 NEXT (vpc); 2819 2820 CASE (sem, INSN_MOVS_M_W_M) : /* movs-m.w [${Rs}${inc}],${Rd} */ 2821 { 2822 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2823 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2824 #define FLD(f) abuf->fields.sfmt_movs_m_b_m.f 2825 int UNUSED written = 0; 2826 IADDR UNUSED pc = abuf->addr; 2827 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2828 2829 { 2830 SI tmp_tmp; 2831 tmp_tmp = EXTHISI (({ SI tmp_addr; 2832 HI tmp_tmp_mem; 2833 BI tmp_postinc; 2834 tmp_postinc = FLD (f_memmode); 2835 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 2836 ; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 2837 ; if (NEBI (tmp_postinc, 0)) { 2838 { 2839 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 2840 tmp_addr = ADDSI (tmp_addr, 2); 2841 } 2842 { 2843 SI opval = tmp_addr; 2844 SET_H_GR (FLD (f_operand1), opval); 2845 written |= (1 << 8); 2846 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2847 } 2848 } 2849 } 2850 ; tmp_tmp_mem; })); 2851 if (ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) { 2852 { 2853 SI opval = tmp_tmp; 2854 SET_H_GR (FLD (f_operand1), opval); 2855 written |= (1 << 8); 2856 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2857 } 2858 } else { 2859 { 2860 SI opval = tmp_tmp; 2861 SET_H_GR (FLD (f_operand2), opval); 2862 written |= (1 << 7); 2863 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2864 } 2865 } 2866 { 2867 { 2868 BI opval = LTSI (tmp_tmp, 0); 2869 CPU (h_nbit) = opval; 2870 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2871 } 2872 { 2873 BI opval = ANDIF (EQSI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 2874 CPU (h_zbit) = opval; 2875 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2876 } 2877 SET_H_CBIT_MOVE (0); 2878 SET_H_VBIT_MOVE (0); 2879 { 2880 { 2881 BI opval = 0; 2882 CPU (h_xbit) = opval; 2883 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2884 } 2885 { 2886 BI opval = 0; 2887 SET_H_INSN_PREFIXED_P (opval); 2888 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2889 } 2890 } 2891 } 2892 } 2893 2894 abuf->written = written; 2895 #undef FLD 2896 } 2897 NEXT (vpc); 2898 2899 CASE (sem, INSN_MOVU_M_B_M) : /* movu-m.b [${Rs}${inc}],${Rd} */ 2900 { 2901 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2902 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2903 #define FLD(f) abuf->fields.sfmt_movs_m_b_m.f 2904 int UNUSED written = 0; 2905 IADDR UNUSED pc = abuf->addr; 2906 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2907 2908 { 2909 SI tmp_tmp; 2910 tmp_tmp = ZEXTQISI (({ SI tmp_addr; 2911 QI tmp_tmp_mem; 2912 BI tmp_postinc; 2913 tmp_postinc = FLD (f_memmode); 2914 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 2915 ; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 2916 ; if (NEBI (tmp_postinc, 0)) { 2917 { 2918 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 2919 tmp_addr = ADDSI (tmp_addr, 1); 2920 } 2921 { 2922 SI opval = tmp_addr; 2923 SET_H_GR (FLD (f_operand1), opval); 2924 written |= (1 << 8); 2925 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2926 } 2927 } 2928 } 2929 ; tmp_tmp_mem; })); 2930 if (ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) { 2931 { 2932 SI opval = tmp_tmp; 2933 SET_H_GR (FLD (f_operand1), opval); 2934 written |= (1 << 8); 2935 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2936 } 2937 } else { 2938 { 2939 SI opval = tmp_tmp; 2940 SET_H_GR (FLD (f_operand2), opval); 2941 written |= (1 << 7); 2942 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2943 } 2944 } 2945 { 2946 { 2947 BI opval = LTSI (tmp_tmp, 0); 2948 CPU (h_nbit) = opval; 2949 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 2950 } 2951 { 2952 BI opval = ANDIF (EQSI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 2953 CPU (h_zbit) = opval; 2954 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 2955 } 2956 SET_H_CBIT_MOVE (0); 2957 SET_H_VBIT_MOVE (0); 2958 { 2959 { 2960 BI opval = 0; 2961 CPU (h_xbit) = opval; 2962 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 2963 } 2964 { 2965 BI opval = 0; 2966 SET_H_INSN_PREFIXED_P (opval); 2967 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 2968 } 2969 } 2970 } 2971 } 2972 2973 abuf->written = written; 2974 #undef FLD 2975 } 2976 NEXT (vpc); 2977 2978 CASE (sem, INSN_MOVU_M_W_M) : /* movu-m.w [${Rs}${inc}],${Rd} */ 2979 { 2980 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2981 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2982 #define FLD(f) abuf->fields.sfmt_movs_m_b_m.f 2983 int UNUSED written = 0; 2984 IADDR UNUSED pc = abuf->addr; 2985 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2986 2987 { 2988 SI tmp_tmp; 2989 tmp_tmp = ZEXTHISI (({ SI tmp_addr; 2990 HI tmp_tmp_mem; 2991 BI tmp_postinc; 2992 tmp_postinc = FLD (f_memmode); 2993 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 2994 ; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 2995 ; if (NEBI (tmp_postinc, 0)) { 2996 { 2997 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 2998 tmp_addr = ADDSI (tmp_addr, 2); 2999 } 3000 { 3001 SI opval = tmp_addr; 3002 SET_H_GR (FLD (f_operand1), opval); 3003 written |= (1 << 8); 3004 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3005 } 3006 } 3007 } 3008 ; tmp_tmp_mem; })); 3009 if (ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) { 3010 { 3011 SI opval = tmp_tmp; 3012 SET_H_GR (FLD (f_operand1), opval); 3013 written |= (1 << 8); 3014 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3015 } 3016 } else { 3017 { 3018 SI opval = tmp_tmp; 3019 SET_H_GR (FLD (f_operand2), opval); 3020 written |= (1 << 7); 3021 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3022 } 3023 } 3024 { 3025 { 3026 BI opval = LTSI (tmp_tmp, 0); 3027 CPU (h_nbit) = opval; 3028 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 3029 } 3030 { 3031 BI opval = ANDIF (EQSI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 3032 CPU (h_zbit) = opval; 3033 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 3034 } 3035 SET_H_CBIT_MOVE (0); 3036 SET_H_VBIT_MOVE (0); 3037 { 3038 { 3039 BI opval = 0; 3040 CPU (h_xbit) = opval; 3041 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3042 } 3043 { 3044 BI opval = 0; 3045 SET_H_INSN_PREFIXED_P (opval); 3046 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3047 } 3048 } 3049 } 3050 } 3051 3052 abuf->written = written; 3053 #undef FLD 3054 } 3055 NEXT (vpc); 3056 3057 CASE (sem, INSN_MOVE_R_SPRV32) : /* move ${Rs},${Pd} */ 3058 { 3059 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3060 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3061 #define FLD(f) abuf->fields.sfmt_move_m_sprv32.f 3062 int UNUSED written = 0; 3063 IADDR UNUSED pc = abuf->addr; 3064 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3065 3066 { 3067 SI tmp_tmp; 3068 SI tmp_rno; 3069 tmp_tmp = GET_H_GR (FLD (f_operand1)); 3070 tmp_rno = FLD (f_operand2); 3071 if (ORIF (ORIF (EQSI (tmp_rno, 0), EQSI (tmp_rno, 1)), ORIF (EQSI (tmp_rno, 4), EQSI (tmp_rno, 8)))) { 3072 cgen_rtx_error (current_cpu, "move-r-spr: trying to set a read-only special register"); 3073 } 3074 else { 3075 { 3076 SI opval = tmp_tmp; 3077 SET_H_SR (FLD (f_operand2), opval); 3078 written |= (1 << 2); 3079 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 3080 } 3081 } 3082 { 3083 { 3084 BI opval = 0; 3085 CPU (h_xbit) = opval; 3086 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3087 } 3088 { 3089 BI opval = 0; 3090 SET_H_INSN_PREFIXED_P (opval); 3091 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3092 } 3093 } 3094 } 3095 3096 abuf->written = written; 3097 #undef FLD 3098 } 3099 NEXT (vpc); 3100 3101 CASE (sem, INSN_MOVE_SPR_RV32) : /* move ${Ps},${Rd-sfield} */ 3102 { 3103 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3104 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3105 #define FLD(f) abuf->fields.sfmt_mcp.f 3106 int UNUSED written = 0; 3107 IADDR UNUSED pc = abuf->addr; 3108 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3109 3110 { 3111 SI tmp_prno; 3112 SI tmp_newval; 3113 tmp_prno = FLD (f_operand2); 3114 tmp_newval = GET_H_SR (FLD (f_operand2)); 3115 if (EQSI (tmp_prno, 2)) { 3116 { 3117 SI opval = tmp_newval; 3118 SET_H_GR (FLD (f_operand1), opval); 3119 written |= (1 << 4); 3120 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3121 } 3122 } 3123 else if (EQSI (tmp_prno, 3)) { 3124 { 3125 SI tmp_oldregval; 3126 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand1)); 3127 { 3128 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00)); 3129 SET_H_GR (FLD (f_operand1), opval); 3130 written |= (1 << 4); 3131 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3132 } 3133 } 3134 } 3135 else if (EQSI (tmp_prno, 5)) { 3136 { 3137 SI opval = tmp_newval; 3138 SET_H_GR (FLD (f_operand1), opval); 3139 written |= (1 << 4); 3140 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3141 } 3142 } 3143 else if (EQSI (tmp_prno, 6)) { 3144 { 3145 SI opval = tmp_newval; 3146 SET_H_GR (FLD (f_operand1), opval); 3147 written |= (1 << 4); 3148 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3149 } 3150 } 3151 else if (EQSI (tmp_prno, 7)) { 3152 { 3153 SI opval = tmp_newval; 3154 SET_H_GR (FLD (f_operand1), opval); 3155 written |= (1 << 4); 3156 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3157 } 3158 } 3159 else if (EQSI (tmp_prno, 9)) { 3160 { 3161 SI opval = tmp_newval; 3162 SET_H_GR (FLD (f_operand1), opval); 3163 written |= (1 << 4); 3164 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3165 } 3166 } 3167 else if (EQSI (tmp_prno, 10)) { 3168 { 3169 SI opval = tmp_newval; 3170 SET_H_GR (FLD (f_operand1), opval); 3171 written |= (1 << 4); 3172 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3173 } 3174 } 3175 else if (EQSI (tmp_prno, 11)) { 3176 { 3177 SI opval = tmp_newval; 3178 SET_H_GR (FLD (f_operand1), opval); 3179 written |= (1 << 4); 3180 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3181 } 3182 } 3183 else if (EQSI (tmp_prno, 12)) { 3184 { 3185 SI opval = tmp_newval; 3186 SET_H_GR (FLD (f_operand1), opval); 3187 written |= (1 << 4); 3188 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3189 } 3190 } 3191 else if (EQSI (tmp_prno, 13)) { 3192 { 3193 SI opval = tmp_newval; 3194 SET_H_GR (FLD (f_operand1), opval); 3195 written |= (1 << 4); 3196 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3197 } 3198 } 3199 else if (EQSI (tmp_prno, 14)) { 3200 { 3201 SI opval = tmp_newval; 3202 SET_H_GR (FLD (f_operand1), opval); 3203 written |= (1 << 4); 3204 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3205 } 3206 } 3207 else if (EQSI (tmp_prno, 15)) { 3208 { 3209 SI opval = tmp_newval; 3210 SET_H_GR (FLD (f_operand1), opval); 3211 written |= (1 << 4); 3212 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3213 } 3214 } 3215 else if (EQSI (tmp_prno, 0)) { 3216 { 3217 SI tmp_oldregval; 3218 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand1)); 3219 { 3220 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00)); 3221 SET_H_GR (FLD (f_operand1), opval); 3222 written |= (1 << 4); 3223 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3224 } 3225 } 3226 } 3227 else if (EQSI (tmp_prno, 1)) { 3228 { 3229 SI tmp_oldregval; 3230 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand1)); 3231 { 3232 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00)); 3233 SET_H_GR (FLD (f_operand1), opval); 3234 written |= (1 << 4); 3235 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3236 } 3237 } 3238 } 3239 else if (EQSI (tmp_prno, 4)) { 3240 { 3241 SI tmp_oldregval; 3242 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand1)); 3243 { 3244 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 3245 SET_H_GR (FLD (f_operand1), opval); 3246 written |= (1 << 4); 3247 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3248 } 3249 } 3250 } 3251 else if (EQSI (tmp_prno, 8)) { 3252 { 3253 SI opval = tmp_newval; 3254 SET_H_GR (FLD (f_operand1), opval); 3255 written |= (1 << 4); 3256 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3257 } 3258 } 3259 else { 3260 cgen_rtx_error (current_cpu, "move-spr-r from unimplemented register"); 3261 } 3262 { 3263 { 3264 BI opval = 0; 3265 CPU (h_xbit) = opval; 3266 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3267 } 3268 { 3269 BI opval = 0; 3270 SET_H_INSN_PREFIXED_P (opval); 3271 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3272 } 3273 } 3274 } 3275 3276 abuf->written = written; 3277 #undef FLD 3278 } 3279 NEXT (vpc); 3280 3281 CASE (sem, INSN_MOVE_M_SPRV32) : /* move [${Rs}${inc}],${Pd} */ 3282 { 3283 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3284 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3285 #define FLD(f) abuf->fields.sfmt_move_m_sprv32.f 3286 int UNUSED written = 0; 3287 IADDR UNUSED pc = abuf->addr; 3288 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3289 3290 { 3291 SI tmp_rno; 3292 SI tmp_newval; 3293 tmp_rno = FLD (f_operand2); 3294 if (EQSI (tmp_rno, 2)) { 3295 tmp_newval = ({ SI tmp_addr; 3296 SI tmp_tmp_mem; 3297 BI tmp_postinc; 3298 tmp_postinc = FLD (f_memmode); 3299 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 3300 ; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 3301 ; if (NEBI (tmp_postinc, 0)) { 3302 { 3303 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 3304 tmp_addr = ADDSI (tmp_addr, 4); 3305 } 3306 { 3307 SI opval = tmp_addr; 3308 SET_H_GR (FLD (f_operand1), opval); 3309 written |= (1 << 8); 3310 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3311 } 3312 } 3313 } 3314 ; tmp_tmp_mem; }); 3315 } 3316 else if (EQSI (tmp_rno, 3)) { 3317 tmp_newval = EXTQISI (({ SI tmp_addr; 3318 QI tmp_tmp_mem; 3319 BI tmp_postinc; 3320 tmp_postinc = FLD (f_memmode); 3321 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 3322 ; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 3323 ; if (NEBI (tmp_postinc, 0)) { 3324 { 3325 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 3326 tmp_addr = ADDSI (tmp_addr, 1); 3327 } 3328 { 3329 SI opval = tmp_addr; 3330 SET_H_GR (FLD (f_operand1), opval); 3331 written |= (1 << 8); 3332 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3333 } 3334 } 3335 } 3336 ; tmp_tmp_mem; })); 3337 } 3338 else if (EQSI (tmp_rno, 5)) { 3339 tmp_newval = ({ SI tmp_addr; 3340 SI tmp_tmp_mem; 3341 BI tmp_postinc; 3342 tmp_postinc = FLD (f_memmode); 3343 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 3344 ; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 3345 ; if (NEBI (tmp_postinc, 0)) { 3346 { 3347 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 3348 tmp_addr = ADDSI (tmp_addr, 4); 3349 } 3350 { 3351 SI opval = tmp_addr; 3352 SET_H_GR (FLD (f_operand1), opval); 3353 written |= (1 << 8); 3354 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3355 } 3356 } 3357 } 3358 ; tmp_tmp_mem; }); 3359 } 3360 else if (EQSI (tmp_rno, 6)) { 3361 tmp_newval = ({ SI tmp_addr; 3362 SI tmp_tmp_mem; 3363 BI tmp_postinc; 3364 tmp_postinc = FLD (f_memmode); 3365 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 3366 ; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 3367 ; if (NEBI (tmp_postinc, 0)) { 3368 { 3369 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 3370 tmp_addr = ADDSI (tmp_addr, 4); 3371 } 3372 { 3373 SI opval = tmp_addr; 3374 SET_H_GR (FLD (f_operand1), opval); 3375 written |= (1 << 8); 3376 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3377 } 3378 } 3379 } 3380 ; tmp_tmp_mem; }); 3381 } 3382 else if (EQSI (tmp_rno, 7)) { 3383 tmp_newval = ({ SI tmp_addr; 3384 SI tmp_tmp_mem; 3385 BI tmp_postinc; 3386 tmp_postinc = FLD (f_memmode); 3387 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 3388 ; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 3389 ; if (NEBI (tmp_postinc, 0)) { 3390 { 3391 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 3392 tmp_addr = ADDSI (tmp_addr, 4); 3393 } 3394 { 3395 SI opval = tmp_addr; 3396 SET_H_GR (FLD (f_operand1), opval); 3397 written |= (1 << 8); 3398 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3399 } 3400 } 3401 } 3402 ; tmp_tmp_mem; }); 3403 } 3404 else if (EQSI (tmp_rno, 9)) { 3405 tmp_newval = ({ SI tmp_addr; 3406 SI tmp_tmp_mem; 3407 BI tmp_postinc; 3408 tmp_postinc = FLD (f_memmode); 3409 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 3410 ; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 3411 ; if (NEBI (tmp_postinc, 0)) { 3412 { 3413 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 3414 tmp_addr = ADDSI (tmp_addr, 4); 3415 } 3416 { 3417 SI opval = tmp_addr; 3418 SET_H_GR (FLD (f_operand1), opval); 3419 written |= (1 << 8); 3420 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3421 } 3422 } 3423 } 3424 ; tmp_tmp_mem; }); 3425 } 3426 else if (EQSI (tmp_rno, 10)) { 3427 tmp_newval = ({ SI tmp_addr; 3428 SI tmp_tmp_mem; 3429 BI tmp_postinc; 3430 tmp_postinc = FLD (f_memmode); 3431 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 3432 ; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 3433 ; if (NEBI (tmp_postinc, 0)) { 3434 { 3435 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 3436 tmp_addr = ADDSI (tmp_addr, 4); 3437 } 3438 { 3439 SI opval = tmp_addr; 3440 SET_H_GR (FLD (f_operand1), opval); 3441 written |= (1 << 8); 3442 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3443 } 3444 } 3445 } 3446 ; tmp_tmp_mem; }); 3447 } 3448 else if (EQSI (tmp_rno, 11)) { 3449 tmp_newval = ({ SI tmp_addr; 3450 SI tmp_tmp_mem; 3451 BI tmp_postinc; 3452 tmp_postinc = FLD (f_memmode); 3453 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 3454 ; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 3455 ; if (NEBI (tmp_postinc, 0)) { 3456 { 3457 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 3458 tmp_addr = ADDSI (tmp_addr, 4); 3459 } 3460 { 3461 SI opval = tmp_addr; 3462 SET_H_GR (FLD (f_operand1), opval); 3463 written |= (1 << 8); 3464 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3465 } 3466 } 3467 } 3468 ; tmp_tmp_mem; }); 3469 } 3470 else if (EQSI (tmp_rno, 12)) { 3471 tmp_newval = ({ SI tmp_addr; 3472 SI tmp_tmp_mem; 3473 BI tmp_postinc; 3474 tmp_postinc = FLD (f_memmode); 3475 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 3476 ; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 3477 ; if (NEBI (tmp_postinc, 0)) { 3478 { 3479 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 3480 tmp_addr = ADDSI (tmp_addr, 4); 3481 } 3482 { 3483 SI opval = tmp_addr; 3484 SET_H_GR (FLD (f_operand1), opval); 3485 written |= (1 << 8); 3486 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3487 } 3488 } 3489 } 3490 ; tmp_tmp_mem; }); 3491 } 3492 else if (EQSI (tmp_rno, 13)) { 3493 tmp_newval = ({ SI tmp_addr; 3494 SI tmp_tmp_mem; 3495 BI tmp_postinc; 3496 tmp_postinc = FLD (f_memmode); 3497 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 3498 ; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 3499 ; if (NEBI (tmp_postinc, 0)) { 3500 { 3501 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 3502 tmp_addr = ADDSI (tmp_addr, 4); 3503 } 3504 { 3505 SI opval = tmp_addr; 3506 SET_H_GR (FLD (f_operand1), opval); 3507 written |= (1 << 8); 3508 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3509 } 3510 } 3511 } 3512 ; tmp_tmp_mem; }); 3513 } 3514 else if (EQSI (tmp_rno, 14)) { 3515 tmp_newval = ({ SI tmp_addr; 3516 SI tmp_tmp_mem; 3517 BI tmp_postinc; 3518 tmp_postinc = FLD (f_memmode); 3519 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 3520 ; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 3521 ; if (NEBI (tmp_postinc, 0)) { 3522 { 3523 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 3524 tmp_addr = ADDSI (tmp_addr, 4); 3525 } 3526 { 3527 SI opval = tmp_addr; 3528 SET_H_GR (FLD (f_operand1), opval); 3529 written |= (1 << 8); 3530 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3531 } 3532 } 3533 } 3534 ; tmp_tmp_mem; }); 3535 } 3536 else if (EQSI (tmp_rno, 15)) { 3537 tmp_newval = ({ SI tmp_addr; 3538 SI tmp_tmp_mem; 3539 BI tmp_postinc; 3540 tmp_postinc = FLD (f_memmode); 3541 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 3542 ; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 3543 ; if (NEBI (tmp_postinc, 0)) { 3544 { 3545 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 3546 tmp_addr = ADDSI (tmp_addr, 4); 3547 } 3548 { 3549 SI opval = tmp_addr; 3550 SET_H_GR (FLD (f_operand1), opval); 3551 written |= (1 << 8); 3552 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3553 } 3554 } 3555 } 3556 ; tmp_tmp_mem; }); 3557 } 3558 else { 3559 cgen_rtx_error (current_cpu, "Trying to set unimplemented special register"); 3560 } 3561 { 3562 SI opval = tmp_newval; 3563 SET_H_SR (FLD (f_operand2), opval); 3564 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 3565 } 3566 { 3567 { 3568 BI opval = 0; 3569 CPU (h_xbit) = opval; 3570 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3571 } 3572 { 3573 BI opval = 0; 3574 SET_H_INSN_PREFIXED_P (opval); 3575 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3576 } 3577 } 3578 } 3579 3580 abuf->written = written; 3581 #undef FLD 3582 } 3583 NEXT (vpc); 3584 3585 CASE (sem, INSN_MOVE_C_SPRV32_P2) : /* move ${const32},${Pd} */ 3586 { 3587 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3588 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3589 #define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f 3590 int UNUSED written = 0; 3591 IADDR UNUSED pc = abuf->addr; 3592 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 3593 3594 { 3595 { 3596 SI opval = FLD (f_indir_pc__dword); 3597 SET_H_SR (FLD (f_operand2), opval); 3598 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 3599 } 3600 { 3601 { 3602 BI opval = 0; 3603 CPU (h_xbit) = opval; 3604 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3605 } 3606 { 3607 BI opval = 0; 3608 SET_H_INSN_PREFIXED_P (opval); 3609 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3610 } 3611 } 3612 } 3613 3614 #undef FLD 3615 } 3616 NEXT (vpc); 3617 3618 CASE (sem, INSN_MOVE_C_SPRV32_P3) : /* move ${const32},${Pd} */ 3619 { 3620 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3621 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3622 #define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f 3623 int UNUSED written = 0; 3624 IADDR UNUSED pc = abuf->addr; 3625 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 3626 3627 { 3628 { 3629 SI opval = FLD (f_indir_pc__dword); 3630 SET_H_SR (FLD (f_operand2), opval); 3631 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 3632 } 3633 { 3634 { 3635 BI opval = 0; 3636 CPU (h_xbit) = opval; 3637 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3638 } 3639 { 3640 BI opval = 0; 3641 SET_H_INSN_PREFIXED_P (opval); 3642 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3643 } 3644 } 3645 } 3646 3647 #undef FLD 3648 } 3649 NEXT (vpc); 3650 3651 CASE (sem, INSN_MOVE_C_SPRV32_P5) : /* move ${const32},${Pd} */ 3652 { 3653 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3654 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3655 #define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f 3656 int UNUSED written = 0; 3657 IADDR UNUSED pc = abuf->addr; 3658 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 3659 3660 { 3661 { 3662 SI opval = FLD (f_indir_pc__dword); 3663 SET_H_SR (FLD (f_operand2), opval); 3664 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 3665 } 3666 { 3667 { 3668 BI opval = 0; 3669 CPU (h_xbit) = opval; 3670 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3671 } 3672 { 3673 BI opval = 0; 3674 SET_H_INSN_PREFIXED_P (opval); 3675 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3676 } 3677 } 3678 } 3679 3680 #undef FLD 3681 } 3682 NEXT (vpc); 3683 3684 CASE (sem, INSN_MOVE_C_SPRV32_P6) : /* move ${const32},${Pd} */ 3685 { 3686 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3687 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3688 #define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f 3689 int UNUSED written = 0; 3690 IADDR UNUSED pc = abuf->addr; 3691 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 3692 3693 { 3694 { 3695 SI opval = FLD (f_indir_pc__dword); 3696 SET_H_SR (FLD (f_operand2), opval); 3697 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 3698 } 3699 { 3700 { 3701 BI opval = 0; 3702 CPU (h_xbit) = opval; 3703 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3704 } 3705 { 3706 BI opval = 0; 3707 SET_H_INSN_PREFIXED_P (opval); 3708 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3709 } 3710 } 3711 } 3712 3713 #undef FLD 3714 } 3715 NEXT (vpc); 3716 3717 CASE (sem, INSN_MOVE_C_SPRV32_P7) : /* move ${const32},${Pd} */ 3718 { 3719 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3720 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3721 #define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f 3722 int UNUSED written = 0; 3723 IADDR UNUSED pc = abuf->addr; 3724 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 3725 3726 { 3727 { 3728 SI opval = FLD (f_indir_pc__dword); 3729 SET_H_SR (FLD (f_operand2), opval); 3730 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 3731 } 3732 { 3733 { 3734 BI opval = 0; 3735 CPU (h_xbit) = opval; 3736 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3737 } 3738 { 3739 BI opval = 0; 3740 SET_H_INSN_PREFIXED_P (opval); 3741 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3742 } 3743 } 3744 } 3745 3746 #undef FLD 3747 } 3748 NEXT (vpc); 3749 3750 CASE (sem, INSN_MOVE_C_SPRV32_P9) : /* move ${const32},${Pd} */ 3751 { 3752 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3753 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3754 #define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f 3755 int UNUSED written = 0; 3756 IADDR UNUSED pc = abuf->addr; 3757 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 3758 3759 { 3760 { 3761 SI opval = FLD (f_indir_pc__dword); 3762 SET_H_SR (FLD (f_operand2), opval); 3763 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 3764 } 3765 { 3766 { 3767 BI opval = 0; 3768 CPU (h_xbit) = opval; 3769 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3770 } 3771 { 3772 BI opval = 0; 3773 SET_H_INSN_PREFIXED_P (opval); 3774 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3775 } 3776 } 3777 } 3778 3779 #undef FLD 3780 } 3781 NEXT (vpc); 3782 3783 CASE (sem, INSN_MOVE_C_SPRV32_P10) : /* move ${const32},${Pd} */ 3784 { 3785 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3786 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3787 #define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f 3788 int UNUSED written = 0; 3789 IADDR UNUSED pc = abuf->addr; 3790 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 3791 3792 { 3793 { 3794 SI opval = FLD (f_indir_pc__dword); 3795 SET_H_SR (FLD (f_operand2), opval); 3796 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 3797 } 3798 { 3799 { 3800 BI opval = 0; 3801 CPU (h_xbit) = opval; 3802 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3803 } 3804 { 3805 BI opval = 0; 3806 SET_H_INSN_PREFIXED_P (opval); 3807 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3808 } 3809 } 3810 } 3811 3812 #undef FLD 3813 } 3814 NEXT (vpc); 3815 3816 CASE (sem, INSN_MOVE_C_SPRV32_P11) : /* move ${const32},${Pd} */ 3817 { 3818 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3819 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3820 #define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f 3821 int UNUSED written = 0; 3822 IADDR UNUSED pc = abuf->addr; 3823 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 3824 3825 { 3826 { 3827 SI opval = FLD (f_indir_pc__dword); 3828 SET_H_SR (FLD (f_operand2), opval); 3829 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 3830 } 3831 { 3832 { 3833 BI opval = 0; 3834 CPU (h_xbit) = opval; 3835 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3836 } 3837 { 3838 BI opval = 0; 3839 SET_H_INSN_PREFIXED_P (opval); 3840 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3841 } 3842 } 3843 } 3844 3845 #undef FLD 3846 } 3847 NEXT (vpc); 3848 3849 CASE (sem, INSN_MOVE_C_SPRV32_P12) : /* move ${const32},${Pd} */ 3850 { 3851 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3852 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3853 #define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f 3854 int UNUSED written = 0; 3855 IADDR UNUSED pc = abuf->addr; 3856 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 3857 3858 { 3859 { 3860 SI opval = FLD (f_indir_pc__dword); 3861 SET_H_SR (FLD (f_operand2), opval); 3862 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 3863 } 3864 { 3865 { 3866 BI opval = 0; 3867 CPU (h_xbit) = opval; 3868 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3869 } 3870 { 3871 BI opval = 0; 3872 SET_H_INSN_PREFIXED_P (opval); 3873 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3874 } 3875 } 3876 } 3877 3878 #undef FLD 3879 } 3880 NEXT (vpc); 3881 3882 CASE (sem, INSN_MOVE_C_SPRV32_P13) : /* move ${const32},${Pd} */ 3883 { 3884 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3885 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3886 #define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f 3887 int UNUSED written = 0; 3888 IADDR UNUSED pc = abuf->addr; 3889 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 3890 3891 { 3892 { 3893 SI opval = FLD (f_indir_pc__dword); 3894 SET_H_SR (FLD (f_operand2), opval); 3895 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 3896 } 3897 { 3898 { 3899 BI opval = 0; 3900 CPU (h_xbit) = opval; 3901 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3902 } 3903 { 3904 BI opval = 0; 3905 SET_H_INSN_PREFIXED_P (opval); 3906 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3907 } 3908 } 3909 } 3910 3911 #undef FLD 3912 } 3913 NEXT (vpc); 3914 3915 CASE (sem, INSN_MOVE_C_SPRV32_P14) : /* move ${const32},${Pd} */ 3916 { 3917 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3918 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3919 #define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f 3920 int UNUSED written = 0; 3921 IADDR UNUSED pc = abuf->addr; 3922 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 3923 3924 { 3925 { 3926 SI opval = FLD (f_indir_pc__dword); 3927 SET_H_SR (FLD (f_operand2), opval); 3928 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 3929 } 3930 { 3931 { 3932 BI opval = 0; 3933 CPU (h_xbit) = opval; 3934 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3935 } 3936 { 3937 BI opval = 0; 3938 SET_H_INSN_PREFIXED_P (opval); 3939 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3940 } 3941 } 3942 } 3943 3944 #undef FLD 3945 } 3946 NEXT (vpc); 3947 3948 CASE (sem, INSN_MOVE_C_SPRV32_P15) : /* move ${const32},${Pd} */ 3949 { 3950 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3951 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3952 #define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f 3953 int UNUSED written = 0; 3954 IADDR UNUSED pc = abuf->addr; 3955 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 3956 3957 { 3958 { 3959 SI opval = FLD (f_indir_pc__dword); 3960 SET_H_SR (FLD (f_operand2), opval); 3961 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 3962 } 3963 { 3964 { 3965 BI opval = 0; 3966 CPU (h_xbit) = opval; 3967 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 3968 } 3969 { 3970 BI opval = 0; 3971 SET_H_INSN_PREFIXED_P (opval); 3972 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 3973 } 3974 } 3975 } 3976 3977 #undef FLD 3978 } 3979 NEXT (vpc); 3980 3981 CASE (sem, INSN_MOVE_SPR_MV32) : /* move ${Ps},[${Rd-sfield}${inc}] */ 3982 { 3983 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3984 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3985 #define FLD(f) abuf->fields.sfmt_move_spr_mv32.f 3986 int UNUSED written = 0; 3987 IADDR UNUSED pc = abuf->addr; 3988 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3989 3990 { 3991 SI tmp_rno; 3992 tmp_rno = FLD (f_operand2); 3993 if (EQSI (tmp_rno, 2)) { 3994 { 3995 SI tmp_addr; 3996 BI tmp_postinc; 3997 tmp_postinc = FLD (f_memmode); 3998 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 3999 if (ANDIF (GET_H_V32_V32 (), NEBI (CPU (h_xbit), 0))) { 4000 if (EQBI (CPU (h_pbit), 0)) { 4001 { 4002 { 4003 SI opval = GET_H_SR (FLD (f_operand2)); 4004 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4005 written |= (1 << 13); 4006 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4007 } 4008 { 4009 BI opval = CPU (h_pbit); 4010 CPU (h_cbit) = opval; 4011 written |= (1 << 10); 4012 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4013 } 4014 } 4015 } else { 4016 { 4017 BI opval = 1; 4018 CPU (h_cbit) = opval; 4019 written |= (1 << 10); 4020 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4021 } 4022 } 4023 } else { 4024 { 4025 SI opval = GET_H_SR (FLD (f_operand2)); 4026 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4027 written |= (1 << 13); 4028 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4029 } 4030 } 4031 if (NEBI (tmp_postinc, 0)) { 4032 { 4033 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4034 tmp_addr = ADDSI (tmp_addr, 4); 4035 } 4036 { 4037 SI opval = tmp_addr; 4038 SET_H_GR (FLD (f_operand1), opval); 4039 written |= (1 << 9); 4040 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4041 } 4042 } 4043 } 4044 } 4045 } 4046 else if (EQSI (tmp_rno, 3)) { 4047 { 4048 SI tmp_addr; 4049 BI tmp_postinc; 4050 tmp_postinc = FLD (f_memmode); 4051 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 4052 if (ANDIF (GET_H_V32_V32 (), NEBI (CPU (h_xbit), 0))) { 4053 if (EQBI (CPU (h_pbit), 0)) { 4054 { 4055 { 4056 QI opval = GET_H_SR (FLD (f_operand2)); 4057 SETMEMQI (current_cpu, pc, tmp_addr, opval); 4058 written |= (1 << 12); 4059 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4060 } 4061 { 4062 BI opval = CPU (h_pbit); 4063 CPU (h_cbit) = opval; 4064 written |= (1 << 10); 4065 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4066 } 4067 } 4068 } else { 4069 { 4070 BI opval = 1; 4071 CPU (h_cbit) = opval; 4072 written |= (1 << 10); 4073 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4074 } 4075 } 4076 } else { 4077 { 4078 QI opval = GET_H_SR (FLD (f_operand2)); 4079 SETMEMQI (current_cpu, pc, tmp_addr, opval); 4080 written |= (1 << 12); 4081 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4082 } 4083 } 4084 if (NEBI (tmp_postinc, 0)) { 4085 { 4086 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4087 tmp_addr = ADDSI (tmp_addr, 1); 4088 } 4089 { 4090 SI opval = tmp_addr; 4091 SET_H_GR (FLD (f_operand1), opval); 4092 written |= (1 << 9); 4093 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4094 } 4095 } 4096 } 4097 } 4098 } 4099 else if (EQSI (tmp_rno, 5)) { 4100 { 4101 SI tmp_addr; 4102 BI tmp_postinc; 4103 tmp_postinc = FLD (f_memmode); 4104 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 4105 if (ANDIF (GET_H_V32_V32 (), NEBI (CPU (h_xbit), 0))) { 4106 if (EQBI (CPU (h_pbit), 0)) { 4107 { 4108 { 4109 SI opval = GET_H_SR (FLD (f_operand2)); 4110 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4111 written |= (1 << 13); 4112 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4113 } 4114 { 4115 BI opval = CPU (h_pbit); 4116 CPU (h_cbit) = opval; 4117 written |= (1 << 10); 4118 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4119 } 4120 } 4121 } else { 4122 { 4123 BI opval = 1; 4124 CPU (h_cbit) = opval; 4125 written |= (1 << 10); 4126 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4127 } 4128 } 4129 } else { 4130 { 4131 SI opval = GET_H_SR (FLD (f_operand2)); 4132 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4133 written |= (1 << 13); 4134 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4135 } 4136 } 4137 if (NEBI (tmp_postinc, 0)) { 4138 { 4139 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4140 tmp_addr = ADDSI (tmp_addr, 4); 4141 } 4142 { 4143 SI opval = tmp_addr; 4144 SET_H_GR (FLD (f_operand1), opval); 4145 written |= (1 << 9); 4146 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4147 } 4148 } 4149 } 4150 } 4151 } 4152 else if (EQSI (tmp_rno, 6)) { 4153 { 4154 SI tmp_addr; 4155 BI tmp_postinc; 4156 tmp_postinc = FLD (f_memmode); 4157 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 4158 if (ANDIF (GET_H_V32_V32 (), NEBI (CPU (h_xbit), 0))) { 4159 if (EQBI (CPU (h_pbit), 0)) { 4160 { 4161 { 4162 SI opval = GET_H_SR (FLD (f_operand2)); 4163 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4164 written |= (1 << 13); 4165 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4166 } 4167 { 4168 BI opval = CPU (h_pbit); 4169 CPU (h_cbit) = opval; 4170 written |= (1 << 10); 4171 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4172 } 4173 } 4174 } else { 4175 { 4176 BI opval = 1; 4177 CPU (h_cbit) = opval; 4178 written |= (1 << 10); 4179 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4180 } 4181 } 4182 } else { 4183 { 4184 SI opval = GET_H_SR (FLD (f_operand2)); 4185 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4186 written |= (1 << 13); 4187 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4188 } 4189 } 4190 if (NEBI (tmp_postinc, 0)) { 4191 { 4192 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4193 tmp_addr = ADDSI (tmp_addr, 4); 4194 } 4195 { 4196 SI opval = tmp_addr; 4197 SET_H_GR (FLD (f_operand1), opval); 4198 written |= (1 << 9); 4199 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4200 } 4201 } 4202 } 4203 } 4204 } 4205 else if (EQSI (tmp_rno, 7)) { 4206 { 4207 SI tmp_addr; 4208 BI tmp_postinc; 4209 tmp_postinc = FLD (f_memmode); 4210 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 4211 if (ANDIF (GET_H_V32_V32 (), NEBI (CPU (h_xbit), 0))) { 4212 if (EQBI (CPU (h_pbit), 0)) { 4213 { 4214 { 4215 SI opval = GET_H_SR (FLD (f_operand2)); 4216 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4217 written |= (1 << 13); 4218 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4219 } 4220 { 4221 BI opval = CPU (h_pbit); 4222 CPU (h_cbit) = opval; 4223 written |= (1 << 10); 4224 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4225 } 4226 } 4227 } else { 4228 { 4229 BI opval = 1; 4230 CPU (h_cbit) = opval; 4231 written |= (1 << 10); 4232 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4233 } 4234 } 4235 } else { 4236 { 4237 SI opval = GET_H_SR (FLD (f_operand2)); 4238 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4239 written |= (1 << 13); 4240 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4241 } 4242 } 4243 if (NEBI (tmp_postinc, 0)) { 4244 { 4245 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4246 tmp_addr = ADDSI (tmp_addr, 4); 4247 } 4248 { 4249 SI opval = tmp_addr; 4250 SET_H_GR (FLD (f_operand1), opval); 4251 written |= (1 << 9); 4252 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4253 } 4254 } 4255 } 4256 } 4257 } 4258 else if (EQSI (tmp_rno, 9)) { 4259 { 4260 SI tmp_addr; 4261 BI tmp_postinc; 4262 tmp_postinc = FLD (f_memmode); 4263 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 4264 if (ANDIF (GET_H_V32_V32 (), NEBI (CPU (h_xbit), 0))) { 4265 if (EQBI (CPU (h_pbit), 0)) { 4266 { 4267 { 4268 SI opval = GET_H_SR (FLD (f_operand2)); 4269 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4270 written |= (1 << 13); 4271 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4272 } 4273 { 4274 BI opval = CPU (h_pbit); 4275 CPU (h_cbit) = opval; 4276 written |= (1 << 10); 4277 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4278 } 4279 } 4280 } else { 4281 { 4282 BI opval = 1; 4283 CPU (h_cbit) = opval; 4284 written |= (1 << 10); 4285 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4286 } 4287 } 4288 } else { 4289 { 4290 SI opval = GET_H_SR (FLD (f_operand2)); 4291 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4292 written |= (1 << 13); 4293 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4294 } 4295 } 4296 if (NEBI (tmp_postinc, 0)) { 4297 { 4298 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4299 tmp_addr = ADDSI (tmp_addr, 4); 4300 } 4301 { 4302 SI opval = tmp_addr; 4303 SET_H_GR (FLD (f_operand1), opval); 4304 written |= (1 << 9); 4305 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4306 } 4307 } 4308 } 4309 } 4310 } 4311 else if (EQSI (tmp_rno, 10)) { 4312 { 4313 SI tmp_addr; 4314 BI tmp_postinc; 4315 tmp_postinc = FLD (f_memmode); 4316 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 4317 if (ANDIF (GET_H_V32_V32 (), NEBI (CPU (h_xbit), 0))) { 4318 if (EQBI (CPU (h_pbit), 0)) { 4319 { 4320 { 4321 SI opval = GET_H_SR (FLD (f_operand2)); 4322 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4323 written |= (1 << 13); 4324 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4325 } 4326 { 4327 BI opval = CPU (h_pbit); 4328 CPU (h_cbit) = opval; 4329 written |= (1 << 10); 4330 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4331 } 4332 } 4333 } else { 4334 { 4335 BI opval = 1; 4336 CPU (h_cbit) = opval; 4337 written |= (1 << 10); 4338 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4339 } 4340 } 4341 } else { 4342 { 4343 SI opval = GET_H_SR (FLD (f_operand2)); 4344 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4345 written |= (1 << 13); 4346 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4347 } 4348 } 4349 if (NEBI (tmp_postinc, 0)) { 4350 { 4351 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4352 tmp_addr = ADDSI (tmp_addr, 4); 4353 } 4354 { 4355 SI opval = tmp_addr; 4356 SET_H_GR (FLD (f_operand1), opval); 4357 written |= (1 << 9); 4358 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4359 } 4360 } 4361 } 4362 } 4363 } 4364 else if (EQSI (tmp_rno, 11)) { 4365 { 4366 SI tmp_addr; 4367 BI tmp_postinc; 4368 tmp_postinc = FLD (f_memmode); 4369 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 4370 if (ANDIF (GET_H_V32_V32 (), NEBI (CPU (h_xbit), 0))) { 4371 if (EQBI (CPU (h_pbit), 0)) { 4372 { 4373 { 4374 SI opval = GET_H_SR (FLD (f_operand2)); 4375 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4376 written |= (1 << 13); 4377 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4378 } 4379 { 4380 BI opval = CPU (h_pbit); 4381 CPU (h_cbit) = opval; 4382 written |= (1 << 10); 4383 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4384 } 4385 } 4386 } else { 4387 { 4388 BI opval = 1; 4389 CPU (h_cbit) = opval; 4390 written |= (1 << 10); 4391 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4392 } 4393 } 4394 } else { 4395 { 4396 SI opval = GET_H_SR (FLD (f_operand2)); 4397 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4398 written |= (1 << 13); 4399 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4400 } 4401 } 4402 if (NEBI (tmp_postinc, 0)) { 4403 { 4404 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4405 tmp_addr = ADDSI (tmp_addr, 4); 4406 } 4407 { 4408 SI opval = tmp_addr; 4409 SET_H_GR (FLD (f_operand1), opval); 4410 written |= (1 << 9); 4411 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4412 } 4413 } 4414 } 4415 } 4416 } 4417 else if (EQSI (tmp_rno, 12)) { 4418 { 4419 SI tmp_addr; 4420 BI tmp_postinc; 4421 tmp_postinc = FLD (f_memmode); 4422 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 4423 if (ANDIF (GET_H_V32_V32 (), NEBI (CPU (h_xbit), 0))) { 4424 if (EQBI (CPU (h_pbit), 0)) { 4425 { 4426 { 4427 SI opval = GET_H_SR (FLD (f_operand2)); 4428 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4429 written |= (1 << 13); 4430 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4431 } 4432 { 4433 BI opval = CPU (h_pbit); 4434 CPU (h_cbit) = opval; 4435 written |= (1 << 10); 4436 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4437 } 4438 } 4439 } else { 4440 { 4441 BI opval = 1; 4442 CPU (h_cbit) = opval; 4443 written |= (1 << 10); 4444 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4445 } 4446 } 4447 } else { 4448 { 4449 SI opval = GET_H_SR (FLD (f_operand2)); 4450 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4451 written |= (1 << 13); 4452 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4453 } 4454 } 4455 if (NEBI (tmp_postinc, 0)) { 4456 { 4457 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4458 tmp_addr = ADDSI (tmp_addr, 4); 4459 } 4460 { 4461 SI opval = tmp_addr; 4462 SET_H_GR (FLD (f_operand1), opval); 4463 written |= (1 << 9); 4464 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4465 } 4466 } 4467 } 4468 } 4469 } 4470 else if (EQSI (tmp_rno, 13)) { 4471 { 4472 SI tmp_addr; 4473 BI tmp_postinc; 4474 tmp_postinc = FLD (f_memmode); 4475 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 4476 if (ANDIF (GET_H_V32_V32 (), NEBI (CPU (h_xbit), 0))) { 4477 if (EQBI (CPU (h_pbit), 0)) { 4478 { 4479 { 4480 SI opval = GET_H_SR (FLD (f_operand2)); 4481 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4482 written |= (1 << 13); 4483 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4484 } 4485 { 4486 BI opval = CPU (h_pbit); 4487 CPU (h_cbit) = opval; 4488 written |= (1 << 10); 4489 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4490 } 4491 } 4492 } else { 4493 { 4494 BI opval = 1; 4495 CPU (h_cbit) = opval; 4496 written |= (1 << 10); 4497 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4498 } 4499 } 4500 } else { 4501 { 4502 SI opval = GET_H_SR (FLD (f_operand2)); 4503 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4504 written |= (1 << 13); 4505 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4506 } 4507 } 4508 if (NEBI (tmp_postinc, 0)) { 4509 { 4510 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4511 tmp_addr = ADDSI (tmp_addr, 4); 4512 } 4513 { 4514 SI opval = tmp_addr; 4515 SET_H_GR (FLD (f_operand1), opval); 4516 written |= (1 << 9); 4517 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4518 } 4519 } 4520 } 4521 } 4522 } 4523 else if (EQSI (tmp_rno, 14)) { 4524 { 4525 SI tmp_addr; 4526 BI tmp_postinc; 4527 tmp_postinc = FLD (f_memmode); 4528 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 4529 if (ANDIF (GET_H_V32_V32 (), NEBI (CPU (h_xbit), 0))) { 4530 if (EQBI (CPU (h_pbit), 0)) { 4531 { 4532 { 4533 SI opval = GET_H_SR (FLD (f_operand2)); 4534 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4535 written |= (1 << 13); 4536 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4537 } 4538 { 4539 BI opval = CPU (h_pbit); 4540 CPU (h_cbit) = opval; 4541 written |= (1 << 10); 4542 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4543 } 4544 } 4545 } else { 4546 { 4547 BI opval = 1; 4548 CPU (h_cbit) = opval; 4549 written |= (1 << 10); 4550 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4551 } 4552 } 4553 } else { 4554 { 4555 SI opval = GET_H_SR (FLD (f_operand2)); 4556 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4557 written |= (1 << 13); 4558 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4559 } 4560 } 4561 if (NEBI (tmp_postinc, 0)) { 4562 { 4563 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4564 tmp_addr = ADDSI (tmp_addr, 4); 4565 } 4566 { 4567 SI opval = tmp_addr; 4568 SET_H_GR (FLD (f_operand1), opval); 4569 written |= (1 << 9); 4570 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4571 } 4572 } 4573 } 4574 } 4575 } 4576 else if (EQSI (tmp_rno, 15)) { 4577 { 4578 SI tmp_addr; 4579 BI tmp_postinc; 4580 tmp_postinc = FLD (f_memmode); 4581 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 4582 if (ANDIF (GET_H_V32_V32 (), NEBI (CPU (h_xbit), 0))) { 4583 if (EQBI (CPU (h_pbit), 0)) { 4584 { 4585 { 4586 SI opval = GET_H_SR (FLD (f_operand2)); 4587 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4588 written |= (1 << 13); 4589 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4590 } 4591 { 4592 BI opval = CPU (h_pbit); 4593 CPU (h_cbit) = opval; 4594 written |= (1 << 10); 4595 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4596 } 4597 } 4598 } else { 4599 { 4600 BI opval = 1; 4601 CPU (h_cbit) = opval; 4602 written |= (1 << 10); 4603 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4604 } 4605 } 4606 } else { 4607 { 4608 SI opval = GET_H_SR (FLD (f_operand2)); 4609 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4610 written |= (1 << 13); 4611 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4612 } 4613 } 4614 if (NEBI (tmp_postinc, 0)) { 4615 { 4616 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4617 tmp_addr = ADDSI (tmp_addr, 4); 4618 } 4619 { 4620 SI opval = tmp_addr; 4621 SET_H_GR (FLD (f_operand1), opval); 4622 written |= (1 << 9); 4623 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4624 } 4625 } 4626 } 4627 } 4628 } 4629 else if (EQSI (tmp_rno, 0)) { 4630 { 4631 SI tmp_addr; 4632 BI tmp_postinc; 4633 tmp_postinc = FLD (f_memmode); 4634 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 4635 if (ANDIF (GET_H_V32_V32 (), NEBI (CPU (h_xbit), 0))) { 4636 if (EQBI (CPU (h_pbit), 0)) { 4637 { 4638 { 4639 QI opval = GET_H_SR (FLD (f_operand2)); 4640 SETMEMQI (current_cpu, pc, tmp_addr, opval); 4641 written |= (1 << 12); 4642 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4643 } 4644 { 4645 BI opval = CPU (h_pbit); 4646 CPU (h_cbit) = opval; 4647 written |= (1 << 10); 4648 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4649 } 4650 } 4651 } else { 4652 { 4653 BI opval = 1; 4654 CPU (h_cbit) = opval; 4655 written |= (1 << 10); 4656 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4657 } 4658 } 4659 } else { 4660 { 4661 QI opval = GET_H_SR (FLD (f_operand2)); 4662 SETMEMQI (current_cpu, pc, tmp_addr, opval); 4663 written |= (1 << 12); 4664 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4665 } 4666 } 4667 if (NEBI (tmp_postinc, 0)) { 4668 { 4669 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4670 tmp_addr = ADDSI (tmp_addr, 1); 4671 } 4672 { 4673 SI opval = tmp_addr; 4674 SET_H_GR (FLD (f_operand1), opval); 4675 written |= (1 << 9); 4676 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4677 } 4678 } 4679 } 4680 } 4681 } 4682 else if (EQSI (tmp_rno, 1)) { 4683 { 4684 SI tmp_addr; 4685 BI tmp_postinc; 4686 tmp_postinc = FLD (f_memmode); 4687 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 4688 if (ANDIF (GET_H_V32_V32 (), NEBI (CPU (h_xbit), 0))) { 4689 if (EQBI (CPU (h_pbit), 0)) { 4690 { 4691 { 4692 QI opval = GET_H_SR (FLD (f_operand2)); 4693 SETMEMQI (current_cpu, pc, tmp_addr, opval); 4694 written |= (1 << 12); 4695 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4696 } 4697 { 4698 BI opval = CPU (h_pbit); 4699 CPU (h_cbit) = opval; 4700 written |= (1 << 10); 4701 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4702 } 4703 } 4704 } else { 4705 { 4706 BI opval = 1; 4707 CPU (h_cbit) = opval; 4708 written |= (1 << 10); 4709 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4710 } 4711 } 4712 } else { 4713 { 4714 QI opval = GET_H_SR (FLD (f_operand2)); 4715 SETMEMQI (current_cpu, pc, tmp_addr, opval); 4716 written |= (1 << 12); 4717 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4718 } 4719 } 4720 if (NEBI (tmp_postinc, 0)) { 4721 { 4722 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4723 tmp_addr = ADDSI (tmp_addr, 1); 4724 } 4725 { 4726 SI opval = tmp_addr; 4727 SET_H_GR (FLD (f_operand1), opval); 4728 written |= (1 << 9); 4729 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4730 } 4731 } 4732 } 4733 } 4734 } 4735 else if (EQSI (tmp_rno, 4)) { 4736 { 4737 SI tmp_addr; 4738 BI tmp_postinc; 4739 tmp_postinc = FLD (f_memmode); 4740 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 4741 if (ANDIF (GET_H_V32_V32 (), NEBI (CPU (h_xbit), 0))) { 4742 if (EQBI (CPU (h_pbit), 0)) { 4743 { 4744 { 4745 HI opval = GET_H_SR (FLD (f_operand2)); 4746 SETMEMHI (current_cpu, pc, tmp_addr, opval); 4747 written |= (1 << 11); 4748 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4749 } 4750 { 4751 BI opval = CPU (h_pbit); 4752 CPU (h_cbit) = opval; 4753 written |= (1 << 10); 4754 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4755 } 4756 } 4757 } else { 4758 { 4759 BI opval = 1; 4760 CPU (h_cbit) = opval; 4761 written |= (1 << 10); 4762 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4763 } 4764 } 4765 } else { 4766 { 4767 HI opval = GET_H_SR (FLD (f_operand2)); 4768 SETMEMHI (current_cpu, pc, tmp_addr, opval); 4769 written |= (1 << 11); 4770 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4771 } 4772 } 4773 if (NEBI (tmp_postinc, 0)) { 4774 { 4775 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4776 tmp_addr = ADDSI (tmp_addr, 2); 4777 } 4778 { 4779 SI opval = tmp_addr; 4780 SET_H_GR (FLD (f_operand1), opval); 4781 written |= (1 << 9); 4782 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4783 } 4784 } 4785 } 4786 } 4787 } 4788 else if (EQSI (tmp_rno, 8)) { 4789 { 4790 SI tmp_addr; 4791 BI tmp_postinc; 4792 tmp_postinc = FLD (f_memmode); 4793 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 4794 if (ANDIF (GET_H_V32_V32 (), NEBI (CPU (h_xbit), 0))) { 4795 if (EQBI (CPU (h_pbit), 0)) { 4796 { 4797 { 4798 SI opval = GET_H_SR (FLD (f_operand2)); 4799 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4800 written |= (1 << 13); 4801 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4802 } 4803 { 4804 BI opval = CPU (h_pbit); 4805 CPU (h_cbit) = opval; 4806 written |= (1 << 10); 4807 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4808 } 4809 } 4810 } else { 4811 { 4812 BI opval = 1; 4813 CPU (h_cbit) = opval; 4814 written |= (1 << 10); 4815 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 4816 } 4817 } 4818 } else { 4819 { 4820 SI opval = GET_H_SR (FLD (f_operand2)); 4821 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4822 written |= (1 << 13); 4823 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4824 } 4825 } 4826 if (NEBI (tmp_postinc, 0)) { 4827 { 4828 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 4829 tmp_addr = ADDSI (tmp_addr, 4); 4830 } 4831 { 4832 SI opval = tmp_addr; 4833 SET_H_GR (FLD (f_operand1), opval); 4834 written |= (1 << 9); 4835 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4836 } 4837 } 4838 } 4839 } 4840 } 4841 else { 4842 cgen_rtx_error (current_cpu, "write from unimplemented special register"); 4843 } 4844 { 4845 { 4846 BI opval = 0; 4847 CPU (h_xbit) = opval; 4848 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 4849 } 4850 { 4851 BI opval = 0; 4852 SET_H_INSN_PREFIXED_P (opval); 4853 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 4854 } 4855 } 4856 } 4857 4858 abuf->written = written; 4859 #undef FLD 4860 } 4861 NEXT (vpc); 4862 4863 CASE (sem, INSN_MOVE_SS_R) : /* move ${Ss},${Rd-sfield} */ 4864 { 4865 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4866 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4867 #define FLD(f) abuf->fields.sfmt_move_spr_mv32.f 4868 int UNUSED written = 0; 4869 IADDR UNUSED pc = abuf->addr; 4870 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4871 4872 { 4873 { 4874 SI opval = GET_H_SUPR (FLD (f_operand2)); 4875 SET_H_GR (FLD (f_operand1), opval); 4876 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4877 } 4878 { 4879 { 4880 BI opval = 0; 4881 CPU (h_xbit) = opval; 4882 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 4883 } 4884 { 4885 BI opval = 0; 4886 SET_H_INSN_PREFIXED_P (opval); 4887 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 4888 } 4889 } 4890 } 4891 4892 #undef FLD 4893 } 4894 NEXT (vpc); 4895 4896 CASE (sem, INSN_MOVE_R_SS) : /* move ${Rs},${Sd} */ 4897 { 4898 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4899 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4900 #define FLD(f) abuf->fields.sfmt_mcp.f 4901 int UNUSED written = 0; 4902 IADDR UNUSED pc = abuf->addr; 4903 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4904 4905 { 4906 { 4907 SI opval = GET_H_GR (FLD (f_operand1)); 4908 SET_H_SUPR (FLD (f_operand2), opval); 4909 CGEN_TRACE_RESULT (current_cpu, abuf, "supr", 'x', opval); 4910 } 4911 { 4912 { 4913 BI opval = 0; 4914 CPU (h_xbit) = opval; 4915 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 4916 } 4917 { 4918 BI opval = 0; 4919 SET_H_INSN_PREFIXED_P (opval); 4920 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 4921 } 4922 } 4923 } 4924 4925 #undef FLD 4926 } 4927 NEXT (vpc); 4928 4929 CASE (sem, INSN_MOVEM_R_M_V32) : /* movem ${Rs-dfield},[${Rd-sfield}${inc}] */ 4930 { 4931 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4932 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4933 #define FLD(f) abuf->fields.sfmt_movem_r_m_v32.f 4934 int UNUSED written = 0; 4935 IADDR UNUSED pc = abuf->addr; 4936 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4937 4938 { 4939 SI tmp_addr; 4940 BI tmp_postinc; 4941 tmp_postinc = FLD (f_memmode); 4942 { 4943 SI tmp_dummy; 4944 tmp_dummy = GET_H_GR (FLD (f_operand2)); 4945 } 4946 tmp_addr = GET_H_GR (FLD (f_operand1)); 4947 { 4948 if (GESI (FLD (f_operand2), 0)) { 4949 { 4950 SI tmp_tmp; 4951 tmp_tmp = GET_H_GR (((UINT) 0)); 4952 { 4953 SI opval = tmp_tmp; 4954 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4955 written |= (1 << 21); 4956 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4957 } 4958 tmp_addr = ADDSI (tmp_addr, 4); 4959 } 4960 } 4961 if (GESI (FLD (f_operand2), 1)) { 4962 { 4963 SI tmp_tmp; 4964 tmp_tmp = GET_H_GR (((UINT) 1)); 4965 { 4966 SI opval = tmp_tmp; 4967 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4968 written |= (1 << 21); 4969 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4970 } 4971 tmp_addr = ADDSI (tmp_addr, 4); 4972 } 4973 } 4974 if (GESI (FLD (f_operand2), 2)) { 4975 { 4976 SI tmp_tmp; 4977 tmp_tmp = GET_H_GR (((UINT) 2)); 4978 { 4979 SI opval = tmp_tmp; 4980 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4981 written |= (1 << 21); 4982 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4983 } 4984 tmp_addr = ADDSI (tmp_addr, 4); 4985 } 4986 } 4987 if (GESI (FLD (f_operand2), 3)) { 4988 { 4989 SI tmp_tmp; 4990 tmp_tmp = GET_H_GR (((UINT) 3)); 4991 { 4992 SI opval = tmp_tmp; 4993 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4994 written |= (1 << 21); 4995 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4996 } 4997 tmp_addr = ADDSI (tmp_addr, 4); 4998 } 4999 } 5000 if (GESI (FLD (f_operand2), 4)) { 5001 { 5002 SI tmp_tmp; 5003 tmp_tmp = GET_H_GR (((UINT) 4)); 5004 { 5005 SI opval = tmp_tmp; 5006 SETMEMSI (current_cpu, pc, tmp_addr, opval); 5007 written |= (1 << 21); 5008 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 5009 } 5010 tmp_addr = ADDSI (tmp_addr, 4); 5011 } 5012 } 5013 if (GESI (FLD (f_operand2), 5)) { 5014 { 5015 SI tmp_tmp; 5016 tmp_tmp = GET_H_GR (((UINT) 5)); 5017 { 5018 SI opval = tmp_tmp; 5019 SETMEMSI (current_cpu, pc, tmp_addr, opval); 5020 written |= (1 << 21); 5021 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 5022 } 5023 tmp_addr = ADDSI (tmp_addr, 4); 5024 } 5025 } 5026 if (GESI (FLD (f_operand2), 6)) { 5027 { 5028 SI tmp_tmp; 5029 tmp_tmp = GET_H_GR (((UINT) 6)); 5030 { 5031 SI opval = tmp_tmp; 5032 SETMEMSI (current_cpu, pc, tmp_addr, opval); 5033 written |= (1 << 21); 5034 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 5035 } 5036 tmp_addr = ADDSI (tmp_addr, 4); 5037 } 5038 } 5039 if (GESI (FLD (f_operand2), 7)) { 5040 { 5041 SI tmp_tmp; 5042 tmp_tmp = GET_H_GR (((UINT) 7)); 5043 { 5044 SI opval = tmp_tmp; 5045 SETMEMSI (current_cpu, pc, tmp_addr, opval); 5046 written |= (1 << 21); 5047 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 5048 } 5049 tmp_addr = ADDSI (tmp_addr, 4); 5050 } 5051 } 5052 if (GESI (FLD (f_operand2), 8)) { 5053 { 5054 SI tmp_tmp; 5055 tmp_tmp = GET_H_GR (((UINT) 8)); 5056 { 5057 SI opval = tmp_tmp; 5058 SETMEMSI (current_cpu, pc, tmp_addr, opval); 5059 written |= (1 << 21); 5060 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 5061 } 5062 tmp_addr = ADDSI (tmp_addr, 4); 5063 } 5064 } 5065 if (GESI (FLD (f_operand2), 9)) { 5066 { 5067 SI tmp_tmp; 5068 tmp_tmp = GET_H_GR (((UINT) 9)); 5069 { 5070 SI opval = tmp_tmp; 5071 SETMEMSI (current_cpu, pc, tmp_addr, opval); 5072 written |= (1 << 21); 5073 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 5074 } 5075 tmp_addr = ADDSI (tmp_addr, 4); 5076 } 5077 } 5078 if (GESI (FLD (f_operand2), 10)) { 5079 { 5080 SI tmp_tmp; 5081 tmp_tmp = GET_H_GR (((UINT) 10)); 5082 { 5083 SI opval = tmp_tmp; 5084 SETMEMSI (current_cpu, pc, tmp_addr, opval); 5085 written |= (1 << 21); 5086 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 5087 } 5088 tmp_addr = ADDSI (tmp_addr, 4); 5089 } 5090 } 5091 if (GESI (FLD (f_operand2), 11)) { 5092 { 5093 SI tmp_tmp; 5094 tmp_tmp = GET_H_GR (((UINT) 11)); 5095 { 5096 SI opval = tmp_tmp; 5097 SETMEMSI (current_cpu, pc, tmp_addr, opval); 5098 written |= (1 << 21); 5099 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 5100 } 5101 tmp_addr = ADDSI (tmp_addr, 4); 5102 } 5103 } 5104 if (GESI (FLD (f_operand2), 12)) { 5105 { 5106 SI tmp_tmp; 5107 tmp_tmp = GET_H_GR (((UINT) 12)); 5108 { 5109 SI opval = tmp_tmp; 5110 SETMEMSI (current_cpu, pc, tmp_addr, opval); 5111 written |= (1 << 21); 5112 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 5113 } 5114 tmp_addr = ADDSI (tmp_addr, 4); 5115 } 5116 } 5117 if (GESI (FLD (f_operand2), 13)) { 5118 { 5119 SI tmp_tmp; 5120 tmp_tmp = GET_H_GR (((UINT) 13)); 5121 { 5122 SI opval = tmp_tmp; 5123 SETMEMSI (current_cpu, pc, tmp_addr, opval); 5124 written |= (1 << 21); 5125 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 5126 } 5127 tmp_addr = ADDSI (tmp_addr, 4); 5128 } 5129 } 5130 if (GESI (FLD (f_operand2), 14)) { 5131 { 5132 SI tmp_tmp; 5133 tmp_tmp = GET_H_GR (((UINT) 14)); 5134 { 5135 SI opval = tmp_tmp; 5136 SETMEMSI (current_cpu, pc, tmp_addr, opval); 5137 written |= (1 << 21); 5138 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 5139 } 5140 tmp_addr = ADDSI (tmp_addr, 4); 5141 } 5142 } 5143 if (GESI (FLD (f_operand2), 15)) { 5144 { 5145 SI tmp_tmp; 5146 tmp_tmp = GET_H_GR (((UINT) 15)); 5147 { 5148 SI opval = tmp_tmp; 5149 SETMEMSI (current_cpu, pc, tmp_addr, opval); 5150 written |= (1 << 21); 5151 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 5152 } 5153 tmp_addr = ADDSI (tmp_addr, 4); 5154 } 5155 } 5156 } 5157 if (NEBI (tmp_postinc, 0)) { 5158 { 5159 SI opval = tmp_addr; 5160 SET_H_GR (FLD (f_operand1), opval); 5161 written |= (1 << 20); 5162 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5163 } 5164 } 5165 { 5166 { 5167 BI opval = 0; 5168 CPU (h_xbit) = opval; 5169 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 5170 } 5171 { 5172 BI opval = 0; 5173 SET_H_INSN_PREFIXED_P (opval); 5174 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 5175 } 5176 } 5177 } 5178 5179 abuf->written = written; 5180 #undef FLD 5181 } 5182 NEXT (vpc); 5183 5184 CASE (sem, INSN_MOVEM_M_R_V32) : /* movem [${Rs}${inc}],${Rd} */ 5185 { 5186 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5187 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5188 #define FLD(f) abuf->fields.sfmt_movem_m_r_v32.f 5189 int UNUSED written = 0; 5190 IADDR UNUSED pc = abuf->addr; 5191 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5192 5193 { 5194 SI tmp_addr; 5195 BI tmp_postinc; 5196 tmp_postinc = FLD (f_memmode); 5197 tmp_addr = GET_H_GR (FLD (f_operand1)); 5198 { 5199 SI tmp_dummy; 5200 tmp_dummy = GET_H_GR (FLD (f_operand2)); 5201 } 5202 { 5203 if (GESI (FLD (f_operand2), 0)) { 5204 { 5205 SI tmp_tmp; 5206 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5207 { 5208 SI opval = tmp_tmp; 5209 SET_H_GR (((UINT) 0), opval); 5210 written |= (1 << 6); 5211 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5212 } 5213 tmp_addr = ADDSI (tmp_addr, 4); 5214 } 5215 } 5216 if (GESI (FLD (f_operand2), 1)) { 5217 { 5218 SI tmp_tmp; 5219 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5220 { 5221 SI opval = tmp_tmp; 5222 SET_H_GR (((UINT) 1), opval); 5223 written |= (1 << 7); 5224 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5225 } 5226 tmp_addr = ADDSI (tmp_addr, 4); 5227 } 5228 } 5229 if (GESI (FLD (f_operand2), 2)) { 5230 { 5231 SI tmp_tmp; 5232 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5233 { 5234 SI opval = tmp_tmp; 5235 SET_H_GR (((UINT) 2), opval); 5236 written |= (1 << 14); 5237 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5238 } 5239 tmp_addr = ADDSI (tmp_addr, 4); 5240 } 5241 } 5242 if (GESI (FLD (f_operand2), 3)) { 5243 { 5244 SI tmp_tmp; 5245 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5246 { 5247 SI opval = tmp_tmp; 5248 SET_H_GR (((UINT) 3), opval); 5249 written |= (1 << 15); 5250 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5251 } 5252 tmp_addr = ADDSI (tmp_addr, 4); 5253 } 5254 } 5255 if (GESI (FLD (f_operand2), 4)) { 5256 { 5257 SI tmp_tmp; 5258 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5259 { 5260 SI opval = tmp_tmp; 5261 SET_H_GR (((UINT) 4), opval); 5262 written |= (1 << 16); 5263 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5264 } 5265 tmp_addr = ADDSI (tmp_addr, 4); 5266 } 5267 } 5268 if (GESI (FLD (f_operand2), 5)) { 5269 { 5270 SI tmp_tmp; 5271 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5272 { 5273 SI opval = tmp_tmp; 5274 SET_H_GR (((UINT) 5), opval); 5275 written |= (1 << 17); 5276 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5277 } 5278 tmp_addr = ADDSI (tmp_addr, 4); 5279 } 5280 } 5281 if (GESI (FLD (f_operand2), 6)) { 5282 { 5283 SI tmp_tmp; 5284 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5285 { 5286 SI opval = tmp_tmp; 5287 SET_H_GR (((UINT) 6), opval); 5288 written |= (1 << 18); 5289 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5290 } 5291 tmp_addr = ADDSI (tmp_addr, 4); 5292 } 5293 } 5294 if (GESI (FLD (f_operand2), 7)) { 5295 { 5296 SI tmp_tmp; 5297 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5298 { 5299 SI opval = tmp_tmp; 5300 SET_H_GR (((UINT) 7), opval); 5301 written |= (1 << 19); 5302 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5303 } 5304 tmp_addr = ADDSI (tmp_addr, 4); 5305 } 5306 } 5307 if (GESI (FLD (f_operand2), 8)) { 5308 { 5309 SI tmp_tmp; 5310 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5311 { 5312 SI opval = tmp_tmp; 5313 SET_H_GR (((UINT) 8), opval); 5314 written |= (1 << 20); 5315 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5316 } 5317 tmp_addr = ADDSI (tmp_addr, 4); 5318 } 5319 } 5320 if (GESI (FLD (f_operand2), 9)) { 5321 { 5322 SI tmp_tmp; 5323 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5324 { 5325 SI opval = tmp_tmp; 5326 SET_H_GR (((UINT) 9), opval); 5327 written |= (1 << 21); 5328 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5329 } 5330 tmp_addr = ADDSI (tmp_addr, 4); 5331 } 5332 } 5333 if (GESI (FLD (f_operand2), 10)) { 5334 { 5335 SI tmp_tmp; 5336 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5337 { 5338 SI opval = tmp_tmp; 5339 SET_H_GR (((UINT) 10), opval); 5340 written |= (1 << 8); 5341 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5342 } 5343 tmp_addr = ADDSI (tmp_addr, 4); 5344 } 5345 } 5346 if (GESI (FLD (f_operand2), 11)) { 5347 { 5348 SI tmp_tmp; 5349 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5350 { 5351 SI opval = tmp_tmp; 5352 SET_H_GR (((UINT) 11), opval); 5353 written |= (1 << 9); 5354 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5355 } 5356 tmp_addr = ADDSI (tmp_addr, 4); 5357 } 5358 } 5359 if (GESI (FLD (f_operand2), 12)) { 5360 { 5361 SI tmp_tmp; 5362 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5363 { 5364 SI opval = tmp_tmp; 5365 SET_H_GR (((UINT) 12), opval); 5366 written |= (1 << 10); 5367 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5368 } 5369 tmp_addr = ADDSI (tmp_addr, 4); 5370 } 5371 } 5372 if (GESI (FLD (f_operand2), 13)) { 5373 { 5374 SI tmp_tmp; 5375 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5376 { 5377 SI opval = tmp_tmp; 5378 SET_H_GR (((UINT) 13), opval); 5379 written |= (1 << 11); 5380 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5381 } 5382 tmp_addr = ADDSI (tmp_addr, 4); 5383 } 5384 } 5385 if (GESI (FLD (f_operand2), 14)) { 5386 { 5387 SI tmp_tmp; 5388 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5389 { 5390 SI opval = tmp_tmp; 5391 SET_H_GR (((UINT) 14), opval); 5392 written |= (1 << 12); 5393 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5394 } 5395 tmp_addr = ADDSI (tmp_addr, 4); 5396 } 5397 } 5398 if (GESI (FLD (f_operand2), 15)) { 5399 { 5400 SI tmp_tmp; 5401 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr); 5402 { 5403 SI opval = tmp_tmp; 5404 SET_H_GR (((UINT) 15), opval); 5405 written |= (1 << 13); 5406 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5407 } 5408 tmp_addr = ADDSI (tmp_addr, 4); 5409 } 5410 } 5411 } 5412 if (NEBI (tmp_postinc, 0)) { 5413 { 5414 SI opval = tmp_addr; 5415 SET_H_GR (FLD (f_operand1), opval); 5416 written |= (1 << 5); 5417 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5418 } 5419 } 5420 { 5421 { 5422 BI opval = 0; 5423 CPU (h_xbit) = opval; 5424 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 5425 } 5426 { 5427 BI opval = 0; 5428 SET_H_INSN_PREFIXED_P (opval); 5429 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 5430 } 5431 } 5432 } 5433 5434 abuf->written = written; 5435 #undef FLD 5436 } 5437 NEXT (vpc); 5438 5439 CASE (sem, INSN_ADD_B_R) : /* add.b $Rs,$Rd */ 5440 { 5441 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5442 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5443 #define FLD(f) abuf->fields.sfmt_addc_m.f 5444 int UNUSED written = 0; 5445 IADDR UNUSED pc = abuf->addr; 5446 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5447 5448 { 5449 QI tmp_tmpopd; 5450 QI tmp_tmpops; 5451 BI tmp_carry; 5452 QI tmp_newval; 5453 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 5454 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 5455 tmp_carry = CPU (h_cbit); 5456 tmp_newval = ADDCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 5457 { 5458 SI tmp_oldregval; 5459 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 5460 { 5461 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00)); 5462 SET_H_GR (FLD (f_operand2), opval); 5463 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5464 } 5465 } 5466 { 5467 { 5468 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), ORIF (ANDIF (LTQI (tmp_tmpopd, 0), GEQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_newval, 0)))); 5469 CPU (h_cbit) = opval; 5470 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 5471 } 5472 { 5473 BI opval = LTQI (tmp_newval, 0); 5474 CPU (h_nbit) = opval; 5475 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 5476 } 5477 { 5478 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 5479 CPU (h_zbit) = opval; 5480 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 5481 } 5482 { 5483 BI opval = ORIF (ANDIF (ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (GEQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0))); 5484 CPU (h_vbit) = opval; 5485 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 5486 } 5487 { 5488 { 5489 BI opval = 0; 5490 CPU (h_xbit) = opval; 5491 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 5492 } 5493 { 5494 BI opval = 0; 5495 SET_H_INSN_PREFIXED_P (opval); 5496 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 5497 } 5498 } 5499 } 5500 } 5501 5502 #undef FLD 5503 } 5504 NEXT (vpc); 5505 5506 CASE (sem, INSN_ADD_W_R) : /* add.w $Rs,$Rd */ 5507 { 5508 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5509 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5510 #define FLD(f) abuf->fields.sfmt_addc_m.f 5511 int UNUSED written = 0; 5512 IADDR UNUSED pc = abuf->addr; 5513 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5514 5515 { 5516 HI tmp_tmpopd; 5517 HI tmp_tmpops; 5518 BI tmp_carry; 5519 HI tmp_newval; 5520 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 5521 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 5522 tmp_carry = CPU (h_cbit); 5523 tmp_newval = ADDCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 5524 { 5525 SI tmp_oldregval; 5526 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 5527 { 5528 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 5529 SET_H_GR (FLD (f_operand2), opval); 5530 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5531 } 5532 } 5533 { 5534 { 5535 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), ORIF (ANDIF (LTHI (tmp_tmpopd, 0), GEHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_newval, 0)))); 5536 CPU (h_cbit) = opval; 5537 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 5538 } 5539 { 5540 BI opval = LTHI (tmp_newval, 0); 5541 CPU (h_nbit) = opval; 5542 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 5543 } 5544 { 5545 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 5546 CPU (h_zbit) = opval; 5547 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 5548 } 5549 { 5550 BI opval = ORIF (ANDIF (ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (GEHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0))); 5551 CPU (h_vbit) = opval; 5552 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 5553 } 5554 { 5555 { 5556 BI opval = 0; 5557 CPU (h_xbit) = opval; 5558 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 5559 } 5560 { 5561 BI opval = 0; 5562 SET_H_INSN_PREFIXED_P (opval); 5563 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 5564 } 5565 } 5566 } 5567 } 5568 5569 #undef FLD 5570 } 5571 NEXT (vpc); 5572 5573 CASE (sem, INSN_ADD_D_R) : /* add.d $Rs,$Rd */ 5574 { 5575 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5576 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5577 #define FLD(f) abuf->fields.sfmt_addc_m.f 5578 int UNUSED written = 0; 5579 IADDR UNUSED pc = abuf->addr; 5580 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5581 5582 { 5583 SI tmp_tmpopd; 5584 SI tmp_tmpops; 5585 BI tmp_carry; 5586 SI tmp_newval; 5587 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 5588 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 5589 tmp_carry = CPU (h_cbit); 5590 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 5591 { 5592 SI opval = tmp_newval; 5593 SET_H_GR (FLD (f_operand2), opval); 5594 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5595 } 5596 { 5597 { 5598 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 5599 CPU (h_cbit) = opval; 5600 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 5601 } 5602 { 5603 BI opval = LTSI (tmp_newval, 0); 5604 CPU (h_nbit) = opval; 5605 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 5606 } 5607 { 5608 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 5609 CPU (h_zbit) = opval; 5610 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 5611 } 5612 { 5613 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 5614 CPU (h_vbit) = opval; 5615 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 5616 } 5617 { 5618 { 5619 BI opval = 0; 5620 CPU (h_xbit) = opval; 5621 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 5622 } 5623 { 5624 BI opval = 0; 5625 SET_H_INSN_PREFIXED_P (opval); 5626 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 5627 } 5628 } 5629 } 5630 } 5631 5632 #undef FLD 5633 } 5634 NEXT (vpc); 5635 5636 CASE (sem, INSN_ADD_M_B_M) : /* add-m.b [${Rs}${inc}],${Rd} */ 5637 { 5638 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5639 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5640 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f 5641 int UNUSED written = 0; 5642 IADDR UNUSED pc = abuf->addr; 5643 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5644 5645 { 5646 QI tmp_tmpopd; 5647 QI tmp_tmpops; 5648 BI tmp_carry; 5649 QI tmp_newval; 5650 tmp_tmpops = ({ SI tmp_addr; 5651 QI tmp_tmp_mem; 5652 BI tmp_postinc; 5653 tmp_postinc = FLD (f_memmode); 5654 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 5655 ; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 5656 ; if (NEBI (tmp_postinc, 0)) { 5657 { 5658 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 5659 tmp_addr = ADDSI (tmp_addr, 1); 5660 } 5661 { 5662 SI opval = tmp_addr; 5663 SET_H_GR (FLD (f_operand1), opval); 5664 written |= (1 << 12); 5665 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5666 } 5667 } 5668 } 5669 ; tmp_tmp_mem; }); 5670 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 5671 tmp_carry = CPU (h_cbit); 5672 tmp_newval = ADDCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 5673 { 5674 SI tmp_oldregval; 5675 tmp_oldregval = GET_H_RAW_GR_ACR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2)))); 5676 { 5677 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00)); 5678 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 5679 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5680 } 5681 } 5682 { 5683 { 5684 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), ORIF (ANDIF (LTQI (tmp_tmpopd, 0), GEQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_newval, 0)))); 5685 CPU (h_cbit) = opval; 5686 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 5687 } 5688 { 5689 BI opval = LTQI (tmp_newval, 0); 5690 CPU (h_nbit) = opval; 5691 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 5692 } 5693 { 5694 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 5695 CPU (h_zbit) = opval; 5696 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 5697 } 5698 { 5699 BI opval = ORIF (ANDIF (ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (GEQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0))); 5700 CPU (h_vbit) = opval; 5701 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 5702 } 5703 { 5704 { 5705 BI opval = 0; 5706 CPU (h_xbit) = opval; 5707 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 5708 } 5709 { 5710 BI opval = 0; 5711 SET_H_INSN_PREFIXED_P (opval); 5712 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 5713 } 5714 } 5715 } 5716 } 5717 5718 abuf->written = written; 5719 #undef FLD 5720 } 5721 NEXT (vpc); 5722 5723 CASE (sem, INSN_ADD_M_W_M) : /* add-m.w [${Rs}${inc}],${Rd} */ 5724 { 5725 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5726 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5727 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f 5728 int UNUSED written = 0; 5729 IADDR UNUSED pc = abuf->addr; 5730 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5731 5732 { 5733 HI tmp_tmpopd; 5734 HI tmp_tmpops; 5735 BI tmp_carry; 5736 HI tmp_newval; 5737 tmp_tmpops = ({ SI tmp_addr; 5738 HI tmp_tmp_mem; 5739 BI tmp_postinc; 5740 tmp_postinc = FLD (f_memmode); 5741 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 5742 ; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 5743 ; if (NEBI (tmp_postinc, 0)) { 5744 { 5745 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 5746 tmp_addr = ADDSI (tmp_addr, 2); 5747 } 5748 { 5749 SI opval = tmp_addr; 5750 SET_H_GR (FLD (f_operand1), opval); 5751 written |= (1 << 12); 5752 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5753 } 5754 } 5755 } 5756 ; tmp_tmp_mem; }); 5757 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 5758 tmp_carry = CPU (h_cbit); 5759 tmp_newval = ADDCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 5760 { 5761 SI tmp_oldregval; 5762 tmp_oldregval = GET_H_RAW_GR_ACR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2)))); 5763 { 5764 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 5765 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 5766 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5767 } 5768 } 5769 { 5770 { 5771 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), ORIF (ANDIF (LTHI (tmp_tmpopd, 0), GEHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_newval, 0)))); 5772 CPU (h_cbit) = opval; 5773 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 5774 } 5775 { 5776 BI opval = LTHI (tmp_newval, 0); 5777 CPU (h_nbit) = opval; 5778 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 5779 } 5780 { 5781 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 5782 CPU (h_zbit) = opval; 5783 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 5784 } 5785 { 5786 BI opval = ORIF (ANDIF (ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (GEHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0))); 5787 CPU (h_vbit) = opval; 5788 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 5789 } 5790 { 5791 { 5792 BI opval = 0; 5793 CPU (h_xbit) = opval; 5794 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 5795 } 5796 { 5797 BI opval = 0; 5798 SET_H_INSN_PREFIXED_P (opval); 5799 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 5800 } 5801 } 5802 } 5803 } 5804 5805 abuf->written = written; 5806 #undef FLD 5807 } 5808 NEXT (vpc); 5809 5810 CASE (sem, INSN_ADD_M_D_M) : /* add-m.d [${Rs}${inc}],${Rd} */ 5811 { 5812 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5813 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5814 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f 5815 int UNUSED written = 0; 5816 IADDR UNUSED pc = abuf->addr; 5817 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5818 5819 { 5820 SI tmp_tmpopd; 5821 SI tmp_tmpops; 5822 BI tmp_carry; 5823 SI tmp_newval; 5824 tmp_tmpops = ({ SI tmp_addr; 5825 SI tmp_tmp_mem; 5826 BI tmp_postinc; 5827 tmp_postinc = FLD (f_memmode); 5828 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 5829 ; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 5830 ; if (NEBI (tmp_postinc, 0)) { 5831 { 5832 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 5833 tmp_addr = ADDSI (tmp_addr, 4); 5834 } 5835 { 5836 SI opval = tmp_addr; 5837 SET_H_GR (FLD (f_operand1), opval); 5838 written |= (1 << 11); 5839 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5840 } 5841 } 5842 } 5843 ; tmp_tmp_mem; }); 5844 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 5845 tmp_carry = CPU (h_cbit); 5846 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 5847 { 5848 SI opval = tmp_newval; 5849 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 5850 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5851 } 5852 { 5853 { 5854 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 5855 CPU (h_cbit) = opval; 5856 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 5857 } 5858 { 5859 BI opval = LTSI (tmp_newval, 0); 5860 CPU (h_nbit) = opval; 5861 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 5862 } 5863 { 5864 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 5865 CPU (h_zbit) = opval; 5866 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 5867 } 5868 { 5869 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 5870 CPU (h_vbit) = opval; 5871 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 5872 } 5873 { 5874 { 5875 BI opval = 0; 5876 CPU (h_xbit) = opval; 5877 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 5878 } 5879 { 5880 BI opval = 0; 5881 SET_H_INSN_PREFIXED_P (opval); 5882 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 5883 } 5884 } 5885 } 5886 } 5887 5888 abuf->written = written; 5889 #undef FLD 5890 } 5891 NEXT (vpc); 5892 5893 CASE (sem, INSN_ADDCBR) : /* add.b ${sconst8}],${Rd} */ 5894 { 5895 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5896 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5897 #define FLD(f) abuf->fields.sfmt_addcbr.f 5898 int UNUSED written = 0; 5899 IADDR UNUSED pc = abuf->addr; 5900 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 5901 5902 { 5903 QI tmp_tmpopd; 5904 QI tmp_tmpops; 5905 BI tmp_carry; 5906 QI tmp_newval; 5907 tmp_tmpops = FLD (f_indir_pc__byte); 5908 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 5909 tmp_carry = CPU (h_cbit); 5910 tmp_newval = ADDCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 5911 { 5912 SI tmp_oldregval; 5913 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 5914 { 5915 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00)); 5916 SET_H_GR (FLD (f_operand2), opval); 5917 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5918 } 5919 } 5920 { 5921 { 5922 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), ORIF (ANDIF (LTQI (tmp_tmpopd, 0), GEQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_newval, 0)))); 5923 CPU (h_cbit) = opval; 5924 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 5925 } 5926 { 5927 BI opval = LTQI (tmp_newval, 0); 5928 CPU (h_nbit) = opval; 5929 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 5930 } 5931 { 5932 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 5933 CPU (h_zbit) = opval; 5934 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 5935 } 5936 { 5937 BI opval = ORIF (ANDIF (ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (GEQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0))); 5938 CPU (h_vbit) = opval; 5939 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 5940 } 5941 { 5942 { 5943 BI opval = 0; 5944 CPU (h_xbit) = opval; 5945 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 5946 } 5947 { 5948 BI opval = 0; 5949 SET_H_INSN_PREFIXED_P (opval); 5950 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 5951 } 5952 } 5953 } 5954 } 5955 5956 #undef FLD 5957 } 5958 NEXT (vpc); 5959 5960 CASE (sem, INSN_ADDCWR) : /* add.w ${sconst16}],${Rd} */ 5961 { 5962 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5963 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5964 #define FLD(f) abuf->fields.sfmt_addcwr.f 5965 int UNUSED written = 0; 5966 IADDR UNUSED pc = abuf->addr; 5967 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 5968 5969 { 5970 HI tmp_tmpopd; 5971 HI tmp_tmpops; 5972 BI tmp_carry; 5973 HI tmp_newval; 5974 tmp_tmpops = FLD (f_indir_pc__word); 5975 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 5976 tmp_carry = CPU (h_cbit); 5977 tmp_newval = ADDCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 5978 { 5979 SI tmp_oldregval; 5980 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 5981 { 5982 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 5983 SET_H_GR (FLD (f_operand2), opval); 5984 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5985 } 5986 } 5987 { 5988 { 5989 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), ORIF (ANDIF (LTHI (tmp_tmpopd, 0), GEHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_newval, 0)))); 5990 CPU (h_cbit) = opval; 5991 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 5992 } 5993 { 5994 BI opval = LTHI (tmp_newval, 0); 5995 CPU (h_nbit) = opval; 5996 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 5997 } 5998 { 5999 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6000 CPU (h_zbit) = opval; 6001 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6002 } 6003 { 6004 BI opval = ORIF (ANDIF (ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (GEHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0))); 6005 CPU (h_vbit) = opval; 6006 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6007 } 6008 { 6009 { 6010 BI opval = 0; 6011 CPU (h_xbit) = opval; 6012 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6013 } 6014 { 6015 BI opval = 0; 6016 SET_H_INSN_PREFIXED_P (opval); 6017 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6018 } 6019 } 6020 } 6021 } 6022 6023 #undef FLD 6024 } 6025 NEXT (vpc); 6026 6027 CASE (sem, INSN_ADDCDR) : /* add.d ${const32}],${Rd} */ 6028 { 6029 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6030 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6031 #define FLD(f) abuf->fields.sfmt_addcdr.f 6032 int UNUSED written = 0; 6033 IADDR UNUSED pc = abuf->addr; 6034 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 6035 6036 { 6037 SI tmp_tmpopd; 6038 SI tmp_tmpops; 6039 BI tmp_carry; 6040 SI tmp_newval; 6041 tmp_tmpops = FLD (f_indir_pc__dword); 6042 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6043 tmp_carry = CPU (h_cbit); 6044 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6045 { 6046 SI opval = tmp_newval; 6047 SET_H_GR (FLD (f_operand2), opval); 6048 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6049 } 6050 { 6051 { 6052 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 6053 CPU (h_cbit) = opval; 6054 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6055 } 6056 { 6057 BI opval = LTSI (tmp_newval, 0); 6058 CPU (h_nbit) = opval; 6059 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6060 } 6061 { 6062 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6063 CPU (h_zbit) = opval; 6064 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6065 } 6066 { 6067 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 6068 CPU (h_vbit) = opval; 6069 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6070 } 6071 { 6072 { 6073 BI opval = 0; 6074 CPU (h_xbit) = opval; 6075 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6076 } 6077 { 6078 BI opval = 0; 6079 SET_H_INSN_PREFIXED_P (opval); 6080 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6081 } 6082 } 6083 } 6084 } 6085 6086 #undef FLD 6087 } 6088 NEXT (vpc); 6089 6090 CASE (sem, INSN_ADDS_B_R) : /* adds.b $Rs,$Rd */ 6091 { 6092 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6093 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6094 #define FLD(f) abuf->fields.sfmt_addc_m.f 6095 int UNUSED written = 0; 6096 IADDR UNUSED pc = abuf->addr; 6097 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6098 6099 { 6100 SI tmp_tmpopd; 6101 SI tmp_tmpops; 6102 BI tmp_carry; 6103 SI tmp_newval; 6104 tmp_tmpops = EXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand1)))); 6105 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6106 tmp_carry = CPU (h_cbit); 6107 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6108 { 6109 SI opval = tmp_newval; 6110 SET_H_GR (FLD (f_operand2), opval); 6111 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6112 } 6113 { 6114 { 6115 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 6116 CPU (h_cbit) = opval; 6117 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6118 } 6119 { 6120 BI opval = LTSI (tmp_newval, 0); 6121 CPU (h_nbit) = opval; 6122 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6123 } 6124 { 6125 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6126 CPU (h_zbit) = opval; 6127 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6128 } 6129 { 6130 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 6131 CPU (h_vbit) = opval; 6132 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6133 } 6134 { 6135 { 6136 BI opval = 0; 6137 CPU (h_xbit) = opval; 6138 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6139 } 6140 { 6141 BI opval = 0; 6142 SET_H_INSN_PREFIXED_P (opval); 6143 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6144 } 6145 } 6146 } 6147 } 6148 6149 #undef FLD 6150 } 6151 NEXT (vpc); 6152 6153 CASE (sem, INSN_ADDS_W_R) : /* adds.w $Rs,$Rd */ 6154 { 6155 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6156 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6157 #define FLD(f) abuf->fields.sfmt_addc_m.f 6158 int UNUSED written = 0; 6159 IADDR UNUSED pc = abuf->addr; 6160 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6161 6162 { 6163 SI tmp_tmpopd; 6164 SI tmp_tmpops; 6165 BI tmp_carry; 6166 SI tmp_newval; 6167 tmp_tmpops = EXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand1)))); 6168 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6169 tmp_carry = CPU (h_cbit); 6170 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6171 { 6172 SI opval = tmp_newval; 6173 SET_H_GR (FLD (f_operand2), opval); 6174 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6175 } 6176 { 6177 { 6178 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 6179 CPU (h_cbit) = opval; 6180 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6181 } 6182 { 6183 BI opval = LTSI (tmp_newval, 0); 6184 CPU (h_nbit) = opval; 6185 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6186 } 6187 { 6188 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6189 CPU (h_zbit) = opval; 6190 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6191 } 6192 { 6193 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 6194 CPU (h_vbit) = opval; 6195 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6196 } 6197 { 6198 { 6199 BI opval = 0; 6200 CPU (h_xbit) = opval; 6201 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6202 } 6203 { 6204 BI opval = 0; 6205 SET_H_INSN_PREFIXED_P (opval); 6206 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6207 } 6208 } 6209 } 6210 } 6211 6212 #undef FLD 6213 } 6214 NEXT (vpc); 6215 6216 CASE (sem, INSN_ADDS_M_B_M) : /* adds-m.b [${Rs}${inc}],$Rd */ 6217 { 6218 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6219 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6220 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f 6221 int UNUSED written = 0; 6222 IADDR UNUSED pc = abuf->addr; 6223 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6224 6225 { 6226 SI tmp_tmpopd; 6227 SI tmp_tmpops; 6228 BI tmp_carry; 6229 SI tmp_newval; 6230 tmp_tmpops = EXTQISI (({ SI tmp_addr; 6231 QI tmp_tmp_mem; 6232 BI tmp_postinc; 6233 tmp_postinc = FLD (f_memmode); 6234 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 6235 ; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 6236 ; if (NEBI (tmp_postinc, 0)) { 6237 { 6238 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 6239 tmp_addr = ADDSI (tmp_addr, 1); 6240 } 6241 { 6242 SI opval = tmp_addr; 6243 SET_H_GR (FLD (f_operand1), opval); 6244 written |= (1 << 11); 6245 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6246 } 6247 } 6248 } 6249 ; tmp_tmp_mem; })); 6250 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6251 tmp_carry = CPU (h_cbit); 6252 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6253 { 6254 SI opval = tmp_newval; 6255 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 6256 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6257 } 6258 { 6259 { 6260 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 6261 CPU (h_cbit) = opval; 6262 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6263 } 6264 { 6265 BI opval = LTSI (tmp_newval, 0); 6266 CPU (h_nbit) = opval; 6267 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6268 } 6269 { 6270 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6271 CPU (h_zbit) = opval; 6272 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6273 } 6274 { 6275 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 6276 CPU (h_vbit) = opval; 6277 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6278 } 6279 { 6280 { 6281 BI opval = 0; 6282 CPU (h_xbit) = opval; 6283 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6284 } 6285 { 6286 BI opval = 0; 6287 SET_H_INSN_PREFIXED_P (opval); 6288 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6289 } 6290 } 6291 } 6292 } 6293 6294 abuf->written = written; 6295 #undef FLD 6296 } 6297 NEXT (vpc); 6298 6299 CASE (sem, INSN_ADDS_M_W_M) : /* adds-m.w [${Rs}${inc}],$Rd */ 6300 { 6301 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6302 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6303 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f 6304 int UNUSED written = 0; 6305 IADDR UNUSED pc = abuf->addr; 6306 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6307 6308 { 6309 SI tmp_tmpopd; 6310 SI tmp_tmpops; 6311 BI tmp_carry; 6312 SI tmp_newval; 6313 tmp_tmpops = EXTHISI (({ SI tmp_addr; 6314 HI tmp_tmp_mem; 6315 BI tmp_postinc; 6316 tmp_postinc = FLD (f_memmode); 6317 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 6318 ; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 6319 ; if (NEBI (tmp_postinc, 0)) { 6320 { 6321 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 6322 tmp_addr = ADDSI (tmp_addr, 2); 6323 } 6324 { 6325 SI opval = tmp_addr; 6326 SET_H_GR (FLD (f_operand1), opval); 6327 written |= (1 << 11); 6328 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6329 } 6330 } 6331 } 6332 ; tmp_tmp_mem; })); 6333 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6334 tmp_carry = CPU (h_cbit); 6335 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6336 { 6337 SI opval = tmp_newval; 6338 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 6339 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6340 } 6341 { 6342 { 6343 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 6344 CPU (h_cbit) = opval; 6345 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6346 } 6347 { 6348 BI opval = LTSI (tmp_newval, 0); 6349 CPU (h_nbit) = opval; 6350 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6351 } 6352 { 6353 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6354 CPU (h_zbit) = opval; 6355 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6356 } 6357 { 6358 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 6359 CPU (h_vbit) = opval; 6360 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6361 } 6362 { 6363 { 6364 BI opval = 0; 6365 CPU (h_xbit) = opval; 6366 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6367 } 6368 { 6369 BI opval = 0; 6370 SET_H_INSN_PREFIXED_P (opval); 6371 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6372 } 6373 } 6374 } 6375 } 6376 6377 abuf->written = written; 6378 #undef FLD 6379 } 6380 NEXT (vpc); 6381 6382 CASE (sem, INSN_ADDSCBR) : /* [${Rs}${inc}],$Rd */ 6383 { 6384 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6385 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6386 #define FLD(f) abuf->fields.sfmt_addcbr.f 6387 int UNUSED written = 0; 6388 IADDR UNUSED pc = abuf->addr; 6389 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 6390 6391 { 6392 SI tmp_tmpopd; 6393 SI tmp_tmpops; 6394 BI tmp_carry; 6395 SI tmp_newval; 6396 tmp_tmpops = EXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte))); 6397 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6398 tmp_carry = CPU (h_cbit); 6399 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6400 { 6401 SI opval = tmp_newval; 6402 SET_H_GR (FLD (f_operand2), opval); 6403 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6404 } 6405 { 6406 { 6407 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 6408 CPU (h_cbit) = opval; 6409 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6410 } 6411 { 6412 BI opval = LTSI (tmp_newval, 0); 6413 CPU (h_nbit) = opval; 6414 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6415 } 6416 { 6417 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6418 CPU (h_zbit) = opval; 6419 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6420 } 6421 { 6422 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 6423 CPU (h_vbit) = opval; 6424 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6425 } 6426 { 6427 { 6428 BI opval = 0; 6429 CPU (h_xbit) = opval; 6430 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6431 } 6432 { 6433 BI opval = 0; 6434 SET_H_INSN_PREFIXED_P (opval); 6435 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6436 } 6437 } 6438 } 6439 } 6440 6441 #undef FLD 6442 } 6443 NEXT (vpc); 6444 6445 CASE (sem, INSN_ADDSCWR) : /* [${Rs}${inc}],$Rd */ 6446 { 6447 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6448 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6449 #define FLD(f) abuf->fields.sfmt_addcwr.f 6450 int UNUSED written = 0; 6451 IADDR UNUSED pc = abuf->addr; 6452 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 6453 6454 { 6455 SI tmp_tmpopd; 6456 SI tmp_tmpops; 6457 BI tmp_carry; 6458 SI tmp_newval; 6459 tmp_tmpops = EXTHISI (TRUNCSIHI (FLD (f_indir_pc__word))); 6460 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6461 tmp_carry = CPU (h_cbit); 6462 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6463 { 6464 SI opval = tmp_newval; 6465 SET_H_GR (FLD (f_operand2), opval); 6466 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6467 } 6468 { 6469 { 6470 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 6471 CPU (h_cbit) = opval; 6472 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6473 } 6474 { 6475 BI opval = LTSI (tmp_newval, 0); 6476 CPU (h_nbit) = opval; 6477 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6478 } 6479 { 6480 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6481 CPU (h_zbit) = opval; 6482 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6483 } 6484 { 6485 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 6486 CPU (h_vbit) = opval; 6487 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6488 } 6489 { 6490 { 6491 BI opval = 0; 6492 CPU (h_xbit) = opval; 6493 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6494 } 6495 { 6496 BI opval = 0; 6497 SET_H_INSN_PREFIXED_P (opval); 6498 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6499 } 6500 } 6501 } 6502 } 6503 6504 #undef FLD 6505 } 6506 NEXT (vpc); 6507 6508 CASE (sem, INSN_ADDU_B_R) : /* addu.b $Rs,$Rd */ 6509 { 6510 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6511 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6512 #define FLD(f) abuf->fields.sfmt_addc_m.f 6513 int UNUSED written = 0; 6514 IADDR UNUSED pc = abuf->addr; 6515 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6516 6517 { 6518 SI tmp_tmpopd; 6519 SI tmp_tmpops; 6520 BI tmp_carry; 6521 SI tmp_newval; 6522 tmp_tmpops = ZEXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand1)))); 6523 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6524 tmp_carry = CPU (h_cbit); 6525 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6526 { 6527 SI opval = tmp_newval; 6528 SET_H_GR (FLD (f_operand2), opval); 6529 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6530 } 6531 { 6532 { 6533 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 6534 CPU (h_cbit) = opval; 6535 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6536 } 6537 { 6538 BI opval = LTSI (tmp_newval, 0); 6539 CPU (h_nbit) = opval; 6540 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6541 } 6542 { 6543 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6544 CPU (h_zbit) = opval; 6545 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6546 } 6547 { 6548 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 6549 CPU (h_vbit) = opval; 6550 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6551 } 6552 { 6553 { 6554 BI opval = 0; 6555 CPU (h_xbit) = opval; 6556 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6557 } 6558 { 6559 BI opval = 0; 6560 SET_H_INSN_PREFIXED_P (opval); 6561 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6562 } 6563 } 6564 } 6565 } 6566 6567 #undef FLD 6568 } 6569 NEXT (vpc); 6570 6571 CASE (sem, INSN_ADDU_W_R) : /* addu.w $Rs,$Rd */ 6572 { 6573 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6574 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6575 #define FLD(f) abuf->fields.sfmt_addc_m.f 6576 int UNUSED written = 0; 6577 IADDR UNUSED pc = abuf->addr; 6578 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6579 6580 { 6581 SI tmp_tmpopd; 6582 SI tmp_tmpops; 6583 BI tmp_carry; 6584 SI tmp_newval; 6585 tmp_tmpops = ZEXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand1)))); 6586 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6587 tmp_carry = CPU (h_cbit); 6588 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6589 { 6590 SI opval = tmp_newval; 6591 SET_H_GR (FLD (f_operand2), opval); 6592 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6593 } 6594 { 6595 { 6596 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 6597 CPU (h_cbit) = opval; 6598 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6599 } 6600 { 6601 BI opval = LTSI (tmp_newval, 0); 6602 CPU (h_nbit) = opval; 6603 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6604 } 6605 { 6606 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6607 CPU (h_zbit) = opval; 6608 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6609 } 6610 { 6611 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 6612 CPU (h_vbit) = opval; 6613 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6614 } 6615 { 6616 { 6617 BI opval = 0; 6618 CPU (h_xbit) = opval; 6619 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6620 } 6621 { 6622 BI opval = 0; 6623 SET_H_INSN_PREFIXED_P (opval); 6624 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6625 } 6626 } 6627 } 6628 } 6629 6630 #undef FLD 6631 } 6632 NEXT (vpc); 6633 6634 CASE (sem, INSN_ADDU_M_B_M) : /* addu-m.b [${Rs}${inc}],$Rd */ 6635 { 6636 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6637 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6638 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f 6639 int UNUSED written = 0; 6640 IADDR UNUSED pc = abuf->addr; 6641 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6642 6643 { 6644 SI tmp_tmpopd; 6645 SI tmp_tmpops; 6646 BI tmp_carry; 6647 SI tmp_newval; 6648 tmp_tmpops = ZEXTQISI (({ SI tmp_addr; 6649 QI tmp_tmp_mem; 6650 BI tmp_postinc; 6651 tmp_postinc = FLD (f_memmode); 6652 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 6653 ; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 6654 ; if (NEBI (tmp_postinc, 0)) { 6655 { 6656 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 6657 tmp_addr = ADDSI (tmp_addr, 1); 6658 } 6659 { 6660 SI opval = tmp_addr; 6661 SET_H_GR (FLD (f_operand1), opval); 6662 written |= (1 << 11); 6663 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6664 } 6665 } 6666 } 6667 ; tmp_tmp_mem; })); 6668 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6669 tmp_carry = CPU (h_cbit); 6670 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6671 { 6672 SI opval = tmp_newval; 6673 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 6674 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6675 } 6676 { 6677 { 6678 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 6679 CPU (h_cbit) = opval; 6680 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6681 } 6682 { 6683 BI opval = LTSI (tmp_newval, 0); 6684 CPU (h_nbit) = opval; 6685 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6686 } 6687 { 6688 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6689 CPU (h_zbit) = opval; 6690 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6691 } 6692 { 6693 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 6694 CPU (h_vbit) = opval; 6695 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6696 } 6697 { 6698 { 6699 BI opval = 0; 6700 CPU (h_xbit) = opval; 6701 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6702 } 6703 { 6704 BI opval = 0; 6705 SET_H_INSN_PREFIXED_P (opval); 6706 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6707 } 6708 } 6709 } 6710 } 6711 6712 abuf->written = written; 6713 #undef FLD 6714 } 6715 NEXT (vpc); 6716 6717 CASE (sem, INSN_ADDU_M_W_M) : /* addu-m.w [${Rs}${inc}],$Rd */ 6718 { 6719 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6720 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6721 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f 6722 int UNUSED written = 0; 6723 IADDR UNUSED pc = abuf->addr; 6724 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6725 6726 { 6727 SI tmp_tmpopd; 6728 SI tmp_tmpops; 6729 BI tmp_carry; 6730 SI tmp_newval; 6731 tmp_tmpops = ZEXTHISI (({ SI tmp_addr; 6732 HI tmp_tmp_mem; 6733 BI tmp_postinc; 6734 tmp_postinc = FLD (f_memmode); 6735 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 6736 ; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 6737 ; if (NEBI (tmp_postinc, 0)) { 6738 { 6739 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 6740 tmp_addr = ADDSI (tmp_addr, 2); 6741 } 6742 { 6743 SI opval = tmp_addr; 6744 SET_H_GR (FLD (f_operand1), opval); 6745 written |= (1 << 11); 6746 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6747 } 6748 } 6749 } 6750 ; tmp_tmp_mem; })); 6751 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6752 tmp_carry = CPU (h_cbit); 6753 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6754 { 6755 SI opval = tmp_newval; 6756 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 6757 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6758 } 6759 { 6760 { 6761 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 6762 CPU (h_cbit) = opval; 6763 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6764 } 6765 { 6766 BI opval = LTSI (tmp_newval, 0); 6767 CPU (h_nbit) = opval; 6768 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6769 } 6770 { 6771 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6772 CPU (h_zbit) = opval; 6773 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6774 } 6775 { 6776 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 6777 CPU (h_vbit) = opval; 6778 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6779 } 6780 { 6781 { 6782 BI opval = 0; 6783 CPU (h_xbit) = opval; 6784 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6785 } 6786 { 6787 BI opval = 0; 6788 SET_H_INSN_PREFIXED_P (opval); 6789 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6790 } 6791 } 6792 } 6793 } 6794 6795 abuf->written = written; 6796 #undef FLD 6797 } 6798 NEXT (vpc); 6799 6800 CASE (sem, INSN_ADDUCBR) : /* [${Rs}${inc}],$Rd */ 6801 { 6802 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6803 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6804 #define FLD(f) abuf->fields.sfmt_addcbr.f 6805 int UNUSED written = 0; 6806 IADDR UNUSED pc = abuf->addr; 6807 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 6808 6809 { 6810 SI tmp_tmpopd; 6811 SI tmp_tmpops; 6812 BI tmp_carry; 6813 SI tmp_newval; 6814 tmp_tmpops = ZEXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte))); 6815 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6816 tmp_carry = CPU (h_cbit); 6817 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6818 { 6819 SI opval = tmp_newval; 6820 SET_H_GR (FLD (f_operand2), opval); 6821 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6822 } 6823 { 6824 { 6825 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 6826 CPU (h_cbit) = opval; 6827 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6828 } 6829 { 6830 BI opval = LTSI (tmp_newval, 0); 6831 CPU (h_nbit) = opval; 6832 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6833 } 6834 { 6835 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6836 CPU (h_zbit) = opval; 6837 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6838 } 6839 { 6840 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 6841 CPU (h_vbit) = opval; 6842 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6843 } 6844 { 6845 { 6846 BI opval = 0; 6847 CPU (h_xbit) = opval; 6848 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6849 } 6850 { 6851 BI opval = 0; 6852 SET_H_INSN_PREFIXED_P (opval); 6853 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6854 } 6855 } 6856 } 6857 } 6858 6859 #undef FLD 6860 } 6861 NEXT (vpc); 6862 6863 CASE (sem, INSN_ADDUCWR) : /* [${Rs}${inc}],$Rd */ 6864 { 6865 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6866 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6867 #define FLD(f) abuf->fields.sfmt_addcwr.f 6868 int UNUSED written = 0; 6869 IADDR UNUSED pc = abuf->addr; 6870 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 6871 6872 { 6873 SI tmp_tmpopd; 6874 SI tmp_tmpops; 6875 BI tmp_carry; 6876 SI tmp_newval; 6877 tmp_tmpops = ZEXTHISI (TRUNCSIHI (FLD (f_indir_pc__word))); 6878 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6879 tmp_carry = CPU (h_cbit); 6880 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6881 { 6882 SI opval = tmp_newval; 6883 SET_H_GR (FLD (f_operand2), opval); 6884 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6885 } 6886 { 6887 { 6888 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 6889 CPU (h_cbit) = opval; 6890 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6891 } 6892 { 6893 BI opval = LTSI (tmp_newval, 0); 6894 CPU (h_nbit) = opval; 6895 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6896 } 6897 { 6898 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6899 CPU (h_zbit) = opval; 6900 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6901 } 6902 { 6903 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 6904 CPU (h_vbit) = opval; 6905 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6906 } 6907 { 6908 { 6909 BI opval = 0; 6910 CPU (h_xbit) = opval; 6911 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6912 } 6913 { 6914 BI opval = 0; 6915 SET_H_INSN_PREFIXED_P (opval); 6916 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6917 } 6918 } 6919 } 6920 } 6921 6922 #undef FLD 6923 } 6924 NEXT (vpc); 6925 6926 CASE (sem, INSN_SUB_B_R) : /* sub.b $Rs,$Rd */ 6927 { 6928 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6929 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6930 #define FLD(f) abuf->fields.sfmt_addc_m.f 6931 int UNUSED written = 0; 6932 IADDR UNUSED pc = abuf->addr; 6933 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6934 6935 { 6936 QI tmp_tmpopd; 6937 QI tmp_tmpops; 6938 BI tmp_carry; 6939 QI tmp_newval; 6940 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 6941 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 6942 tmp_carry = CPU (h_cbit); 6943 tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 6944 { 6945 SI tmp_oldregval; 6946 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 6947 { 6948 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00)); 6949 SET_H_GR (FLD (f_operand2), opval); 6950 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6951 } 6952 } 6953 { 6954 { 6955 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0)))); 6956 CPU (h_cbit) = opval; 6957 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 6958 } 6959 { 6960 BI opval = LTQI (tmp_newval, 0); 6961 CPU (h_nbit) = opval; 6962 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 6963 } 6964 { 6965 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 6966 CPU (h_zbit) = opval; 6967 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 6968 } 6969 { 6970 BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0))); 6971 CPU (h_vbit) = opval; 6972 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 6973 } 6974 { 6975 { 6976 BI opval = 0; 6977 CPU (h_xbit) = opval; 6978 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 6979 } 6980 { 6981 BI opval = 0; 6982 SET_H_INSN_PREFIXED_P (opval); 6983 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 6984 } 6985 } 6986 } 6987 } 6988 6989 #undef FLD 6990 } 6991 NEXT (vpc); 6992 6993 CASE (sem, INSN_SUB_W_R) : /* sub.w $Rs,$Rd */ 6994 { 6995 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6996 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6997 #define FLD(f) abuf->fields.sfmt_addc_m.f 6998 int UNUSED written = 0; 6999 IADDR UNUSED pc = abuf->addr; 7000 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 7001 7002 { 7003 HI tmp_tmpopd; 7004 HI tmp_tmpops; 7005 BI tmp_carry; 7006 HI tmp_newval; 7007 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 7008 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7009 tmp_carry = CPU (h_cbit); 7010 tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7011 { 7012 SI tmp_oldregval; 7013 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 7014 { 7015 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 7016 SET_H_GR (FLD (f_operand2), opval); 7017 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7018 } 7019 } 7020 { 7021 { 7022 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0)))); 7023 CPU (h_cbit) = opval; 7024 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7025 } 7026 { 7027 BI opval = LTHI (tmp_newval, 0); 7028 CPU (h_nbit) = opval; 7029 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7030 } 7031 { 7032 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7033 CPU (h_zbit) = opval; 7034 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7035 } 7036 { 7037 BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0))); 7038 CPU (h_vbit) = opval; 7039 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7040 } 7041 { 7042 { 7043 BI opval = 0; 7044 CPU (h_xbit) = opval; 7045 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7046 } 7047 { 7048 BI opval = 0; 7049 SET_H_INSN_PREFIXED_P (opval); 7050 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7051 } 7052 } 7053 } 7054 } 7055 7056 #undef FLD 7057 } 7058 NEXT (vpc); 7059 7060 CASE (sem, INSN_SUB_D_R) : /* sub.d $Rs,$Rd */ 7061 { 7062 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7063 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7064 #define FLD(f) abuf->fields.sfmt_addc_m.f 7065 int UNUSED written = 0; 7066 IADDR UNUSED pc = abuf->addr; 7067 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 7068 7069 { 7070 SI tmp_tmpopd; 7071 SI tmp_tmpops; 7072 BI tmp_carry; 7073 SI tmp_newval; 7074 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 7075 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7076 tmp_carry = CPU (h_cbit); 7077 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7078 { 7079 SI opval = tmp_newval; 7080 SET_H_GR (FLD (f_operand2), opval); 7081 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7082 } 7083 { 7084 { 7085 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 7086 CPU (h_cbit) = opval; 7087 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7088 } 7089 { 7090 BI opval = LTSI (tmp_newval, 0); 7091 CPU (h_nbit) = opval; 7092 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7093 } 7094 { 7095 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7096 CPU (h_zbit) = opval; 7097 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7098 } 7099 { 7100 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 7101 CPU (h_vbit) = opval; 7102 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7103 } 7104 { 7105 { 7106 BI opval = 0; 7107 CPU (h_xbit) = opval; 7108 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7109 } 7110 { 7111 BI opval = 0; 7112 SET_H_INSN_PREFIXED_P (opval); 7113 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7114 } 7115 } 7116 } 7117 } 7118 7119 #undef FLD 7120 } 7121 NEXT (vpc); 7122 7123 CASE (sem, INSN_SUB_M_B_M) : /* sub-m.b [${Rs}${inc}],${Rd} */ 7124 { 7125 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7126 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7127 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f 7128 int UNUSED written = 0; 7129 IADDR UNUSED pc = abuf->addr; 7130 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 7131 7132 { 7133 QI tmp_tmpopd; 7134 QI tmp_tmpops; 7135 BI tmp_carry; 7136 QI tmp_newval; 7137 tmp_tmpops = ({ SI tmp_addr; 7138 QI tmp_tmp_mem; 7139 BI tmp_postinc; 7140 tmp_postinc = FLD (f_memmode); 7141 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 7142 ; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 7143 ; if (NEBI (tmp_postinc, 0)) { 7144 { 7145 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 7146 tmp_addr = ADDSI (tmp_addr, 1); 7147 } 7148 { 7149 SI opval = tmp_addr; 7150 SET_H_GR (FLD (f_operand1), opval); 7151 written |= (1 << 12); 7152 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7153 } 7154 } 7155 } 7156 ; tmp_tmp_mem; }); 7157 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7158 tmp_carry = CPU (h_cbit); 7159 tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7160 { 7161 SI tmp_oldregval; 7162 tmp_oldregval = GET_H_RAW_GR_ACR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2)))); 7163 { 7164 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00)); 7165 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 7166 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7167 } 7168 } 7169 { 7170 { 7171 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0)))); 7172 CPU (h_cbit) = opval; 7173 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7174 } 7175 { 7176 BI opval = LTQI (tmp_newval, 0); 7177 CPU (h_nbit) = opval; 7178 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7179 } 7180 { 7181 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7182 CPU (h_zbit) = opval; 7183 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7184 } 7185 { 7186 BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0))); 7187 CPU (h_vbit) = opval; 7188 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7189 } 7190 { 7191 { 7192 BI opval = 0; 7193 CPU (h_xbit) = opval; 7194 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7195 } 7196 { 7197 BI opval = 0; 7198 SET_H_INSN_PREFIXED_P (opval); 7199 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7200 } 7201 } 7202 } 7203 } 7204 7205 abuf->written = written; 7206 #undef FLD 7207 } 7208 NEXT (vpc); 7209 7210 CASE (sem, INSN_SUB_M_W_M) : /* sub-m.w [${Rs}${inc}],${Rd} */ 7211 { 7212 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7213 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7214 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f 7215 int UNUSED written = 0; 7216 IADDR UNUSED pc = abuf->addr; 7217 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 7218 7219 { 7220 HI tmp_tmpopd; 7221 HI tmp_tmpops; 7222 BI tmp_carry; 7223 HI tmp_newval; 7224 tmp_tmpops = ({ SI tmp_addr; 7225 HI tmp_tmp_mem; 7226 BI tmp_postinc; 7227 tmp_postinc = FLD (f_memmode); 7228 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 7229 ; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 7230 ; if (NEBI (tmp_postinc, 0)) { 7231 { 7232 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 7233 tmp_addr = ADDSI (tmp_addr, 2); 7234 } 7235 { 7236 SI opval = tmp_addr; 7237 SET_H_GR (FLD (f_operand1), opval); 7238 written |= (1 << 12); 7239 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7240 } 7241 } 7242 } 7243 ; tmp_tmp_mem; }); 7244 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7245 tmp_carry = CPU (h_cbit); 7246 tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7247 { 7248 SI tmp_oldregval; 7249 tmp_oldregval = GET_H_RAW_GR_ACR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2)))); 7250 { 7251 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 7252 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 7253 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7254 } 7255 } 7256 { 7257 { 7258 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0)))); 7259 CPU (h_cbit) = opval; 7260 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7261 } 7262 { 7263 BI opval = LTHI (tmp_newval, 0); 7264 CPU (h_nbit) = opval; 7265 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7266 } 7267 { 7268 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7269 CPU (h_zbit) = opval; 7270 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7271 } 7272 { 7273 BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0))); 7274 CPU (h_vbit) = opval; 7275 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7276 } 7277 { 7278 { 7279 BI opval = 0; 7280 CPU (h_xbit) = opval; 7281 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7282 } 7283 { 7284 BI opval = 0; 7285 SET_H_INSN_PREFIXED_P (opval); 7286 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7287 } 7288 } 7289 } 7290 } 7291 7292 abuf->written = written; 7293 #undef FLD 7294 } 7295 NEXT (vpc); 7296 7297 CASE (sem, INSN_SUB_M_D_M) : /* sub-m.d [${Rs}${inc}],${Rd} */ 7298 { 7299 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7300 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7301 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f 7302 int UNUSED written = 0; 7303 IADDR UNUSED pc = abuf->addr; 7304 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 7305 7306 { 7307 SI tmp_tmpopd; 7308 SI tmp_tmpops; 7309 BI tmp_carry; 7310 SI tmp_newval; 7311 tmp_tmpops = ({ SI tmp_addr; 7312 SI tmp_tmp_mem; 7313 BI tmp_postinc; 7314 tmp_postinc = FLD (f_memmode); 7315 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 7316 ; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 7317 ; if (NEBI (tmp_postinc, 0)) { 7318 { 7319 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 7320 tmp_addr = ADDSI (tmp_addr, 4); 7321 } 7322 { 7323 SI opval = tmp_addr; 7324 SET_H_GR (FLD (f_operand1), opval); 7325 written |= (1 << 11); 7326 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7327 } 7328 } 7329 } 7330 ; tmp_tmp_mem; }); 7331 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7332 tmp_carry = CPU (h_cbit); 7333 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7334 { 7335 SI opval = tmp_newval; 7336 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 7337 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7338 } 7339 { 7340 { 7341 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 7342 CPU (h_cbit) = opval; 7343 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7344 } 7345 { 7346 BI opval = LTSI (tmp_newval, 0); 7347 CPU (h_nbit) = opval; 7348 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7349 } 7350 { 7351 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7352 CPU (h_zbit) = opval; 7353 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7354 } 7355 { 7356 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 7357 CPU (h_vbit) = opval; 7358 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7359 } 7360 { 7361 { 7362 BI opval = 0; 7363 CPU (h_xbit) = opval; 7364 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7365 } 7366 { 7367 BI opval = 0; 7368 SET_H_INSN_PREFIXED_P (opval); 7369 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7370 } 7371 } 7372 } 7373 } 7374 7375 abuf->written = written; 7376 #undef FLD 7377 } 7378 NEXT (vpc); 7379 7380 CASE (sem, INSN_SUBCBR) : /* sub.b ${sconst8}],${Rd} */ 7381 { 7382 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7383 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7384 #define FLD(f) abuf->fields.sfmt_addcbr.f 7385 int UNUSED written = 0; 7386 IADDR UNUSED pc = abuf->addr; 7387 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 7388 7389 { 7390 QI tmp_tmpopd; 7391 QI tmp_tmpops; 7392 BI tmp_carry; 7393 QI tmp_newval; 7394 tmp_tmpops = FLD (f_indir_pc__byte); 7395 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7396 tmp_carry = CPU (h_cbit); 7397 tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7398 { 7399 SI tmp_oldregval; 7400 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 7401 { 7402 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00)); 7403 SET_H_GR (FLD (f_operand2), opval); 7404 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7405 } 7406 } 7407 { 7408 { 7409 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0)))); 7410 CPU (h_cbit) = opval; 7411 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7412 } 7413 { 7414 BI opval = LTQI (tmp_newval, 0); 7415 CPU (h_nbit) = opval; 7416 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7417 } 7418 { 7419 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7420 CPU (h_zbit) = opval; 7421 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7422 } 7423 { 7424 BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0))); 7425 CPU (h_vbit) = opval; 7426 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7427 } 7428 { 7429 { 7430 BI opval = 0; 7431 CPU (h_xbit) = opval; 7432 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7433 } 7434 { 7435 BI opval = 0; 7436 SET_H_INSN_PREFIXED_P (opval); 7437 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7438 } 7439 } 7440 } 7441 } 7442 7443 #undef FLD 7444 } 7445 NEXT (vpc); 7446 7447 CASE (sem, INSN_SUBCWR) : /* sub.w ${sconst16}],${Rd} */ 7448 { 7449 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7450 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7451 #define FLD(f) abuf->fields.sfmt_addcwr.f 7452 int UNUSED written = 0; 7453 IADDR UNUSED pc = abuf->addr; 7454 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 7455 7456 { 7457 HI tmp_tmpopd; 7458 HI tmp_tmpops; 7459 BI tmp_carry; 7460 HI tmp_newval; 7461 tmp_tmpops = FLD (f_indir_pc__word); 7462 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7463 tmp_carry = CPU (h_cbit); 7464 tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7465 { 7466 SI tmp_oldregval; 7467 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 7468 { 7469 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 7470 SET_H_GR (FLD (f_operand2), opval); 7471 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7472 } 7473 } 7474 { 7475 { 7476 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0)))); 7477 CPU (h_cbit) = opval; 7478 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7479 } 7480 { 7481 BI opval = LTHI (tmp_newval, 0); 7482 CPU (h_nbit) = opval; 7483 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7484 } 7485 { 7486 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7487 CPU (h_zbit) = opval; 7488 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7489 } 7490 { 7491 BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0))); 7492 CPU (h_vbit) = opval; 7493 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7494 } 7495 { 7496 { 7497 BI opval = 0; 7498 CPU (h_xbit) = opval; 7499 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7500 } 7501 { 7502 BI opval = 0; 7503 SET_H_INSN_PREFIXED_P (opval); 7504 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7505 } 7506 } 7507 } 7508 } 7509 7510 #undef FLD 7511 } 7512 NEXT (vpc); 7513 7514 CASE (sem, INSN_SUBCDR) : /* sub.d ${const32}],${Rd} */ 7515 { 7516 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7517 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7518 #define FLD(f) abuf->fields.sfmt_addcdr.f 7519 int UNUSED written = 0; 7520 IADDR UNUSED pc = abuf->addr; 7521 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 7522 7523 { 7524 SI tmp_tmpopd; 7525 SI tmp_tmpops; 7526 BI tmp_carry; 7527 SI tmp_newval; 7528 tmp_tmpops = FLD (f_indir_pc__dword); 7529 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7530 tmp_carry = CPU (h_cbit); 7531 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7532 { 7533 SI opval = tmp_newval; 7534 SET_H_GR (FLD (f_operand2), opval); 7535 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7536 } 7537 { 7538 { 7539 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 7540 CPU (h_cbit) = opval; 7541 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7542 } 7543 { 7544 BI opval = LTSI (tmp_newval, 0); 7545 CPU (h_nbit) = opval; 7546 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7547 } 7548 { 7549 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7550 CPU (h_zbit) = opval; 7551 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7552 } 7553 { 7554 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 7555 CPU (h_vbit) = opval; 7556 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7557 } 7558 { 7559 { 7560 BI opval = 0; 7561 CPU (h_xbit) = opval; 7562 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7563 } 7564 { 7565 BI opval = 0; 7566 SET_H_INSN_PREFIXED_P (opval); 7567 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7568 } 7569 } 7570 } 7571 } 7572 7573 #undef FLD 7574 } 7575 NEXT (vpc); 7576 7577 CASE (sem, INSN_SUBS_B_R) : /* subs.b $Rs,$Rd */ 7578 { 7579 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7580 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7581 #define FLD(f) abuf->fields.sfmt_addc_m.f 7582 int UNUSED written = 0; 7583 IADDR UNUSED pc = abuf->addr; 7584 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 7585 7586 { 7587 SI tmp_tmpopd; 7588 SI tmp_tmpops; 7589 BI tmp_carry; 7590 SI tmp_newval; 7591 tmp_tmpops = EXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand1)))); 7592 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7593 tmp_carry = CPU (h_cbit); 7594 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7595 { 7596 SI opval = tmp_newval; 7597 SET_H_GR (FLD (f_operand2), opval); 7598 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7599 } 7600 { 7601 { 7602 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 7603 CPU (h_cbit) = opval; 7604 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7605 } 7606 { 7607 BI opval = LTSI (tmp_newval, 0); 7608 CPU (h_nbit) = opval; 7609 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7610 } 7611 { 7612 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7613 CPU (h_zbit) = opval; 7614 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7615 } 7616 { 7617 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 7618 CPU (h_vbit) = opval; 7619 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7620 } 7621 { 7622 { 7623 BI opval = 0; 7624 CPU (h_xbit) = opval; 7625 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7626 } 7627 { 7628 BI opval = 0; 7629 SET_H_INSN_PREFIXED_P (opval); 7630 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7631 } 7632 } 7633 } 7634 } 7635 7636 #undef FLD 7637 } 7638 NEXT (vpc); 7639 7640 CASE (sem, INSN_SUBS_W_R) : /* subs.w $Rs,$Rd */ 7641 { 7642 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7643 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7644 #define FLD(f) abuf->fields.sfmt_addc_m.f 7645 int UNUSED written = 0; 7646 IADDR UNUSED pc = abuf->addr; 7647 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 7648 7649 { 7650 SI tmp_tmpopd; 7651 SI tmp_tmpops; 7652 BI tmp_carry; 7653 SI tmp_newval; 7654 tmp_tmpops = EXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand1)))); 7655 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7656 tmp_carry = CPU (h_cbit); 7657 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7658 { 7659 SI opval = tmp_newval; 7660 SET_H_GR (FLD (f_operand2), opval); 7661 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7662 } 7663 { 7664 { 7665 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 7666 CPU (h_cbit) = opval; 7667 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7668 } 7669 { 7670 BI opval = LTSI (tmp_newval, 0); 7671 CPU (h_nbit) = opval; 7672 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7673 } 7674 { 7675 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7676 CPU (h_zbit) = opval; 7677 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7678 } 7679 { 7680 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 7681 CPU (h_vbit) = opval; 7682 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7683 } 7684 { 7685 { 7686 BI opval = 0; 7687 CPU (h_xbit) = opval; 7688 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7689 } 7690 { 7691 BI opval = 0; 7692 SET_H_INSN_PREFIXED_P (opval); 7693 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7694 } 7695 } 7696 } 7697 } 7698 7699 #undef FLD 7700 } 7701 NEXT (vpc); 7702 7703 CASE (sem, INSN_SUBS_M_B_M) : /* subs-m.b [${Rs}${inc}],$Rd */ 7704 { 7705 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7706 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7707 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f 7708 int UNUSED written = 0; 7709 IADDR UNUSED pc = abuf->addr; 7710 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 7711 7712 { 7713 SI tmp_tmpopd; 7714 SI tmp_tmpops; 7715 BI tmp_carry; 7716 SI tmp_newval; 7717 tmp_tmpops = EXTQISI (({ SI tmp_addr; 7718 QI tmp_tmp_mem; 7719 BI tmp_postinc; 7720 tmp_postinc = FLD (f_memmode); 7721 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 7722 ; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 7723 ; if (NEBI (tmp_postinc, 0)) { 7724 { 7725 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 7726 tmp_addr = ADDSI (tmp_addr, 1); 7727 } 7728 { 7729 SI opval = tmp_addr; 7730 SET_H_GR (FLD (f_operand1), opval); 7731 written |= (1 << 11); 7732 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7733 } 7734 } 7735 } 7736 ; tmp_tmp_mem; })); 7737 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7738 tmp_carry = CPU (h_cbit); 7739 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7740 { 7741 SI opval = tmp_newval; 7742 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 7743 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7744 } 7745 { 7746 { 7747 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 7748 CPU (h_cbit) = opval; 7749 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7750 } 7751 { 7752 BI opval = LTSI (tmp_newval, 0); 7753 CPU (h_nbit) = opval; 7754 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7755 } 7756 { 7757 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7758 CPU (h_zbit) = opval; 7759 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7760 } 7761 { 7762 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 7763 CPU (h_vbit) = opval; 7764 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7765 } 7766 { 7767 { 7768 BI opval = 0; 7769 CPU (h_xbit) = opval; 7770 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7771 } 7772 { 7773 BI opval = 0; 7774 SET_H_INSN_PREFIXED_P (opval); 7775 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7776 } 7777 } 7778 } 7779 } 7780 7781 abuf->written = written; 7782 #undef FLD 7783 } 7784 NEXT (vpc); 7785 7786 CASE (sem, INSN_SUBS_M_W_M) : /* subs-m.w [${Rs}${inc}],$Rd */ 7787 { 7788 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7789 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7790 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f 7791 int UNUSED written = 0; 7792 IADDR UNUSED pc = abuf->addr; 7793 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 7794 7795 { 7796 SI tmp_tmpopd; 7797 SI tmp_tmpops; 7798 BI tmp_carry; 7799 SI tmp_newval; 7800 tmp_tmpops = EXTHISI (({ SI tmp_addr; 7801 HI tmp_tmp_mem; 7802 BI tmp_postinc; 7803 tmp_postinc = FLD (f_memmode); 7804 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 7805 ; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 7806 ; if (NEBI (tmp_postinc, 0)) { 7807 { 7808 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 7809 tmp_addr = ADDSI (tmp_addr, 2); 7810 } 7811 { 7812 SI opval = tmp_addr; 7813 SET_H_GR (FLD (f_operand1), opval); 7814 written |= (1 << 11); 7815 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7816 } 7817 } 7818 } 7819 ; tmp_tmp_mem; })); 7820 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7821 tmp_carry = CPU (h_cbit); 7822 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7823 { 7824 SI opval = tmp_newval; 7825 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 7826 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7827 } 7828 { 7829 { 7830 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 7831 CPU (h_cbit) = opval; 7832 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7833 } 7834 { 7835 BI opval = LTSI (tmp_newval, 0); 7836 CPU (h_nbit) = opval; 7837 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7838 } 7839 { 7840 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7841 CPU (h_zbit) = opval; 7842 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7843 } 7844 { 7845 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 7846 CPU (h_vbit) = opval; 7847 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7848 } 7849 { 7850 { 7851 BI opval = 0; 7852 CPU (h_xbit) = opval; 7853 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7854 } 7855 { 7856 BI opval = 0; 7857 SET_H_INSN_PREFIXED_P (opval); 7858 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7859 } 7860 } 7861 } 7862 } 7863 7864 abuf->written = written; 7865 #undef FLD 7866 } 7867 NEXT (vpc); 7868 7869 CASE (sem, INSN_SUBSCBR) : /* [${Rs}${inc}],$Rd */ 7870 { 7871 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7872 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7873 #define FLD(f) abuf->fields.sfmt_addcbr.f 7874 int UNUSED written = 0; 7875 IADDR UNUSED pc = abuf->addr; 7876 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 7877 7878 { 7879 SI tmp_tmpopd; 7880 SI tmp_tmpops; 7881 BI tmp_carry; 7882 SI tmp_newval; 7883 tmp_tmpops = EXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte))); 7884 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7885 tmp_carry = CPU (h_cbit); 7886 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7887 { 7888 SI opval = tmp_newval; 7889 SET_H_GR (FLD (f_operand2), opval); 7890 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7891 } 7892 { 7893 { 7894 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 7895 CPU (h_cbit) = opval; 7896 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7897 } 7898 { 7899 BI opval = LTSI (tmp_newval, 0); 7900 CPU (h_nbit) = opval; 7901 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7902 } 7903 { 7904 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7905 CPU (h_zbit) = opval; 7906 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7907 } 7908 { 7909 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 7910 CPU (h_vbit) = opval; 7911 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7912 } 7913 { 7914 { 7915 BI opval = 0; 7916 CPU (h_xbit) = opval; 7917 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7918 } 7919 { 7920 BI opval = 0; 7921 SET_H_INSN_PREFIXED_P (opval); 7922 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7923 } 7924 } 7925 } 7926 } 7927 7928 #undef FLD 7929 } 7930 NEXT (vpc); 7931 7932 CASE (sem, INSN_SUBSCWR) : /* [${Rs}${inc}],$Rd */ 7933 { 7934 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7935 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7936 #define FLD(f) abuf->fields.sfmt_addcwr.f 7937 int UNUSED written = 0; 7938 IADDR UNUSED pc = abuf->addr; 7939 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 7940 7941 { 7942 SI tmp_tmpopd; 7943 SI tmp_tmpops; 7944 BI tmp_carry; 7945 SI tmp_newval; 7946 tmp_tmpops = EXTHISI (TRUNCSIHI (FLD (f_indir_pc__word))); 7947 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 7948 tmp_carry = CPU (h_cbit); 7949 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 7950 { 7951 SI opval = tmp_newval; 7952 SET_H_GR (FLD (f_operand2), opval); 7953 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 7954 } 7955 { 7956 { 7957 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 7958 CPU (h_cbit) = opval; 7959 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 7960 } 7961 { 7962 BI opval = LTSI (tmp_newval, 0); 7963 CPU (h_nbit) = opval; 7964 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 7965 } 7966 { 7967 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 7968 CPU (h_zbit) = opval; 7969 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 7970 } 7971 { 7972 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 7973 CPU (h_vbit) = opval; 7974 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 7975 } 7976 { 7977 { 7978 BI opval = 0; 7979 CPU (h_xbit) = opval; 7980 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 7981 } 7982 { 7983 BI opval = 0; 7984 SET_H_INSN_PREFIXED_P (opval); 7985 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 7986 } 7987 } 7988 } 7989 } 7990 7991 #undef FLD 7992 } 7993 NEXT (vpc); 7994 7995 CASE (sem, INSN_SUBU_B_R) : /* subu.b $Rs,$Rd */ 7996 { 7997 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 7998 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 7999 #define FLD(f) abuf->fields.sfmt_addc_m.f 8000 int UNUSED written = 0; 8001 IADDR UNUSED pc = abuf->addr; 8002 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8003 8004 { 8005 SI tmp_tmpopd; 8006 SI tmp_tmpops; 8007 BI tmp_carry; 8008 SI tmp_newval; 8009 tmp_tmpops = ZEXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand1)))); 8010 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 8011 tmp_carry = CPU (h_cbit); 8012 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 8013 { 8014 SI opval = tmp_newval; 8015 SET_H_GR (FLD (f_operand2), opval); 8016 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8017 } 8018 { 8019 { 8020 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 8021 CPU (h_cbit) = opval; 8022 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 8023 } 8024 { 8025 BI opval = LTSI (tmp_newval, 0); 8026 CPU (h_nbit) = opval; 8027 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 8028 } 8029 { 8030 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 8031 CPU (h_zbit) = opval; 8032 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 8033 } 8034 { 8035 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 8036 CPU (h_vbit) = opval; 8037 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 8038 } 8039 { 8040 { 8041 BI opval = 0; 8042 CPU (h_xbit) = opval; 8043 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8044 } 8045 { 8046 BI opval = 0; 8047 SET_H_INSN_PREFIXED_P (opval); 8048 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8049 } 8050 } 8051 } 8052 } 8053 8054 #undef FLD 8055 } 8056 NEXT (vpc); 8057 8058 CASE (sem, INSN_SUBU_W_R) : /* subu.w $Rs,$Rd */ 8059 { 8060 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8061 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8062 #define FLD(f) abuf->fields.sfmt_addc_m.f 8063 int UNUSED written = 0; 8064 IADDR UNUSED pc = abuf->addr; 8065 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8066 8067 { 8068 SI tmp_tmpopd; 8069 SI tmp_tmpops; 8070 BI tmp_carry; 8071 SI tmp_newval; 8072 tmp_tmpops = ZEXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand1)))); 8073 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 8074 tmp_carry = CPU (h_cbit); 8075 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 8076 { 8077 SI opval = tmp_newval; 8078 SET_H_GR (FLD (f_operand2), opval); 8079 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8080 } 8081 { 8082 { 8083 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 8084 CPU (h_cbit) = opval; 8085 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 8086 } 8087 { 8088 BI opval = LTSI (tmp_newval, 0); 8089 CPU (h_nbit) = opval; 8090 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 8091 } 8092 { 8093 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 8094 CPU (h_zbit) = opval; 8095 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 8096 } 8097 { 8098 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 8099 CPU (h_vbit) = opval; 8100 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 8101 } 8102 { 8103 { 8104 BI opval = 0; 8105 CPU (h_xbit) = opval; 8106 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8107 } 8108 { 8109 BI opval = 0; 8110 SET_H_INSN_PREFIXED_P (opval); 8111 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8112 } 8113 } 8114 } 8115 } 8116 8117 #undef FLD 8118 } 8119 NEXT (vpc); 8120 8121 CASE (sem, INSN_SUBU_M_B_M) : /* subu-m.b [${Rs}${inc}],$Rd */ 8122 { 8123 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8124 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8125 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f 8126 int UNUSED written = 0; 8127 IADDR UNUSED pc = abuf->addr; 8128 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8129 8130 { 8131 SI tmp_tmpopd; 8132 SI tmp_tmpops; 8133 BI tmp_carry; 8134 SI tmp_newval; 8135 tmp_tmpops = ZEXTQISI (({ SI tmp_addr; 8136 QI tmp_tmp_mem; 8137 BI tmp_postinc; 8138 tmp_postinc = FLD (f_memmode); 8139 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 8140 ; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 8141 ; if (NEBI (tmp_postinc, 0)) { 8142 { 8143 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 8144 tmp_addr = ADDSI (tmp_addr, 1); 8145 } 8146 { 8147 SI opval = tmp_addr; 8148 SET_H_GR (FLD (f_operand1), opval); 8149 written |= (1 << 11); 8150 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8151 } 8152 } 8153 } 8154 ; tmp_tmp_mem; })); 8155 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 8156 tmp_carry = CPU (h_cbit); 8157 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 8158 { 8159 SI opval = tmp_newval; 8160 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 8161 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8162 } 8163 { 8164 { 8165 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 8166 CPU (h_cbit) = opval; 8167 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 8168 } 8169 { 8170 BI opval = LTSI (tmp_newval, 0); 8171 CPU (h_nbit) = opval; 8172 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 8173 } 8174 { 8175 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 8176 CPU (h_zbit) = opval; 8177 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 8178 } 8179 { 8180 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 8181 CPU (h_vbit) = opval; 8182 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 8183 } 8184 { 8185 { 8186 BI opval = 0; 8187 CPU (h_xbit) = opval; 8188 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8189 } 8190 { 8191 BI opval = 0; 8192 SET_H_INSN_PREFIXED_P (opval); 8193 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8194 } 8195 } 8196 } 8197 } 8198 8199 abuf->written = written; 8200 #undef FLD 8201 } 8202 NEXT (vpc); 8203 8204 CASE (sem, INSN_SUBU_M_W_M) : /* subu-m.w [${Rs}${inc}],$Rd */ 8205 { 8206 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8207 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8208 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f 8209 int UNUSED written = 0; 8210 IADDR UNUSED pc = abuf->addr; 8211 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8212 8213 { 8214 SI tmp_tmpopd; 8215 SI tmp_tmpops; 8216 BI tmp_carry; 8217 SI tmp_newval; 8218 tmp_tmpops = ZEXTHISI (({ SI tmp_addr; 8219 HI tmp_tmp_mem; 8220 BI tmp_postinc; 8221 tmp_postinc = FLD (f_memmode); 8222 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 8223 ; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 8224 ; if (NEBI (tmp_postinc, 0)) { 8225 { 8226 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 8227 tmp_addr = ADDSI (tmp_addr, 2); 8228 } 8229 { 8230 SI opval = tmp_addr; 8231 SET_H_GR (FLD (f_operand1), opval); 8232 written |= (1 << 11); 8233 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8234 } 8235 } 8236 } 8237 ; tmp_tmp_mem; })); 8238 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 8239 tmp_carry = CPU (h_cbit); 8240 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 8241 { 8242 SI opval = tmp_newval; 8243 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 8244 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8245 } 8246 { 8247 { 8248 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 8249 CPU (h_cbit) = opval; 8250 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 8251 } 8252 { 8253 BI opval = LTSI (tmp_newval, 0); 8254 CPU (h_nbit) = opval; 8255 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 8256 } 8257 { 8258 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 8259 CPU (h_zbit) = opval; 8260 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 8261 } 8262 { 8263 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 8264 CPU (h_vbit) = opval; 8265 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 8266 } 8267 { 8268 { 8269 BI opval = 0; 8270 CPU (h_xbit) = opval; 8271 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8272 } 8273 { 8274 BI opval = 0; 8275 SET_H_INSN_PREFIXED_P (opval); 8276 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8277 } 8278 } 8279 } 8280 } 8281 8282 abuf->written = written; 8283 #undef FLD 8284 } 8285 NEXT (vpc); 8286 8287 CASE (sem, INSN_SUBUCBR) : /* [${Rs}${inc}],$Rd */ 8288 { 8289 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8290 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8291 #define FLD(f) abuf->fields.sfmt_addcbr.f 8292 int UNUSED written = 0; 8293 IADDR UNUSED pc = abuf->addr; 8294 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 8295 8296 { 8297 SI tmp_tmpopd; 8298 SI tmp_tmpops; 8299 BI tmp_carry; 8300 SI tmp_newval; 8301 tmp_tmpops = ZEXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte))); 8302 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 8303 tmp_carry = CPU (h_cbit); 8304 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 8305 { 8306 SI opval = tmp_newval; 8307 SET_H_GR (FLD (f_operand2), opval); 8308 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8309 } 8310 { 8311 { 8312 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 8313 CPU (h_cbit) = opval; 8314 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 8315 } 8316 { 8317 BI opval = LTSI (tmp_newval, 0); 8318 CPU (h_nbit) = opval; 8319 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 8320 } 8321 { 8322 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 8323 CPU (h_zbit) = opval; 8324 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 8325 } 8326 { 8327 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 8328 CPU (h_vbit) = opval; 8329 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 8330 } 8331 { 8332 { 8333 BI opval = 0; 8334 CPU (h_xbit) = opval; 8335 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8336 } 8337 { 8338 BI opval = 0; 8339 SET_H_INSN_PREFIXED_P (opval); 8340 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8341 } 8342 } 8343 } 8344 } 8345 8346 #undef FLD 8347 } 8348 NEXT (vpc); 8349 8350 CASE (sem, INSN_SUBUCWR) : /* [${Rs}${inc}],$Rd */ 8351 { 8352 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8353 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8354 #define FLD(f) abuf->fields.sfmt_addcwr.f 8355 int UNUSED written = 0; 8356 IADDR UNUSED pc = abuf->addr; 8357 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 8358 8359 { 8360 SI tmp_tmpopd; 8361 SI tmp_tmpops; 8362 BI tmp_carry; 8363 SI tmp_newval; 8364 tmp_tmpops = ZEXTHISI (TRUNCSIHI (FLD (f_indir_pc__word))); 8365 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 8366 tmp_carry = CPU (h_cbit); 8367 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 8368 { 8369 SI opval = tmp_newval; 8370 SET_H_GR (FLD (f_operand2), opval); 8371 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8372 } 8373 { 8374 { 8375 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 8376 CPU (h_cbit) = opval; 8377 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 8378 } 8379 { 8380 BI opval = LTSI (tmp_newval, 0); 8381 CPU (h_nbit) = opval; 8382 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 8383 } 8384 { 8385 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 8386 CPU (h_zbit) = opval; 8387 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 8388 } 8389 { 8390 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 8391 CPU (h_vbit) = opval; 8392 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 8393 } 8394 { 8395 { 8396 BI opval = 0; 8397 CPU (h_xbit) = opval; 8398 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8399 } 8400 { 8401 BI opval = 0; 8402 SET_H_INSN_PREFIXED_P (opval); 8403 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8404 } 8405 } 8406 } 8407 } 8408 8409 #undef FLD 8410 } 8411 NEXT (vpc); 8412 8413 CASE (sem, INSN_ADDC_R) : /* addc $Rs,$Rd */ 8414 { 8415 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8416 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8417 #define FLD(f) abuf->fields.sfmt_addc_m.f 8418 int UNUSED written = 0; 8419 IADDR UNUSED pc = abuf->addr; 8420 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8421 8422 { 8423 CPU (h_xbit) = 1; 8424 { 8425 SI tmp_tmpopd; 8426 SI tmp_tmpops; 8427 BI tmp_carry; 8428 SI tmp_newval; 8429 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 8430 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 8431 tmp_carry = CPU (h_cbit); 8432 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 8433 { 8434 SI opval = tmp_newval; 8435 SET_H_GR (FLD (f_operand2), opval); 8436 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8437 } 8438 { 8439 { 8440 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 8441 CPU (h_cbit) = opval; 8442 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 8443 } 8444 { 8445 BI opval = LTSI (tmp_newval, 0); 8446 CPU (h_nbit) = opval; 8447 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 8448 } 8449 { 8450 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 8451 CPU (h_zbit) = opval; 8452 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 8453 } 8454 { 8455 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 8456 CPU (h_vbit) = opval; 8457 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 8458 } 8459 { 8460 { 8461 BI opval = 0; 8462 CPU (h_xbit) = opval; 8463 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8464 } 8465 { 8466 BI opval = 0; 8467 SET_H_INSN_PREFIXED_P (opval); 8468 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8469 } 8470 } 8471 } 8472 } 8473 } 8474 8475 #undef FLD 8476 } 8477 NEXT (vpc); 8478 8479 CASE (sem, INSN_ADDC_M) : /* addc [${Rs}${inc}],${Rd} */ 8480 { 8481 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8482 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8483 #define FLD(f) abuf->fields.sfmt_addc_m.f 8484 int UNUSED written = 0; 8485 IADDR UNUSED pc = abuf->addr; 8486 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8487 8488 { 8489 CPU (h_xbit) = 1; 8490 { 8491 SI tmp_tmpopd; 8492 SI tmp_tmpops; 8493 BI tmp_carry; 8494 SI tmp_newval; 8495 tmp_tmpops = ({ SI tmp_addr; 8496 SI tmp_tmp_mem; 8497 BI tmp_postinc; 8498 tmp_postinc = FLD (f_memmode); 8499 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 8500 ; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 8501 ; if (NEBI (tmp_postinc, 0)) { 8502 { 8503 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 8504 tmp_addr = ADDSI (tmp_addr, 4); 8505 } 8506 { 8507 SI opval = tmp_addr; 8508 SET_H_GR (FLD (f_operand1), opval); 8509 written |= (1 << 10); 8510 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8511 } 8512 } 8513 } 8514 ; tmp_tmp_mem; }); 8515 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 8516 tmp_carry = CPU (h_cbit); 8517 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 8518 { 8519 SI opval = tmp_newval; 8520 SET_H_GR (FLD (f_operand2), opval); 8521 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8522 } 8523 { 8524 { 8525 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 8526 CPU (h_cbit) = opval; 8527 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 8528 } 8529 { 8530 BI opval = LTSI (tmp_newval, 0); 8531 CPU (h_nbit) = opval; 8532 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 8533 } 8534 { 8535 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 8536 CPU (h_zbit) = opval; 8537 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 8538 } 8539 { 8540 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 8541 CPU (h_vbit) = opval; 8542 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 8543 } 8544 { 8545 { 8546 BI opval = 0; 8547 CPU (h_xbit) = opval; 8548 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8549 } 8550 { 8551 BI opval = 0; 8552 SET_H_INSN_PREFIXED_P (opval); 8553 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8554 } 8555 } 8556 } 8557 } 8558 } 8559 8560 abuf->written = written; 8561 #undef FLD 8562 } 8563 NEXT (vpc); 8564 8565 CASE (sem, INSN_ADDC_C) : /* addc ${const32},${Rd} */ 8566 { 8567 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8568 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8569 #define FLD(f) abuf->fields.sfmt_addcdr.f 8570 int UNUSED written = 0; 8571 IADDR UNUSED pc = abuf->addr; 8572 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 8573 8574 { 8575 CPU (h_xbit) = 1; 8576 { 8577 SI tmp_tmpopd; 8578 SI tmp_tmpops; 8579 BI tmp_carry; 8580 SI tmp_newval; 8581 tmp_tmpops = FLD (f_indir_pc__dword); 8582 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 8583 tmp_carry = CPU (h_cbit); 8584 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 8585 { 8586 SI opval = tmp_newval; 8587 SET_H_GR (FLD (f_operand2), opval); 8588 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8589 } 8590 { 8591 { 8592 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 8593 CPU (h_cbit) = opval; 8594 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 8595 } 8596 { 8597 BI opval = LTSI (tmp_newval, 0); 8598 CPU (h_nbit) = opval; 8599 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 8600 } 8601 { 8602 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 8603 CPU (h_zbit) = opval; 8604 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 8605 } 8606 { 8607 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 8608 CPU (h_vbit) = opval; 8609 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 8610 } 8611 { 8612 { 8613 BI opval = 0; 8614 CPU (h_xbit) = opval; 8615 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8616 } 8617 { 8618 BI opval = 0; 8619 SET_H_INSN_PREFIXED_P (opval); 8620 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8621 } 8622 } 8623 } 8624 } 8625 } 8626 8627 #undef FLD 8628 } 8629 NEXT (vpc); 8630 8631 CASE (sem, INSN_LAPC_D) : /* lapc.d ${const32-pcrel},${Rd} */ 8632 { 8633 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8634 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8635 #define FLD(f) abuf->fields.sfmt_lapc_d.f 8636 int UNUSED written = 0; 8637 IADDR UNUSED pc = abuf->addr; 8638 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 8639 8640 { 8641 { 8642 SI opval = FLD (i_const32_pcrel); 8643 SET_H_GR (FLD (f_operand2), opval); 8644 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8645 } 8646 { 8647 { 8648 BI opval = 0; 8649 CPU (h_xbit) = opval; 8650 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8651 } 8652 { 8653 BI opval = 0; 8654 SET_H_INSN_PREFIXED_P (opval); 8655 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8656 } 8657 } 8658 } 8659 8660 #undef FLD 8661 } 8662 NEXT (vpc); 8663 8664 CASE (sem, INSN_LAPCQ) : /* lapcq ${qo},${Rd} */ 8665 { 8666 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8667 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8668 #define FLD(f) abuf->fields.sfmt_lapcq.f 8669 int UNUSED written = 0; 8670 IADDR UNUSED pc = abuf->addr; 8671 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8672 8673 { 8674 { 8675 SI opval = FLD (i_qo); 8676 SET_H_GR (FLD (f_operand2), opval); 8677 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8678 } 8679 { 8680 { 8681 BI opval = 0; 8682 CPU (h_xbit) = opval; 8683 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8684 } 8685 { 8686 BI opval = 0; 8687 SET_H_INSN_PREFIXED_P (opval); 8688 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8689 } 8690 } 8691 } 8692 8693 #undef FLD 8694 } 8695 NEXT (vpc); 8696 8697 CASE (sem, INSN_ADDI_B_R) : /* addi.b ${Rs-dfield}.m,${Rd-sfield} */ 8698 { 8699 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8700 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8701 #define FLD(f) abuf->fields.sfmt_addc_m.f 8702 int UNUSED written = 0; 8703 IADDR UNUSED pc = abuf->addr; 8704 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8705 8706 { 8707 { 8708 SI opval = ADDSI (GET_H_GR (FLD (f_operand1)), MULSI (GET_H_GR (FLD (f_operand2)), 1)); 8709 SET_H_GR (FLD (f_operand1), opval); 8710 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8711 } 8712 { 8713 { 8714 BI opval = 0; 8715 CPU (h_xbit) = opval; 8716 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8717 } 8718 { 8719 BI opval = 0; 8720 SET_H_INSN_PREFIXED_P (opval); 8721 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8722 } 8723 } 8724 } 8725 8726 #undef FLD 8727 } 8728 NEXT (vpc); 8729 8730 CASE (sem, INSN_ADDI_W_R) : /* addi.w ${Rs-dfield}.m,${Rd-sfield} */ 8731 { 8732 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8733 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8734 #define FLD(f) abuf->fields.sfmt_addc_m.f 8735 int UNUSED written = 0; 8736 IADDR UNUSED pc = abuf->addr; 8737 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8738 8739 { 8740 { 8741 SI opval = ADDSI (GET_H_GR (FLD (f_operand1)), MULSI (GET_H_GR (FLD (f_operand2)), 2)); 8742 SET_H_GR (FLD (f_operand1), opval); 8743 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8744 } 8745 { 8746 { 8747 BI opval = 0; 8748 CPU (h_xbit) = opval; 8749 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8750 } 8751 { 8752 BI opval = 0; 8753 SET_H_INSN_PREFIXED_P (opval); 8754 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8755 } 8756 } 8757 } 8758 8759 #undef FLD 8760 } 8761 NEXT (vpc); 8762 8763 CASE (sem, INSN_ADDI_D_R) : /* addi.d ${Rs-dfield}.m,${Rd-sfield} */ 8764 { 8765 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8766 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8767 #define FLD(f) abuf->fields.sfmt_addc_m.f 8768 int UNUSED written = 0; 8769 IADDR UNUSED pc = abuf->addr; 8770 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8771 8772 { 8773 { 8774 SI opval = ADDSI (GET_H_GR (FLD (f_operand1)), MULSI (GET_H_GR (FLD (f_operand2)), 4)); 8775 SET_H_GR (FLD (f_operand1), opval); 8776 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8777 } 8778 { 8779 { 8780 BI opval = 0; 8781 CPU (h_xbit) = opval; 8782 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8783 } 8784 { 8785 BI opval = 0; 8786 SET_H_INSN_PREFIXED_P (opval); 8787 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8788 } 8789 } 8790 } 8791 8792 #undef FLD 8793 } 8794 NEXT (vpc); 8795 8796 CASE (sem, INSN_NEG_B_R) : /* neg.b $Rs,$Rd */ 8797 { 8798 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8799 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8800 #define FLD(f) abuf->fields.sfmt_addc_m.f 8801 int UNUSED written = 0; 8802 IADDR UNUSED pc = abuf->addr; 8803 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8804 8805 { 8806 QI tmp_tmpopd; 8807 QI tmp_tmpops; 8808 BI tmp_carry; 8809 QI tmp_newval; 8810 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 8811 tmp_tmpopd = 0; 8812 tmp_carry = CPU (h_cbit); 8813 tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 8814 { 8815 SI tmp_oldregval; 8816 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 8817 { 8818 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00)); 8819 SET_H_GR (FLD (f_operand2), opval); 8820 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8821 } 8822 } 8823 { 8824 { 8825 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0)))); 8826 CPU (h_cbit) = opval; 8827 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 8828 } 8829 { 8830 BI opval = LTQI (tmp_newval, 0); 8831 CPU (h_nbit) = opval; 8832 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 8833 } 8834 { 8835 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 8836 CPU (h_zbit) = opval; 8837 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 8838 } 8839 { 8840 BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0))); 8841 CPU (h_vbit) = opval; 8842 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 8843 } 8844 { 8845 { 8846 BI opval = 0; 8847 CPU (h_xbit) = opval; 8848 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8849 } 8850 { 8851 BI opval = 0; 8852 SET_H_INSN_PREFIXED_P (opval); 8853 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8854 } 8855 } 8856 } 8857 } 8858 8859 #undef FLD 8860 } 8861 NEXT (vpc); 8862 8863 CASE (sem, INSN_NEG_W_R) : /* neg.w $Rs,$Rd */ 8864 { 8865 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8866 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8867 #define FLD(f) abuf->fields.sfmt_addc_m.f 8868 int UNUSED written = 0; 8869 IADDR UNUSED pc = abuf->addr; 8870 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8871 8872 { 8873 HI tmp_tmpopd; 8874 HI tmp_tmpops; 8875 BI tmp_carry; 8876 HI tmp_newval; 8877 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 8878 tmp_tmpopd = 0; 8879 tmp_carry = CPU (h_cbit); 8880 tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 8881 { 8882 SI tmp_oldregval; 8883 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 8884 { 8885 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 8886 SET_H_GR (FLD (f_operand2), opval); 8887 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8888 } 8889 } 8890 { 8891 { 8892 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0)))); 8893 CPU (h_cbit) = opval; 8894 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 8895 } 8896 { 8897 BI opval = LTHI (tmp_newval, 0); 8898 CPU (h_nbit) = opval; 8899 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 8900 } 8901 { 8902 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 8903 CPU (h_zbit) = opval; 8904 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 8905 } 8906 { 8907 BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0))); 8908 CPU (h_vbit) = opval; 8909 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 8910 } 8911 { 8912 { 8913 BI opval = 0; 8914 CPU (h_xbit) = opval; 8915 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8916 } 8917 { 8918 BI opval = 0; 8919 SET_H_INSN_PREFIXED_P (opval); 8920 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8921 } 8922 } 8923 } 8924 } 8925 8926 #undef FLD 8927 } 8928 NEXT (vpc); 8929 8930 CASE (sem, INSN_NEG_D_R) : /* neg.d $Rs,$Rd */ 8931 { 8932 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8933 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8934 #define FLD(f) abuf->fields.sfmt_addc_m.f 8935 int UNUSED written = 0; 8936 IADDR UNUSED pc = abuf->addr; 8937 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 8938 8939 { 8940 SI tmp_tmpopd; 8941 SI tmp_tmpops; 8942 BI tmp_carry; 8943 SI tmp_newval; 8944 tmp_tmpops = GET_H_GR (FLD (f_operand1)); 8945 tmp_tmpopd = 0; 8946 tmp_carry = CPU (h_cbit); 8947 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 8948 { 8949 SI opval = tmp_newval; 8950 SET_H_GR (FLD (f_operand2), opval); 8951 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 8952 } 8953 { 8954 { 8955 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 8956 CPU (h_cbit) = opval; 8957 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 8958 } 8959 { 8960 BI opval = LTSI (tmp_newval, 0); 8961 CPU (h_nbit) = opval; 8962 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 8963 } 8964 { 8965 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 8966 CPU (h_zbit) = opval; 8967 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 8968 } 8969 { 8970 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 8971 CPU (h_vbit) = opval; 8972 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 8973 } 8974 { 8975 { 8976 BI opval = 0; 8977 CPU (h_xbit) = opval; 8978 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 8979 } 8980 { 8981 BI opval = 0; 8982 SET_H_INSN_PREFIXED_P (opval); 8983 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 8984 } 8985 } 8986 } 8987 } 8988 8989 #undef FLD 8990 } 8991 NEXT (vpc); 8992 8993 CASE (sem, INSN_TEST_M_B_M) : /* test-m.b [${Rs}${inc}] */ 8994 { 8995 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 8996 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 8997 #define FLD(f) abuf->fields.sfmt_move_spr_mv32.f 8998 int UNUSED written = 0; 8999 IADDR UNUSED pc = abuf->addr; 9000 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9001 9002 { 9003 QI tmp_tmpd; 9004 tmp_tmpd = ({ SI tmp_addr; 9005 QI tmp_tmp_mem; 9006 BI tmp_postinc; 9007 tmp_postinc = FLD (f_memmode); 9008 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 9009 ; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 9010 ; if (NEBI (tmp_postinc, 0)) { 9011 { 9012 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 9013 tmp_addr = ADDSI (tmp_addr, 1); 9014 } 9015 { 9016 SI opval = tmp_addr; 9017 SET_H_GR (FLD (f_operand1), opval); 9018 written |= (1 << 8); 9019 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9020 } 9021 } 9022 } 9023 ; tmp_tmp_mem; }); 9024 { 9025 QI tmp_tmpopd; 9026 QI tmp_tmpops; 9027 BI tmp_carry; 9028 QI tmp_newval; 9029 tmp_tmpops = 0; 9030 tmp_tmpopd = tmp_tmpd; 9031 tmp_carry = CPU (h_cbit); 9032 tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 9033 ((void) 0); /*nop*/ 9034 { 9035 { 9036 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0)))); 9037 CPU (h_cbit) = opval; 9038 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9039 } 9040 { 9041 BI opval = LTQI (tmp_newval, 0); 9042 CPU (h_nbit) = opval; 9043 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 9044 } 9045 { 9046 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 9047 CPU (h_zbit) = opval; 9048 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 9049 } 9050 { 9051 BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0))); 9052 CPU (h_vbit) = opval; 9053 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 9054 } 9055 { 9056 { 9057 BI opval = 0; 9058 CPU (h_xbit) = opval; 9059 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9060 } 9061 { 9062 BI opval = 0; 9063 SET_H_INSN_PREFIXED_P (opval); 9064 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9065 } 9066 } 9067 } 9068 } 9069 } 9070 9071 abuf->written = written; 9072 #undef FLD 9073 } 9074 NEXT (vpc); 9075 9076 CASE (sem, INSN_TEST_M_W_M) : /* test-m.w [${Rs}${inc}] */ 9077 { 9078 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9079 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9080 #define FLD(f) abuf->fields.sfmt_move_spr_mv32.f 9081 int UNUSED written = 0; 9082 IADDR UNUSED pc = abuf->addr; 9083 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9084 9085 { 9086 HI tmp_tmpd; 9087 tmp_tmpd = ({ SI tmp_addr; 9088 HI tmp_tmp_mem; 9089 BI tmp_postinc; 9090 tmp_postinc = FLD (f_memmode); 9091 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 9092 ; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 9093 ; if (NEBI (tmp_postinc, 0)) { 9094 { 9095 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 9096 tmp_addr = ADDSI (tmp_addr, 2); 9097 } 9098 { 9099 SI opval = tmp_addr; 9100 SET_H_GR (FLD (f_operand1), opval); 9101 written |= (1 << 8); 9102 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9103 } 9104 } 9105 } 9106 ; tmp_tmp_mem; }); 9107 { 9108 HI tmp_tmpopd; 9109 HI tmp_tmpops; 9110 BI tmp_carry; 9111 HI tmp_newval; 9112 tmp_tmpops = 0; 9113 tmp_tmpopd = tmp_tmpd; 9114 tmp_carry = CPU (h_cbit); 9115 tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 9116 ((void) 0); /*nop*/ 9117 { 9118 { 9119 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0)))); 9120 CPU (h_cbit) = opval; 9121 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9122 } 9123 { 9124 BI opval = LTHI (tmp_newval, 0); 9125 CPU (h_nbit) = opval; 9126 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 9127 } 9128 { 9129 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 9130 CPU (h_zbit) = opval; 9131 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 9132 } 9133 { 9134 BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0))); 9135 CPU (h_vbit) = opval; 9136 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 9137 } 9138 { 9139 { 9140 BI opval = 0; 9141 CPU (h_xbit) = opval; 9142 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9143 } 9144 { 9145 BI opval = 0; 9146 SET_H_INSN_PREFIXED_P (opval); 9147 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9148 } 9149 } 9150 } 9151 } 9152 } 9153 9154 abuf->written = written; 9155 #undef FLD 9156 } 9157 NEXT (vpc); 9158 9159 CASE (sem, INSN_TEST_M_D_M) : /* test-m.d [${Rs}${inc}] */ 9160 { 9161 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9162 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9163 #define FLD(f) abuf->fields.sfmt_move_spr_mv32.f 9164 int UNUSED written = 0; 9165 IADDR UNUSED pc = abuf->addr; 9166 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9167 9168 { 9169 SI tmp_tmpd; 9170 tmp_tmpd = ({ SI tmp_addr; 9171 SI tmp_tmp_mem; 9172 BI tmp_postinc; 9173 tmp_postinc = FLD (f_memmode); 9174 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 9175 ; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 9176 ; if (NEBI (tmp_postinc, 0)) { 9177 { 9178 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 9179 tmp_addr = ADDSI (tmp_addr, 4); 9180 } 9181 { 9182 SI opval = tmp_addr; 9183 SET_H_GR (FLD (f_operand1), opval); 9184 written |= (1 << 8); 9185 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9186 } 9187 } 9188 } 9189 ; tmp_tmp_mem; }); 9190 { 9191 SI tmp_tmpopd; 9192 SI tmp_tmpops; 9193 BI tmp_carry; 9194 SI tmp_newval; 9195 tmp_tmpops = 0; 9196 tmp_tmpopd = tmp_tmpd; 9197 tmp_carry = CPU (h_cbit); 9198 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 9199 ((void) 0); /*nop*/ 9200 { 9201 { 9202 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0)))); 9203 CPU (h_cbit) = opval; 9204 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9205 } 9206 { 9207 BI opval = LTSI (tmp_newval, 0); 9208 CPU (h_nbit) = opval; 9209 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 9210 } 9211 { 9212 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 9213 CPU (h_zbit) = opval; 9214 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 9215 } 9216 { 9217 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 9218 CPU (h_vbit) = opval; 9219 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 9220 } 9221 { 9222 { 9223 BI opval = 0; 9224 CPU (h_xbit) = opval; 9225 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9226 } 9227 { 9228 BI opval = 0; 9229 SET_H_INSN_PREFIXED_P (opval); 9230 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9231 } 9232 } 9233 } 9234 } 9235 } 9236 9237 abuf->written = written; 9238 #undef FLD 9239 } 9240 NEXT (vpc); 9241 9242 CASE (sem, INSN_MOVE_R_M_B_M) : /* move-r-m.b ${Rs-dfield},[${Rd-sfield}${inc}] */ 9243 { 9244 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9245 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9246 #define FLD(f) abuf->fields.sfmt_addc_m.f 9247 int UNUSED written = 0; 9248 IADDR UNUSED pc = abuf->addr; 9249 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9250 9251 { 9252 QI tmp_tmpd; 9253 tmp_tmpd = GET_H_GR (FLD (f_operand2)); 9254 { 9255 SI tmp_addr; 9256 BI tmp_postinc; 9257 tmp_postinc = FLD (f_memmode); 9258 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 9259 if (ANDIF (GET_H_V32_V32 (), NEBI (CPU (h_xbit), 0))) { 9260 if (EQBI (CPU (h_pbit), 0)) { 9261 { 9262 { 9263 QI opval = tmp_tmpd; 9264 SETMEMQI (current_cpu, pc, tmp_addr, opval); 9265 written |= (1 << 10); 9266 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 9267 } 9268 { 9269 BI opval = CPU (h_pbit); 9270 CPU (h_cbit) = opval; 9271 written |= (1 << 9); 9272 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9273 } 9274 } 9275 } else { 9276 { 9277 BI opval = 1; 9278 CPU (h_cbit) = opval; 9279 written |= (1 << 9); 9280 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9281 } 9282 } 9283 } else { 9284 { 9285 QI opval = tmp_tmpd; 9286 SETMEMQI (current_cpu, pc, tmp_addr, opval); 9287 written |= (1 << 10); 9288 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 9289 } 9290 } 9291 if (NEBI (tmp_postinc, 0)) { 9292 { 9293 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 9294 tmp_addr = ADDSI (tmp_addr, 1); 9295 } 9296 { 9297 SI opval = tmp_addr; 9298 SET_H_GR (FLD (f_operand1), opval); 9299 written |= (1 << 8); 9300 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9301 } 9302 } 9303 } 9304 } 9305 { 9306 { 9307 BI opval = 0; 9308 CPU (h_xbit) = opval; 9309 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9310 } 9311 { 9312 BI opval = 0; 9313 SET_H_INSN_PREFIXED_P (opval); 9314 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9315 } 9316 } 9317 } 9318 9319 abuf->written = written; 9320 #undef FLD 9321 } 9322 NEXT (vpc); 9323 9324 CASE (sem, INSN_MOVE_R_M_W_M) : /* move-r-m.w ${Rs-dfield},[${Rd-sfield}${inc}] */ 9325 { 9326 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9327 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9328 #define FLD(f) abuf->fields.sfmt_addc_m.f 9329 int UNUSED written = 0; 9330 IADDR UNUSED pc = abuf->addr; 9331 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9332 9333 { 9334 HI tmp_tmpd; 9335 tmp_tmpd = GET_H_GR (FLD (f_operand2)); 9336 { 9337 SI tmp_addr; 9338 BI tmp_postinc; 9339 tmp_postinc = FLD (f_memmode); 9340 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 9341 if (ANDIF (GET_H_V32_V32 (), NEBI (CPU (h_xbit), 0))) { 9342 if (EQBI (CPU (h_pbit), 0)) { 9343 { 9344 { 9345 HI opval = tmp_tmpd; 9346 SETMEMHI (current_cpu, pc, tmp_addr, opval); 9347 written |= (1 << 10); 9348 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 9349 } 9350 { 9351 BI opval = CPU (h_pbit); 9352 CPU (h_cbit) = opval; 9353 written |= (1 << 9); 9354 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9355 } 9356 } 9357 } else { 9358 { 9359 BI opval = 1; 9360 CPU (h_cbit) = opval; 9361 written |= (1 << 9); 9362 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9363 } 9364 } 9365 } else { 9366 { 9367 HI opval = tmp_tmpd; 9368 SETMEMHI (current_cpu, pc, tmp_addr, opval); 9369 written |= (1 << 10); 9370 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 9371 } 9372 } 9373 if (NEBI (tmp_postinc, 0)) { 9374 { 9375 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 9376 tmp_addr = ADDSI (tmp_addr, 2); 9377 } 9378 { 9379 SI opval = tmp_addr; 9380 SET_H_GR (FLD (f_operand1), opval); 9381 written |= (1 << 8); 9382 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9383 } 9384 } 9385 } 9386 } 9387 { 9388 { 9389 BI opval = 0; 9390 CPU (h_xbit) = opval; 9391 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9392 } 9393 { 9394 BI opval = 0; 9395 SET_H_INSN_PREFIXED_P (opval); 9396 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9397 } 9398 } 9399 } 9400 9401 abuf->written = written; 9402 #undef FLD 9403 } 9404 NEXT (vpc); 9405 9406 CASE (sem, INSN_MOVE_R_M_D_M) : /* move-r-m.d ${Rs-dfield},[${Rd-sfield}${inc}] */ 9407 { 9408 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9409 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9410 #define FLD(f) abuf->fields.sfmt_addc_m.f 9411 int UNUSED written = 0; 9412 IADDR UNUSED pc = abuf->addr; 9413 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9414 9415 { 9416 SI tmp_tmpd; 9417 tmp_tmpd = GET_H_GR (FLD (f_operand2)); 9418 { 9419 SI tmp_addr; 9420 BI tmp_postinc; 9421 tmp_postinc = FLD (f_memmode); 9422 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 9423 if (ANDIF (GET_H_V32_V32 (), NEBI (CPU (h_xbit), 0))) { 9424 if (EQBI (CPU (h_pbit), 0)) { 9425 { 9426 { 9427 SI opval = tmp_tmpd; 9428 SETMEMSI (current_cpu, pc, tmp_addr, opval); 9429 written |= (1 << 10); 9430 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 9431 } 9432 { 9433 BI opval = CPU (h_pbit); 9434 CPU (h_cbit) = opval; 9435 written |= (1 << 9); 9436 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9437 } 9438 } 9439 } else { 9440 { 9441 BI opval = 1; 9442 CPU (h_cbit) = opval; 9443 written |= (1 << 9); 9444 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9445 } 9446 } 9447 } else { 9448 { 9449 SI opval = tmp_tmpd; 9450 SETMEMSI (current_cpu, pc, tmp_addr, opval); 9451 written |= (1 << 10); 9452 CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 9453 } 9454 } 9455 if (NEBI (tmp_postinc, 0)) { 9456 { 9457 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 9458 tmp_addr = ADDSI (tmp_addr, 4); 9459 } 9460 { 9461 SI opval = tmp_addr; 9462 SET_H_GR (FLD (f_operand1), opval); 9463 written |= (1 << 8); 9464 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9465 } 9466 } 9467 } 9468 } 9469 { 9470 { 9471 BI opval = 0; 9472 CPU (h_xbit) = opval; 9473 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9474 } 9475 { 9476 BI opval = 0; 9477 SET_H_INSN_PREFIXED_P (opval); 9478 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9479 } 9480 } 9481 } 9482 9483 abuf->written = written; 9484 #undef FLD 9485 } 9486 NEXT (vpc); 9487 9488 CASE (sem, INSN_MULS_B) : /* muls.b $Rs,$Rd */ 9489 { 9490 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9491 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9492 #define FLD(f) abuf->fields.sfmt_muls_b.f 9493 int UNUSED written = 0; 9494 IADDR UNUSED pc = abuf->addr; 9495 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9496 9497 { 9498 DI tmp_src1; 9499 DI tmp_src2; 9500 DI tmp_tmpr; 9501 tmp_src1 = EXTQIDI (TRUNCSIQI (GET_H_GR (FLD (f_operand1)))); 9502 tmp_src2 = EXTQIDI (TRUNCSIQI (GET_H_GR (FLD (f_operand2)))); 9503 tmp_tmpr = MULDI (tmp_src1, tmp_src2); 9504 { 9505 SI opval = TRUNCDISI (tmp_tmpr); 9506 SET_H_GR (FLD (f_operand2), opval); 9507 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9508 } 9509 { 9510 SI opval = TRUNCDISI (SRLDI (tmp_tmpr, 32)); 9511 SET_H_SR (((UINT) 7), opval); 9512 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 9513 } 9514 { 9515 { 9516 BI opval = ANDIF (GET_H_V32_V32 (), CPU (h_cbit)); 9517 CPU (h_cbit) = opval; 9518 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9519 } 9520 { 9521 BI opval = LTDI (tmp_tmpr, 0); 9522 CPU (h_nbit) = opval; 9523 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 9524 } 9525 { 9526 BI opval = ANDIF (EQDI (tmp_tmpr, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 9527 CPU (h_zbit) = opval; 9528 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 9529 } 9530 { 9531 BI opval = NEDI (tmp_tmpr, EXTSIDI (TRUNCDISI (tmp_tmpr))); 9532 CPU (h_vbit) = opval; 9533 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 9534 } 9535 { 9536 { 9537 BI opval = 0; 9538 CPU (h_xbit) = opval; 9539 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9540 } 9541 { 9542 BI opval = 0; 9543 SET_H_INSN_PREFIXED_P (opval); 9544 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9545 } 9546 } 9547 } 9548 } 9549 9550 #undef FLD 9551 } 9552 NEXT (vpc); 9553 9554 CASE (sem, INSN_MULS_W) : /* muls.w $Rs,$Rd */ 9555 { 9556 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9557 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9558 #define FLD(f) abuf->fields.sfmt_muls_b.f 9559 int UNUSED written = 0; 9560 IADDR UNUSED pc = abuf->addr; 9561 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9562 9563 { 9564 DI tmp_src1; 9565 DI tmp_src2; 9566 DI tmp_tmpr; 9567 tmp_src1 = EXTHIDI (TRUNCSIHI (GET_H_GR (FLD (f_operand1)))); 9568 tmp_src2 = EXTHIDI (TRUNCSIHI (GET_H_GR (FLD (f_operand2)))); 9569 tmp_tmpr = MULDI (tmp_src1, tmp_src2); 9570 { 9571 SI opval = TRUNCDISI (tmp_tmpr); 9572 SET_H_GR (FLD (f_operand2), opval); 9573 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9574 } 9575 { 9576 SI opval = TRUNCDISI (SRLDI (tmp_tmpr, 32)); 9577 SET_H_SR (((UINT) 7), opval); 9578 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 9579 } 9580 { 9581 { 9582 BI opval = ANDIF (GET_H_V32_V32 (), CPU (h_cbit)); 9583 CPU (h_cbit) = opval; 9584 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9585 } 9586 { 9587 BI opval = LTDI (tmp_tmpr, 0); 9588 CPU (h_nbit) = opval; 9589 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 9590 } 9591 { 9592 BI opval = ANDIF (EQDI (tmp_tmpr, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 9593 CPU (h_zbit) = opval; 9594 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 9595 } 9596 { 9597 BI opval = NEDI (tmp_tmpr, EXTSIDI (TRUNCDISI (tmp_tmpr))); 9598 CPU (h_vbit) = opval; 9599 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 9600 } 9601 { 9602 { 9603 BI opval = 0; 9604 CPU (h_xbit) = opval; 9605 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9606 } 9607 { 9608 BI opval = 0; 9609 SET_H_INSN_PREFIXED_P (opval); 9610 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9611 } 9612 } 9613 } 9614 } 9615 9616 #undef FLD 9617 } 9618 NEXT (vpc); 9619 9620 CASE (sem, INSN_MULS_D) : /* muls.d $Rs,$Rd */ 9621 { 9622 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9623 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9624 #define FLD(f) abuf->fields.sfmt_muls_b.f 9625 int UNUSED written = 0; 9626 IADDR UNUSED pc = abuf->addr; 9627 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9628 9629 { 9630 DI tmp_src1; 9631 DI tmp_src2; 9632 DI tmp_tmpr; 9633 tmp_src1 = EXTSIDI (TRUNCSISI (GET_H_GR (FLD (f_operand1)))); 9634 tmp_src2 = EXTSIDI (TRUNCSISI (GET_H_GR (FLD (f_operand2)))); 9635 tmp_tmpr = MULDI (tmp_src1, tmp_src2); 9636 { 9637 SI opval = TRUNCDISI (tmp_tmpr); 9638 SET_H_GR (FLD (f_operand2), opval); 9639 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9640 } 9641 { 9642 SI opval = TRUNCDISI (SRLDI (tmp_tmpr, 32)); 9643 SET_H_SR (((UINT) 7), opval); 9644 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 9645 } 9646 { 9647 { 9648 BI opval = ANDIF (GET_H_V32_V32 (), CPU (h_cbit)); 9649 CPU (h_cbit) = opval; 9650 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9651 } 9652 { 9653 BI opval = LTDI (tmp_tmpr, 0); 9654 CPU (h_nbit) = opval; 9655 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 9656 } 9657 { 9658 BI opval = ANDIF (EQDI (tmp_tmpr, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 9659 CPU (h_zbit) = opval; 9660 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 9661 } 9662 { 9663 BI opval = NEDI (tmp_tmpr, EXTSIDI (TRUNCDISI (tmp_tmpr))); 9664 CPU (h_vbit) = opval; 9665 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 9666 } 9667 { 9668 { 9669 BI opval = 0; 9670 CPU (h_xbit) = opval; 9671 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9672 } 9673 { 9674 BI opval = 0; 9675 SET_H_INSN_PREFIXED_P (opval); 9676 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9677 } 9678 } 9679 } 9680 } 9681 9682 #undef FLD 9683 } 9684 NEXT (vpc); 9685 9686 CASE (sem, INSN_MULU_B) : /* mulu.b $Rs,$Rd */ 9687 { 9688 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9689 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9690 #define FLD(f) abuf->fields.sfmt_muls_b.f 9691 int UNUSED written = 0; 9692 IADDR UNUSED pc = abuf->addr; 9693 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9694 9695 { 9696 DI tmp_src1; 9697 DI tmp_src2; 9698 DI tmp_tmpr; 9699 tmp_src1 = ZEXTQIDI (TRUNCSIQI (GET_H_GR (FLD (f_operand1)))); 9700 tmp_src2 = ZEXTQIDI (TRUNCSIQI (GET_H_GR (FLD (f_operand2)))); 9701 tmp_tmpr = MULDI (tmp_src1, tmp_src2); 9702 { 9703 SI opval = TRUNCDISI (tmp_tmpr); 9704 SET_H_GR (FLD (f_operand2), opval); 9705 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9706 } 9707 { 9708 SI opval = TRUNCDISI (SRLDI (tmp_tmpr, 32)); 9709 SET_H_SR (((UINT) 7), opval); 9710 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 9711 } 9712 { 9713 { 9714 BI opval = ANDIF (GET_H_V32_V32 (), CPU (h_cbit)); 9715 CPU (h_cbit) = opval; 9716 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9717 } 9718 { 9719 BI opval = LTDI (tmp_tmpr, 0); 9720 CPU (h_nbit) = opval; 9721 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 9722 } 9723 { 9724 BI opval = ANDIF (EQDI (tmp_tmpr, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 9725 CPU (h_zbit) = opval; 9726 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 9727 } 9728 { 9729 BI opval = NEDI (tmp_tmpr, ZEXTSIDI (TRUNCDISI (tmp_tmpr))); 9730 CPU (h_vbit) = opval; 9731 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 9732 } 9733 { 9734 { 9735 BI opval = 0; 9736 CPU (h_xbit) = opval; 9737 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9738 } 9739 { 9740 BI opval = 0; 9741 SET_H_INSN_PREFIXED_P (opval); 9742 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9743 } 9744 } 9745 } 9746 } 9747 9748 #undef FLD 9749 } 9750 NEXT (vpc); 9751 9752 CASE (sem, INSN_MULU_W) : /* mulu.w $Rs,$Rd */ 9753 { 9754 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9755 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9756 #define FLD(f) abuf->fields.sfmt_muls_b.f 9757 int UNUSED written = 0; 9758 IADDR UNUSED pc = abuf->addr; 9759 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9760 9761 { 9762 DI tmp_src1; 9763 DI tmp_src2; 9764 DI tmp_tmpr; 9765 tmp_src1 = ZEXTHIDI (TRUNCSIHI (GET_H_GR (FLD (f_operand1)))); 9766 tmp_src2 = ZEXTHIDI (TRUNCSIHI (GET_H_GR (FLD (f_operand2)))); 9767 tmp_tmpr = MULDI (tmp_src1, tmp_src2); 9768 { 9769 SI opval = TRUNCDISI (tmp_tmpr); 9770 SET_H_GR (FLD (f_operand2), opval); 9771 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9772 } 9773 { 9774 SI opval = TRUNCDISI (SRLDI (tmp_tmpr, 32)); 9775 SET_H_SR (((UINT) 7), opval); 9776 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 9777 } 9778 { 9779 { 9780 BI opval = ANDIF (GET_H_V32_V32 (), CPU (h_cbit)); 9781 CPU (h_cbit) = opval; 9782 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9783 } 9784 { 9785 BI opval = LTDI (tmp_tmpr, 0); 9786 CPU (h_nbit) = opval; 9787 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 9788 } 9789 { 9790 BI opval = ANDIF (EQDI (tmp_tmpr, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 9791 CPU (h_zbit) = opval; 9792 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 9793 } 9794 { 9795 BI opval = NEDI (tmp_tmpr, ZEXTSIDI (TRUNCDISI (tmp_tmpr))); 9796 CPU (h_vbit) = opval; 9797 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 9798 } 9799 { 9800 { 9801 BI opval = 0; 9802 CPU (h_xbit) = opval; 9803 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9804 } 9805 { 9806 BI opval = 0; 9807 SET_H_INSN_PREFIXED_P (opval); 9808 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9809 } 9810 } 9811 } 9812 } 9813 9814 #undef FLD 9815 } 9816 NEXT (vpc); 9817 9818 CASE (sem, INSN_MULU_D) : /* mulu.d $Rs,$Rd */ 9819 { 9820 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9821 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9822 #define FLD(f) abuf->fields.sfmt_muls_b.f 9823 int UNUSED written = 0; 9824 IADDR UNUSED pc = abuf->addr; 9825 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9826 9827 { 9828 DI tmp_src1; 9829 DI tmp_src2; 9830 DI tmp_tmpr; 9831 tmp_src1 = ZEXTSIDI (TRUNCSISI (GET_H_GR (FLD (f_operand1)))); 9832 tmp_src2 = ZEXTSIDI (TRUNCSISI (GET_H_GR (FLD (f_operand2)))); 9833 tmp_tmpr = MULDI (tmp_src1, tmp_src2); 9834 { 9835 SI opval = TRUNCDISI (tmp_tmpr); 9836 SET_H_GR (FLD (f_operand2), opval); 9837 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9838 } 9839 { 9840 SI opval = TRUNCDISI (SRLDI (tmp_tmpr, 32)); 9841 SET_H_SR (((UINT) 7), opval); 9842 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 9843 } 9844 { 9845 { 9846 BI opval = ANDIF (GET_H_V32_V32 (), CPU (h_cbit)); 9847 CPU (h_cbit) = opval; 9848 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 9849 } 9850 { 9851 BI opval = LTDI (tmp_tmpr, 0); 9852 CPU (h_nbit) = opval; 9853 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 9854 } 9855 { 9856 BI opval = ANDIF (EQDI (tmp_tmpr, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 9857 CPU (h_zbit) = opval; 9858 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 9859 } 9860 { 9861 BI opval = NEDI (tmp_tmpr, ZEXTSIDI (TRUNCDISI (tmp_tmpr))); 9862 CPU (h_vbit) = opval; 9863 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 9864 } 9865 { 9866 { 9867 BI opval = 0; 9868 CPU (h_xbit) = opval; 9869 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9870 } 9871 { 9872 BI opval = 0; 9873 SET_H_INSN_PREFIXED_P (opval); 9874 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9875 } 9876 } 9877 } 9878 } 9879 9880 #undef FLD 9881 } 9882 NEXT (vpc); 9883 9884 CASE (sem, INSN_MCP) : /* mcp $Ps,$Rd */ 9885 { 9886 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9887 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9888 #define FLD(f) abuf->fields.sfmt_mcp.f 9889 int UNUSED written = 0; 9890 IADDR UNUSED pc = abuf->addr; 9891 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9892 9893 { 9894 CPU (h_xbit) = 1; 9895 CPU (h_zbit) = 1; 9896 { 9897 SI tmp_tmpopd; 9898 SI tmp_tmpops; 9899 BI tmp_carry; 9900 SI tmp_newval; 9901 tmp_tmpops = GET_H_SR (FLD (f_operand2)); 9902 tmp_tmpopd = GET_H_GR (FLD (f_operand1)); 9903 tmp_carry = CPU (h_rbit); 9904 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry))); 9905 { 9906 SI opval = tmp_newval; 9907 SET_H_GR (FLD (f_operand1), opval); 9908 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9909 } 9910 { 9911 { 9912 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0)))); 9913 CPU (h_rbit) = opval; 9914 CGEN_TRACE_RESULT (current_cpu, abuf, "rbit", 'x', opval); 9915 } 9916 { 9917 BI opval = LTSI (tmp_newval, 0); 9918 CPU (h_nbit) = opval; 9919 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 9920 } 9921 { 9922 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit)))); 9923 CPU (h_zbit) = opval; 9924 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 9925 } 9926 { 9927 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0))); 9928 CPU (h_vbit) = opval; 9929 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 9930 } 9931 { 9932 { 9933 BI opval = 0; 9934 CPU (h_xbit) = opval; 9935 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9936 } 9937 { 9938 BI opval = 0; 9939 SET_H_INSN_PREFIXED_P (opval); 9940 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9941 } 9942 } 9943 } 9944 } 9945 } 9946 9947 #undef FLD 9948 } 9949 NEXT (vpc); 9950 9951 CASE (sem, INSN_DSTEP) : /* dstep $Rs,$Rd */ 9952 { 9953 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 9954 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 9955 #define FLD(f) abuf->fields.sfmt_muls_b.f 9956 int UNUSED written = 0; 9957 IADDR UNUSED pc = abuf->addr; 9958 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 9959 9960 { 9961 SI tmp_tmp; 9962 SI tmp_tmps; 9963 SI tmp_tmpd; 9964 tmp_tmps = GET_H_GR (FLD (f_operand1)); 9965 tmp_tmp = SLLSI (GET_H_GR (FLD (f_operand2)), 1); 9966 tmp_tmpd = ((GEUSI (tmp_tmp, tmp_tmps)) ? (SUBSI (tmp_tmp, tmp_tmps)) : (tmp_tmp)); 9967 { 9968 SI opval = tmp_tmpd; 9969 SET_H_GR (FLD (f_operand2), opval); 9970 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 9971 } 9972 { 9973 { 9974 BI opval = LTSI (tmp_tmpd, 0); 9975 CPU (h_nbit) = opval; 9976 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 9977 } 9978 { 9979 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 9980 CPU (h_zbit) = opval; 9981 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 9982 } 9983 SET_H_CBIT_MOVE (0); 9984 SET_H_VBIT_MOVE (0); 9985 { 9986 { 9987 BI opval = 0; 9988 CPU (h_xbit) = opval; 9989 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 9990 } 9991 { 9992 BI opval = 0; 9993 SET_H_INSN_PREFIXED_P (opval); 9994 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 9995 } 9996 } 9997 } 9998 } 9999 10000 #undef FLD 10001 } 10002 NEXT (vpc); 10003 10004 CASE (sem, INSN_ABS) : /* abs $Rs,$Rd */ 10005 { 10006 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10007 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10008 #define FLD(f) abuf->fields.sfmt_muls_b.f 10009 int UNUSED written = 0; 10010 IADDR UNUSED pc = abuf->addr; 10011 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 10012 10013 { 10014 SI tmp_tmpd; 10015 tmp_tmpd = ABSSI (GET_H_GR (FLD (f_operand1))); 10016 { 10017 SI opval = tmp_tmpd; 10018 SET_H_GR (FLD (f_operand2), opval); 10019 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10020 } 10021 { 10022 { 10023 BI opval = LTSI (tmp_tmpd, 0); 10024 CPU (h_nbit) = opval; 10025 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10026 } 10027 { 10028 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10029 CPU (h_zbit) = opval; 10030 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10031 } 10032 SET_H_CBIT_MOVE (0); 10033 SET_H_VBIT_MOVE (0); 10034 { 10035 { 10036 BI opval = 0; 10037 CPU (h_xbit) = opval; 10038 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10039 } 10040 { 10041 BI opval = 0; 10042 SET_H_INSN_PREFIXED_P (opval); 10043 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10044 } 10045 } 10046 } 10047 } 10048 10049 #undef FLD 10050 } 10051 NEXT (vpc); 10052 10053 CASE (sem, INSN_AND_B_R) : /* and.b $Rs,$Rd */ 10054 { 10055 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10056 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10057 #define FLD(f) abuf->fields.sfmt_addc_m.f 10058 int UNUSED written = 0; 10059 IADDR UNUSED pc = abuf->addr; 10060 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 10061 10062 { 10063 QI tmp_tmpd; 10064 tmp_tmpd = ANDQI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1))); 10065 { 10066 SI tmp_oldregval; 10067 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 10068 { 10069 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00)); 10070 SET_H_GR (FLD (f_operand2), opval); 10071 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10072 } 10073 } 10074 { 10075 { 10076 BI opval = LTQI (tmp_tmpd, 0); 10077 CPU (h_nbit) = opval; 10078 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10079 } 10080 { 10081 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10082 CPU (h_zbit) = opval; 10083 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10084 } 10085 SET_H_CBIT_MOVE (0); 10086 SET_H_VBIT_MOVE (0); 10087 { 10088 { 10089 BI opval = 0; 10090 CPU (h_xbit) = opval; 10091 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10092 } 10093 { 10094 BI opval = 0; 10095 SET_H_INSN_PREFIXED_P (opval); 10096 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10097 } 10098 } 10099 } 10100 } 10101 10102 #undef FLD 10103 } 10104 NEXT (vpc); 10105 10106 CASE (sem, INSN_AND_W_R) : /* and.w $Rs,$Rd */ 10107 { 10108 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10109 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10110 #define FLD(f) abuf->fields.sfmt_addc_m.f 10111 int UNUSED written = 0; 10112 IADDR UNUSED pc = abuf->addr; 10113 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 10114 10115 { 10116 HI tmp_tmpd; 10117 tmp_tmpd = ANDHI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1))); 10118 { 10119 SI tmp_oldregval; 10120 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 10121 { 10122 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 10123 SET_H_GR (FLD (f_operand2), opval); 10124 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10125 } 10126 } 10127 { 10128 { 10129 BI opval = LTHI (tmp_tmpd, 0); 10130 CPU (h_nbit) = opval; 10131 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10132 } 10133 { 10134 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10135 CPU (h_zbit) = opval; 10136 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10137 } 10138 SET_H_CBIT_MOVE (0); 10139 SET_H_VBIT_MOVE (0); 10140 { 10141 { 10142 BI opval = 0; 10143 CPU (h_xbit) = opval; 10144 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10145 } 10146 { 10147 BI opval = 0; 10148 SET_H_INSN_PREFIXED_P (opval); 10149 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10150 } 10151 } 10152 } 10153 } 10154 10155 #undef FLD 10156 } 10157 NEXT (vpc); 10158 10159 CASE (sem, INSN_AND_D_R) : /* and.d $Rs,$Rd */ 10160 { 10161 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10162 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10163 #define FLD(f) abuf->fields.sfmt_addc_m.f 10164 int UNUSED written = 0; 10165 IADDR UNUSED pc = abuf->addr; 10166 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 10167 10168 { 10169 SI tmp_tmpd; 10170 tmp_tmpd = ANDSI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1))); 10171 { 10172 SI opval = tmp_tmpd; 10173 SET_H_GR (FLD (f_operand2), opval); 10174 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10175 } 10176 { 10177 { 10178 BI opval = LTSI (tmp_tmpd, 0); 10179 CPU (h_nbit) = opval; 10180 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10181 } 10182 { 10183 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10184 CPU (h_zbit) = opval; 10185 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10186 } 10187 SET_H_CBIT_MOVE (0); 10188 SET_H_VBIT_MOVE (0); 10189 { 10190 { 10191 BI opval = 0; 10192 CPU (h_xbit) = opval; 10193 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10194 } 10195 { 10196 BI opval = 0; 10197 SET_H_INSN_PREFIXED_P (opval); 10198 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10199 } 10200 } 10201 } 10202 } 10203 10204 #undef FLD 10205 } 10206 NEXT (vpc); 10207 10208 CASE (sem, INSN_AND_M_B_M) : /* and-m.b [${Rs}${inc}],${Rd} */ 10209 { 10210 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10211 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10212 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f 10213 int UNUSED written = 0; 10214 IADDR UNUSED pc = abuf->addr; 10215 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 10216 10217 { 10218 QI tmp_tmpd; 10219 tmp_tmpd = ANDQI (GET_H_GR (FLD (f_operand2)), ({ SI tmp_addr; 10220 QI tmp_tmp_mem; 10221 BI tmp_postinc; 10222 tmp_postinc = FLD (f_memmode); 10223 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 10224 ; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 10225 ; if (NEBI (tmp_postinc, 0)) { 10226 { 10227 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 10228 tmp_addr = ADDSI (tmp_addr, 1); 10229 } 10230 { 10231 SI opval = tmp_addr; 10232 SET_H_GR (FLD (f_operand1), opval); 10233 written |= (1 << 11); 10234 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10235 } 10236 } 10237 } 10238 ; tmp_tmp_mem; })); 10239 { 10240 SI tmp_oldregval; 10241 tmp_oldregval = GET_H_RAW_GR_ACR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2)))); 10242 { 10243 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00)); 10244 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 10245 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10246 } 10247 } 10248 { 10249 { 10250 BI opval = LTQI (tmp_tmpd, 0); 10251 CPU (h_nbit) = opval; 10252 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10253 } 10254 { 10255 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10256 CPU (h_zbit) = opval; 10257 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10258 } 10259 SET_H_CBIT_MOVE (0); 10260 SET_H_VBIT_MOVE (0); 10261 { 10262 { 10263 BI opval = 0; 10264 CPU (h_xbit) = opval; 10265 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10266 } 10267 { 10268 BI opval = 0; 10269 SET_H_INSN_PREFIXED_P (opval); 10270 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10271 } 10272 } 10273 } 10274 } 10275 10276 abuf->written = written; 10277 #undef FLD 10278 } 10279 NEXT (vpc); 10280 10281 CASE (sem, INSN_AND_M_W_M) : /* and-m.w [${Rs}${inc}],${Rd} */ 10282 { 10283 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10284 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10285 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f 10286 int UNUSED written = 0; 10287 IADDR UNUSED pc = abuf->addr; 10288 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 10289 10290 { 10291 HI tmp_tmpd; 10292 tmp_tmpd = ANDHI (GET_H_GR (FLD (f_operand2)), ({ SI tmp_addr; 10293 HI tmp_tmp_mem; 10294 BI tmp_postinc; 10295 tmp_postinc = FLD (f_memmode); 10296 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 10297 ; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 10298 ; if (NEBI (tmp_postinc, 0)) { 10299 { 10300 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 10301 tmp_addr = ADDSI (tmp_addr, 2); 10302 } 10303 { 10304 SI opval = tmp_addr; 10305 SET_H_GR (FLD (f_operand1), opval); 10306 written |= (1 << 11); 10307 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10308 } 10309 } 10310 } 10311 ; tmp_tmp_mem; })); 10312 { 10313 SI tmp_oldregval; 10314 tmp_oldregval = GET_H_RAW_GR_ACR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2)))); 10315 { 10316 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 10317 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 10318 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10319 } 10320 } 10321 { 10322 { 10323 BI opval = LTHI (tmp_tmpd, 0); 10324 CPU (h_nbit) = opval; 10325 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10326 } 10327 { 10328 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10329 CPU (h_zbit) = opval; 10330 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10331 } 10332 SET_H_CBIT_MOVE (0); 10333 SET_H_VBIT_MOVE (0); 10334 { 10335 { 10336 BI opval = 0; 10337 CPU (h_xbit) = opval; 10338 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10339 } 10340 { 10341 BI opval = 0; 10342 SET_H_INSN_PREFIXED_P (opval); 10343 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10344 } 10345 } 10346 } 10347 } 10348 10349 abuf->written = written; 10350 #undef FLD 10351 } 10352 NEXT (vpc); 10353 10354 CASE (sem, INSN_AND_M_D_M) : /* and-m.d [${Rs}${inc}],${Rd} */ 10355 { 10356 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10357 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10358 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f 10359 int UNUSED written = 0; 10360 IADDR UNUSED pc = abuf->addr; 10361 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 10362 10363 { 10364 SI tmp_tmpd; 10365 tmp_tmpd = ANDSI (GET_H_GR (FLD (f_operand2)), ({ SI tmp_addr; 10366 SI tmp_tmp_mem; 10367 BI tmp_postinc; 10368 tmp_postinc = FLD (f_memmode); 10369 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 10370 ; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 10371 ; if (NEBI (tmp_postinc, 0)) { 10372 { 10373 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 10374 tmp_addr = ADDSI (tmp_addr, 4); 10375 } 10376 { 10377 SI opval = tmp_addr; 10378 SET_H_GR (FLD (f_operand1), opval); 10379 written |= (1 << 10); 10380 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10381 } 10382 } 10383 } 10384 ; tmp_tmp_mem; })); 10385 { 10386 SI opval = tmp_tmpd; 10387 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 10388 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10389 } 10390 { 10391 { 10392 BI opval = LTSI (tmp_tmpd, 0); 10393 CPU (h_nbit) = opval; 10394 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10395 } 10396 { 10397 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10398 CPU (h_zbit) = opval; 10399 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10400 } 10401 SET_H_CBIT_MOVE (0); 10402 SET_H_VBIT_MOVE (0); 10403 { 10404 { 10405 BI opval = 0; 10406 CPU (h_xbit) = opval; 10407 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10408 } 10409 { 10410 BI opval = 0; 10411 SET_H_INSN_PREFIXED_P (opval); 10412 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10413 } 10414 } 10415 } 10416 } 10417 10418 abuf->written = written; 10419 #undef FLD 10420 } 10421 NEXT (vpc); 10422 10423 CASE (sem, INSN_ANDCBR) : /* and.b ${sconst8}],${Rd} */ 10424 { 10425 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10426 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10427 #define FLD(f) abuf->fields.sfmt_addcbr.f 10428 int UNUSED written = 0; 10429 IADDR UNUSED pc = abuf->addr; 10430 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 10431 10432 { 10433 QI tmp_tmpd; 10434 tmp_tmpd = ANDQI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__byte)); 10435 { 10436 SI tmp_oldregval; 10437 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 10438 { 10439 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00)); 10440 SET_H_GR (FLD (f_operand2), opval); 10441 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10442 } 10443 } 10444 { 10445 { 10446 BI opval = LTQI (tmp_tmpd, 0); 10447 CPU (h_nbit) = opval; 10448 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10449 } 10450 { 10451 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10452 CPU (h_zbit) = opval; 10453 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10454 } 10455 SET_H_CBIT_MOVE (0); 10456 SET_H_VBIT_MOVE (0); 10457 { 10458 { 10459 BI opval = 0; 10460 CPU (h_xbit) = opval; 10461 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10462 } 10463 { 10464 BI opval = 0; 10465 SET_H_INSN_PREFIXED_P (opval); 10466 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10467 } 10468 } 10469 } 10470 } 10471 10472 #undef FLD 10473 } 10474 NEXT (vpc); 10475 10476 CASE (sem, INSN_ANDCWR) : /* and.w ${sconst16}],${Rd} */ 10477 { 10478 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10479 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10480 #define FLD(f) abuf->fields.sfmt_addcwr.f 10481 int UNUSED written = 0; 10482 IADDR UNUSED pc = abuf->addr; 10483 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 10484 10485 { 10486 HI tmp_tmpd; 10487 tmp_tmpd = ANDHI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__word)); 10488 { 10489 SI tmp_oldregval; 10490 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 10491 { 10492 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 10493 SET_H_GR (FLD (f_operand2), opval); 10494 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10495 } 10496 } 10497 { 10498 { 10499 BI opval = LTHI (tmp_tmpd, 0); 10500 CPU (h_nbit) = opval; 10501 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10502 } 10503 { 10504 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10505 CPU (h_zbit) = opval; 10506 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10507 } 10508 SET_H_CBIT_MOVE (0); 10509 SET_H_VBIT_MOVE (0); 10510 { 10511 { 10512 BI opval = 0; 10513 CPU (h_xbit) = opval; 10514 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10515 } 10516 { 10517 BI opval = 0; 10518 SET_H_INSN_PREFIXED_P (opval); 10519 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10520 } 10521 } 10522 } 10523 } 10524 10525 #undef FLD 10526 } 10527 NEXT (vpc); 10528 10529 CASE (sem, INSN_ANDCDR) : /* and.d ${const32}],${Rd} */ 10530 { 10531 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10532 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10533 #define FLD(f) abuf->fields.sfmt_addcdr.f 10534 int UNUSED written = 0; 10535 IADDR UNUSED pc = abuf->addr; 10536 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 10537 10538 { 10539 SI tmp_tmpd; 10540 tmp_tmpd = ANDSI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__dword)); 10541 { 10542 SI opval = tmp_tmpd; 10543 SET_H_GR (FLD (f_operand2), opval); 10544 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10545 } 10546 { 10547 { 10548 BI opval = LTSI (tmp_tmpd, 0); 10549 CPU (h_nbit) = opval; 10550 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10551 } 10552 { 10553 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10554 CPU (h_zbit) = opval; 10555 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10556 } 10557 SET_H_CBIT_MOVE (0); 10558 SET_H_VBIT_MOVE (0); 10559 { 10560 { 10561 BI opval = 0; 10562 CPU (h_xbit) = opval; 10563 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10564 } 10565 { 10566 BI opval = 0; 10567 SET_H_INSN_PREFIXED_P (opval); 10568 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10569 } 10570 } 10571 } 10572 } 10573 10574 #undef FLD 10575 } 10576 NEXT (vpc); 10577 10578 CASE (sem, INSN_ANDQ) : /* andq $i,$Rd */ 10579 { 10580 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10581 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10582 #define FLD(f) abuf->fields.sfmt_andq.f 10583 int UNUSED written = 0; 10584 IADDR UNUSED pc = abuf->addr; 10585 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 10586 10587 { 10588 SI tmp_tmpd; 10589 tmp_tmpd = ANDSI (GET_H_GR (FLD (f_operand2)), FLD (f_s6)); 10590 { 10591 SI opval = tmp_tmpd; 10592 SET_H_GR (FLD (f_operand2), opval); 10593 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10594 } 10595 { 10596 { 10597 BI opval = LTSI (tmp_tmpd, 0); 10598 CPU (h_nbit) = opval; 10599 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10600 } 10601 { 10602 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10603 CPU (h_zbit) = opval; 10604 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10605 } 10606 SET_H_CBIT_MOVE (0); 10607 SET_H_VBIT_MOVE (0); 10608 { 10609 { 10610 BI opval = 0; 10611 CPU (h_xbit) = opval; 10612 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10613 } 10614 { 10615 BI opval = 0; 10616 SET_H_INSN_PREFIXED_P (opval); 10617 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10618 } 10619 } 10620 } 10621 } 10622 10623 #undef FLD 10624 } 10625 NEXT (vpc); 10626 10627 CASE (sem, INSN_ORR_B_R) : /* orr.b $Rs,$Rd */ 10628 { 10629 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10630 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10631 #define FLD(f) abuf->fields.sfmt_addc_m.f 10632 int UNUSED written = 0; 10633 IADDR UNUSED pc = abuf->addr; 10634 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 10635 10636 { 10637 QI tmp_tmpd; 10638 tmp_tmpd = ORQI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1))); 10639 { 10640 SI tmp_oldregval; 10641 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 10642 { 10643 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00)); 10644 SET_H_GR (FLD (f_operand2), opval); 10645 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10646 } 10647 } 10648 { 10649 { 10650 BI opval = LTQI (tmp_tmpd, 0); 10651 CPU (h_nbit) = opval; 10652 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10653 } 10654 { 10655 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10656 CPU (h_zbit) = opval; 10657 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10658 } 10659 SET_H_CBIT_MOVE (0); 10660 SET_H_VBIT_MOVE (0); 10661 { 10662 { 10663 BI opval = 0; 10664 CPU (h_xbit) = opval; 10665 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10666 } 10667 { 10668 BI opval = 0; 10669 SET_H_INSN_PREFIXED_P (opval); 10670 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10671 } 10672 } 10673 } 10674 } 10675 10676 #undef FLD 10677 } 10678 NEXT (vpc); 10679 10680 CASE (sem, INSN_ORR_W_R) : /* orr.w $Rs,$Rd */ 10681 { 10682 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10683 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10684 #define FLD(f) abuf->fields.sfmt_addc_m.f 10685 int UNUSED written = 0; 10686 IADDR UNUSED pc = abuf->addr; 10687 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 10688 10689 { 10690 HI tmp_tmpd; 10691 tmp_tmpd = ORHI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1))); 10692 { 10693 SI tmp_oldregval; 10694 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 10695 { 10696 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 10697 SET_H_GR (FLD (f_operand2), opval); 10698 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10699 } 10700 } 10701 { 10702 { 10703 BI opval = LTHI (tmp_tmpd, 0); 10704 CPU (h_nbit) = opval; 10705 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10706 } 10707 { 10708 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10709 CPU (h_zbit) = opval; 10710 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10711 } 10712 SET_H_CBIT_MOVE (0); 10713 SET_H_VBIT_MOVE (0); 10714 { 10715 { 10716 BI opval = 0; 10717 CPU (h_xbit) = opval; 10718 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10719 } 10720 { 10721 BI opval = 0; 10722 SET_H_INSN_PREFIXED_P (opval); 10723 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10724 } 10725 } 10726 } 10727 } 10728 10729 #undef FLD 10730 } 10731 NEXT (vpc); 10732 10733 CASE (sem, INSN_ORR_D_R) : /* orr.d $Rs,$Rd */ 10734 { 10735 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10736 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10737 #define FLD(f) abuf->fields.sfmt_addc_m.f 10738 int UNUSED written = 0; 10739 IADDR UNUSED pc = abuf->addr; 10740 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 10741 10742 { 10743 SI tmp_tmpd; 10744 tmp_tmpd = ORSI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1))); 10745 { 10746 SI opval = tmp_tmpd; 10747 SET_H_GR (FLD (f_operand2), opval); 10748 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10749 } 10750 { 10751 { 10752 BI opval = LTSI (tmp_tmpd, 0); 10753 CPU (h_nbit) = opval; 10754 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10755 } 10756 { 10757 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10758 CPU (h_zbit) = opval; 10759 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10760 } 10761 SET_H_CBIT_MOVE (0); 10762 SET_H_VBIT_MOVE (0); 10763 { 10764 { 10765 BI opval = 0; 10766 CPU (h_xbit) = opval; 10767 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10768 } 10769 { 10770 BI opval = 0; 10771 SET_H_INSN_PREFIXED_P (opval); 10772 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10773 } 10774 } 10775 } 10776 } 10777 10778 #undef FLD 10779 } 10780 NEXT (vpc); 10781 10782 CASE (sem, INSN_OR_M_B_M) : /* or-m.b [${Rs}${inc}],${Rd} */ 10783 { 10784 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10785 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10786 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f 10787 int UNUSED written = 0; 10788 IADDR UNUSED pc = abuf->addr; 10789 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 10790 10791 { 10792 QI tmp_tmpd; 10793 tmp_tmpd = ORQI (GET_H_GR (FLD (f_operand2)), ({ SI tmp_addr; 10794 QI tmp_tmp_mem; 10795 BI tmp_postinc; 10796 tmp_postinc = FLD (f_memmode); 10797 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 10798 ; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 10799 ; if (NEBI (tmp_postinc, 0)) { 10800 { 10801 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 10802 tmp_addr = ADDSI (tmp_addr, 1); 10803 } 10804 { 10805 SI opval = tmp_addr; 10806 SET_H_GR (FLD (f_operand1), opval); 10807 written |= (1 << 11); 10808 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10809 } 10810 } 10811 } 10812 ; tmp_tmp_mem; })); 10813 { 10814 SI tmp_oldregval; 10815 tmp_oldregval = GET_H_RAW_GR_ACR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2)))); 10816 { 10817 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00)); 10818 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 10819 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10820 } 10821 } 10822 { 10823 { 10824 BI opval = LTQI (tmp_tmpd, 0); 10825 CPU (h_nbit) = opval; 10826 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10827 } 10828 { 10829 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10830 CPU (h_zbit) = opval; 10831 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10832 } 10833 SET_H_CBIT_MOVE (0); 10834 SET_H_VBIT_MOVE (0); 10835 { 10836 { 10837 BI opval = 0; 10838 CPU (h_xbit) = opval; 10839 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10840 } 10841 { 10842 BI opval = 0; 10843 SET_H_INSN_PREFIXED_P (opval); 10844 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10845 } 10846 } 10847 } 10848 } 10849 10850 abuf->written = written; 10851 #undef FLD 10852 } 10853 NEXT (vpc); 10854 10855 CASE (sem, INSN_OR_M_W_M) : /* or-m.w [${Rs}${inc}],${Rd} */ 10856 { 10857 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10858 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10859 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f 10860 int UNUSED written = 0; 10861 IADDR UNUSED pc = abuf->addr; 10862 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 10863 10864 { 10865 HI tmp_tmpd; 10866 tmp_tmpd = ORHI (GET_H_GR (FLD (f_operand2)), ({ SI tmp_addr; 10867 HI tmp_tmp_mem; 10868 BI tmp_postinc; 10869 tmp_postinc = FLD (f_memmode); 10870 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 10871 ; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 10872 ; if (NEBI (tmp_postinc, 0)) { 10873 { 10874 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 10875 tmp_addr = ADDSI (tmp_addr, 2); 10876 } 10877 { 10878 SI opval = tmp_addr; 10879 SET_H_GR (FLD (f_operand1), opval); 10880 written |= (1 << 11); 10881 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10882 } 10883 } 10884 } 10885 ; tmp_tmp_mem; })); 10886 { 10887 SI tmp_oldregval; 10888 tmp_oldregval = GET_H_RAW_GR_ACR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2)))); 10889 { 10890 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 10891 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 10892 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10893 } 10894 } 10895 { 10896 { 10897 BI opval = LTHI (tmp_tmpd, 0); 10898 CPU (h_nbit) = opval; 10899 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10900 } 10901 { 10902 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10903 CPU (h_zbit) = opval; 10904 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10905 } 10906 SET_H_CBIT_MOVE (0); 10907 SET_H_VBIT_MOVE (0); 10908 { 10909 { 10910 BI opval = 0; 10911 CPU (h_xbit) = opval; 10912 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10913 } 10914 { 10915 BI opval = 0; 10916 SET_H_INSN_PREFIXED_P (opval); 10917 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10918 } 10919 } 10920 } 10921 } 10922 10923 abuf->written = written; 10924 #undef FLD 10925 } 10926 NEXT (vpc); 10927 10928 CASE (sem, INSN_OR_M_D_M) : /* or-m.d [${Rs}${inc}],${Rd} */ 10929 { 10930 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 10931 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 10932 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f 10933 int UNUSED written = 0; 10934 IADDR UNUSED pc = abuf->addr; 10935 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 10936 10937 { 10938 SI tmp_tmpd; 10939 tmp_tmpd = ORSI (GET_H_GR (FLD (f_operand2)), ({ SI tmp_addr; 10940 SI tmp_tmp_mem; 10941 BI tmp_postinc; 10942 tmp_postinc = FLD (f_memmode); 10943 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 10944 ; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 10945 ; if (NEBI (tmp_postinc, 0)) { 10946 { 10947 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 10948 tmp_addr = ADDSI (tmp_addr, 4); 10949 } 10950 { 10951 SI opval = tmp_addr; 10952 SET_H_GR (FLD (f_operand1), opval); 10953 written |= (1 << 10); 10954 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10955 } 10956 } 10957 } 10958 ; tmp_tmp_mem; })); 10959 { 10960 SI opval = tmp_tmpd; 10961 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval); 10962 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 10963 } 10964 { 10965 { 10966 BI opval = LTSI (tmp_tmpd, 0); 10967 CPU (h_nbit) = opval; 10968 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 10969 } 10970 { 10971 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 10972 CPU (h_zbit) = opval; 10973 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 10974 } 10975 SET_H_CBIT_MOVE (0); 10976 SET_H_VBIT_MOVE (0); 10977 { 10978 { 10979 BI opval = 0; 10980 CPU (h_xbit) = opval; 10981 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 10982 } 10983 { 10984 BI opval = 0; 10985 SET_H_INSN_PREFIXED_P (opval); 10986 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 10987 } 10988 } 10989 } 10990 } 10991 10992 abuf->written = written; 10993 #undef FLD 10994 } 10995 NEXT (vpc); 10996 10997 CASE (sem, INSN_ORCBR) : /* or.b ${sconst8}],${Rd} */ 10998 { 10999 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11000 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11001 #define FLD(f) abuf->fields.sfmt_addcbr.f 11002 int UNUSED written = 0; 11003 IADDR UNUSED pc = abuf->addr; 11004 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 11005 11006 { 11007 QI tmp_tmpd; 11008 tmp_tmpd = ORQI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__byte)); 11009 { 11010 SI tmp_oldregval; 11011 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 11012 { 11013 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00)); 11014 SET_H_GR (FLD (f_operand2), opval); 11015 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11016 } 11017 } 11018 { 11019 { 11020 BI opval = LTQI (tmp_tmpd, 0); 11021 CPU (h_nbit) = opval; 11022 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11023 } 11024 { 11025 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11026 CPU (h_zbit) = opval; 11027 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11028 } 11029 SET_H_CBIT_MOVE (0); 11030 SET_H_VBIT_MOVE (0); 11031 { 11032 { 11033 BI opval = 0; 11034 CPU (h_xbit) = opval; 11035 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11036 } 11037 { 11038 BI opval = 0; 11039 SET_H_INSN_PREFIXED_P (opval); 11040 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11041 } 11042 } 11043 } 11044 } 11045 11046 #undef FLD 11047 } 11048 NEXT (vpc); 11049 11050 CASE (sem, INSN_ORCWR) : /* or.w ${sconst16}],${Rd} */ 11051 { 11052 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11053 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11054 #define FLD(f) abuf->fields.sfmt_addcwr.f 11055 int UNUSED written = 0; 11056 IADDR UNUSED pc = abuf->addr; 11057 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 11058 11059 { 11060 HI tmp_tmpd; 11061 tmp_tmpd = ORHI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__word)); 11062 { 11063 SI tmp_oldregval; 11064 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 11065 { 11066 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 11067 SET_H_GR (FLD (f_operand2), opval); 11068 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11069 } 11070 } 11071 { 11072 { 11073 BI opval = LTHI (tmp_tmpd, 0); 11074 CPU (h_nbit) = opval; 11075 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11076 } 11077 { 11078 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11079 CPU (h_zbit) = opval; 11080 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11081 } 11082 SET_H_CBIT_MOVE (0); 11083 SET_H_VBIT_MOVE (0); 11084 { 11085 { 11086 BI opval = 0; 11087 CPU (h_xbit) = opval; 11088 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11089 } 11090 { 11091 BI opval = 0; 11092 SET_H_INSN_PREFIXED_P (opval); 11093 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11094 } 11095 } 11096 } 11097 } 11098 11099 #undef FLD 11100 } 11101 NEXT (vpc); 11102 11103 CASE (sem, INSN_ORCDR) : /* or.d ${const32}],${Rd} */ 11104 { 11105 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11106 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11107 #define FLD(f) abuf->fields.sfmt_addcdr.f 11108 int UNUSED written = 0; 11109 IADDR UNUSED pc = abuf->addr; 11110 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 11111 11112 { 11113 SI tmp_tmpd; 11114 tmp_tmpd = ORSI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__dword)); 11115 { 11116 SI opval = tmp_tmpd; 11117 SET_H_GR (FLD (f_operand2), opval); 11118 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11119 } 11120 { 11121 { 11122 BI opval = LTSI (tmp_tmpd, 0); 11123 CPU (h_nbit) = opval; 11124 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11125 } 11126 { 11127 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11128 CPU (h_zbit) = opval; 11129 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11130 } 11131 SET_H_CBIT_MOVE (0); 11132 SET_H_VBIT_MOVE (0); 11133 { 11134 { 11135 BI opval = 0; 11136 CPU (h_xbit) = opval; 11137 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11138 } 11139 { 11140 BI opval = 0; 11141 SET_H_INSN_PREFIXED_P (opval); 11142 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11143 } 11144 } 11145 } 11146 } 11147 11148 #undef FLD 11149 } 11150 NEXT (vpc); 11151 11152 CASE (sem, INSN_ORQ) : /* orq $i,$Rd */ 11153 { 11154 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11155 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11156 #define FLD(f) abuf->fields.sfmt_andq.f 11157 int UNUSED written = 0; 11158 IADDR UNUSED pc = abuf->addr; 11159 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11160 11161 { 11162 SI tmp_tmpd; 11163 tmp_tmpd = ORSI (GET_H_GR (FLD (f_operand2)), FLD (f_s6)); 11164 { 11165 SI opval = tmp_tmpd; 11166 SET_H_GR (FLD (f_operand2), opval); 11167 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11168 } 11169 { 11170 { 11171 BI opval = LTSI (tmp_tmpd, 0); 11172 CPU (h_nbit) = opval; 11173 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11174 } 11175 { 11176 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11177 CPU (h_zbit) = opval; 11178 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11179 } 11180 SET_H_CBIT_MOVE (0); 11181 SET_H_VBIT_MOVE (0); 11182 { 11183 { 11184 BI opval = 0; 11185 CPU (h_xbit) = opval; 11186 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11187 } 11188 { 11189 BI opval = 0; 11190 SET_H_INSN_PREFIXED_P (opval); 11191 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11192 } 11193 } 11194 } 11195 } 11196 11197 #undef FLD 11198 } 11199 NEXT (vpc); 11200 11201 CASE (sem, INSN_XOR) : /* xor $Rs,$Rd */ 11202 { 11203 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11204 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11205 #define FLD(f) abuf->fields.sfmt_muls_b.f 11206 int UNUSED written = 0; 11207 IADDR UNUSED pc = abuf->addr; 11208 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11209 11210 { 11211 SI tmp_tmpd; 11212 tmp_tmpd = XORSI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1))); 11213 { 11214 SI opval = tmp_tmpd; 11215 SET_H_GR (FLD (f_operand2), opval); 11216 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11217 } 11218 { 11219 { 11220 BI opval = LTSI (tmp_tmpd, 0); 11221 CPU (h_nbit) = opval; 11222 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11223 } 11224 { 11225 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11226 CPU (h_zbit) = opval; 11227 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11228 } 11229 SET_H_CBIT_MOVE (0); 11230 SET_H_VBIT_MOVE (0); 11231 { 11232 { 11233 BI opval = 0; 11234 CPU (h_xbit) = opval; 11235 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11236 } 11237 { 11238 BI opval = 0; 11239 SET_H_INSN_PREFIXED_P (opval); 11240 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11241 } 11242 } 11243 } 11244 } 11245 11246 #undef FLD 11247 } 11248 NEXT (vpc); 11249 11250 CASE (sem, INSN_SWAP) : /* swap${swapoption} ${Rs} */ 11251 { 11252 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11253 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11254 #define FLD(f) abuf->fields.sfmt_move_spr_mv32.f 11255 int UNUSED written = 0; 11256 IADDR UNUSED pc = abuf->addr; 11257 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11258 11259 { 11260 SI tmp_tmps; 11261 SI tmp_tmpd; 11262 tmp_tmps = GET_H_GR (FLD (f_operand1)); 11263 tmp_tmpd = ({ SI tmp_tmpcode; 11264 SI tmp_tmpval; 11265 SI tmp_tmpres; 11266 tmp_tmpcode = FLD (f_operand2); 11267 ; tmp_tmpval = tmp_tmps; 11268 ; if (EQSI (tmp_tmpcode, 0)) { 11269 tmp_tmpres = (cgen_rtx_error (current_cpu, "SWAP without swap modifier isn't implemented"), 0); 11270 } 11271 else if (EQSI (tmp_tmpcode, 1)) { 11272 tmp_tmpres = ({ SI tmp_tmpr; 11273 tmp_tmpr = tmp_tmpval; 11274 ; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); }); 11275 } 11276 else if (EQSI (tmp_tmpcode, 2)) { 11277 tmp_tmpres = ({ SI tmp_tmpb; 11278 tmp_tmpb = tmp_tmpval; 11279 ; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); }); 11280 } 11281 else if (EQSI (tmp_tmpcode, 3)) { 11282 tmp_tmpres = ({ SI tmp_tmpr; 11283 tmp_tmpr = ({ SI tmp_tmpb; 11284 tmp_tmpb = tmp_tmpval; 11285 ; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); }); 11286 ; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); }); 11287 } 11288 else if (EQSI (tmp_tmpcode, 4)) { 11289 tmp_tmpres = ({ SI tmp_tmpw; 11290 tmp_tmpw = tmp_tmpval; 11291 ; ORSI (ANDSI (SLLSI (tmp_tmpw, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpw, 16), 65535)); }); 11292 } 11293 else if (EQSI (tmp_tmpcode, 5)) { 11294 tmp_tmpres = ({ SI tmp_tmpr; 11295 tmp_tmpr = ({ SI tmp_tmpw; 11296 tmp_tmpw = tmp_tmpval; 11297 ; ORSI (ANDSI (SLLSI (tmp_tmpw, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpw, 16), 65535)); }); 11298 ; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); }); 11299 } 11300 else if (EQSI (tmp_tmpcode, 6)) { 11301 tmp_tmpres = ({ SI tmp_tmpb; 11302 tmp_tmpb = ({ SI tmp_tmpw; 11303 tmp_tmpw = tmp_tmpval; 11304 ; ORSI (ANDSI (SLLSI (tmp_tmpw, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpw, 16), 65535)); }); 11305 ; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); }); 11306 } 11307 else if (EQSI (tmp_tmpcode, 7)) { 11308 tmp_tmpres = ({ SI tmp_tmpr; 11309 tmp_tmpr = ({ SI tmp_tmpb; 11310 tmp_tmpb = ({ SI tmp_tmpw; 11311 tmp_tmpw = tmp_tmpval; 11312 ; ORSI (ANDSI (SLLSI (tmp_tmpw, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpw, 16), 65535)); }); 11313 ; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); }); 11314 ; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); }); 11315 } 11316 else if (EQSI (tmp_tmpcode, 8)) { 11317 tmp_tmpres = INVSI (tmp_tmpval); 11318 } 11319 else if (EQSI (tmp_tmpcode, 9)) { 11320 tmp_tmpres = ({ SI tmp_tmpr; 11321 tmp_tmpr = INVSI (tmp_tmpval); 11322 ; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); }); 11323 } 11324 else if (EQSI (tmp_tmpcode, 10)) { 11325 tmp_tmpres = ({ SI tmp_tmpb; 11326 tmp_tmpb = INVSI (tmp_tmpval); 11327 ; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); }); 11328 } 11329 else if (EQSI (tmp_tmpcode, 11)) { 11330 tmp_tmpres = ({ SI tmp_tmpr; 11331 tmp_tmpr = ({ SI tmp_tmpb; 11332 tmp_tmpb = INVSI (tmp_tmpval); 11333 ; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); }); 11334 ; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); }); 11335 } 11336 else if (EQSI (tmp_tmpcode, 12)) { 11337 tmp_tmpres = ({ SI tmp_tmpw; 11338 tmp_tmpw = INVSI (tmp_tmpval); 11339 ; ORSI (ANDSI (SLLSI (tmp_tmpw, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpw, 16), 65535)); }); 11340 } 11341 else if (EQSI (tmp_tmpcode, 13)) { 11342 tmp_tmpres = ({ SI tmp_tmpr; 11343 tmp_tmpr = ({ SI tmp_tmpw; 11344 tmp_tmpw = INVSI (tmp_tmpval); 11345 ; ORSI (ANDSI (SLLSI (tmp_tmpw, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpw, 16), 65535)); }); 11346 ; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); }); 11347 } 11348 else if (EQSI (tmp_tmpcode, 14)) { 11349 tmp_tmpres = ({ SI tmp_tmpb; 11350 tmp_tmpb = ({ SI tmp_tmpw; 11351 tmp_tmpw = INVSI (tmp_tmpval); 11352 ; ORSI (ANDSI (SLLSI (tmp_tmpw, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpw, 16), 65535)); }); 11353 ; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); }); 11354 } 11355 else if (EQSI (tmp_tmpcode, 15)) { 11356 tmp_tmpres = ({ SI tmp_tmpr; 11357 tmp_tmpr = ({ SI tmp_tmpb; 11358 tmp_tmpb = ({ SI tmp_tmpw; 11359 tmp_tmpw = INVSI (tmp_tmpval); 11360 ; ORSI (ANDSI (SLLSI (tmp_tmpw, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpw, 16), 65535)); }); 11361 ; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); }); 11362 ; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); }); 11363 } 11364 else { 11365 cgen_rtx_error (current_cpu, "Unknown swapcode"); 11366 } 11367 ; tmp_tmpres; }); 11368 { 11369 SI opval = tmp_tmpd; 11370 SET_H_GR (FLD (f_operand1), opval); 11371 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11372 } 11373 { 11374 { 11375 BI opval = LTSI (tmp_tmpd, 0); 11376 CPU (h_nbit) = opval; 11377 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11378 } 11379 { 11380 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11381 CPU (h_zbit) = opval; 11382 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11383 } 11384 SET_H_CBIT_MOVE (0); 11385 SET_H_VBIT_MOVE (0); 11386 { 11387 { 11388 BI opval = 0; 11389 CPU (h_xbit) = opval; 11390 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11391 } 11392 { 11393 BI opval = 0; 11394 SET_H_INSN_PREFIXED_P (opval); 11395 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11396 } 11397 } 11398 } 11399 } 11400 11401 #undef FLD 11402 } 11403 NEXT (vpc); 11404 11405 CASE (sem, INSN_ASRR_B_R) : /* asrr.b $Rs,$Rd */ 11406 { 11407 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11408 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11409 #define FLD(f) abuf->fields.sfmt_addc_m.f 11410 int UNUSED written = 0; 11411 IADDR UNUSED pc = abuf->addr; 11412 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11413 11414 { 11415 QI tmp_tmpd; 11416 SI tmp_cnt1; 11417 SI tmp_cnt2; 11418 tmp_cnt1 = GET_H_GR (FLD (f_operand1)); 11419 tmp_cnt2 = ((NESI (ANDSI (tmp_cnt1, 32), 0)) ? (31) : (ANDSI (tmp_cnt1, 31))); 11420 tmp_tmpd = SRASI (EXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand2)))), tmp_cnt2); 11421 { 11422 SI tmp_oldregval; 11423 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 11424 { 11425 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00)); 11426 SET_H_GR (FLD (f_operand2), opval); 11427 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11428 } 11429 } 11430 { 11431 { 11432 BI opval = LTQI (tmp_tmpd, 0); 11433 CPU (h_nbit) = opval; 11434 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11435 } 11436 { 11437 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11438 CPU (h_zbit) = opval; 11439 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11440 } 11441 SET_H_CBIT_MOVE (0); 11442 SET_H_VBIT_MOVE (0); 11443 { 11444 { 11445 BI opval = 0; 11446 CPU (h_xbit) = opval; 11447 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11448 } 11449 { 11450 BI opval = 0; 11451 SET_H_INSN_PREFIXED_P (opval); 11452 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11453 } 11454 } 11455 } 11456 } 11457 11458 #undef FLD 11459 } 11460 NEXT (vpc); 11461 11462 CASE (sem, INSN_ASRR_W_R) : /* asrr.w $Rs,$Rd */ 11463 { 11464 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11465 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11466 #define FLD(f) abuf->fields.sfmt_addc_m.f 11467 int UNUSED written = 0; 11468 IADDR UNUSED pc = abuf->addr; 11469 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11470 11471 { 11472 HI tmp_tmpd; 11473 SI tmp_cnt1; 11474 SI tmp_cnt2; 11475 tmp_cnt1 = GET_H_GR (FLD (f_operand1)); 11476 tmp_cnt2 = ((NESI (ANDSI (tmp_cnt1, 32), 0)) ? (31) : (ANDSI (tmp_cnt1, 31))); 11477 tmp_tmpd = SRASI (EXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand2)))), tmp_cnt2); 11478 { 11479 SI tmp_oldregval; 11480 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 11481 { 11482 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 11483 SET_H_GR (FLD (f_operand2), opval); 11484 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11485 } 11486 } 11487 { 11488 { 11489 BI opval = LTHI (tmp_tmpd, 0); 11490 CPU (h_nbit) = opval; 11491 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11492 } 11493 { 11494 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11495 CPU (h_zbit) = opval; 11496 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11497 } 11498 SET_H_CBIT_MOVE (0); 11499 SET_H_VBIT_MOVE (0); 11500 { 11501 { 11502 BI opval = 0; 11503 CPU (h_xbit) = opval; 11504 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11505 } 11506 { 11507 BI opval = 0; 11508 SET_H_INSN_PREFIXED_P (opval); 11509 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11510 } 11511 } 11512 } 11513 } 11514 11515 #undef FLD 11516 } 11517 NEXT (vpc); 11518 11519 CASE (sem, INSN_ASRR_D_R) : /* asrr.d $Rs,$Rd */ 11520 { 11521 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11522 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11523 #define FLD(f) abuf->fields.sfmt_addc_m.f 11524 int UNUSED written = 0; 11525 IADDR UNUSED pc = abuf->addr; 11526 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11527 11528 { 11529 SI tmp_tmpd; 11530 SI tmp_cnt1; 11531 SI tmp_cnt2; 11532 tmp_cnt1 = GET_H_GR (FLD (f_operand1)); 11533 tmp_cnt2 = ((NESI (ANDSI (tmp_cnt1, 32), 0)) ? (31) : (ANDSI (tmp_cnt1, 31))); 11534 tmp_tmpd = SRASI (EXTSISI (TRUNCSISI (GET_H_GR (FLD (f_operand2)))), tmp_cnt2); 11535 { 11536 SI opval = tmp_tmpd; 11537 SET_H_GR (FLD (f_operand2), opval); 11538 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11539 } 11540 { 11541 { 11542 BI opval = LTSI (tmp_tmpd, 0); 11543 CPU (h_nbit) = opval; 11544 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11545 } 11546 { 11547 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11548 CPU (h_zbit) = opval; 11549 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11550 } 11551 SET_H_CBIT_MOVE (0); 11552 SET_H_VBIT_MOVE (0); 11553 { 11554 { 11555 BI opval = 0; 11556 CPU (h_xbit) = opval; 11557 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11558 } 11559 { 11560 BI opval = 0; 11561 SET_H_INSN_PREFIXED_P (opval); 11562 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11563 } 11564 } 11565 } 11566 } 11567 11568 #undef FLD 11569 } 11570 NEXT (vpc); 11571 11572 CASE (sem, INSN_ASRQ) : /* asrq $c,${Rd} */ 11573 { 11574 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11575 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11576 #define FLD(f) abuf->fields.sfmt_asrq.f 11577 int UNUSED written = 0; 11578 IADDR UNUSED pc = abuf->addr; 11579 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11580 11581 { 11582 SI tmp_tmpd; 11583 tmp_tmpd = SRASI (GET_H_GR (FLD (f_operand2)), FLD (f_u5)); 11584 { 11585 SI opval = tmp_tmpd; 11586 SET_H_GR (FLD (f_operand2), opval); 11587 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11588 } 11589 { 11590 { 11591 BI opval = LTSI (tmp_tmpd, 0); 11592 CPU (h_nbit) = opval; 11593 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11594 } 11595 { 11596 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11597 CPU (h_zbit) = opval; 11598 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11599 } 11600 SET_H_CBIT_MOVE (0); 11601 SET_H_VBIT_MOVE (0); 11602 { 11603 { 11604 BI opval = 0; 11605 CPU (h_xbit) = opval; 11606 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11607 } 11608 { 11609 BI opval = 0; 11610 SET_H_INSN_PREFIXED_P (opval); 11611 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11612 } 11613 } 11614 } 11615 } 11616 11617 #undef FLD 11618 } 11619 NEXT (vpc); 11620 11621 CASE (sem, INSN_LSRR_B_R) : /* lsrr.b $Rs,$Rd */ 11622 { 11623 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11624 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11625 #define FLD(f) abuf->fields.sfmt_addc_m.f 11626 int UNUSED written = 0; 11627 IADDR UNUSED pc = abuf->addr; 11628 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11629 11630 { 11631 SI tmp_tmpd; 11632 SI tmp_cnt; 11633 tmp_cnt = ANDSI (GET_H_GR (FLD (f_operand1)), 63); 11634 tmp_tmpd = ((NESI (ANDSI (tmp_cnt, 32), 0)) ? (0) : (SRLSI (ZEXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand2)))), ANDSI (tmp_cnt, 31)))); 11635 { 11636 SI tmp_oldregval; 11637 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 11638 { 11639 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00)); 11640 SET_H_GR (FLD (f_operand2), opval); 11641 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11642 } 11643 } 11644 { 11645 { 11646 BI opval = LTQI (tmp_tmpd, 0); 11647 CPU (h_nbit) = opval; 11648 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11649 } 11650 { 11651 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11652 CPU (h_zbit) = opval; 11653 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11654 } 11655 SET_H_CBIT_MOVE (0); 11656 SET_H_VBIT_MOVE (0); 11657 { 11658 { 11659 BI opval = 0; 11660 CPU (h_xbit) = opval; 11661 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11662 } 11663 { 11664 BI opval = 0; 11665 SET_H_INSN_PREFIXED_P (opval); 11666 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11667 } 11668 } 11669 } 11670 } 11671 11672 #undef FLD 11673 } 11674 NEXT (vpc); 11675 11676 CASE (sem, INSN_LSRR_W_R) : /* lsrr.w $Rs,$Rd */ 11677 { 11678 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11679 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11680 #define FLD(f) abuf->fields.sfmt_addc_m.f 11681 int UNUSED written = 0; 11682 IADDR UNUSED pc = abuf->addr; 11683 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11684 11685 { 11686 SI tmp_tmpd; 11687 SI tmp_cnt; 11688 tmp_cnt = ANDSI (GET_H_GR (FLD (f_operand1)), 63); 11689 tmp_tmpd = ((NESI (ANDSI (tmp_cnt, 32), 0)) ? (0) : (SRLSI (ZEXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand2)))), ANDSI (tmp_cnt, 31)))); 11690 { 11691 SI tmp_oldregval; 11692 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 11693 { 11694 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 11695 SET_H_GR (FLD (f_operand2), opval); 11696 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11697 } 11698 } 11699 { 11700 { 11701 BI opval = LTHI (tmp_tmpd, 0); 11702 CPU (h_nbit) = opval; 11703 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11704 } 11705 { 11706 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11707 CPU (h_zbit) = opval; 11708 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11709 } 11710 SET_H_CBIT_MOVE (0); 11711 SET_H_VBIT_MOVE (0); 11712 { 11713 { 11714 BI opval = 0; 11715 CPU (h_xbit) = opval; 11716 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11717 } 11718 { 11719 BI opval = 0; 11720 SET_H_INSN_PREFIXED_P (opval); 11721 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11722 } 11723 } 11724 } 11725 } 11726 11727 #undef FLD 11728 } 11729 NEXT (vpc); 11730 11731 CASE (sem, INSN_LSRR_D_R) : /* lsrr.d $Rs,$Rd */ 11732 { 11733 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11734 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11735 #define FLD(f) abuf->fields.sfmt_addc_m.f 11736 int UNUSED written = 0; 11737 IADDR UNUSED pc = abuf->addr; 11738 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11739 11740 { 11741 SI tmp_tmpd; 11742 SI tmp_cnt; 11743 tmp_cnt = ANDSI (GET_H_GR (FLD (f_operand1)), 63); 11744 tmp_tmpd = ((NESI (ANDSI (tmp_cnt, 32), 0)) ? (0) : (SRLSI (ZEXTSISI (TRUNCSISI (GET_H_GR (FLD (f_operand2)))), ANDSI (tmp_cnt, 31)))); 11745 { 11746 SI opval = tmp_tmpd; 11747 SET_H_GR (FLD (f_operand2), opval); 11748 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11749 } 11750 { 11751 { 11752 BI opval = LTSI (tmp_tmpd, 0); 11753 CPU (h_nbit) = opval; 11754 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11755 } 11756 { 11757 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11758 CPU (h_zbit) = opval; 11759 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11760 } 11761 SET_H_CBIT_MOVE (0); 11762 SET_H_VBIT_MOVE (0); 11763 { 11764 { 11765 BI opval = 0; 11766 CPU (h_xbit) = opval; 11767 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11768 } 11769 { 11770 BI opval = 0; 11771 SET_H_INSN_PREFIXED_P (opval); 11772 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11773 } 11774 } 11775 } 11776 } 11777 11778 #undef FLD 11779 } 11780 NEXT (vpc); 11781 11782 CASE (sem, INSN_LSRQ) : /* lsrq $c,${Rd} */ 11783 { 11784 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11785 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11786 #define FLD(f) abuf->fields.sfmt_asrq.f 11787 int UNUSED written = 0; 11788 IADDR UNUSED pc = abuf->addr; 11789 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11790 11791 { 11792 SI tmp_tmpd; 11793 tmp_tmpd = SRLSI (GET_H_GR (FLD (f_operand2)), FLD (f_u5)); 11794 { 11795 SI opval = tmp_tmpd; 11796 SET_H_GR (FLD (f_operand2), opval); 11797 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11798 } 11799 { 11800 { 11801 BI opval = LTSI (tmp_tmpd, 0); 11802 CPU (h_nbit) = opval; 11803 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11804 } 11805 { 11806 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11807 CPU (h_zbit) = opval; 11808 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11809 } 11810 SET_H_CBIT_MOVE (0); 11811 SET_H_VBIT_MOVE (0); 11812 { 11813 { 11814 BI opval = 0; 11815 CPU (h_xbit) = opval; 11816 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11817 } 11818 { 11819 BI opval = 0; 11820 SET_H_INSN_PREFIXED_P (opval); 11821 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11822 } 11823 } 11824 } 11825 } 11826 11827 #undef FLD 11828 } 11829 NEXT (vpc); 11830 11831 CASE (sem, INSN_LSLR_B_R) : /* lslr.b $Rs,$Rd */ 11832 { 11833 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11834 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11835 #define FLD(f) abuf->fields.sfmt_addc_m.f 11836 int UNUSED written = 0; 11837 IADDR UNUSED pc = abuf->addr; 11838 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11839 11840 { 11841 SI tmp_tmpd; 11842 SI tmp_cnt; 11843 tmp_cnt = ANDSI (GET_H_GR (FLD (f_operand1)), 63); 11844 tmp_tmpd = ((NESI (ANDSI (tmp_cnt, 32), 0)) ? (0) : (SLLSI (ZEXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand2)))), ANDSI (tmp_cnt, 31)))); 11845 { 11846 SI tmp_oldregval; 11847 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 11848 { 11849 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00)); 11850 SET_H_GR (FLD (f_operand2), opval); 11851 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11852 } 11853 } 11854 { 11855 { 11856 BI opval = LTQI (tmp_tmpd, 0); 11857 CPU (h_nbit) = opval; 11858 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11859 } 11860 { 11861 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11862 CPU (h_zbit) = opval; 11863 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11864 } 11865 SET_H_CBIT_MOVE (0); 11866 SET_H_VBIT_MOVE (0); 11867 { 11868 { 11869 BI opval = 0; 11870 CPU (h_xbit) = opval; 11871 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11872 } 11873 { 11874 BI opval = 0; 11875 SET_H_INSN_PREFIXED_P (opval); 11876 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11877 } 11878 } 11879 } 11880 } 11881 11882 #undef FLD 11883 } 11884 NEXT (vpc); 11885 11886 CASE (sem, INSN_LSLR_W_R) : /* lslr.w $Rs,$Rd */ 11887 { 11888 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11889 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11890 #define FLD(f) abuf->fields.sfmt_addc_m.f 11891 int UNUSED written = 0; 11892 IADDR UNUSED pc = abuf->addr; 11893 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11894 11895 { 11896 SI tmp_tmpd; 11897 SI tmp_cnt; 11898 tmp_cnt = ANDSI (GET_H_GR (FLD (f_operand1)), 63); 11899 tmp_tmpd = ((NESI (ANDSI (tmp_cnt, 32), 0)) ? (0) : (SLLSI (ZEXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand2)))), ANDSI (tmp_cnt, 31)))); 11900 { 11901 SI tmp_oldregval; 11902 tmp_oldregval = GET_H_RAW_GR_ACR (FLD (f_operand2)); 11903 { 11904 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000)); 11905 SET_H_GR (FLD (f_operand2), opval); 11906 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11907 } 11908 } 11909 { 11910 { 11911 BI opval = LTHI (tmp_tmpd, 0); 11912 CPU (h_nbit) = opval; 11913 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11914 } 11915 { 11916 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11917 CPU (h_zbit) = opval; 11918 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11919 } 11920 SET_H_CBIT_MOVE (0); 11921 SET_H_VBIT_MOVE (0); 11922 { 11923 { 11924 BI opval = 0; 11925 CPU (h_xbit) = opval; 11926 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11927 } 11928 { 11929 BI opval = 0; 11930 SET_H_INSN_PREFIXED_P (opval); 11931 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11932 } 11933 } 11934 } 11935 } 11936 11937 #undef FLD 11938 } 11939 NEXT (vpc); 11940 11941 CASE (sem, INSN_LSLR_D_R) : /* lslr.d $Rs,$Rd */ 11942 { 11943 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11944 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11945 #define FLD(f) abuf->fields.sfmt_addc_m.f 11946 int UNUSED written = 0; 11947 IADDR UNUSED pc = abuf->addr; 11948 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 11949 11950 { 11951 SI tmp_tmpd; 11952 SI tmp_cnt; 11953 tmp_cnt = ANDSI (GET_H_GR (FLD (f_operand1)), 63); 11954 tmp_tmpd = ((NESI (ANDSI (tmp_cnt, 32), 0)) ? (0) : (SLLSI (ZEXTSISI (TRUNCSISI (GET_H_GR (FLD (f_operand2)))), ANDSI (tmp_cnt, 31)))); 11955 { 11956 SI opval = tmp_tmpd; 11957 SET_H_GR (FLD (f_operand2), opval); 11958 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 11959 } 11960 { 11961 { 11962 BI opval = LTSI (tmp_tmpd, 0); 11963 CPU (h_nbit) = opval; 11964 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 11965 } 11966 { 11967 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 11968 CPU (h_zbit) = opval; 11969 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 11970 } 11971 SET_H_CBIT_MOVE (0); 11972 SET_H_VBIT_MOVE (0); 11973 { 11974 { 11975 BI opval = 0; 11976 CPU (h_xbit) = opval; 11977 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 11978 } 11979 { 11980 BI opval = 0; 11981 SET_H_INSN_PREFIXED_P (opval); 11982 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 11983 } 11984 } 11985 } 11986 } 11987 11988 #undef FLD 11989 } 11990 NEXT (vpc); 11991 11992 CASE (sem, INSN_LSLQ) : /* lslq $c,${Rd} */ 11993 { 11994 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 11995 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 11996 #define FLD(f) abuf->fields.sfmt_asrq.f 11997 int UNUSED written = 0; 11998 IADDR UNUSED pc = abuf->addr; 11999 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 12000 12001 { 12002 SI tmp_tmpd; 12003 tmp_tmpd = SLLSI (GET_H_GR (FLD (f_operand2)), FLD (f_u5)); 12004 { 12005 SI opval = tmp_tmpd; 12006 SET_H_GR (FLD (f_operand2), opval); 12007 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 12008 } 12009 { 12010 { 12011 BI opval = LTSI (tmp_tmpd, 0); 12012 CPU (h_nbit) = opval; 12013 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 12014 } 12015 { 12016 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 12017 CPU (h_zbit) = opval; 12018 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 12019 } 12020 SET_H_CBIT_MOVE (0); 12021 SET_H_VBIT_MOVE (0); 12022 { 12023 { 12024 BI opval = 0; 12025 CPU (h_xbit) = opval; 12026 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12027 } 12028 { 12029 BI opval = 0; 12030 SET_H_INSN_PREFIXED_P (opval); 12031 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12032 } 12033 } 12034 } 12035 } 12036 12037 #undef FLD 12038 } 12039 NEXT (vpc); 12040 12041 CASE (sem, INSN_BTST) : /* $Rs,$Rd */ 12042 { 12043 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12044 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12045 #define FLD(f) abuf->fields.sfmt_muls_b.f 12046 int UNUSED written = 0; 12047 IADDR UNUSED pc = abuf->addr; 12048 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 12049 12050 { 12051 SI tmp_tmpd; 12052 SI tmp_cnt; 12053 tmp_cnt = SUBSI (31, ANDSI (GET_H_GR (FLD (f_operand1)), 31)); 12054 tmp_tmpd = SLLSI (GET_H_GR (FLD (f_operand2)), tmp_cnt); 12055 { 12056 { 12057 BI opval = LTSI (tmp_tmpd, 0); 12058 CPU (h_nbit) = opval; 12059 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 12060 } 12061 { 12062 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 12063 CPU (h_zbit) = opval; 12064 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 12065 } 12066 SET_H_CBIT_MOVE (0); 12067 SET_H_VBIT_MOVE (0); 12068 { 12069 { 12070 BI opval = 0; 12071 CPU (h_xbit) = opval; 12072 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12073 } 12074 { 12075 BI opval = 0; 12076 SET_H_INSN_PREFIXED_P (opval); 12077 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12078 } 12079 } 12080 } 12081 } 12082 12083 #undef FLD 12084 } 12085 NEXT (vpc); 12086 12087 CASE (sem, INSN_BTSTQ) : /* btstq $c,${Rd} */ 12088 { 12089 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12090 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12091 #define FLD(f) abuf->fields.sfmt_asrq.f 12092 int UNUSED written = 0; 12093 IADDR UNUSED pc = abuf->addr; 12094 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 12095 12096 { 12097 SI tmp_tmpd; 12098 tmp_tmpd = SLLSI (GET_H_GR (FLD (f_operand2)), SUBSI (31, FLD (f_u5))); 12099 { 12100 { 12101 BI opval = LTSI (tmp_tmpd, 0); 12102 CPU (h_nbit) = opval; 12103 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 12104 } 12105 { 12106 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 12107 CPU (h_zbit) = opval; 12108 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 12109 } 12110 SET_H_CBIT_MOVE (0); 12111 SET_H_VBIT_MOVE (0); 12112 { 12113 { 12114 BI opval = 0; 12115 CPU (h_xbit) = opval; 12116 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12117 } 12118 { 12119 BI opval = 0; 12120 SET_H_INSN_PREFIXED_P (opval); 12121 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12122 } 12123 } 12124 } 12125 } 12126 12127 #undef FLD 12128 } 12129 NEXT (vpc); 12130 12131 CASE (sem, INSN_SETF) : /* setf ${list-of-flags} */ 12132 { 12133 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12134 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12135 #define FLD(f) abuf->fields.sfmt_setf.f 12136 int UNUSED written = 0; 12137 IADDR UNUSED pc = abuf->addr; 12138 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 12139 12140 { 12141 SI tmp_tmp; 12142 tmp_tmp = FLD (f_dstsrc); 12143 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 0)), 0)) { 12144 { 12145 BI opval = 1; 12146 CPU (h_cbit) = opval; 12147 written |= (1 << 1); 12148 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 12149 } 12150 } 12151 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 1)), 0)) { 12152 { 12153 BI opval = 1; 12154 CPU (h_vbit) = opval; 12155 written |= (1 << 7); 12156 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 12157 } 12158 } 12159 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 2)), 0)) { 12160 { 12161 BI opval = 1; 12162 CPU (h_zbit) = opval; 12163 written |= (1 << 9); 12164 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 12165 } 12166 } 12167 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 3)), 0)) { 12168 { 12169 BI opval = 1; 12170 CPU (h_nbit) = opval; 12171 written |= (1 << 3); 12172 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 12173 } 12174 } 12175 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 4)), 0)) { 12176 { 12177 BI opval = 1; 12178 CPU (h_xbit) = opval; 12179 written |= (1 << 8); 12180 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12181 } 12182 } 12183 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 5)), 0)) { 12184 { 12185 BI opval = 1; 12186 SET_H_IBIT (opval); 12187 written |= (1 << 2); 12188 CGEN_TRACE_RESULT (current_cpu, abuf, "ibit", 'x', opval); 12189 } 12190 } 12191 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 6)), 0)) { 12192 { 12193 BI opval = 1; 12194 SET_H_UBIT (opval); 12195 written |= (1 << 6); 12196 CGEN_TRACE_RESULT (current_cpu, abuf, "ubit", 'x', opval); 12197 } 12198 } 12199 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 7)), 0)) { 12200 { 12201 BI opval = 1; 12202 CPU (h_pbit) = opval; 12203 written |= (1 << 4); 12204 CGEN_TRACE_RESULT (current_cpu, abuf, "pbit", 'x', opval); 12205 } 12206 } 12207 { 12208 BI opval = 0; 12209 SET_H_INSN_PREFIXED_P (opval); 12210 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12211 } 12212 if (EQSI (ANDSI (tmp_tmp, SLLSI (1, 4)), 0)) { 12213 { 12214 BI opval = 0; 12215 CPU (h_xbit) = opval; 12216 written |= (1 << 8); 12217 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12218 } 12219 } 12220 } 12221 12222 abuf->written = written; 12223 #undef FLD 12224 } 12225 NEXT (vpc); 12226 12227 CASE (sem, INSN_CLEARF) : /* clearf ${list-of-flags} */ 12228 { 12229 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12230 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12231 #define FLD(f) abuf->fields.sfmt_setf.f 12232 int UNUSED written = 0; 12233 IADDR UNUSED pc = abuf->addr; 12234 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 12235 12236 { 12237 SI tmp_tmp; 12238 tmp_tmp = FLD (f_dstsrc); 12239 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 0)), 0)) { 12240 { 12241 BI opval = 0; 12242 CPU (h_cbit) = opval; 12243 written |= (1 << 1); 12244 CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); 12245 } 12246 } 12247 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 1)), 0)) { 12248 { 12249 BI opval = 0; 12250 CPU (h_vbit) = opval; 12251 written |= (1 << 7); 12252 CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); 12253 } 12254 } 12255 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 2)), 0)) { 12256 { 12257 BI opval = 0; 12258 CPU (h_zbit) = opval; 12259 written |= (1 << 9); 12260 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 12261 } 12262 } 12263 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 3)), 0)) { 12264 { 12265 BI opval = 0; 12266 CPU (h_nbit) = opval; 12267 written |= (1 << 3); 12268 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 12269 } 12270 } 12271 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 4)), 0)) { 12272 { 12273 BI opval = 0; 12274 CPU (h_xbit) = opval; 12275 written |= (1 << 8); 12276 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12277 } 12278 } 12279 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 5)), 0)) { 12280 { 12281 BI opval = 0; 12282 SET_H_IBIT (opval); 12283 written |= (1 << 2); 12284 CGEN_TRACE_RESULT (current_cpu, abuf, "ibit", 'x', opval); 12285 } 12286 } 12287 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 6)), 0)) { 12288 { 12289 BI opval = 0; 12290 SET_H_UBIT (opval); 12291 written |= (1 << 6); 12292 CGEN_TRACE_RESULT (current_cpu, abuf, "ubit", 'x', opval); 12293 } 12294 } 12295 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 7)), 0)) { 12296 { 12297 BI opval = 0; 12298 CPU (h_pbit) = opval; 12299 written |= (1 << 4); 12300 CGEN_TRACE_RESULT (current_cpu, abuf, "pbit", 'x', opval); 12301 } 12302 } 12303 { 12304 { 12305 BI opval = 0; 12306 CPU (h_xbit) = opval; 12307 written |= (1 << 8); 12308 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12309 } 12310 { 12311 BI opval = 0; 12312 SET_H_INSN_PREFIXED_P (opval); 12313 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12314 } 12315 } 12316 } 12317 12318 abuf->written = written; 12319 #undef FLD 12320 } 12321 NEXT (vpc); 12322 12323 CASE (sem, INSN_RFE) : /* rfe */ 12324 { 12325 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12326 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12327 #define FLD(f) abuf->fields.sfmt_rfe.f 12328 int UNUSED written = 0; 12329 IADDR UNUSED pc = abuf->addr; 12330 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 12331 12332 { 12333 USI tmp_oldccs; 12334 USI tmp_samebits; 12335 USI tmp_shiftbits; 12336 USI tmp_keepmask; 12337 BI tmp_p1; 12338 tmp_oldccs = GET_H_SR (((UINT) 13)); 12339 tmp_keepmask = 0xc0000000; 12340 tmp_samebits = ANDSI (tmp_oldccs, tmp_keepmask); 12341 tmp_shiftbits = ANDSI (SRLSI (ANDSI (tmp_oldccs, 1073609728), 10), INVSI (tmp_keepmask)); 12342 tmp_p1 = NESI (0, ANDSI (tmp_oldccs, 131072)); 12343 { 12344 SI opval = ORSI (ORSI (tmp_samebits, tmp_shiftbits), ((ANDBI (CPU (h_rbit), NOTBI (tmp_p1))) ? (0) : (128))); 12345 SET_H_SR (((UINT) 13), opval); 12346 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 12347 } 12348 } 12349 12350 #undef FLD 12351 } 12352 NEXT (vpc); 12353 12354 CASE (sem, INSN_SFE) : /* sfe */ 12355 { 12356 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12357 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12358 #define FLD(f) abuf->fields.sfmt_rfe.f 12359 int UNUSED written = 0; 12360 IADDR UNUSED pc = abuf->addr; 12361 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 12362 12363 { 12364 SI tmp_oldccs; 12365 SI tmp_savemask; 12366 tmp_savemask = 0xc0000000; 12367 tmp_oldccs = GET_H_SR (((UINT) 13)); 12368 { 12369 SI opval = ORSI (ANDSI (tmp_savemask, tmp_oldccs), ANDSI (INVSI (tmp_savemask), SLLSI (tmp_oldccs, 10))); 12370 SET_H_SR (((UINT) 13), opval); 12371 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 12372 } 12373 } 12374 12375 #undef FLD 12376 } 12377 NEXT (vpc); 12378 12379 CASE (sem, INSN_RFG) : /* rfg */ 12380 { 12381 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12382 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12383 #define FLD(f) abuf->fields.sfmt_empty.f 12384 int UNUSED written = 0; 12385 IADDR UNUSED pc = abuf->addr; 12386 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 12387 12388 crisv32f_rfg_handler (current_cpu, pc); 12389 12390 #undef FLD 12391 } 12392 NEXT (vpc); 12393 12394 CASE (sem, INSN_RFN) : /* rfn */ 12395 { 12396 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12397 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12398 #define FLD(f) abuf->fields.sfmt_rfe.f 12399 int UNUSED written = 0; 12400 IADDR UNUSED pc = abuf->addr; 12401 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 12402 12403 { 12404 { 12405 USI tmp_oldccs; 12406 USI tmp_samebits; 12407 USI tmp_shiftbits; 12408 USI tmp_keepmask; 12409 BI tmp_p1; 12410 tmp_oldccs = GET_H_SR (((UINT) 13)); 12411 tmp_keepmask = 0xc0000000; 12412 tmp_samebits = ANDSI (tmp_oldccs, tmp_keepmask); 12413 tmp_shiftbits = ANDSI (SRLSI (ANDSI (tmp_oldccs, 1073609728), 10), INVSI (tmp_keepmask)); 12414 tmp_p1 = NESI (0, ANDSI (tmp_oldccs, 131072)); 12415 { 12416 SI opval = ORSI (ORSI (tmp_samebits, tmp_shiftbits), ((ANDBI (CPU (h_rbit), NOTBI (tmp_p1))) ? (0) : (128))); 12417 SET_H_SR (((UINT) 13), opval); 12418 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 12419 } 12420 } 12421 { 12422 BI opval = 1; 12423 SET_H_MBIT (opval); 12424 CGEN_TRACE_RESULT (current_cpu, abuf, "mbit", 'x', opval); 12425 } 12426 } 12427 12428 #undef FLD 12429 } 12430 NEXT (vpc); 12431 12432 CASE (sem, INSN_HALT) : /* halt */ 12433 { 12434 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12435 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12436 #define FLD(f) abuf->fields.sfmt_empty.f 12437 int UNUSED written = 0; 12438 IADDR UNUSED pc = abuf->addr; 12439 SEM_BRANCH_INIT 12440 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 12441 12442 { 12443 USI opval = crisv32f_halt_handler (current_cpu, pc); 12444 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 12445 CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 12446 } 12447 12448 SEM_BRANCH_FINI (vpc); 12449 #undef FLD 12450 } 12451 NEXT (vpc); 12452 12453 CASE (sem, INSN_BCC_B) : /* b${cc} ${o-pcrel} */ 12454 { 12455 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12456 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12457 #define FLD(f) abuf->fields.sfmt_bcc_b.f 12458 int UNUSED written = 0; 12459 IADDR UNUSED pc = abuf->addr; 12460 SEM_BRANCH_INIT 12461 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 12462 12463 { 12464 BI tmp_truthval; 12465 tmp_truthval = ({ SI tmp_tmpcond; 12466 BI tmp_condres; 12467 tmp_tmpcond = FLD (f_operand2); 12468 ; if (EQSI (tmp_tmpcond, 0)) { 12469 tmp_condres = NOTBI (CPU (h_cbit)); 12470 } 12471 else if (EQSI (tmp_tmpcond, 1)) { 12472 tmp_condres = CPU (h_cbit); 12473 } 12474 else if (EQSI (tmp_tmpcond, 2)) { 12475 tmp_condres = NOTBI (CPU (h_zbit)); 12476 } 12477 else if (EQSI (tmp_tmpcond, 3)) { 12478 tmp_condres = CPU (h_zbit); 12479 } 12480 else if (EQSI (tmp_tmpcond, 4)) { 12481 tmp_condres = NOTBI (CPU (h_vbit)); 12482 } 12483 else if (EQSI (tmp_tmpcond, 5)) { 12484 tmp_condres = CPU (h_vbit); 12485 } 12486 else if (EQSI (tmp_tmpcond, 6)) { 12487 tmp_condres = NOTBI (CPU (h_nbit)); 12488 } 12489 else if (EQSI (tmp_tmpcond, 7)) { 12490 tmp_condres = CPU (h_nbit); 12491 } 12492 else if (EQSI (tmp_tmpcond, 8)) { 12493 tmp_condres = ORBI (CPU (h_cbit), CPU (h_zbit)); 12494 } 12495 else if (EQSI (tmp_tmpcond, 9)) { 12496 tmp_condres = NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit))); 12497 } 12498 else if (EQSI (tmp_tmpcond, 10)) { 12499 tmp_condres = NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit))); 12500 } 12501 else if (EQSI (tmp_tmpcond, 11)) { 12502 tmp_condres = XORBI (CPU (h_vbit), CPU (h_nbit)); 12503 } 12504 else if (EQSI (tmp_tmpcond, 12)) { 12505 tmp_condres = NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))); 12506 } 12507 else if (EQSI (tmp_tmpcond, 13)) { 12508 tmp_condres = ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)); 12509 } 12510 else if (EQSI (tmp_tmpcond, 14)) { 12511 tmp_condres = 1; 12512 } 12513 else if (EQSI (tmp_tmpcond, 15)) { 12514 tmp_condres = CPU (h_pbit); 12515 } 12516 else { 12517 cgen_rtx_error (current_cpu, "Unknown condition code"); 12518 } 12519 ; tmp_condres; }); 12520 crisv32f_branch_taken (current_cpu, pc, FLD (i_o_pcrel), tmp_truthval); 12521 { 12522 { 12523 BI opval = 0; 12524 CPU (h_xbit) = opval; 12525 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12526 } 12527 { 12528 BI opval = 0; 12529 SET_H_INSN_PREFIXED_P (opval); 12530 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12531 } 12532 } 12533 if (tmp_truthval) { 12534 { 12535 { 12536 USI opval = FLD (i_o_pcrel); 12537 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 12538 written |= (1 << 8); 12539 CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 12540 } 12541 } 12542 } 12543 } 12544 12545 abuf->written = written; 12546 SEM_BRANCH_FINI (vpc); 12547 #undef FLD 12548 } 12549 NEXT (vpc); 12550 12551 CASE (sem, INSN_BA_B) : /* ba ${o-pcrel} */ 12552 { 12553 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12554 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12555 #define FLD(f) abuf->fields.sfmt_bcc_b.f 12556 int UNUSED written = 0; 12557 IADDR UNUSED pc = abuf->addr; 12558 SEM_BRANCH_INIT 12559 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 12560 12561 { 12562 { 12563 { 12564 BI opval = 0; 12565 CPU (h_xbit) = opval; 12566 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12567 } 12568 { 12569 BI opval = 0; 12570 SET_H_INSN_PREFIXED_P (opval); 12571 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12572 } 12573 } 12574 { 12575 { 12576 USI opval = FLD (i_o_pcrel); 12577 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 12578 CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 12579 } 12580 } 12581 } 12582 12583 SEM_BRANCH_FINI (vpc); 12584 #undef FLD 12585 } 12586 NEXT (vpc); 12587 12588 CASE (sem, INSN_BCC_W) : /* b${cc} ${o-word-pcrel} */ 12589 { 12590 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12591 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12592 #define FLD(f) abuf->fields.sfmt_bcc_w.f 12593 int UNUSED written = 0; 12594 IADDR UNUSED pc = abuf->addr; 12595 SEM_BRANCH_INIT 12596 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 12597 12598 { 12599 BI tmp_truthval; 12600 tmp_truthval = ({ SI tmp_tmpcond; 12601 BI tmp_condres; 12602 tmp_tmpcond = FLD (f_operand2); 12603 ; if (EQSI (tmp_tmpcond, 0)) { 12604 tmp_condres = NOTBI (CPU (h_cbit)); 12605 } 12606 else if (EQSI (tmp_tmpcond, 1)) { 12607 tmp_condres = CPU (h_cbit); 12608 } 12609 else if (EQSI (tmp_tmpcond, 2)) { 12610 tmp_condres = NOTBI (CPU (h_zbit)); 12611 } 12612 else if (EQSI (tmp_tmpcond, 3)) { 12613 tmp_condres = CPU (h_zbit); 12614 } 12615 else if (EQSI (tmp_tmpcond, 4)) { 12616 tmp_condres = NOTBI (CPU (h_vbit)); 12617 } 12618 else if (EQSI (tmp_tmpcond, 5)) { 12619 tmp_condres = CPU (h_vbit); 12620 } 12621 else if (EQSI (tmp_tmpcond, 6)) { 12622 tmp_condres = NOTBI (CPU (h_nbit)); 12623 } 12624 else if (EQSI (tmp_tmpcond, 7)) { 12625 tmp_condres = CPU (h_nbit); 12626 } 12627 else if (EQSI (tmp_tmpcond, 8)) { 12628 tmp_condres = ORBI (CPU (h_cbit), CPU (h_zbit)); 12629 } 12630 else if (EQSI (tmp_tmpcond, 9)) { 12631 tmp_condres = NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit))); 12632 } 12633 else if (EQSI (tmp_tmpcond, 10)) { 12634 tmp_condres = NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit))); 12635 } 12636 else if (EQSI (tmp_tmpcond, 11)) { 12637 tmp_condres = XORBI (CPU (h_vbit), CPU (h_nbit)); 12638 } 12639 else if (EQSI (tmp_tmpcond, 12)) { 12640 tmp_condres = NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))); 12641 } 12642 else if (EQSI (tmp_tmpcond, 13)) { 12643 tmp_condres = ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)); 12644 } 12645 else if (EQSI (tmp_tmpcond, 14)) { 12646 tmp_condres = 1; 12647 } 12648 else if (EQSI (tmp_tmpcond, 15)) { 12649 tmp_condres = CPU (h_pbit); 12650 } 12651 else { 12652 cgen_rtx_error (current_cpu, "Unknown condition code"); 12653 } 12654 ; tmp_condres; }); 12655 crisv32f_branch_taken (current_cpu, pc, FLD (i_o_word_pcrel), tmp_truthval); 12656 { 12657 { 12658 BI opval = 0; 12659 CPU (h_xbit) = opval; 12660 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12661 } 12662 { 12663 BI opval = 0; 12664 SET_H_INSN_PREFIXED_P (opval); 12665 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12666 } 12667 } 12668 if (tmp_truthval) { 12669 { 12670 { 12671 USI opval = FLD (i_o_word_pcrel); 12672 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 12673 written |= (1 << 8); 12674 CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 12675 } 12676 } 12677 } 12678 } 12679 12680 abuf->written = written; 12681 SEM_BRANCH_FINI (vpc); 12682 #undef FLD 12683 } 12684 NEXT (vpc); 12685 12686 CASE (sem, INSN_BA_W) : /* ba ${o-word-pcrel} */ 12687 { 12688 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12689 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12690 #define FLD(f) abuf->fields.sfmt_bcc_w.f 12691 int UNUSED written = 0; 12692 IADDR UNUSED pc = abuf->addr; 12693 SEM_BRANCH_INIT 12694 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 12695 12696 { 12697 { 12698 { 12699 BI opval = 0; 12700 CPU (h_xbit) = opval; 12701 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12702 } 12703 { 12704 BI opval = 0; 12705 SET_H_INSN_PREFIXED_P (opval); 12706 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12707 } 12708 } 12709 { 12710 { 12711 USI opval = FLD (i_o_word_pcrel); 12712 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 12713 CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 12714 } 12715 } 12716 } 12717 12718 SEM_BRANCH_FINI (vpc); 12719 #undef FLD 12720 } 12721 NEXT (vpc); 12722 12723 CASE (sem, INSN_JAS_R) : /* jas ${Rs},${Pd} */ 12724 { 12725 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12726 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12727 #define FLD(f) abuf->fields.sfmt_move_m_sprv32.f 12728 int UNUSED written = 0; 12729 IADDR UNUSED pc = abuf->addr; 12730 SEM_BRANCH_INIT 12731 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 12732 12733 { 12734 { 12735 { 12736 BI opval = 0; 12737 CPU (h_xbit) = opval; 12738 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12739 } 12740 { 12741 BI opval = 0; 12742 SET_H_INSN_PREFIXED_P (opval); 12743 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12744 } 12745 } 12746 if (ANDIF (EQSI (FLD (f_operand1), 1), EQSI (FLD (f_operand2), 11))) { 12747 cris_flush_simulator_decode_cache (current_cpu, pc); 12748 } 12749 { 12750 { 12751 { 12752 SI opval = ADDSI (pc, 4); 12753 SET_H_SR (FLD (f_operand2), opval); 12754 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 12755 } 12756 { 12757 USI opval = GET_H_GR (FLD (f_operand1)); 12758 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 12759 CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 12760 } 12761 } 12762 } 12763 } 12764 12765 SEM_BRANCH_FINI (vpc); 12766 #undef FLD 12767 } 12768 NEXT (vpc); 12769 12770 CASE (sem, INSN_JAS_C) : /* jas ${const32},${Pd} */ 12771 { 12772 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12773 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12774 #define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f 12775 int UNUSED written = 0; 12776 IADDR UNUSED pc = abuf->addr; 12777 SEM_BRANCH_INIT 12778 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 12779 12780 { 12781 { 12782 { 12783 BI opval = 0; 12784 CPU (h_xbit) = opval; 12785 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12786 } 12787 { 12788 BI opval = 0; 12789 SET_H_INSN_PREFIXED_P (opval); 12790 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12791 } 12792 } 12793 { 12794 { 12795 { 12796 SI opval = ADDSI (pc, 8); 12797 SET_H_SR (FLD (f_operand2), opval); 12798 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 12799 } 12800 { 12801 USI opval = FLD (f_indir_pc__dword); 12802 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 12803 CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 12804 } 12805 } 12806 } 12807 } 12808 12809 SEM_BRANCH_FINI (vpc); 12810 #undef FLD 12811 } 12812 NEXT (vpc); 12813 12814 CASE (sem, INSN_JUMP_P) : /* jump ${Ps} */ 12815 { 12816 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12817 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12818 #define FLD(f) abuf->fields.sfmt_mcp.f 12819 int UNUSED written = 0; 12820 IADDR UNUSED pc = abuf->addr; 12821 SEM_BRANCH_INIT 12822 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 12823 12824 { 12825 { 12826 { 12827 BI opval = 0; 12828 CPU (h_xbit) = opval; 12829 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12830 } 12831 { 12832 BI opval = 0; 12833 SET_H_INSN_PREFIXED_P (opval); 12834 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12835 } 12836 } 12837 { 12838 { 12839 USI opval = GET_H_SR (FLD (f_operand2)); 12840 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 12841 CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 12842 } 12843 } 12844 } 12845 12846 SEM_BRANCH_FINI (vpc); 12847 #undef FLD 12848 } 12849 NEXT (vpc); 12850 12851 CASE (sem, INSN_BAS_C) : /* bas ${const32},${Pd} */ 12852 { 12853 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12854 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12855 #define FLD(f) abuf->fields.sfmt_bas_c.f 12856 int UNUSED written = 0; 12857 IADDR UNUSED pc = abuf->addr; 12858 SEM_BRANCH_INIT 12859 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 12860 12861 { 12862 { 12863 { 12864 BI opval = 0; 12865 CPU (h_xbit) = opval; 12866 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12867 } 12868 { 12869 BI opval = 0; 12870 SET_H_INSN_PREFIXED_P (opval); 12871 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12872 } 12873 } 12874 { 12875 { 12876 { 12877 SI opval = ADDSI (pc, 8); 12878 SET_H_SR (FLD (f_operand2), opval); 12879 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 12880 } 12881 { 12882 USI opval = FLD (i_const32_pcrel); 12883 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 12884 CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 12885 } 12886 } 12887 } 12888 } 12889 12890 SEM_BRANCH_FINI (vpc); 12891 #undef FLD 12892 } 12893 NEXT (vpc); 12894 12895 CASE (sem, INSN_JASC_R) : /* jasc ${Rs},${Pd} */ 12896 { 12897 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12898 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12899 #define FLD(f) abuf->fields.sfmt_move_m_sprv32.f 12900 int UNUSED written = 0; 12901 IADDR UNUSED pc = abuf->addr; 12902 SEM_BRANCH_INIT 12903 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 12904 12905 { 12906 { 12907 { 12908 BI opval = 0; 12909 CPU (h_xbit) = opval; 12910 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12911 } 12912 { 12913 BI opval = 0; 12914 SET_H_INSN_PREFIXED_P (opval); 12915 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12916 } 12917 } 12918 { 12919 { 12920 { 12921 SI opval = ADDSI (pc, 8); 12922 SET_H_SR (FLD (f_operand2), opval); 12923 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 12924 } 12925 { 12926 USI opval = GET_H_GR (FLD (f_operand1)); 12927 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 12928 CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 12929 } 12930 } 12931 } 12932 } 12933 12934 SEM_BRANCH_FINI (vpc); 12935 #undef FLD 12936 } 12937 NEXT (vpc); 12938 12939 CASE (sem, INSN_JASC_C) : /* jasc ${const32},${Pd} */ 12940 { 12941 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12942 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12943 #define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f 12944 int UNUSED written = 0; 12945 IADDR UNUSED pc = abuf->addr; 12946 SEM_BRANCH_INIT 12947 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 12948 12949 { 12950 { 12951 { 12952 BI opval = 0; 12953 CPU (h_xbit) = opval; 12954 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12955 } 12956 { 12957 BI opval = 0; 12958 SET_H_INSN_PREFIXED_P (opval); 12959 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 12960 } 12961 } 12962 { 12963 { 12964 { 12965 SI opval = ADDSI (pc, 12); 12966 SET_H_SR (FLD (f_operand2), opval); 12967 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 12968 } 12969 { 12970 USI opval = FLD (f_indir_pc__dword); 12971 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 12972 CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 12973 } 12974 } 12975 } 12976 } 12977 12978 SEM_BRANCH_FINI (vpc); 12979 #undef FLD 12980 } 12981 NEXT (vpc); 12982 12983 CASE (sem, INSN_BASC_C) : /* basc ${const32},${Pd} */ 12984 { 12985 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 12986 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 12987 #define FLD(f) abuf->fields.sfmt_bas_c.f 12988 int UNUSED written = 0; 12989 IADDR UNUSED pc = abuf->addr; 12990 SEM_BRANCH_INIT 12991 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 12992 12993 { 12994 { 12995 { 12996 BI opval = 0; 12997 CPU (h_xbit) = opval; 12998 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 12999 } 13000 { 13001 BI opval = 0; 13002 SET_H_INSN_PREFIXED_P (opval); 13003 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13004 } 13005 } 13006 { 13007 { 13008 { 13009 SI opval = ADDSI (pc, 12); 13010 SET_H_SR (FLD (f_operand2), opval); 13011 CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 13012 } 13013 { 13014 USI opval = FLD (i_const32_pcrel); 13015 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 13016 CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 13017 } 13018 } 13019 } 13020 } 13021 13022 SEM_BRANCH_FINI (vpc); 13023 #undef FLD 13024 } 13025 NEXT (vpc); 13026 13027 CASE (sem, INSN_BREAK) : /* break $n */ 13028 { 13029 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13030 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13031 #define FLD(f) abuf->fields.sfmt_break.f 13032 int UNUSED written = 0; 13033 IADDR UNUSED pc = abuf->addr; 13034 SEM_BRANCH_INIT 13035 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13036 13037 { 13038 { 13039 { 13040 BI opval = 0; 13041 CPU (h_xbit) = opval; 13042 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 13043 } 13044 { 13045 BI opval = 0; 13046 SET_H_INSN_PREFIXED_P (opval); 13047 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13048 } 13049 } 13050 { 13051 USI opval = crisv32f_break_handler (current_cpu, FLD (f_u4), pc); 13052 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 13053 CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 13054 } 13055 } 13056 13057 SEM_BRANCH_FINI (vpc); 13058 #undef FLD 13059 } 13060 NEXT (vpc); 13061 13062 CASE (sem, INSN_BOUND_R_B_R) : /* bound-r.b ${Rs},${Rd} */ 13063 { 13064 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13065 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13066 #define FLD(f) abuf->fields.sfmt_muls_b.f 13067 int UNUSED written = 0; 13068 IADDR UNUSED pc = abuf->addr; 13069 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13070 13071 { 13072 SI tmp_tmpopd; 13073 SI tmp_tmpops; 13074 SI tmp_newval; 13075 tmp_tmpops = ZEXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand1)))); 13076 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 13077 tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd)); 13078 { 13079 SI opval = tmp_newval; 13080 SET_H_GR (FLD (f_operand2), opval); 13081 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 13082 } 13083 { 13084 { 13085 BI opval = LTSI (tmp_newval, 0); 13086 CPU (h_nbit) = opval; 13087 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 13088 } 13089 { 13090 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 13091 CPU (h_zbit) = opval; 13092 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 13093 } 13094 SET_H_CBIT_MOVE (0); 13095 SET_H_VBIT_MOVE (0); 13096 { 13097 { 13098 BI opval = 0; 13099 CPU (h_xbit) = opval; 13100 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 13101 } 13102 { 13103 BI opval = 0; 13104 SET_H_INSN_PREFIXED_P (opval); 13105 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13106 } 13107 } 13108 } 13109 } 13110 13111 #undef FLD 13112 } 13113 NEXT (vpc); 13114 13115 CASE (sem, INSN_BOUND_R_W_R) : /* bound-r.w ${Rs},${Rd} */ 13116 { 13117 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13118 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13119 #define FLD(f) abuf->fields.sfmt_muls_b.f 13120 int UNUSED written = 0; 13121 IADDR UNUSED pc = abuf->addr; 13122 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13123 13124 { 13125 SI tmp_tmpopd; 13126 SI tmp_tmpops; 13127 SI tmp_newval; 13128 tmp_tmpops = ZEXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand1)))); 13129 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 13130 tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd)); 13131 { 13132 SI opval = tmp_newval; 13133 SET_H_GR (FLD (f_operand2), opval); 13134 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 13135 } 13136 { 13137 { 13138 BI opval = LTSI (tmp_newval, 0); 13139 CPU (h_nbit) = opval; 13140 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 13141 } 13142 { 13143 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 13144 CPU (h_zbit) = opval; 13145 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 13146 } 13147 SET_H_CBIT_MOVE (0); 13148 SET_H_VBIT_MOVE (0); 13149 { 13150 { 13151 BI opval = 0; 13152 CPU (h_xbit) = opval; 13153 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 13154 } 13155 { 13156 BI opval = 0; 13157 SET_H_INSN_PREFIXED_P (opval); 13158 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13159 } 13160 } 13161 } 13162 } 13163 13164 #undef FLD 13165 } 13166 NEXT (vpc); 13167 13168 CASE (sem, INSN_BOUND_R_D_R) : /* bound-r.d ${Rs},${Rd} */ 13169 { 13170 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13171 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13172 #define FLD(f) abuf->fields.sfmt_muls_b.f 13173 int UNUSED written = 0; 13174 IADDR UNUSED pc = abuf->addr; 13175 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13176 13177 { 13178 SI tmp_tmpopd; 13179 SI tmp_tmpops; 13180 SI tmp_newval; 13181 tmp_tmpops = TRUNCSISI (GET_H_GR (FLD (f_operand1))); 13182 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 13183 tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd)); 13184 { 13185 SI opval = tmp_newval; 13186 SET_H_GR (FLD (f_operand2), opval); 13187 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 13188 } 13189 { 13190 { 13191 BI opval = LTSI (tmp_newval, 0); 13192 CPU (h_nbit) = opval; 13193 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 13194 } 13195 { 13196 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 13197 CPU (h_zbit) = opval; 13198 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 13199 } 13200 SET_H_CBIT_MOVE (0); 13201 SET_H_VBIT_MOVE (0); 13202 { 13203 { 13204 BI opval = 0; 13205 CPU (h_xbit) = opval; 13206 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 13207 } 13208 { 13209 BI opval = 0; 13210 SET_H_INSN_PREFIXED_P (opval); 13211 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13212 } 13213 } 13214 } 13215 } 13216 13217 #undef FLD 13218 } 13219 NEXT (vpc); 13220 13221 CASE (sem, INSN_BOUND_CB) : /* bound.b [PC+],${Rd} */ 13222 { 13223 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13224 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13225 #define FLD(f) abuf->fields.sfmt_bound_cb.f 13226 int UNUSED written = 0; 13227 IADDR UNUSED pc = abuf->addr; 13228 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 13229 13230 { 13231 SI tmp_tmpopd; 13232 SI tmp_tmpops; 13233 SI tmp_newval; 13234 tmp_tmpops = ZEXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte))); 13235 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 13236 tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd)); 13237 { 13238 SI opval = tmp_newval; 13239 SET_H_GR (FLD (f_operand2), opval); 13240 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 13241 } 13242 { 13243 { 13244 BI opval = LTSI (tmp_newval, 0); 13245 CPU (h_nbit) = opval; 13246 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 13247 } 13248 { 13249 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 13250 CPU (h_zbit) = opval; 13251 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 13252 } 13253 SET_H_CBIT_MOVE (0); 13254 SET_H_VBIT_MOVE (0); 13255 { 13256 { 13257 BI opval = 0; 13258 CPU (h_xbit) = opval; 13259 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 13260 } 13261 { 13262 BI opval = 0; 13263 SET_H_INSN_PREFIXED_P (opval); 13264 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13265 } 13266 } 13267 } 13268 } 13269 13270 #undef FLD 13271 } 13272 NEXT (vpc); 13273 13274 CASE (sem, INSN_BOUND_CW) : /* bound.w [PC+],${Rd} */ 13275 { 13276 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13277 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13278 #define FLD(f) abuf->fields.sfmt_bound_cw.f 13279 int UNUSED written = 0; 13280 IADDR UNUSED pc = abuf->addr; 13281 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 13282 13283 { 13284 SI tmp_tmpopd; 13285 SI tmp_tmpops; 13286 SI tmp_newval; 13287 tmp_tmpops = ZEXTSISI (FLD (f_indir_pc__word)); 13288 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 13289 tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd)); 13290 { 13291 SI opval = tmp_newval; 13292 SET_H_GR (FLD (f_operand2), opval); 13293 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 13294 } 13295 { 13296 { 13297 BI opval = LTSI (tmp_newval, 0); 13298 CPU (h_nbit) = opval; 13299 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 13300 } 13301 { 13302 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 13303 CPU (h_zbit) = opval; 13304 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 13305 } 13306 SET_H_CBIT_MOVE (0); 13307 SET_H_VBIT_MOVE (0); 13308 { 13309 { 13310 BI opval = 0; 13311 CPU (h_xbit) = opval; 13312 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 13313 } 13314 { 13315 BI opval = 0; 13316 SET_H_INSN_PREFIXED_P (opval); 13317 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13318 } 13319 } 13320 } 13321 } 13322 13323 #undef FLD 13324 } 13325 NEXT (vpc); 13326 13327 CASE (sem, INSN_BOUND_CD) : /* bound.d [PC+],${Rd} */ 13328 { 13329 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13330 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13331 #define FLD(f) abuf->fields.sfmt_bound_cd.f 13332 int UNUSED written = 0; 13333 IADDR UNUSED pc = abuf->addr; 13334 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 13335 13336 { 13337 SI tmp_tmpopd; 13338 SI tmp_tmpops; 13339 SI tmp_newval; 13340 tmp_tmpops = FLD (f_indir_pc__dword); 13341 tmp_tmpopd = GET_H_GR (FLD (f_operand2)); 13342 tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd)); 13343 { 13344 SI opval = tmp_newval; 13345 SET_H_GR (FLD (f_operand2), opval); 13346 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 13347 } 13348 { 13349 { 13350 BI opval = LTSI (tmp_newval, 0); 13351 CPU (h_nbit) = opval; 13352 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 13353 } 13354 { 13355 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 13356 CPU (h_zbit) = opval; 13357 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 13358 } 13359 SET_H_CBIT_MOVE (0); 13360 SET_H_VBIT_MOVE (0); 13361 { 13362 { 13363 BI opval = 0; 13364 CPU (h_xbit) = opval; 13365 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 13366 } 13367 { 13368 BI opval = 0; 13369 SET_H_INSN_PREFIXED_P (opval); 13370 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13371 } 13372 } 13373 } 13374 } 13375 13376 #undef FLD 13377 } 13378 NEXT (vpc); 13379 13380 CASE (sem, INSN_SCC) : /* s${cc} ${Rd-sfield} */ 13381 { 13382 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13383 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13384 #define FLD(f) abuf->fields.sfmt_move_spr_mv32.f 13385 int UNUSED written = 0; 13386 IADDR UNUSED pc = abuf->addr; 13387 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13388 13389 { 13390 BI tmp_truthval; 13391 tmp_truthval = ({ SI tmp_tmpcond; 13392 BI tmp_condres; 13393 tmp_tmpcond = FLD (f_operand2); 13394 ; if (EQSI (tmp_tmpcond, 0)) { 13395 tmp_condres = NOTBI (CPU (h_cbit)); 13396 } 13397 else if (EQSI (tmp_tmpcond, 1)) { 13398 tmp_condres = CPU (h_cbit); 13399 } 13400 else if (EQSI (tmp_tmpcond, 2)) { 13401 tmp_condres = NOTBI (CPU (h_zbit)); 13402 } 13403 else if (EQSI (tmp_tmpcond, 3)) { 13404 tmp_condres = CPU (h_zbit); 13405 } 13406 else if (EQSI (tmp_tmpcond, 4)) { 13407 tmp_condres = NOTBI (CPU (h_vbit)); 13408 } 13409 else if (EQSI (tmp_tmpcond, 5)) { 13410 tmp_condres = CPU (h_vbit); 13411 } 13412 else if (EQSI (tmp_tmpcond, 6)) { 13413 tmp_condres = NOTBI (CPU (h_nbit)); 13414 } 13415 else if (EQSI (tmp_tmpcond, 7)) { 13416 tmp_condres = CPU (h_nbit); 13417 } 13418 else if (EQSI (tmp_tmpcond, 8)) { 13419 tmp_condres = ORBI (CPU (h_cbit), CPU (h_zbit)); 13420 } 13421 else if (EQSI (tmp_tmpcond, 9)) { 13422 tmp_condres = NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit))); 13423 } 13424 else if (EQSI (tmp_tmpcond, 10)) { 13425 tmp_condres = NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit))); 13426 } 13427 else if (EQSI (tmp_tmpcond, 11)) { 13428 tmp_condres = XORBI (CPU (h_vbit), CPU (h_nbit)); 13429 } 13430 else if (EQSI (tmp_tmpcond, 12)) { 13431 tmp_condres = NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))); 13432 } 13433 else if (EQSI (tmp_tmpcond, 13)) { 13434 tmp_condres = ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)); 13435 } 13436 else if (EQSI (tmp_tmpcond, 14)) { 13437 tmp_condres = 1; 13438 } 13439 else if (EQSI (tmp_tmpcond, 15)) { 13440 tmp_condres = CPU (h_pbit); 13441 } 13442 else { 13443 cgen_rtx_error (current_cpu, "Unknown condition code"); 13444 } 13445 ; tmp_condres; }); 13446 { 13447 SI opval = ZEXTBISI (tmp_truthval); 13448 SET_H_GR (FLD (f_operand1), opval); 13449 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 13450 } 13451 { 13452 { 13453 BI opval = 0; 13454 CPU (h_xbit) = opval; 13455 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 13456 } 13457 { 13458 BI opval = 0; 13459 SET_H_INSN_PREFIXED_P (opval); 13460 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13461 } 13462 } 13463 } 13464 13465 #undef FLD 13466 } 13467 NEXT (vpc); 13468 13469 CASE (sem, INSN_LZ) : /* lz ${Rs},${Rd} */ 13470 { 13471 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13472 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13473 #define FLD(f) abuf->fields.sfmt_muls_b.f 13474 int UNUSED written = 0; 13475 IADDR UNUSED pc = abuf->addr; 13476 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13477 13478 { 13479 SI tmp_tmpd; 13480 SI tmp_tmp; 13481 tmp_tmp = GET_H_GR (FLD (f_operand1)); 13482 tmp_tmpd = 0; 13483 { 13484 if (GESI (tmp_tmp, 0)) { 13485 { 13486 tmp_tmp = SLLSI (tmp_tmp, 1); 13487 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13488 } 13489 } 13490 if (GESI (tmp_tmp, 0)) { 13491 { 13492 tmp_tmp = SLLSI (tmp_tmp, 1); 13493 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13494 } 13495 } 13496 if (GESI (tmp_tmp, 0)) { 13497 { 13498 tmp_tmp = SLLSI (tmp_tmp, 1); 13499 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13500 } 13501 } 13502 if (GESI (tmp_tmp, 0)) { 13503 { 13504 tmp_tmp = SLLSI (tmp_tmp, 1); 13505 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13506 } 13507 } 13508 if (GESI (tmp_tmp, 0)) { 13509 { 13510 tmp_tmp = SLLSI (tmp_tmp, 1); 13511 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13512 } 13513 } 13514 if (GESI (tmp_tmp, 0)) { 13515 { 13516 tmp_tmp = SLLSI (tmp_tmp, 1); 13517 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13518 } 13519 } 13520 if (GESI (tmp_tmp, 0)) { 13521 { 13522 tmp_tmp = SLLSI (tmp_tmp, 1); 13523 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13524 } 13525 } 13526 if (GESI (tmp_tmp, 0)) { 13527 { 13528 tmp_tmp = SLLSI (tmp_tmp, 1); 13529 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13530 } 13531 } 13532 if (GESI (tmp_tmp, 0)) { 13533 { 13534 tmp_tmp = SLLSI (tmp_tmp, 1); 13535 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13536 } 13537 } 13538 if (GESI (tmp_tmp, 0)) { 13539 { 13540 tmp_tmp = SLLSI (tmp_tmp, 1); 13541 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13542 } 13543 } 13544 if (GESI (tmp_tmp, 0)) { 13545 { 13546 tmp_tmp = SLLSI (tmp_tmp, 1); 13547 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13548 } 13549 } 13550 if (GESI (tmp_tmp, 0)) { 13551 { 13552 tmp_tmp = SLLSI (tmp_tmp, 1); 13553 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13554 } 13555 } 13556 if (GESI (tmp_tmp, 0)) { 13557 { 13558 tmp_tmp = SLLSI (tmp_tmp, 1); 13559 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13560 } 13561 } 13562 if (GESI (tmp_tmp, 0)) { 13563 { 13564 tmp_tmp = SLLSI (tmp_tmp, 1); 13565 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13566 } 13567 } 13568 if (GESI (tmp_tmp, 0)) { 13569 { 13570 tmp_tmp = SLLSI (tmp_tmp, 1); 13571 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13572 } 13573 } 13574 if (GESI (tmp_tmp, 0)) { 13575 { 13576 tmp_tmp = SLLSI (tmp_tmp, 1); 13577 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13578 } 13579 } 13580 if (GESI (tmp_tmp, 0)) { 13581 { 13582 tmp_tmp = SLLSI (tmp_tmp, 1); 13583 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13584 } 13585 } 13586 if (GESI (tmp_tmp, 0)) { 13587 { 13588 tmp_tmp = SLLSI (tmp_tmp, 1); 13589 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13590 } 13591 } 13592 if (GESI (tmp_tmp, 0)) { 13593 { 13594 tmp_tmp = SLLSI (tmp_tmp, 1); 13595 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13596 } 13597 } 13598 if (GESI (tmp_tmp, 0)) { 13599 { 13600 tmp_tmp = SLLSI (tmp_tmp, 1); 13601 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13602 } 13603 } 13604 if (GESI (tmp_tmp, 0)) { 13605 { 13606 tmp_tmp = SLLSI (tmp_tmp, 1); 13607 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13608 } 13609 } 13610 if (GESI (tmp_tmp, 0)) { 13611 { 13612 tmp_tmp = SLLSI (tmp_tmp, 1); 13613 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13614 } 13615 } 13616 if (GESI (tmp_tmp, 0)) { 13617 { 13618 tmp_tmp = SLLSI (tmp_tmp, 1); 13619 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13620 } 13621 } 13622 if (GESI (tmp_tmp, 0)) { 13623 { 13624 tmp_tmp = SLLSI (tmp_tmp, 1); 13625 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13626 } 13627 } 13628 if (GESI (tmp_tmp, 0)) { 13629 { 13630 tmp_tmp = SLLSI (tmp_tmp, 1); 13631 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13632 } 13633 } 13634 if (GESI (tmp_tmp, 0)) { 13635 { 13636 tmp_tmp = SLLSI (tmp_tmp, 1); 13637 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13638 } 13639 } 13640 if (GESI (tmp_tmp, 0)) { 13641 { 13642 tmp_tmp = SLLSI (tmp_tmp, 1); 13643 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13644 } 13645 } 13646 if (GESI (tmp_tmp, 0)) { 13647 { 13648 tmp_tmp = SLLSI (tmp_tmp, 1); 13649 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13650 } 13651 } 13652 if (GESI (tmp_tmp, 0)) { 13653 { 13654 tmp_tmp = SLLSI (tmp_tmp, 1); 13655 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13656 } 13657 } 13658 if (GESI (tmp_tmp, 0)) { 13659 { 13660 tmp_tmp = SLLSI (tmp_tmp, 1); 13661 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13662 } 13663 } 13664 if (GESI (tmp_tmp, 0)) { 13665 { 13666 tmp_tmp = SLLSI (tmp_tmp, 1); 13667 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13668 } 13669 } 13670 if (GESI (tmp_tmp, 0)) { 13671 { 13672 tmp_tmp = SLLSI (tmp_tmp, 1); 13673 tmp_tmpd = ADDSI (tmp_tmpd, 1); 13674 } 13675 } 13676 } 13677 { 13678 SI opval = tmp_tmpd; 13679 SET_H_GR (FLD (f_operand2), opval); 13680 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 13681 } 13682 { 13683 { 13684 BI opval = LTSI (tmp_tmpd, 0); 13685 CPU (h_nbit) = opval; 13686 CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); 13687 } 13688 { 13689 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))); 13690 CPU (h_zbit) = opval; 13691 CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); 13692 } 13693 SET_H_CBIT_MOVE (0); 13694 SET_H_VBIT_MOVE (0); 13695 { 13696 { 13697 BI opval = 0; 13698 CPU (h_xbit) = opval; 13699 CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval); 13700 } 13701 { 13702 BI opval = 0; 13703 SET_H_INSN_PREFIXED_P (opval); 13704 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13705 } 13706 } 13707 } 13708 } 13709 13710 #undef FLD 13711 } 13712 NEXT (vpc); 13713 13714 CASE (sem, INSN_ADDOQ) : /* addoq $o,$Rs,ACR */ 13715 { 13716 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13717 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13718 #define FLD(f) abuf->fields.sfmt_addoq.f 13719 int UNUSED written = 0; 13720 IADDR UNUSED pc = abuf->addr; 13721 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13722 13723 { 13724 { 13725 SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), FLD (f_s8)); 13726 SET_H_PREFIXREG_V32 (opval); 13727 CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 13728 } 13729 { 13730 BI opval = 1; 13731 SET_H_INSN_PREFIXED_P (opval); 13732 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13733 } 13734 } 13735 13736 #undef FLD 13737 } 13738 NEXT (vpc); 13739 13740 CASE (sem, INSN_ADDO_M_B_M) : /* addo-m.b [${Rs}${inc}],$Rd,ACR */ 13741 { 13742 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13743 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13744 #define FLD(f) abuf->fields.sfmt_addc_m.f 13745 int UNUSED written = 0; 13746 IADDR UNUSED pc = abuf->addr; 13747 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13748 13749 { 13750 QI tmp_tmps; 13751 tmp_tmps = ({ SI tmp_addr; 13752 QI tmp_tmp_mem; 13753 BI tmp_postinc; 13754 tmp_postinc = FLD (f_memmode); 13755 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 13756 ; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr); 13757 ; if (NEBI (tmp_postinc, 0)) { 13758 { 13759 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 13760 tmp_addr = ADDSI (tmp_addr, 1); 13761 } 13762 { 13763 SI opval = tmp_addr; 13764 SET_H_GR (FLD (f_operand1), opval); 13765 written |= (1 << 6); 13766 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 13767 } 13768 } 13769 } 13770 ; tmp_tmp_mem; }); 13771 { 13772 SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), EXTQISI (tmp_tmps)); 13773 SET_H_PREFIXREG_V32 (opval); 13774 CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 13775 } 13776 { 13777 BI opval = 1; 13778 SET_H_INSN_PREFIXED_P (opval); 13779 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13780 } 13781 } 13782 13783 abuf->written = written; 13784 #undef FLD 13785 } 13786 NEXT (vpc); 13787 13788 CASE (sem, INSN_ADDO_M_W_M) : /* addo-m.w [${Rs}${inc}],$Rd,ACR */ 13789 { 13790 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13791 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13792 #define FLD(f) abuf->fields.sfmt_addc_m.f 13793 int UNUSED written = 0; 13794 IADDR UNUSED pc = abuf->addr; 13795 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13796 13797 { 13798 HI tmp_tmps; 13799 tmp_tmps = ({ SI tmp_addr; 13800 HI tmp_tmp_mem; 13801 BI tmp_postinc; 13802 tmp_postinc = FLD (f_memmode); 13803 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 13804 ; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr); 13805 ; if (NEBI (tmp_postinc, 0)) { 13806 { 13807 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 13808 tmp_addr = ADDSI (tmp_addr, 2); 13809 } 13810 { 13811 SI opval = tmp_addr; 13812 SET_H_GR (FLD (f_operand1), opval); 13813 written |= (1 << 6); 13814 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 13815 } 13816 } 13817 } 13818 ; tmp_tmp_mem; }); 13819 { 13820 SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), EXTHISI (tmp_tmps)); 13821 SET_H_PREFIXREG_V32 (opval); 13822 CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 13823 } 13824 { 13825 BI opval = 1; 13826 SET_H_INSN_PREFIXED_P (opval); 13827 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13828 } 13829 } 13830 13831 abuf->written = written; 13832 #undef FLD 13833 } 13834 NEXT (vpc); 13835 13836 CASE (sem, INSN_ADDO_M_D_M) : /* addo-m.d [${Rs}${inc}],$Rd,ACR */ 13837 { 13838 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13839 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13840 #define FLD(f) abuf->fields.sfmt_addc_m.f 13841 int UNUSED written = 0; 13842 IADDR UNUSED pc = abuf->addr; 13843 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13844 13845 { 13846 SI tmp_tmps; 13847 tmp_tmps = ({ SI tmp_addr; 13848 SI tmp_tmp_mem; 13849 BI tmp_postinc; 13850 tmp_postinc = FLD (f_memmode); 13851 ; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (GET_H_PREFIXREG_V32 ())); 13852 ; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr); 13853 ; if (NEBI (tmp_postinc, 0)) { 13854 { 13855 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) { 13856 tmp_addr = ADDSI (tmp_addr, 4); 13857 } 13858 { 13859 SI opval = tmp_addr; 13860 SET_H_GR (FLD (f_operand1), opval); 13861 written |= (1 << 6); 13862 CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 13863 } 13864 } 13865 } 13866 ; tmp_tmp_mem; }); 13867 { 13868 SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), tmp_tmps); 13869 SET_H_PREFIXREG_V32 (opval); 13870 CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 13871 } 13872 { 13873 BI opval = 1; 13874 SET_H_INSN_PREFIXED_P (opval); 13875 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13876 } 13877 } 13878 13879 abuf->written = written; 13880 #undef FLD 13881 } 13882 NEXT (vpc); 13883 13884 CASE (sem, INSN_ADDO_CB) : /* addo.b [PC+],$Rd,ACR */ 13885 { 13886 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13887 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13888 #define FLD(f) abuf->fields.sfmt_bound_cb.f 13889 int UNUSED written = 0; 13890 IADDR UNUSED pc = abuf->addr; 13891 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 13892 13893 { 13894 { 13895 SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), EXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte)))); 13896 SET_H_PREFIXREG_V32 (opval); 13897 CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 13898 } 13899 { 13900 BI opval = 1; 13901 SET_H_INSN_PREFIXED_P (opval); 13902 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13903 } 13904 } 13905 13906 #undef FLD 13907 } 13908 NEXT (vpc); 13909 13910 CASE (sem, INSN_ADDO_CW) : /* addo.w [PC+],$Rd,ACR */ 13911 { 13912 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13913 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13914 #define FLD(f) abuf->fields.sfmt_bound_cw.f 13915 int UNUSED written = 0; 13916 IADDR UNUSED pc = abuf->addr; 13917 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 13918 13919 { 13920 { 13921 SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), EXTHISI (TRUNCSIHI (FLD (f_indir_pc__word)))); 13922 SET_H_PREFIXREG_V32 (opval); 13923 CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 13924 } 13925 { 13926 BI opval = 1; 13927 SET_H_INSN_PREFIXED_P (opval); 13928 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13929 } 13930 } 13931 13932 #undef FLD 13933 } 13934 NEXT (vpc); 13935 13936 CASE (sem, INSN_ADDO_CD) : /* addo.d [PC+],$Rd,ACR */ 13937 { 13938 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13939 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13940 #define FLD(f) abuf->fields.sfmt_bound_cd.f 13941 int UNUSED written = 0; 13942 IADDR UNUSED pc = abuf->addr; 13943 vpc = SEM_NEXT_VPC (sem_arg, pc, 6); 13944 13945 { 13946 { 13947 SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__dword)); 13948 SET_H_PREFIXREG_V32 (opval); 13949 CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 13950 } 13951 { 13952 BI opval = 1; 13953 SET_H_INSN_PREFIXED_P (opval); 13954 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13955 } 13956 } 13957 13958 #undef FLD 13959 } 13960 NEXT (vpc); 13961 13962 CASE (sem, INSN_ADDI_ACR_B_R) : /* addi-acr.b ${Rs-dfield}.m,${Rd-sfield},ACR */ 13963 { 13964 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13965 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13966 #define FLD(f) abuf->fields.sfmt_muls_b.f 13967 int UNUSED written = 0; 13968 IADDR UNUSED pc = abuf->addr; 13969 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13970 13971 { 13972 { 13973 SI opval = ADDSI (GET_H_GR (FLD (f_operand1)), MULSI (GET_H_GR (FLD (f_operand2)), 1)); 13974 SET_H_PREFIXREG_V32 (opval); 13975 CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 13976 } 13977 { 13978 BI opval = 1; 13979 SET_H_INSN_PREFIXED_P (opval); 13980 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 13981 } 13982 } 13983 13984 #undef FLD 13985 } 13986 NEXT (vpc); 13987 13988 CASE (sem, INSN_ADDI_ACR_W_R) : /* addi-acr.w ${Rs-dfield}.m,${Rd-sfield},ACR */ 13989 { 13990 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 13991 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 13992 #define FLD(f) abuf->fields.sfmt_muls_b.f 13993 int UNUSED written = 0; 13994 IADDR UNUSED pc = abuf->addr; 13995 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 13996 13997 { 13998 { 13999 SI opval = ADDSI (GET_H_GR (FLD (f_operand1)), MULSI (GET_H_GR (FLD (f_operand2)), 2)); 14000 SET_H_PREFIXREG_V32 (opval); 14001 CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 14002 } 14003 { 14004 BI opval = 1; 14005 SET_H_INSN_PREFIXED_P (opval); 14006 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 14007 } 14008 } 14009 14010 #undef FLD 14011 } 14012 NEXT (vpc); 14013 14014 CASE (sem, INSN_ADDI_ACR_D_R) : /* addi-acr.d ${Rs-dfield}.m,${Rd-sfield},ACR */ 14015 { 14016 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 14017 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 14018 #define FLD(f) abuf->fields.sfmt_muls_b.f 14019 int UNUSED written = 0; 14020 IADDR UNUSED pc = abuf->addr; 14021 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 14022 14023 { 14024 { 14025 SI opval = ADDSI (GET_H_GR (FLD (f_operand1)), MULSI (GET_H_GR (FLD (f_operand2)), 4)); 14026 SET_H_PREFIXREG_V32 (opval); 14027 CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval); 14028 } 14029 { 14030 BI opval = 1; 14031 SET_H_INSN_PREFIXED_P (opval); 14032 CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval); 14033 } 14034 } 14035 14036 #undef FLD 14037 } 14038 NEXT (vpc); 14039 14040 CASE (sem, INSN_FIDXI) : /* fidxi [$Rs] */ 14041 { 14042 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 14043 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 14044 #define FLD(f) abuf->fields.sfmt_mcp.f 14045 int UNUSED written = 0; 14046 IADDR UNUSED pc = abuf->addr; 14047 SEM_BRANCH_INIT 14048 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 14049 14050 { 14051 USI opval = crisv32f_fidxi_handler (current_cpu, pc, GET_H_GR (FLD (f_operand1))); 14052 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 14053 CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 14054 } 14055 14056 SEM_BRANCH_FINI (vpc); 14057 #undef FLD 14058 } 14059 NEXT (vpc); 14060 14061 CASE (sem, INSN_FTAGI) : /* fidxi [$Rs] */ 14062 { 14063 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 14064 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 14065 #define FLD(f) abuf->fields.sfmt_mcp.f 14066 int UNUSED written = 0; 14067 IADDR UNUSED pc = abuf->addr; 14068 SEM_BRANCH_INIT 14069 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 14070 14071 { 14072 USI opval = crisv32f_ftagi_handler (current_cpu, pc, GET_H_GR (FLD (f_operand1))); 14073 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 14074 CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 14075 } 14076 14077 SEM_BRANCH_FINI (vpc); 14078 #undef FLD 14079 } 14080 NEXT (vpc); 14081 14082 CASE (sem, INSN_FIDXD) : /* fidxd [$Rs] */ 14083 { 14084 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 14085 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 14086 #define FLD(f) abuf->fields.sfmt_mcp.f 14087 int UNUSED written = 0; 14088 IADDR UNUSED pc = abuf->addr; 14089 SEM_BRANCH_INIT 14090 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 14091 14092 { 14093 USI opval = crisv32f_fidxd_handler (current_cpu, pc, GET_H_GR (FLD (f_operand1))); 14094 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 14095 CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 14096 } 14097 14098 SEM_BRANCH_FINI (vpc); 14099 #undef FLD 14100 } 14101 NEXT (vpc); 14102 14103 CASE (sem, INSN_FTAGD) : /* ftagd [$Rs] */ 14104 { 14105 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 14106 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 14107 #define FLD(f) abuf->fields.sfmt_mcp.f 14108 int UNUSED written = 0; 14109 IADDR UNUSED pc = abuf->addr; 14110 SEM_BRANCH_INIT 14111 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 14112 14113 { 14114 USI opval = crisv32f_ftagd_handler (current_cpu, pc, GET_H_GR (FLD (f_operand1))); 14115 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 14116 CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 14117 } 14118 14119 SEM_BRANCH_FINI (vpc); 14120 #undef FLD 14121 } 14122 NEXT (vpc); 14123 14124 14125 } 14126 ENDSWITCH (sem) /* End of semantic switch. */ 14127 14128 /* At this point `vpc' contains the next insn to execute. */ 14129 } 14130 14131 #undef DEFINE_SWITCH 14132 #endif /* DEFINE_SWITCH */ 14133
Indexes created Tue Apr 28 00:22:25 UTC 2026