1 1.1 christos #mach: crisv10 crisv32 2 1.1 christos #sim(crisv10): --hw-device "/rv/trace? true" 3 1.1 christos #sim(crisv32): --hw-device "/rv/trace? true" 4 1.1 christos #output: /rv: WD\n 5 1.1 christos #output: /rv: REG R 0xd0000032\n 6 1.1 christos #output: /rv: := 0xabcdef01\n 7 1.1 christos #output: /rv: IRQ 0x4\n 8 1.1 christos #output: /rv: REG R 0xd0000036\n 9 1.1 christos #output: /rv: := 0x76543210\n 10 1.1 christos #output: /rv: REG R 0xd0000030\n 11 1.1 christos #output: /rv: IRQ 0x0\n 12 1.1 christos #output: /rv: IRQ 0x8\n 13 1.1 christos #output: /rv: := 0xeeff4455\n 14 1.1 christos #output: /rv: REG R 0xd0000034\n 15 1.1 christos #output: /rv: := 0xdd001122\n 16 1.1 christos #output: /rv: REG R 0xd0000038\n 17 1.1 christos #output: /rv: := 0xaaeeff44\n 18 1.1 christos #output: /rv: REG R 0xd000003c\n 19 1.1 christos #output: /rv: := 0xff445511\n 20 1.1 christos #output: pass\n 21 1.1 christos 22 1.1 christos # Test two successive ints; that flags are disabled when an interrupt 23 1.1 christos # is taken, and then automatically (or by register restore) enabled at 24 1.1 christos # return. 25 1.1 christos 26 1.1 christos #r W, 27 1.1 christos #r r,a8832,abcdef01 28 1.1 christos #r I,4 29 1.1 christos #r r,a8836,76543210 30 1.1 christos #r I,0 31 1.1 christos #r I,8 32 1.1 christos #r r,a8830,eeff4455 33 1.1 christos #r r,a8834,dd001122 34 1.1 christos #r r,a8838,aaeeff44 35 1.1 christos #r r,a883c,ff445511 36 1.1 christos 37 1.1 christos .lcomm dummy,4 38 1.1 christos 39 1.1 christos .include "testutils.inc" 40 1.1 christos start 41 1.1 christos test_h_mem 0xabcdef01 0xd0000032 42 1.1 christos moveq -1,$r4 43 1.1 christos 44 1.1 christos .if ..asm.arch.cris.v32 45 1.1 christos move irqvec1,$ebp 46 1.1 christos .else 47 1.1 christos move irqvec1,$ibr 48 1.1 christos .endif 49 1.1 christos 50 1.1 christos ei 51 1.1 christos test_h_mem 0,dummy 52 1.1 christos 53 1.1 christos ; Here after the first interrupt, or perhaps the second interrupt is 54 1.1 christos ; taken directly; leave it optional. Anyway, the second interrupt 55 1.1 christos ; should be taken no later than this branch. 56 1.1 christos test_h_mem 0,dummy 57 1.1 christos 58 1.1 christos killme: 59 1.1 christos fail 60 1.1 christos 61 1.1 christos irq0x33: 62 1.1 christos .if ..asm.arch.cris.v32 63 1.1 christos ; Nothing needed to save flags - "shift" should happen, and back at rfe. 64 1.1 christos .else 65 1.1 christos ; The missing sim support for interrupt-excluding instructions is matched 66 1.1 christos ; by the flaw that sim doesn't service interrupts in straight code. 67 1.1 christos ; So, we can use a sequence that would work on actual hardware. 68 1.1 christos move $dccr,$r5 69 1.1 christos di 70 1.1 christos .endif 71 1.1 christos 72 1.1 christos test_h_mem 0x76543210 0xd0000036 73 1.1 christos test_h_mem 0xeeff4455 0xd0000030 74 1.1 christos test_h_mem 0xdd001122 0xd0000034 75 1.1 christos moveq -22,$r4 76 1.1 christos 77 1.1 christos .if ..asm.arch.cris.v32 78 1.1 christos move irqvec2,$ebp 79 1.1 christos rete 80 1.1 christos rfe 81 1.1 christos .else 82 1.1 christos move irqvec2,$ibr 83 1.1 christos reti 84 1.1 christos move $r5,$dccr 85 1.1 christos .endif 86 1.1 christos 87 1.1 christos pass 88 1.1 christos 89 1.1 christos irq0x34: 90 1.1 christos test_h_mem 0xaaeeff44 0xd0000038 91 1.1 christos test_h_mem 0xff445511 0xd000003c 92 1.1 christos cmpq -22,$r4 93 1.1 christos bne killme 94 1.1 christos nop 95 1.1 christos pass 96 1.1 christos 97 1.1 christos singlevec irqvec1,0x33,irq0x33 98 1.1 christos 99 1.1 christos singlevec irqvec2,0x34,irq0x34 100
Indexes created Sun Apr 19 00:22:55 UTC 2026