1 1.1 christos # frv testcase for cmqsubhss $FRi,$FRj,$FRj,$CCi,$cond 2 1.1 christos # mach: frv fr500 3 1.1 christos 4 1.1 christos .include "../testutils.inc" 5 1.1 christos 6 1.1 christos start 7 1.1 christos 8 1.1 christos .global msubhss 9 1.1 christos msubhss: 10 1.1 christos set_spr_immed 0x1b1b,cccr 11 1.1 christos 12 1.1 christos set_fr_iimmed 0x0000,0x0000,fr10 13 1.1 christos set_fr_iimmed 0xdead,0x0000,fr11 14 1.1 christos set_fr_iimmed 0x0000,0x0000,fr12 15 1.1 christos set_fr_iimmed 0x0000,0xbeef,fr13 16 1.1 christos cmqsubhss fr10,fr12,fr14,cc0,1 17 1.1 christos test_fr_limmed 0x0000,0x0000,fr14 18 1.1 christos test_fr_limmed 0xdead,0x4111,fr15 19 1.1 christos test_spr_bits 0x3c,2,0,msr0 ; msr0.sie is clear 20 1.1 christos test_spr_bits 2,1,0,msr0 ; msr0.ovf not set 21 1.1 christos test_spr_bits 1,0,0,msr0 ; msr0.aovf not set 22 1.1 christos test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt not set 23 1.1 christos 24 1.1 christos set_fr_iimmed 0x0000,0xdead,fr10 25 1.1 christos set_fr_iimmed 0x1234,0x5678,fr11 26 1.1 christos set_fr_iimmed 0xbeef,0x0000,fr12 27 1.1 christos set_fr_iimmed 0x1111,0x1111,fr13 28 1.1 christos cmqsubhss fr10,fr12,fr14,cc0,1 29 1.1 christos test_fr_limmed 0x4111,0xdead,fr14 30 1.1 christos test_fr_limmed 0x0123,0x4567,fr15 31 1.1 christos test_spr_bits 0x3c,2,0,msr0 ; msr0.sie is clear 32 1.1 christos test_spr_bits 2,1,0,msr0 ; msr0.ovf not set 33 1.1 christos test_spr_bits 1,0,0,msr0 ; msr0.aovf not set 34 1.1 christos test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt not set 35 1.1 christos 36 1.1 christos set_spr_immed 0,msr0 37 1.1 christos set_fr_iimmed 0x1234,0x5678,fr10 38 1.1 christos set_fr_iimmed 0x7ffe,0x7ffe,fr11 39 1.1 christos set_fr_iimmed 0xffff,0xffff,fr12 40 1.1 christos set_fr_iimmed 0xfffe,0xffff,fr13 41 1.1 christos cmqsubhss fr10,fr12,fr14,cc0,1 42 1.1 christos test_fr_limmed 0x1235,0x5679,fr14 43 1.1 christos test_fr_limmed 0x7fff,0x7fff,fr15 44 1.1 christos test_spr_bits 0x3c,2,0x2,msr0 ; msr0.sie is set 45 1.1 christos test_spr_bits 2,1,1,msr0 ; msr0.ovf set 46 1.1 christos test_spr_bits 1,0,1,msr0 ; msr0.aovf set 47 1.1 christos test_spr_bits 0x7000,12,1,msr0 ; msr0.mtt set 48 1.1 christos 49 1.1 christos set_spr_immed 0,msr0 50 1.1 christos set_fr_iimmed 0x8001,0x8001,fr10 51 1.1 christos set_fr_iimmed 0x8001,0x8001,fr11 52 1.1 christos set_fr_iimmed 0x0001,0x0002,fr12 53 1.1 christos set_fr_iimmed 0x0002,0x0001,fr13 54 1.1 christos cmqsubhss fr10,fr12,fr14,cc4,1 55 1.1 christos test_fr_limmed 0x8000,0x8000,fr14 56 1.1 christos test_fr_limmed 0x8000,0x8000,fr15 57 1.1 christos test_spr_bits 0x3c,2,0x6,msr0 ; msr0.sie is set 58 1.1 christos test_spr_bits 2,1,1,msr0 ; msr0.ovf set 59 1.1 christos test_spr_bits 1,0,1,msr0 ; msr0.aovf set 60 1.1 christos test_spr_bits 0x7000,12,1,msr0 ; msr0.mtt set 61 1.1 christos 62 1.1 christos set_spr_immed 0,msr0 63 1.1 christos set_spr_immed 0,msr1 64 1.1 christos set_fr_iimmed 0x0001,0x0001,fr10 65 1.1 christos set_fr_iimmed 0xffff,0xffff,fr11 66 1.1 christos set_fr_iimmed 0x8000,0x8000,fr12 67 1.1 christos set_fr_iimmed 0x8000,0x8000,fr13 68 1.1 christos cmqsubhss.p fr10,fr10,fr14,cc4,1 69 1.1 christos cmqsubhss fr12,fr10,fr16,cc4,1 70 1.1 christos test_fr_limmed 0x0000,0x0000,fr14 71 1.1 christos test_fr_limmed 0x0000,0x0000,fr15 72 1.1 christos test_fr_limmed 0x8000,0x8000,fr16 73 1.1 christos test_fr_limmed 0x8001,0x8001,fr17 74 1.1 christos test_spr_bits 0x3c,2,0,msr0 ; msr0.sie is clear 75 1.1 christos test_spr_bits 2,1,0,msr0 ; msr0.ovf not set 76 1.1 christos test_spr_bits 0x3c,2,0xc,msr1 ; msr0.sie is set 77 1.1 christos test_spr_bits 2,1,1,msr1 ; msr1.ovf set 78 1.1 christos test_spr_bits 1,0,1,msr0 ; msr0.aovf set 79 1.1 christos test_spr_bits 0x7000,12,1,msr0 ; msr0.mtt set 80 1.1 christos 81 1.1 christos set_spr_immed 0,msr0 82 1.1 christos set_spr_immed 0,msr1 83 1.1 christos set_fr_iimmed 0x0000,0x0000,fr10 84 1.1 christos set_fr_iimmed 0xdead,0x0000,fr11 85 1.1 christos set_fr_iimmed 0x0000,0x0000,fr12 86 1.1 christos set_fr_iimmed 0x0000,0xbeef,fr13 87 1.1 christos cmqsubhss fr10,fr12,fr14,cc1,0 88 1.1 christos test_fr_limmed 0x0000,0x0000,fr14 89 1.1 christos test_fr_limmed 0xdead,0x4111,fr15 90 1.1 christos test_spr_bits 0x3c,2,0,msr0 ; msr0.sie is clear 91 1.1 christos test_spr_bits 2,1,0,msr0 ; msr0.ovf not set 92 1.1 christos test_spr_bits 1,0,0,msr0 ; msr0.aovf not set 93 1.1 christos test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt not set 94 1.1 christos 95 1.1 christos set_fr_iimmed 0x0000,0xdead,fr10 96 1.1 christos set_fr_iimmed 0x1234,0x5678,fr11 97 1.1 christos set_fr_iimmed 0xbeef,0x0000,fr12 98 1.1 christos set_fr_iimmed 0x1111,0x1111,fr13 99 1.1 christos cmqsubhss fr10,fr12,fr14,cc1,0 100 1.1 christos test_fr_limmed 0x4111,0xdead,fr14 101 1.1 christos test_fr_limmed 0x0123,0x4567,fr15 102 1.1 christos test_spr_bits 0x3c,2,0,msr0 ; msr0.sie is clear 103 1.1 christos test_spr_bits 2,1,0,msr0 ; msr0.ovf not set 104 1.1 christos test_spr_bits 1,0,0,msr0 ; msr0.aovf not set 105 1.1 christos test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt not set 106 1.1 christos 107 1.1 christos set_spr_immed 0,msr0 108 1.1 christos set_fr_iimmed 0x1234,0x5678,fr10 109 1.1 christos set_fr_iimmed 0x7ffe,0x7ffe,fr11 110 1.1 christos set_fr_iimmed 0xffff,0xffff,fr12 111 1.1 christos set_fr_iimmed 0xfffe,0xffff,fr13 112 1.1 christos cmqsubhss fr10,fr12,fr14,cc1,0 113 1.1 christos test_fr_limmed 0x1235,0x5679,fr14 114 1.1 christos test_fr_limmed 0x7fff,0x7fff,fr15 115 1.1 christos test_spr_bits 0x3c,2,0x2,msr0 ; msr0.sie is set 116 1.1 christos test_spr_bits 2,1,1,msr0 ; msr0.ovf set 117 1.1 christos test_spr_bits 1,0,1,msr0 ; msr0.aovf set 118 1.1 christos test_spr_bits 0x7000,12,1,msr0 ; msr0.mtt set 119 1.1 christos 120 1.1 christos set_spr_immed 0,msr0 121 1.1 christos set_fr_iimmed 0x8001,0x8001,fr10 122 1.1 christos set_fr_iimmed 0x8001,0x8001,fr11 123 1.1 christos set_fr_iimmed 0x0001,0x0002,fr12 124 1.1 christos set_fr_iimmed 0x0002,0x0001,fr13 125 1.1 christos cmqsubhss fr10,fr12,fr14,cc5,0 126 1.1 christos test_fr_limmed 0x8000,0x8000,fr14 127 1.1 christos test_fr_limmed 0x8000,0x8000,fr15 128 1.1 christos test_spr_bits 0x3c,2,0x6,msr0 ; msr0.sie is set 129 1.1 christos test_spr_bits 2,1,1,msr0 ; msr0.ovf set 130 1.1 christos test_spr_bits 1,0,1,msr0 ; msr0.aovf set 131 1.1 christos test_spr_bits 0x7000,12,1,msr0 ; msr0.mtt set 132 1.1 christos 133 1.1 christos set_spr_immed 0,msr0 134 1.1 christos set_spr_immed 0,msr1 135 1.1 christos set_fr_iimmed 0x0001,0x0001,fr10 136 1.1 christos set_fr_iimmed 0xffff,0xffff,fr11 137 1.1 christos set_fr_iimmed 0x8000,0x8000,fr12 138 1.1 christos set_fr_iimmed 0x8000,0x8000,fr13 139 1.1 christos cmqsubhss.p fr10,fr10,fr14,cc5,0 140 1.1 christos cmqsubhss fr12,fr10,fr16,cc5,0 141 1.1 christos test_fr_limmed 0x0000,0x0000,fr14 142 1.1 christos test_fr_limmed 0x0000,0x0000,fr15 143 1.1 christos test_fr_limmed 0x8000,0x8000,fr16 144 1.1 christos test_fr_limmed 0x8001,0x8001,fr17 145 1.1 christos test_spr_bits 0x3c,2,0,msr0 ; msr0.sie is clear 146 1.1 christos test_spr_bits 2,1,0,msr0 ; msr0.ovf not set 147 1.1 christos test_spr_bits 0x3c,2,0xc,msr1 ; msr0.sie is set 148 1.1 christos test_spr_bits 2,1,1,msr1 ; msr1.ovf set 149 1.1 christos test_spr_bits 1,0,1,msr0 ; msr0.aovf set 150 1.1 christos test_spr_bits 0x7000,12,1,msr0 ; msr0.mtt set 151 1.1 christos 152 1.1 christos set_fr_iimmed 0x1111,0x1111,fr14 153 1.1 christos set_fr_iimmed 0x2222,0x2222,fr15 154 1.1 christos set_spr_immed 0,msr0 155 1.1 christos set_spr_immed 0,msr1 156 1.1 christos set_fr_iimmed 0x0000,0x0000,fr10 157 1.1 christos set_fr_iimmed 0xdead,0x0000,fr11 158 1.1 christos set_fr_iimmed 0x0000,0x0000,fr12 159 1.1 christos set_fr_iimmed 0x0000,0xbeef,fr13 160 1.1 christos cmqsubhss fr10,fr12,fr14,cc0,0 161 1.1 christos test_fr_limmed 0x1111,0x1111,fr14 162 1.1 christos test_fr_limmed 0x2222,0x2222,fr15 163 1.1 christos test_spr_bits 0x3c,2,0,msr0 ; msr0.sie is clear 164 1.1 christos test_spr_bits 2,1,0,msr0 ; msr0.ovf not set 165 1.1 christos test_spr_bits 1,0,0,msr0 ; msr0.aovf not set 166 1.1 christos test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt not set 167 1.1 christos 168 1.1 christos set_fr_iimmed 0x0000,0xdead,fr10 169 1.1 christos set_fr_iimmed 0x1234,0x5678,fr11 170 1.1 christos set_fr_iimmed 0xbeef,0x0000,fr12 171 1.1 christos set_fr_iimmed 0x1111,0x1111,fr13 172 1.1 christos cmqsubhss fr10,fr12,fr14,cc0,0 173 1.1 christos test_fr_limmed 0x1111,0x1111,fr14 174 1.1 christos test_fr_limmed 0x2222,0x2222,fr15 175 1.1 christos test_spr_bits 0x3c,2,0,msr0 ; msr0.sie is clear 176 1.1 christos test_spr_bits 2,1,0,msr0 ; msr0.ovf not set 177 1.1 christos test_spr_bits 1,0,0,msr0 ; msr0.aovf not set 178 1.1 christos test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt not set 179 1.1 christos 180 1.1 christos set_spr_immed 0,msr0 181 1.1 christos set_fr_iimmed 0x1234,0x5678,fr10 182 1.1 christos set_fr_iimmed 0x7ffe,0x7ffe,fr11 183 1.1 christos set_fr_iimmed 0xffff,0xffff,fr12 184 1.1 christos set_fr_iimmed 0xfffe,0xffff,fr13 185 1.1 christos cmqsubhss fr10,fr12,fr14,cc0,0 186 1.1 christos test_fr_limmed 0x1111,0x1111,fr14 187 1.1 christos test_fr_limmed 0x2222,0x2222,fr15 188 1.1 christos test_spr_bits 0x3c,2,0,msr0 ; msr0.sie is clear 189 1.1 christos test_spr_bits 2,1,0,msr0 ; msr0.ovf not set 190 1.1 christos test_spr_bits 1,0,0,msr0 ; msr0.aovf not set 191 1.1 christos test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt not set 192 1.1 christos 193 1.1 christos set_spr_immed 0,msr0 194 1.1 christos set_fr_iimmed 0x8001,0x8001,fr10 195 1.1 christos set_fr_iimmed 0x8001,0x8001,fr11 196 1.1 christos set_fr_iimmed 0x0001,0x0002,fr12 197 1.1 christos set_fr_iimmed 0x0002,0x0001,fr13 198 1.1 christos cmqsubhss fr10,fr12,fr14,cc4,0 199 1.1 christos test_fr_limmed 0x1111,0x1111,fr14 200 1.1 christos test_fr_limmed 0x2222,0x2222,fr15 201 1.1 christos test_spr_bits 0x3c,2,0,msr0 ; msr0.sie is clear 202 1.1 christos test_spr_bits 2,1,0,msr0 ; msr0.ovf not set 203 1.1 christos test_spr_bits 1,0,0,msr0 ; msr0.aovf not set 204 1.1 christos test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt not set 205 1.1 christos 206 1.1 christos set_fr_iimmed 0x3333,0x3333,fr16 207 1.1 christos set_fr_iimmed 0x4444,0x4444,fr17 208 1.1 christos set_spr_immed 0,msr0 209 1.1 christos set_spr_immed 0,msr1 210 1.1 christos set_fr_iimmed 0x0001,0x0001,fr10 211 1.1 christos set_fr_iimmed 0xffff,0xffff,fr11 212 1.1 christos set_fr_iimmed 0x8000,0x8000,fr12 213 1.1 christos set_fr_iimmed 0x8000,0x8000,fr13 214 1.1 christos cmqsubhss.p fr10,fr10,fr14,cc4,0 215 1.1 christos cmqsubhss fr12,fr10,fr16,cc4,0 216 1.1 christos test_fr_limmed 0x1111,0x1111,fr14 217 1.1 christos test_fr_limmed 0x2222,0x2222,fr15 218 1.1 christos test_fr_limmed 0x3333,0x3333,fr16 219 1.1 christos test_fr_limmed 0x4444,0x4444,fr17 220 1.1 christos test_spr_bits 0x3c,2,0,msr0 ; msr0.sie is clear 221 1.1 christos test_spr_bits 2,1,0,msr0 ; msr0.ovf not set 222 1.1 christos test_spr_bits 2,1,0,msr1 ; msr1.ovf not set 223 1.1 christos test_spr_bits 1,0,0,msr0 ; msr0.aovf not set 224 1.1 christos test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt not set 225 1.1 christos 226 1.1 christos set_fr_iimmed 0x1111,0x1111,fr14 227 1.1 christos set_fr_iimmed 0x2222,0x2222,fr15 228 1.1 christos set_spr_immed 0,msr0 229 1.1 christos set_spr_immed 0,msr1 230 1.1 christos set_fr_iimmed 0x0000,0x0000,fr10 231 1.1 christos set_fr_iimmed 0xdead,0x0000,fr11 232 1.1 christos set_fr_iimmed 0x0000,0x0000,fr12 233 1.1 christos set_fr_iimmed 0x0000,0xbeef,fr13 234 1.1 christos cmqsubhss fr10,fr12,fr14,cc1,1 235 1.1 christos test_fr_limmed 0x1111,0x1111,fr14 236 1.1 christos test_fr_limmed 0x2222,0x2222,fr15 237 1.1 christos test_spr_bits 0x3c,2,0,msr0 ; msr0.sie is clear 238 1.1 christos test_spr_bits 2,1,0,msr0 ; msr0.ovf not set 239 1.1 christos test_spr_bits 1,0,0,msr0 ; msr0.aovf not set 240 1.1 christos test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt not set 241 1.1 christos 242 1.1 christos set_fr_iimmed 0x0000,0xdead,fr10 243 1.1 christos set_fr_iimmed 0x1234,0x5678,fr11 244 1.1 christos set_fr_iimmed 0xbeef,0x0000,fr12 245 1.1 christos set_fr_iimmed 0x1111,0x1111,fr13 246 1.1 christos cmqsubhss fr10,fr12,fr14,cc1,1 247 1.1 christos test_fr_limmed 0x1111,0x1111,fr14 248 1.1 christos test_fr_limmed 0x2222,0x2222,fr15 249 1.1 christos test_spr_bits 0x3c,2,0,msr0 ; msr0.sie is clear 250 1.1 christos test_spr_bits 2,1,0,msr0 ; msr0.ovf not set 251 1.1 christos test_spr_bits 1,0,0,msr0 ; msr0.aovf not set 252 1.1 christos test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt not set 253 1.1 christos 254 1.1 christos set_spr_immed 0,msr0 255 1.1 christos set_fr_iimmed 0x1234,0x5678,fr10 256 1.1 christos set_fr_iimmed 0x7ffe,0x7ffe,fr11 257 1.1 christos set_fr_iimmed 0xffff,0xffff,fr12 258 1.1 christos set_fr_iimmed 0xfffe,0xffff,fr13 259 1.1 christos cmqsubhss fr10,fr12,fr14,cc1,1 260 1.1 christos test_fr_limmed 0x1111,0x1111,fr14 261 1.1 christos test_fr_limmed 0x2222,0x2222,fr15 262 1.1 christos test_spr_bits 0x3c,2,0,msr0 ; msr0.sie is clear 263 1.1 christos test_spr_bits 2,1,0,msr0 ; msr0.ovf not set 264 1.1 christos test_spr_bits 1,0,0,msr0 ; msr0.aovf not set 265 1.1 christos test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt not set 266 1.1 christos 267 1.1 christos set_spr_immed 0,msr0 268 1.1 christos set_fr_iimmed 0x8001,0x8001,fr10 269 1.1 christos set_fr_iimmed 0x8001,0x8001,fr11 270 1.1 christos set_fr_iimmed 0x0001,0x0002,fr12 271 1.1 christos set_fr_iimmed 0x0002,0x0001,fr13 272 1.1 christos cmqsubhss fr10,fr12,fr14,cc5,1 273 1.1 christos test_fr_limmed 0x1111,0x1111,fr14 274 1.1 christos test_fr_limmed 0x2222,0x2222,fr15 275 1.1 christos test_spr_bits 0x3c,2,0,msr0 ; msr0.sie is clear 276 1.1 christos test_spr_bits 2,1,0,msr0 ; msr0.ovf not set 277 1.1 christos test_spr_bits 1,0,0,msr0 ; msr0.aovf not set 278 1.1 christos test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt not set 279 1.1 christos 280 1.1 christos set_fr_iimmed 0x3333,0x3333,fr16 281 1.1 christos set_fr_iimmed 0x4444,0x4444,fr17 282 1.1 christos set_spr_immed 0,msr0 283 1.1 christos set_spr_immed 0,msr1 284 1.1 christos set_fr_iimmed 0x0001,0x0001,fr10 285 1.1 christos set_fr_iimmed 0xffff,0xffff,fr11 286 1.1 christos set_fr_iimmed 0x8000,0x8000,fr12 287 1.1 christos set_fr_iimmed 0x8000,0x8000,fr13 288 1.1 christos cmqsubhss.p fr10,fr10,fr14,cc5,1 289 1.1 christos cmqsubhss fr12,fr10,fr16,cc5,1 290 1.1 christos test_fr_limmed 0x1111,0x1111,fr14 291 1.1 christos test_fr_limmed 0x2222,0x2222,fr15 292 1.1 christos test_fr_limmed 0x3333,0x3333,fr16 293 1.1 christos test_fr_limmed 0x4444,0x4444,fr17 294 1.1 christos test_spr_bits 0x3c,2,0,msr0 ; msr0.sie is clear 295 1.1 christos test_spr_bits 2,1,0,msr0 ; msr0.ovf not set 296 1.1 christos test_spr_bits 2,1,0,msr1 ; msr1.ovf not set 297 1.1 christos test_spr_bits 1,0,0,msr0 ; msr0.aovf not set 298 1.1 christos test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt not set 299 1.1 christos 300 1.1 christos set_fr_iimmed 0x1111,0x1111,fr14 301 1.1 christos set_fr_iimmed 0x2222,0x2222,fr15 302 1.1 christos set_spr_immed 0,msr0 303 1.1 christos set_spr_immed 0,msr1 304 1.1 christos set_fr_iimmed 0x0000,0x0000,fr10 305 1.1 christos set_fr_iimmed 0xdead,0x0000,fr11 306 1.1 christos set_fr_iimmed 0x0000,0x0000,fr12 307 1.1 christos set_fr_iimmed 0x0000,0xbeef,fr13 308 1.1 christos cmqsubhss fr10,fr12,fr14,cc2,1 309 1.1 christos test_fr_limmed 0x1111,0x1111,fr14 310 1.1 christos test_fr_limmed 0x2222,0x2222,fr15 311 1.1 christos test_spr_bits 0x3c,2,0,msr0 ; msr0.sie is clear 312 1.1 christos test_spr_bits 2,1,0,msr0 ; msr0.ovf not set 313 1.1 christos test_spr_bits 1,0,0,msr0 ; msr0.aovf not set 314 1.1 christos test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt not set 315 1.1 christos 316 1.1 christos set_fr_iimmed 0x0000,0xdead,fr10 317 1.1 christos set_fr_iimmed 0x1234,0x5678,fr11 318 1.1 christos set_fr_iimmed 0xbeef,0x0000,fr12 319 1.1 christos set_fr_iimmed 0x1111,0x1111,fr13 320 1.1 christos cmqsubhss fr10,fr12,fr14,cc2,0 321 1.1 christos test_fr_limmed 0x1111,0x1111,fr14 322 1.1 christos test_fr_limmed 0x2222,0x2222,fr15 323 1.1 christos test_spr_bits 0x3c,2,0,msr0 ; msr0.sie is clear 324 1.1 christos test_spr_bits 2,1,0,msr0 ; msr0.ovf not set 325 1.1 christos test_spr_bits 1,0,0,msr0 ; msr0.aovf not set 326 1.1 christos test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt not set 327 1.1 christos 328 1.1 christos set_spr_immed 0,msr0 329 1.1 christos set_fr_iimmed 0x1234,0x5678,fr10 330 1.1 christos set_fr_iimmed 0x7ffe,0x7ffe,fr11 331 1.1 christos set_fr_iimmed 0xffff,0xffff,fr12 332 1.1 christos set_fr_iimmed 0xfffe,0xffff,fr13 333 1.1 christos cmqsubhss fr10,fr12,fr14,cc2,1 334 1.1 christos test_fr_limmed 0x1111,0x1111,fr14 335 1.1 christos test_fr_limmed 0x2222,0x2222,fr15 336 1.1 christos test_spr_bits 0x3c,2,0,msr0 ; msr0.sie is clear 337 1.1 christos test_spr_bits 2,1,0,msr0 ; msr0.ovf not set 338 1.1 christos test_spr_bits 1,0,0,msr0 ; msr0.aovf not set 339 1.1 christos test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt not set 340 1.1 christos 341 1.1 christos set_spr_immed 0,msr0 342 1.1 christos set_fr_iimmed 0x8001,0x8001,fr10 343 1.1 christos set_fr_iimmed 0x8001,0x8001,fr11 344 1.1 christos set_fr_iimmed 0x0001,0x0002,fr12 345 1.1 christos set_fr_iimmed 0x0002,0x0001,fr13 346 1.1 christos cmqsubhss fr10,fr12,fr14,cc6,0 347 1.1 christos test_fr_limmed 0x1111,0x1111,fr14 348 1.1 christos test_fr_limmed 0x2222,0x2222,fr15 349 1.1 christos test_spr_bits 0x3c,2,0,msr0 ; msr0.sie is clear 350 1.1 christos test_spr_bits 2,1,0,msr0 ; msr0.ovf not set 351 1.1 christos test_spr_bits 1,0,0,msr0 ; msr0.aovf not set 352 1.1 christos test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt not set 353 1.1 christos 354 1.1 christos set_fr_iimmed 0x3333,0x3333,fr16 355 1.1 christos set_fr_iimmed 0x4444,0x4444,fr17 356 1.1 christos set_spr_immed 0,msr0 357 1.1 christos set_spr_immed 0,msr1 358 1.1 christos set_fr_iimmed 0x0001,0x0001,fr10 359 1.1 christos set_fr_iimmed 0xffff,0xffff,fr11 360 1.1 christos set_fr_iimmed 0x8000,0x8000,fr12 361 1.1 christos set_fr_iimmed 0x8000,0x8000,fr13 362 1.1 christos cmqsubhss.p fr10,fr10,fr14,cc6,1 363 1.1 christos cmqsubhss fr12,fr10,fr16,cc6,0 364 1.1 christos test_fr_limmed 0x1111,0x1111,fr14 365 1.1 christos test_fr_limmed 0x2222,0x2222,fr15 366 1.1 christos test_fr_limmed 0x3333,0x3333,fr16 367 1.1 christos test_fr_limmed 0x4444,0x4444,fr17 368 1.1 christos test_spr_bits 0x3c,2,0,msr0 ; msr0.sie is clear 369 1.1 christos test_spr_bits 2,1,0,msr0 ; msr0.ovf not set 370 1.1 christos test_spr_bits 2,1,0,msr1 ; msr1.ovf not set 371 1.1 christos test_spr_bits 1,0,0,msr0 ; msr0.aovf not set 372 1.1 christos test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt not set 373 1.1 christos 374 1.1 christos set_fr_iimmed 0x1111,0x1111,fr14 375 1.1 christos set_fr_iimmed 0x2222,0x2222,fr15 376 1.1 christos set_spr_immed 0,msr0 377 1.1 christos set_spr_immed 0,msr1 378 1.1 christos set_fr_iimmed 0x0000,0x0000,fr10 379 1.1 christos set_fr_iimmed 0xdead,0x0000,fr11 380 1.1 christos set_fr_iimmed 0x0000,0x0000,fr12 381 1.1 christos set_fr_iimmed 0x0000,0xbeef,fr13 382 1.1 christos cmqsubhss fr10,fr12,fr14,cc3,1 383 1.1 christos test_fr_limmed 0x1111,0x1111,fr14 384 1.1 christos test_fr_limmed 0x2222,0x2222,fr15 385 1.1 christos test_spr_bits 0x3c,2,0,msr0 ; msr0.sie is clear 386 1.1 christos test_spr_bits 2,1,0,msr0 ; msr0.ovf not set 387 1.1 christos test_spr_bits 1,0,0,msr0 ; msr0.aovf not set 388 1.1 christos test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt not set 389 1.1 christos 390 1.1 christos set_fr_iimmed 0x0000,0xdead,fr10 391 1.1 christos set_fr_iimmed 0x1234,0x5678,fr11 392 1.1 christos set_fr_iimmed 0xbeef,0x0000,fr12 393 1.1 christos set_fr_iimmed 0x1111,0x1111,fr13 394 1.1 christos cmqsubhss fr10,fr12,fr14,cc3,0 395 1.1 christos test_fr_limmed 0x1111,0x1111,fr14 396 1.1 christos test_fr_limmed 0x2222,0x2222,fr15 397 1.1 christos test_spr_bits 0x3c,2,0,msr0 ; msr0.sie is clear 398 1.1 christos test_spr_bits 2,1,0,msr0 ; msr0.ovf not set 399 1.1 christos test_spr_bits 1,0,0,msr0 ; msr0.aovf not set 400 1.1 christos test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt not set 401 1.1 christos 402 1.1 christos set_spr_immed 0,msr0 403 1.1 christos set_fr_iimmed 0x1234,0x5678,fr10 404 1.1 christos set_fr_iimmed 0x7ffe,0x7ffe,fr11 405 1.1 christos set_fr_iimmed 0xffff,0xffff,fr12 406 1.1 christos set_fr_iimmed 0xfffe,0xffff,fr13 407 1.1 christos cmqsubhss fr10,fr12,fr14,cc3,1 408 1.1 christos test_fr_limmed 0x1111,0x1111,fr14 409 1.1 christos test_fr_limmed 0x2222,0x2222,fr15 410 1.1 christos test_spr_bits 0x3c,2,0,msr0 ; msr0.sie is clear 411 1.1 christos test_spr_bits 2,1,0,msr0 ; msr0.ovf not set 412 1.1 christos test_spr_bits 1,0,0,msr0 ; msr0.aovf not set 413 1.1 christos test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt not set 414 1.1 christos 415 1.1 christos set_spr_immed 0,msr0 416 1.1 christos set_fr_iimmed 0x8001,0x8001,fr10 417 1.1 christos set_fr_iimmed 0x8001,0x8001,fr11 418 1.1 christos set_fr_iimmed 0x0001,0x0002,fr12 419 1.1 christos set_fr_iimmed 0x0002,0x0001,fr13 420 1.1 christos cmqsubhss fr10,fr12,fr14,cc7,0 421 1.1 christos test_fr_limmed 0x1111,0x1111,fr14 422 1.1 christos test_fr_limmed 0x2222,0x2222,fr15 423 1.1 christos test_spr_bits 0x3c,2,0,msr0 ; msr0.sie is clear 424 1.1 christos test_spr_bits 2,1,0,msr0 ; msr0.ovf not set 425 1.1 christos test_spr_bits 1,0,0,msr0 ; msr0.aovf not set 426 1.1 christos test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt not set 427 1.1 christos 428 1.1 christos set_fr_iimmed 0x3333,0x3333,fr16 429 1.1 christos set_fr_iimmed 0x4444,0x4444,fr17 430 1.1 christos set_spr_immed 0,msr0 431 1.1 christos set_spr_immed 0,msr1 432 1.1 christos set_fr_iimmed 0x0001,0x0001,fr10 433 1.1 christos set_fr_iimmed 0xffff,0xffff,fr11 434 1.1 christos set_fr_iimmed 0x8000,0x8000,fr12 435 1.1 christos set_fr_iimmed 0x8000,0x8000,fr13 436 1.1 christos cmqsubhss.p fr10,fr10,fr14,cc7,1 437 1.1 christos cmqsubhss fr12,fr10,fr16,cc7,0 438 1.1 christos test_fr_limmed 0x1111,0x1111,fr14 439 1.1 christos test_fr_limmed 0x2222,0x2222,fr15 440 1.1 christos test_fr_limmed 0x3333,0x3333,fr16 441 1.1 christos test_fr_limmed 0x4444,0x4444,fr17 442 1.1 christos test_spr_bits 0x3c,2,0,msr0 ; msr0.sie is clear 443 1.1 christos test_spr_bits 2,1,0,msr0 ; msr0.ovf not set 444 1.1 christos test_spr_bits 2,1,0,msr1 ; msr1.ovf not set 445 1.1 christos test_spr_bits 1,0,0,msr0 ; msr0.aovf not set 446 1.1 christos test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt not set 447 1.1 christos 448 1.1 christos pass 449
Indexes created Sat Oct 03 00:25:10 UTC 2026