Home | History | Annotate | Line # | Download | only in powerpc64
rshift.asm revision 1.1
      1  1.1  mrg dnl  PowerPC-64 mpn_rshift -- rp[] = up[] >> cnt
      2  1.1  mrg 
      3  1.1  mrg dnl  Copyright 2003, 2005 Free Software Foundation, Inc.
      4  1.1  mrg 
      5  1.1  mrg dnl  This file is part of the GNU MP Library.
      6  1.1  mrg 
      7  1.1  mrg dnl  The GNU MP Library is free software; you can redistribute it and/or modify
      8  1.1  mrg dnl  it under the terms of the GNU Lesser General Public License as published
      9  1.1  mrg dnl  by the Free Software Foundation; either version 3 of the License, or (at
     10  1.1  mrg dnl  your option) any later version.
     11  1.1  mrg 
     12  1.1  mrg dnl  The GNU MP Library is distributed in the hope that it will be useful, but
     13  1.1  mrg dnl  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
     14  1.1  mrg dnl  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
     15  1.1  mrg dnl  License for more details.
     16  1.1  mrg 
     17  1.1  mrg dnl  You should have received a copy of the GNU Lesser General Public License
     18  1.1  mrg dnl  along with the GNU MP Library.  If not, see http://www.gnu.org/licenses/.
     19  1.1  mrg 
     20  1.1  mrg include(`../config.m4')
     21  1.1  mrg 
     22  1.1  mrg C		cycles/limb
     23  1.1  mrg C POWER3/PPC630:     1.5
     24  1.1  mrg C POWER4/PPC970:     3.0
     25  1.1  mrg 
     26  1.1  mrg C INPUT PARAMETERS
     27  1.1  mrg define(`rp',`r3')
     28  1.1  mrg define(`up',`r4')
     29  1.1  mrg define(`n',`r5')
     30  1.1  mrg define(`cnt',`r6')
     31  1.1  mrg 
     32  1.1  mrg define(`tnc',`r5')
     33  1.1  mrg define(`v0',`r0')
     34  1.1  mrg define(`v1',`r7')
     35  1.1  mrg define(`u0',`r8')
     36  1.1  mrg define(`u1',`r9')
     37  1.1  mrg define(`h0',`r10')
     38  1.1  mrg define(`h1',`r11')
     39  1.1  mrg 
     40  1.1  mrg 
     41  1.1  mrg ASM_START()
     42  1.1  mrg PROLOGUE(mpn_rshift)
     43  1.1  mrg ifdef(`HAVE_ABI_mode32',
     44  1.1  mrg `	rldicl	n, n, 0, 32')	C zero extend n
     45  1.1  mrg 	mtctr	n		C copy n to count register
     46  1.1  mrg 	addi	rp, rp, -16
     47  1.1  mrg 	subfic	tnc, cnt, 64	C reverse shift count
     48  1.1  mrg 
     49  1.1  mrg 	ld	u0, 0(up)
     50  1.1  mrg 	srd	h0, u0, cnt
     51  1.1  mrg 	sld	r12, u0, tnc	C return value
     52  1.1  mrg 	bdz	L(1)		C jump for n = 1
     53  1.1  mrg 
     54  1.1  mrg 	ld	u1, 8(up)
     55  1.1  mrg 	bdz	L(2)		C jump for n = 2
     56  1.1  mrg 
     57  1.1  mrg 	ldu	u0, 16(up)
     58  1.1  mrg 	bdz	L(end)		C jump for n = 3
     59  1.1  mrg 
     60  1.1  mrg L(oop):	sld	v1, u1, tnc
     61  1.1  mrg 	srd	h1, u1, cnt
     62  1.1  mrg 	ld	u1, 8(up)
     63  1.1  mrg 	or	h0, v1, h0
     64  1.1  mrg 	stdu	h0, 16(rp)
     65  1.1  mrg 
     66  1.1  mrg 	bdz	L(exit)
     67  1.1  mrg 
     68  1.1  mrg 	sld	v0, u0, tnc
     69  1.1  mrg 	srd	h0, u0, cnt
     70  1.1  mrg 	ldu	u0, 16(up)
     71  1.1  mrg 	or	h1, v0, h1
     72  1.1  mrg 	std	h1, 8(rp)
     73  1.1  mrg 
     74  1.1  mrg 	bdnz	L(oop)
     75  1.1  mrg 
     76  1.1  mrg L(end):	sld	v1, u1, tnc
     77  1.1  mrg 	srd	h1, u1, cnt
     78  1.1  mrg 	or	h0, v1, h0
     79  1.1  mrg 	stdu	h0, 16(rp)
     80  1.1  mrg 	sld	v0, u0, tnc
     81  1.1  mrg 	srd	h0, u0, cnt
     82  1.1  mrg 	or	h1, v0, h1
     83  1.1  mrg 	std	h1, 8(rp)
     84  1.1  mrg L(1):	std	h0, 16(rp)
     85  1.1  mrg ifdef(`HAVE_ABI_mode32',
     86  1.1  mrg `	srdi	r3, r12, 32
     87  1.1  mrg 	mr	r4, r12
     88  1.1  mrg ',`	mr	r3, r12
     89  1.1  mrg ')
     90  1.1  mrg 	blr
     91  1.1  mrg 
     92  1.1  mrg L(exit):	sld	v0, u0, tnc
     93  1.1  mrg 	srd	h0, u0, cnt
     94  1.1  mrg 	or	h1, v0, h1
     95  1.1  mrg 	std	h1, 8(rp)
     96  1.1  mrg L(2):	sld	v1, u1, tnc
     97  1.1  mrg 	srd	h1, u1, cnt
     98  1.1  mrg 	or	h0, v1, h0
     99  1.1  mrg 	stdu	h0, 16(rp)
    100  1.1  mrg 	std	h1, 8(rp)
    101  1.1  mrg ifdef(`HAVE_ABI_mode32',
    102  1.1  mrg `	srdi	r3, r12, 32
    103  1.1  mrg 	mr	r4, r12
    104  1.1  mrg ',`	mr	r3, r12
    105  1.1  mrg ')
    106  1.1  mrg 	blr
    107  1.1  mrg EPILOGUE()
    108