| Up to higher level directory | |||
| Name | Date | Size | |
|---|---|---|---|
| com-palignr.asm | 27-Sep-2020 | 6.7K | |
| com.asm | 27-Sep-2020 | 4.2K | |
| copyd-palignr.asm | 22-Aug-2017 | 5.6K | |
| copyd.asm | 27-Sep-2020 | 4K | |
| copyi-palignr.asm | 27-Sep-2020 | 6.6K | |
| copyi.asm | 27-Sep-2020 | 4.5K | |
| lshift-movdqu2.asm | 22-Aug-2017 | 4.2K | |
| lshift.asm | 27-Sep-2020 | 4.3K | |
| lshiftc-movdqu2.asm | 22-Aug-2017 | 4.4K | |
| lshiftc.asm | 27-Sep-2020 | 4.6K | |
| README | 22-Aug-2017 | 603 | |
| rshift-movdqu2.asm | 22-Aug-2017 | 4.5K | |
| sec_tabselect.asm | 27-Sep-2020 | 4.7K | |
1 This directory contains code for x86-64 processors with fast 2 implementations of SSE operations, hence the name "fastsse". 3 4 Current processors that might benefit from this code are: 5 6 AMD K10 7 AMD Bulldozer/Piledriver/Steamroller/Excavator 8 Intel Nocona 9 Intel Nehalem/Westmere 10 Intel Sandybridge/Ivybridge 11 Intel Haswell/Broadwell 12 VIA Nano 13 14 Current processors that do not benefit from this code are: 15 16 AMD K8 17 AMD Bobcat 18 Intel Atom 19 20 Intel Conroe/Penryn is a border case; its handling of non-aligned 21 128-bit memory operands is poor. VIA Nano also have poor handling of 22 non-aligned operands. 23