1 # $NetBSD: Makefile,v 1.28.16.2 2020/04/08 14:07:02 martin Exp $ 2 3 # Link the mesa_dri_drivers mega driver. 4 5 .include <bsd.own.mk> 6 7 .if ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "x86_64" || \ 8 ${MACHINE} == "evbarm" 9 10 LIBISMODULE= yes 11 LIBISCXX= yes 12 13 SHLIB_MAJOR= 0 14 15 LIB= mesa_dri_drivers 16 DRIDIR= ${X11USRLIBDIR}/modules/dri 17 DRIDEBUGDIR= ${DEBUGDIR}${X11USRLIBDIR}/modules/dri 18 19 LDFLAGS+= -Wl,--build-id=sha1 20 21 # -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/${MODULE}/server \ 22 23 CPPFLAGS+= \ 24 -I${X11SRCDIR.Mesa}/src/egl/main \ 25 -I${X11SRCDIR.Mesa}/src/egl/drivers/dri \ 26 -I${X11SRCDIR.Mesa}/../src/mesa/drivers/dri/common \ 27 -I${DESTDIR}${X11INCDIR}/libdrm 28 29 .if ${MACHINE_ARCH} == "i386" 30 CPPFLAGS.brw_disk_cache.c+= -march=i586 31 .endif 32 33 #CPPFLAGS+= -D_NETBSD_SOURCE -DPTHREADS 34 35 # We don't actually build this on non-x86/non-evbarm at all, currently. 36 # The following if statements are not effective since we only 37 # get here for x86 and evbarm 38 .if ${MACHINE_ARCH} == "alpha" 39 DRIVERS= r200 radeon 40 .elif ${MACHINE} == "macppc" || ${MACHINE} == "ofppc" 41 DRIVERS= r200 radeon 42 .elif ${MACHINE_ARCH} == "sparc64" || ${MACHINE_ARCH} == "sparc" 43 DRIVERS= r200 radeon 44 .elif ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "x86_64" 45 DRIVERS= i915 i965 r200 radeon 46 .elif ${MACHINE} == "prep" || ${MACHINE} == "bebox" 47 DRIVERS= r200 radeon 48 .elif ${MACHINE} == "evbarm" 49 DRIVERS= r200 radeon 50 .endif 51 52 DRI_SUBDIRS= ${DRIVERS} 53 54 DRI_SOURCES.i915+= \ 55 i830_context.c \ 56 i830_state.c \ 57 i830_texblend.c \ 58 i830_texstate.c \ 59 i830_vtbl.c \ 60 i915_context.c \ 61 i915_debug_fp.c \ 62 i915_fragprog.c \ 63 i915_program.c \ 64 i915_state.c \ 65 i915_texstate.c \ 66 i915_vtbl.c \ 67 i915_tex_layout.c 68 69 I915_INTEL_FILES = \ 70 intel_batchbuffer.c \ 71 intel_blit.c \ 72 intel_buffer_objects.c \ 73 intel_buffers.c \ 74 intel_clear.c \ 75 intel_context.c \ 76 intel_extensions.c \ 77 intel_fbo.c \ 78 intel_mipmap_tree.c \ 79 intel_pixel.c \ 80 intel_pixel_bitmap.c \ 81 intel_pixel_copy.c \ 82 intel_pixel_draw.c \ 83 intel_pixel_read.c \ 84 intel_regions.c \ 85 intel_render.c \ 86 intel_screen.c \ 87 intel_state.c \ 88 intel_syncobj.c \ 89 intel_tex.c \ 90 intel_tex_copy.c \ 91 intel_tex_image.c \ 92 intel_tex_layout.c \ 93 intel_tex_subimage.c \ 94 intel_tex_validate.c \ 95 intel_tris.c 96 97 .for _f in ${I915_INTEL_FILES} 98 BUILDSYMLINKS+= ${X11SRCDIR.Mesa}/src/mesa/drivers/dri/i915/${_f} i915_${_f} 99 DRI_SOURCES.i915+= i915_${_f} 100 CPPFLAGS.i915_${_f}+= -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/i915 101 .endfor 102 103 .PATH: ${X11SRCDIR.Mesa}/src/intel/blorp 104 .PATH: ${X11SRCDIR.Mesa}/src/intel/common 105 .PATH: ${X11SRCDIR.Mesa}/src/intel/compiler 106 .PATH: ${X11SRCDIR.Mesa}/src/intel/dev 107 .PATH: ${X11SRCDIR.Mesa}/src/intel/isl 108 109 110 DRI_SOURCES.i965+= \ 111 blorp.c \ 112 blorp_blit.c \ 113 blorp_clear.c \ 114 gen_batch_decoder.c \ 115 gen_debug.c \ 116 gen_decoder.c \ 117 gen_device_info.c \ 118 gen_disasm.c \ 119 gen_urb_config.c \ 120 gen_l3_config.c \ 121 intel_log.c \ 122 brw_binding_tables.c \ 123 brw_blorp.c \ 124 brw_bufmgr.c \ 125 brw_cfg.cpp \ 126 brw_clear.c \ 127 brw_clip.c \ 128 brw_clip_line.c \ 129 brw_clip_point.c \ 130 brw_clip_tri.c \ 131 brw_clip_unfilled.c \ 132 brw_clip_util.c \ 133 brw_compile_clip.c \ 134 brw_compile_sf.c \ 135 brw_compiler.c \ 136 brw_compute.c \ 137 brw_conditional_render.c \ 138 brw_context.c \ 139 brw_cs.c \ 140 brw_curbe.c \ 141 brw_dead_control_flow.cpp \ 142 brw_disasm.c \ 143 brw_disasm_info.c \ 144 brw_disk_cache.c \ 145 brw_draw.c \ 146 brw_draw_upload.c \ 147 brw_eu.c \ 148 brw_eu_compact.c \ 149 brw_oa_metrics.c \ 150 brw_eu_emit.c \ 151 brw_eu_util.c \ 152 brw_eu_validate.c \ 153 brw_ff_gs.c \ 154 brw_ff_gs_emit.c \ 155 brw_formatquery.c \ 156 brw_fs.cpp \ 157 brw_fs_bank_conflicts.cpp \ 158 brw_fs_cmod_propagation.cpp \ 159 brw_fs_combine_constants.cpp \ 160 brw_fs_copy_propagation.cpp \ 161 brw_fs_cse.cpp \ 162 brw_fs_dead_code_eliminate.cpp \ 163 brw_fs_generator.cpp \ 164 brw_fs_live_variables.cpp \ 165 brw_fs_lower_conversions.cpp \ 166 brw_fs_lower_pack.cpp \ 167 brw_fs_nir.cpp \ 168 brw_fs_reg_allocate.cpp \ 169 brw_fs_register_coalesce.cpp \ 170 brw_fs_saturate_propagation.cpp \ 171 brw_fs_sel_peephole.cpp \ 172 brw_fs_surface_builder.cpp \ 173 brw_fs_validate.cpp \ 174 brw_fs_visitor.cpp \ 175 brw_generate_mipmap.c \ 176 brw_gs.c \ 177 brw_gs_surface_state.c \ 178 brw_interpolation_map.c \ 179 brw_link.cpp \ 180 brw_meta_util.c \ 181 brw_misc_state.c \ 182 brw_nir.c \ 183 brw_nir_analyze_boolean_resolves.c \ 184 brw_nir_analyze_ubo_ranges.c \ 185 brw_nir_trig_workarounds.c \ 186 brw_nir_attribute_workarounds.c \ 187 brw_nir_lower_cs_intrinsics.c \ 188 brw_nir_lower_image_load_store.c \ 189 brw_nir_opt_peephole_ffma.c \ 190 brw_nir_tcs_workarounds.c \ 191 brw_nir_uniforms.cpp \ 192 brw_object_purgeable.c \ 193 brw_packed_float.c \ 194 brw_performance_query.c \ 195 brw_performance_query_mdapi.c \ 196 brw_pipe_control.c \ 197 brw_predicated_break.cpp \ 198 brw_primitive_restart.c \ 199 brw_program.c \ 200 brw_program_binary.c \ 201 brw_program_cache.c \ 202 brw_queryobj.c \ 203 brw_reg_type.c \ 204 brw_reset.c \ 205 brw_schedule_instructions.cpp \ 206 brw_sf.c \ 207 brw_shader.cpp \ 208 brw_state_upload.c \ 209 brw_surface_formats.c \ 210 brw_sync.c \ 211 brw_tcs.c \ 212 brw_tcs_surface_state.c \ 213 brw_tes.c \ 214 brw_tes_surface_state.c \ 215 brw_urb.c \ 216 brw_util.c \ 217 brw_vec4.cpp \ 218 brw_vec4_cmod_propagation.cpp \ 219 brw_vec4_copy_propagation.cpp \ 220 brw_vec4_cse.cpp \ 221 brw_vec4_dead_code_eliminate.cpp \ 222 brw_vec4_generator.cpp \ 223 brw_vec4_gs_nir.cpp \ 224 brw_vec4_gs_visitor.cpp \ 225 brw_vec4_live_variables.cpp \ 226 brw_vec4_nir.cpp \ 227 brw_vec4_reg_allocate.cpp \ 228 brw_vec4_surface_builder.cpp \ 229 brw_vec4_tcs.cpp \ 230 brw_vec4_tes.cpp \ 231 brw_vec4_visitor.cpp \ 232 brw_vec4_vs_visitor.cpp \ 233 brw_vs.c \ 234 brw_vs_surface_state.c \ 235 brw_vue_map.c \ 236 brw_wm.c \ 237 brw_wm_iz.cpp \ 238 brw_wm_surface_state.c \ 239 gen6_clip_state.c \ 240 gen6_constant_state.c \ 241 gen6_gs_visitor.cpp \ 242 gen6_multisample_state.c \ 243 gen6_queryobj.c \ 244 gen6_sampler_state.c \ 245 gen6_sol.c \ 246 gen6_urb.c \ 247 gen7_l3_state.c \ 248 gen7_sol_state.c \ 249 gen7_urb.c \ 250 gen8_depth_state.c \ 251 gen8_multisample_state.c \ 252 hsw_queryobj.c \ 253 hsw_sol.c \ 254 isl.c \ 255 isl_drm.c \ 256 isl_format.c \ 257 isl_format_layout.c \ 258 isl_gen4.c \ 259 isl_gen6.c \ 260 isl_gen7.c \ 261 isl_gen8.c \ 262 isl_gen9.c \ 263 isl_storage_image.c 264 265 I965_INTEL_FILES = \ 266 intel_batchbuffer.c \ 267 intel_blit.c \ 268 intel_buffer_objects.c \ 269 intel_buffers.c \ 270 intel_copy_image.c \ 271 intel_extensions.c \ 272 intel_fbo.c \ 273 intel_mipmap_tree.c \ 274 intel_pixel.c \ 275 intel_pixel_bitmap.c \ 276 intel_pixel_copy.c \ 277 intel_pixel_draw.c \ 278 intel_pixel_read.c \ 279 intel_screen.c \ 280 intel_state.c \ 281 intel_tex.c \ 282 intel_tex_copy.c \ 283 intel_tex_image.c \ 284 intel_tex_validate.c \ 285 intel_tiled_memcpy.c \ 286 intel_tiled_memcpy_normal.c \ 287 intel_tiled_memcpy_sse41.c \ 288 intel_upload.c 289 290 CPPFLAGS.i965_intel_tiled_memcpy.c+= -msse4.1 291 CPPFLAGS.i965_intel_tiled_memcpy_sse41.c+= -msse4.1 292 293 INTEL_GENS_BLORP= 40 45 50 60 70 75 80 90 100 110 294 295 .for _gen in ${INTEL_GENS_BLORP} 296 BUILDSYMLINKS+= ${X11SRCDIR.Mesa}/src/mesa/drivers/dri/i965/genX_state_upload.c ${_gen}_state_upload.c 297 BUILDSYMLINKS+= ${X11SRCDIR.Mesa}/src/mesa/drivers/dri/i965/genX_blorp_exec.c ${_gen}_blorp_exec.c 298 DRI_SOURCES.i965+= ${_gen}_state_upload.c ${_gen}_blorp_exec.c 299 300 CPPFLAGS.${_gen}_state_upload.c+= -DGEN_VERSIONx10=${_gen} 301 CPPFLAGS.${_gen}_blorp_exec.c+= -DGEN_VERSIONx10=${_gen} 302 .endfor 303 304 INTEL_GENS_ISL= 40 50 60 70 75 80 90 100 110 305 306 .for _gen in ${INTEL_GENS_ISL} 307 BUILDSYMLINKS+= ${X11SRCDIR.Mesa}/src/intel/isl/isl_emit_depth_stencil.c ${_gen}_isl_emit_depth_stencil.c 308 BUILDSYMLINKS+= ${X11SRCDIR.Mesa}/src/intel/isl/isl_surface_state.c ${_gen}_isl_surface_state.c 309 DRI_SOURCES.i965+= ${_gen}_isl_emit_depth_stencil.c ${_gen}_isl_surface_state.c 310 311 CPPFLAGS.${_gen}_isl_emit_depth_stencil.c+= -DGEN_VERSIONx10=${_gen} -I${X11SRCDIR.Mesa}/src/intel/isl/ 312 CPPFLAGS.${_gen}_isl_surface_state.c+= -DGEN_VERSIONx10=${_gen} -I${X11SRCDIR.Mesa}/src/intel/isl/ 313 .endfor 314 315 .for _f in ${I965_INTEL_FILES} 316 BUILDSYMLINKS+= ${X11SRCDIR.Mesa}/src/mesa/drivers/dri/i965/${_f} i965_${_f} 317 DRI_SOURCES.i965+= i965_${_f} 318 .endfor 319 320 .for _f in ${DRI_SOURCES.i965} 321 CPPFLAGS.${_f} += -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/i965 \ 322 -I${X11SRCDIR.Mesa}/src/intel \ 323 -I${X11SRCDIR.Mesa}/src/compiler/nir 324 .endfor 325 326 # Needs mfence 327 CPPFLAGS.brw_bufmgr.c+= -msse2 328 329 DRI_SOURCES.r200 = \ 330 r200_context.c \ 331 r200_ioctl.c \ 332 r200_state.c \ 333 r200_state_init.c \ 334 r200_cmdbuf.c \ 335 r200_tex.c \ 336 r200_texstate.c \ 337 r200_tcl.c \ 338 r200_swtcl.c \ 339 r200_maos.c \ 340 r200_sanity.c \ 341 r200_fragshader.c \ 342 r200_vertprog.c \ 343 r200_blit.c 344 345 R200_RADEON_FILES= \ 346 radeon_buffer_objects.c \ 347 radeon_common_context.c \ 348 radeon_common.c \ 349 radeon_dma.c \ 350 radeon_debug.c \ 351 radeon_fbo.c \ 352 radeon_fog.c \ 353 radeon_mipmap_tree.c \ 354 radeon_pixel_read.c \ 355 radeon_queryobj.c \ 356 radeon_span.c \ 357 radeon_texture.c \ 358 radeon_tex_copy.c \ 359 radeon_tile.c \ 360 radeon_screen.c 361 362 .for _f in ${R200_RADEON_FILES} 363 BUILDSYMLINKS+= ${X11SRCDIR.Mesa}/src/mesa/drivers/dri/radeon/${_f} r200_${_f} 364 DRI_SOURCES.r200+= r200_${_f} 365 .endfor 366 367 .for _f in ${DRI_SOURCES.r200} 368 CPPFLAGS.${_f} += -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/r200/server \ 369 -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/r200 \ 370 -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/radeon/server \ 371 -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/radeon \ 372 -DRADEON_R200 373 .endfor 374 375 DRI_SOURCES.radeon = \ 376 radeon_buffer_objects.c \ 377 radeon_common_context.c \ 378 radeon_common.c \ 379 radeon_dma.c \ 380 radeon_debug.c \ 381 radeon_fbo.c \ 382 radeon_fog.c \ 383 radeon_mipmap_tree.c \ 384 radeon_pixel_read.c \ 385 radeon_queryobj.c \ 386 radeon_span.c \ 387 radeon_texture.c \ 388 radeon_tex_copy.c \ 389 radeon_tile.c \ 390 radeon_context.c \ 391 radeon_ioctl.c \ 392 radeon_screen.c \ 393 radeon_state.c \ 394 radeon_state_init.c \ 395 radeon_tex.c \ 396 radeon_texstate.c \ 397 radeon_tcl.c \ 398 radeon_swtcl.c \ 399 radeon_maos.c \ 400 radeon_sanity.c \ 401 radeon_blit.c 402 403 .for _f in ${DRI_SOURCES.radeon} 404 CPPFLAGS.${_f} += -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/radeon/server \ 405 -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/radeon \ 406 -DRADEON_R100 407 .endfor 408 409 .for _d in ${DRI_SUBDIRS} 410 SRCS+= ${DRI_SOURCES.${_d}} 411 .PATH: ${X11SRCDIR.Mesa}/src/mesa/drivers/dri/${_d} 412 .endfor 413 414 415 LIBDPLIBS+= expat ${NETBSDSRCDIR}/external/mit/expat/lib/libexpat 416 LIBDPLIBS+= m ${NETBSDSRCDIR}/lib/libm 417 LIBDPLIBS+= pthread ${NETBSDSRCDIR}/lib/libpthread 418 LIBDPLIBS+= glapi ${.CURDIR}/../libglapi 419 LIBDPLIBS+= drm ${.CURDIR}/../libdrm 420 .if ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "x86_64" 421 LIBDPLIBS+= drm_intel ${.CURDIR}/../libdrm_intel 422 .endif 423 LIBDPLIBS+= drm_radeon ${.CURDIR}/../libdrm_radeon 424 425 MESA_SRC_MODULES= main math math_xform vbo tnl swrast ss common asm_c program asm_s 426 .include "../libmesa.mk" 427 .include "../libglsl.mk" 428 429 .if ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "x86_64" 430 SRCS+= streaming-load-memcpy.c 431 CPPFLAGS.streaming-load-memcpy.c+= -msse4.1 432 .endif 433 434 CFLAGS+= ${${ACTIVE_CC} == "clang":? -Wno-error=atomic-alignment :} 435 436 .include "../driver.mk" 437 438 .for _d in ${DRIVERS} 439 SYMLINKS+= mesa_dri_drivers.so.${SHLIB_MAJOR} ${DRIDIR}/${_d}_dri.so.${SHLIB_MAJOR} 440 SYMLINKS+= ${_d}_dri.so.${SHLIB_MAJOR} ${DRIDIR}/${_d}_dri.so 441 .if ${MKDEBUG} != "no" 442 SYMLINKS+= mesa_dri_drivers.so.${SHLIB_MAJOR}.debug ${DRIDEBUGDIR}/${_d}_dri.so.${SHLIB_MAJOR}.debug 443 .endif 444 .endfor 445 446 .endif 447 448 PKGCONFIG= dri 449 PKGDIST.dri= ${X11SRCDIR.Mesa}/src/mesa/drivers/dri 450 .include "${.CURDIR}/../libGL/mesa-ver.mk" 451 PKGCONFIG_VERSION.dri= ${MESA_VER} 452 453 # XXX remove these from bsd.x11.mk 454 PKGCONFIG_SED_FLAGS= \ 455 -e "s,@DRI_DRIVER_INSTALL_DIR@,${X11USRLIBDIR}/modules/dri,; \ 456 s,@DRI_PC_REQ_PRIV@,," 457 458 .PATH: ${X11SRCDIR.Mesa}/src/util 459 460 FILESDIR= /etc 461 BUILDSYMLINKS+= 00-mesa-defaults.conf drirc 462 FILES= drirc 463 464 .PATH: ${X11SRCDIR.Mesa}/src/mesa/drivers/dri/common 465 466 .include <bsd.x11.mk> 467 .if ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "x86_64" || \ 468 ${MACHINE} == "evbarm" 469 LIBDIR= ${X11USRLIBDIR}/modules/dri 470 471 CWARNFLAGS.clang+= -Wno-error=initializer-overrides -Wno-error=switch \ 472 -Wno-error=tautological-constant-out-of-range-compare \ 473 -Wno-error=enum-conversion 474 475 COPTS+= -Wno-error=stack-protector 476 477 .include <bsd.lib.mk> 478 .else 479 .include <bsd.inc.mk> 480 .endif 481 # Don't re-build .c files when .y files change 482 .y.c: 483