Makefile revision 1.37
1 # $NetBSD: Makefile,v 1.37 2021/04/13 04:58:59 mrg Exp $ 2 3 # Link the mesa_dri_drivers mega driver. 4 5 .include <bsd.own.mk> 6 7 .if ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "x86_64" || \ 8 ${MACHINE} == "evbarm" 9 10 LIBISMODULE= yes 11 LIBISCXX= yes 12 13 SHLIB_MAJOR= 0 14 15 LIB= mesa_dri_drivers 16 DRIDIR= ${X11USRLIBDIR}/modules/dri 17 DRIDEBUGDIR= ${DEBUGDIR}${X11USRLIBDIR}/modules/dri 18 19 LDFLAGS+= -Wl,--build-id=sha1 20 21 # -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/${MODULE}/server \ 22 23 CPPFLAGS+= \ 24 -I${X11SRCDIR.Mesa}/src/egl/main \ 25 -I${X11SRCDIR.Mesa}/src/egl/drivers/dri \ 26 -I${X11SRCDIR.Mesa}/../src/mesa/drivers/dri/common \ 27 -I${DESTDIR}${X11INCDIR}/libdrm \ 28 -I${X11SRCDIR.Mesa}/../src/util 29 30 .if ${MACHINE_ARCH} == "i386" 31 CPPFLAGS.brw_disk_cache.c+= -march=i586 32 .endif 33 34 #CPPFLAGS+= -D_NETBSD_SOURCE -DPTHREADS 35 36 # We don't actually build this on non-x86/non-evbarm at all, currently. 37 # The following if statements are not effective since we only 38 # get here for x86 and evbarm 39 .if ${MACHINE_ARCH} == "alpha" 40 DRIVERS= r200 radeon 41 .elif ${MACHINE} == "macppc" || ${MACHINE} == "ofppc" 42 DRIVERS= r200 radeon 43 .elif ${MACHINE_ARCH} == "sparc64" || ${MACHINE_ARCH} == "sparc" 44 DRIVERS= r200 radeon 45 .elif ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "x86_64" 46 DRIVERS= i915 i965 r200 radeon 47 .elif ${MACHINE} == "prep" || ${MACHINE} == "bebox" 48 DRIVERS= r200 radeon 49 .elif ${MACHINE} == "evbarm" 50 DRIVERS= r200 radeon 51 .endif 52 53 DRI_SUBDIRS= ${DRIVERS} 54 55 DRI_SOURCES.i915+= \ 56 i830_context.c \ 57 i830_state.c \ 58 i830_texblend.c \ 59 i830_texstate.c \ 60 i830_vtbl.c \ 61 i915_context.c \ 62 i915_debug_fp.c \ 63 i915_fragprog.c \ 64 i915_program.c \ 65 i915_state.c \ 66 i915_texstate.c \ 67 i915_vtbl.c \ 68 i915_tex_layout.c 69 70 I915_INTEL_FILES = \ 71 intel_batchbuffer.c \ 72 intel_blit.c \ 73 intel_buffer_objects.c \ 74 intel_buffers.c \ 75 intel_clear.c \ 76 intel_context.c \ 77 intel_extensions.c \ 78 intel_fbo.c \ 79 intel_mipmap_tree.c \ 80 intel_pixel.c \ 81 intel_pixel_bitmap.c \ 82 intel_pixel_copy.c \ 83 intel_pixel_draw.c \ 84 intel_pixel_read.c \ 85 intel_regions.c \ 86 intel_render.c \ 87 intel_screen.c \ 88 intel_state.c \ 89 intel_syncobj.c \ 90 intel_tex.c \ 91 intel_tex_copy.c \ 92 intel_tex_image.c \ 93 intel_tex_layout.c \ 94 intel_tex_subimage.c \ 95 intel_tex_validate.c \ 96 intel_tris.c 97 98 .for _f in ${I915_INTEL_FILES} 99 BUILDSYMLINKS+= ${X11SRCDIR.Mesa}/src/mesa/drivers/dri/i915/${_f} i915_${_f} 100 DRI_SOURCES.i915+= i915_${_f} 101 CPPFLAGS.i915_${_f}+= -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/i915 102 .endfor 103 104 .PATH: ${X11SRCDIR.Mesa}/src/intel/blorp 105 .PATH: ${X11SRCDIR.Mesa}/src/intel/common 106 .PATH: ${X11SRCDIR.Mesa}/src/intel/compiler 107 .PATH: ${X11SRCDIR.Mesa}/src/intel/dev 108 .PATH: ${X11SRCDIR.Mesa}/src/intel/isl 109 .PATH: ${X11SRCDIR.Mesa}/src/intel/perf 110 .PATH: ${X11SRCDIR.Mesa}/../src/intel/ 111 .PATH: ${X11SRCDIR.Mesa}/../src/intel/perf 112 113 DRI_SOURCES.i965+= \ 114 blorp.c \ 115 blorp_blit.c \ 116 blorp_clear.c \ 117 gen_batch_decoder.c \ 118 gen_debug.c \ 119 gen_decoder.c \ 120 gen_device_info.c \ 121 gen_disasm.c \ 122 gen_l3_config.c \ 123 gen_perf.c \ 124 gen_perf_mdapi.c \ 125 gen_perf_metrics.c \ 126 gen_urb_config.c \ 127 intel_log.c \ 128 brw_binding_tables.c \ 129 brw_blorp.c \ 130 brw_bufmgr.c \ 131 brw_cfg.cpp \ 132 brw_clear.c \ 133 brw_clip.c \ 134 brw_clip_line.c \ 135 brw_clip_point.c \ 136 brw_clip_tri.c \ 137 brw_clip_unfilled.c \ 138 brw_clip_util.c \ 139 brw_compile_clip.c \ 140 brw_compile_sf.c \ 141 brw_compiler.c \ 142 brw_compute.c \ 143 brw_conditional_render.c \ 144 brw_context.c \ 145 brw_cs.c \ 146 brw_curbe.c \ 147 brw_dead_control_flow.cpp \ 148 brw_debug_recompile.c \ 149 brw_disasm.c \ 150 brw_disasm_info.c \ 151 brw_disk_cache.c \ 152 brw_draw.c \ 153 brw_draw_upload.c \ 154 brw_eu.c \ 155 brw_eu_compact.c \ 156 brw_eu_emit.c \ 157 brw_eu_util.c \ 158 brw_eu_validate.c \ 159 brw_ff_gs.c \ 160 brw_ff_gs_emit.c \ 161 brw_formatquery.c \ 162 brw_fs.cpp \ 163 brw_fs_bank_conflicts.cpp \ 164 brw_fs_cmod_propagation.cpp \ 165 brw_fs_combine_constants.cpp \ 166 brw_fs_copy_propagation.cpp \ 167 brw_fs_cse.cpp \ 168 brw_fs_dead_code_eliminate.cpp \ 169 brw_fs_generator.cpp \ 170 brw_fs_live_variables.cpp \ 171 brw_fs_lower_pack.cpp \ 172 brw_fs_lower_regioning.cpp \ 173 brw_fs_nir.cpp \ 174 brw_fs_reg_allocate.cpp \ 175 brw_fs_register_coalesce.cpp \ 176 brw_fs_saturate_propagation.cpp \ 177 brw_fs_sel_peephole.cpp \ 178 brw_fs_validate.cpp \ 179 brw_fs_visitor.cpp \ 180 brw_generate_mipmap.c \ 181 brw_gs.c \ 182 brw_gs_surface_state.c \ 183 brw_interpolation_map.c \ 184 brw_link.cpp \ 185 brw_meta_util.c \ 186 brw_misc_state.c \ 187 brw_nir.c \ 188 brw_nir_analyze_boolean_resolves.c \ 189 brw_nir_analyze_ubo_ranges.c \ 190 brw_nir_attribute_workarounds.c \ 191 brw_nir_lower_conversions.c \ 192 brw_nir_lower_cs_intrinsics.c \ 193 brw_nir_lower_image_load_store.c \ 194 brw_nir_lower_mem_access_bit_sizes.c \ 195 brw_nir_opt_peephole_ffma.c \ 196 brw_nir_tcs_workarounds.c \ 197 brw_nir_trig_workarounds.c \ 198 brw_nir_uniforms.cpp \ 199 brw_object_purgeable.c \ 200 brw_packed_float.c \ 201 brw_performance_query.c \ 202 brw_performance_query_mdapi.c \ 203 brw_pipe_control.c \ 204 brw_predicated_break.cpp \ 205 brw_primitive_restart.c \ 206 brw_program.c \ 207 brw_program_binary.c \ 208 brw_program_cache.c \ 209 brw_queryobj.c \ 210 brw_reg_type.c \ 211 brw_reset.c \ 212 brw_schedule_instructions.cpp \ 213 brw_sf.c \ 214 brw_shader.cpp \ 215 brw_state_upload.c \ 216 brw_surface_formats.c \ 217 brw_sync.c \ 218 brw_tcs.c \ 219 brw_tcs_surface_state.c \ 220 brw_tes.c \ 221 brw_tes_surface_state.c \ 222 brw_urb.c \ 223 brw_util.c \ 224 brw_vec4.cpp \ 225 brw_vec4_cmod_propagation.cpp \ 226 brw_vec4_copy_propagation.cpp \ 227 brw_vec4_cse.cpp \ 228 brw_vec4_dead_code_eliminate.cpp \ 229 brw_vec4_generator.cpp \ 230 brw_vec4_gs_nir.cpp \ 231 brw_vec4_gs_visitor.cpp \ 232 brw_vec4_live_variables.cpp \ 233 brw_vec4_nir.cpp \ 234 brw_vec4_reg_allocate.cpp \ 235 brw_vec4_surface_builder.cpp \ 236 brw_vec4_tcs.cpp \ 237 brw_vec4_tes.cpp \ 238 brw_vec4_visitor.cpp \ 239 brw_vec4_vs_visitor.cpp \ 240 brw_vs.c \ 241 brw_vs_surface_state.c \ 242 brw_vue_map.c \ 243 brw_wm.c \ 244 brw_wm_iz.cpp \ 245 brw_wm_surface_state.c \ 246 gen6_clip_state.c \ 247 gen6_constant_state.c \ 248 gen6_gs_visitor.cpp \ 249 gen6_multisample_state.c \ 250 gen6_queryobj.c \ 251 gen6_sampler_state.c \ 252 gen6_sol.c \ 253 gen6_urb.c \ 254 gen7_l3_state.c \ 255 gen7_sol_state.c \ 256 gen7_urb.c \ 257 gen8_depth_state.c \ 258 gen8_multisample_state.c \ 259 hsw_queryobj.c \ 260 hsw_sol.c \ 261 isl.c \ 262 isl_drm.c \ 263 isl_format.c \ 264 isl_format_layout.c \ 265 isl_gen4.c \ 266 isl_gen6.c \ 267 isl_gen7.c \ 268 isl_gen8.c \ 269 isl_gen9.c \ 270 isl_storage_image.c \ 271 isl_tiled_memcpy.c \ 272 isl_tiled_memcpy_normal.c \ 273 isl_tiled_memcpy_sse41.c 274 275 I965_INTEL_FILES = \ 276 intel_batchbuffer.c \ 277 intel_blit.c \ 278 intel_buffer_objects.c \ 279 intel_buffers.c \ 280 intel_copy_image.c \ 281 intel_extensions.c \ 282 intel_fbo.c \ 283 intel_mipmap_tree.c \ 284 intel_pixel.c \ 285 intel_pixel_bitmap.c \ 286 intel_pixel_copy.c \ 287 intel_pixel_draw.c \ 288 intel_pixel_read.c \ 289 intel_screen.c \ 290 intel_state.c \ 291 intel_tex.c \ 292 intel_tex_copy.c \ 293 intel_tex_image.c \ 294 intel_tex_validate.c \ 295 intel_upload.c 296 297 298 INTEL_GENS_BLORP= 40 45 50 60 70 75 80 90 100 110 299 300 .for _gen in ${INTEL_GENS_BLORP} 301 BUILDSYMLINKS+= ${X11SRCDIR.Mesa}/src/mesa/drivers/dri/i965/genX_state_upload.c ${_gen}_state_upload.c 302 BUILDSYMLINKS+= ${X11SRCDIR.Mesa}/src/mesa/drivers/dri/i965/genX_blorp_exec.c ${_gen}_blorp_exec.c 303 BUILDSYMLINKS+= ${X11SRCDIR.Mesa}/src/mesa/drivers/dri/i965/genX_pipe_control.c ${_gen}_pipe_control.c 304 DRI_SOURCES.i965+= ${_gen}_state_upload.c ${_gen}_blorp_exec.c ${_gen}_pipe_control.c 305 306 CPPFLAGS.${_gen}_state_upload.c+= -DGEN_VERSIONx10=${_gen} 307 CPPFLAGS.${_gen}_blorp_exec.c+= -DGEN_VERSIONx10=${_gen} 308 CPPFLAGS.${_gen}_pipe_control.c+= -DGEN_VERSIONx10=${_gen} 309 .endfor 310 311 INTEL_GENS_ISL= 40 50 60 70 75 80 90 100 110 312 313 .for _gen in ${INTEL_GENS_ISL} 314 BUILDSYMLINKS+= ${X11SRCDIR.Mesa}/src/intel/isl/isl_emit_depth_stencil.c ${_gen}_isl_emit_depth_stencil.c 315 BUILDSYMLINKS+= ${X11SRCDIR.Mesa}/src/intel/isl/isl_surface_state.c ${_gen}_isl_surface_state.c 316 DRI_SOURCES.i965+= ${_gen}_isl_emit_depth_stencil.c ${_gen}_isl_surface_state.c 317 318 CPPFLAGS.${_gen}_isl_emit_depth_stencil.c+= -DGEN_VERSIONx10=${_gen} -I${X11SRCDIR.Mesa}/src/intel/isl/ 319 CPPFLAGS.${_gen}_isl_surface_state.c+= -DGEN_VERSIONx10=${_gen} -I${X11SRCDIR.Mesa}/src/intel/isl/ 320 .endfor 321 322 .for _f in ${I965_INTEL_FILES} 323 BUILDSYMLINKS+= ${X11SRCDIR.Mesa}/src/mesa/drivers/dri/i965/${_f} i965_${_f} 324 DRI_SOURCES.i965+= i965_${_f} 325 .endfor 326 327 .for _f in ${DRI_SOURCES.i965} 328 CPPFLAGS.${_f} += -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/i965 \ 329 -I${X11SRCDIR.Mesa}/src/intel \ 330 -I${X11SRCDIR.Mesa}/src/intel/compiler \ 331 -I${X11SRCDIR.Mesa}/../src/intel \ 332 -I${X11SRCDIR.Mesa}/src/compiler/nir \ 333 -I${X11SRCDIR.Mesa}/../src/compiler/nir 334 .endfor 335 336 # Needs mfence 337 CPPFLAGS.brw_bufmgr.c+= -msse2 338 339 DRI_SOURCES.r200 = \ 340 r200_context.c \ 341 r200_ioctl.c \ 342 r200_state.c \ 343 r200_state_init.c \ 344 r200_cmdbuf.c \ 345 r200_tex.c \ 346 r200_texstate.c \ 347 r200_tcl.c \ 348 r200_swtcl.c \ 349 r200_maos.c \ 350 r200_sanity.c \ 351 r200_fragshader.c \ 352 r200_vertprog.c \ 353 r200_blit.c 354 355 R200_RADEON_FILES= \ 356 radeon_buffer_objects.c \ 357 radeon_common_context.c \ 358 radeon_common.c \ 359 radeon_dma.c \ 360 radeon_debug.c \ 361 radeon_fbo.c \ 362 radeon_fog.c \ 363 radeon_mipmap_tree.c \ 364 radeon_pixel_read.c \ 365 radeon_queryobj.c \ 366 radeon_span.c \ 367 radeon_texture.c \ 368 radeon_tex_copy.c \ 369 radeon_tile.c \ 370 radeon_screen.c 371 372 .for _f in ${R200_RADEON_FILES} 373 BUILDSYMLINKS+= ${X11SRCDIR.Mesa}/src/mesa/drivers/dri/radeon/${_f} r200_${_f} 374 DRI_SOURCES.r200+= r200_${_f} 375 .endfor 376 377 .for _f in ${DRI_SOURCES.r200} 378 CPPFLAGS.${_f} += -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/r200/server \ 379 -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/r200 \ 380 -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/radeon/server \ 381 -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/radeon \ 382 -DRADEON_R200 383 .endfor 384 385 DRI_SOURCES.radeon = \ 386 radeon_buffer_objects.c \ 387 radeon_common_context.c \ 388 radeon_common.c \ 389 radeon_dma.c \ 390 radeon_debug.c \ 391 radeon_fbo.c \ 392 radeon_fog.c \ 393 radeon_mipmap_tree.c \ 394 radeon_pixel_read.c \ 395 radeon_queryobj.c \ 396 radeon_span.c \ 397 radeon_texture.c \ 398 radeon_tex_copy.c \ 399 radeon_tile.c \ 400 radeon_context.c \ 401 radeon_ioctl.c \ 402 radeon_screen.c \ 403 radeon_state.c \ 404 radeon_state_init.c \ 405 radeon_tex.c \ 406 radeon_texstate.c \ 407 radeon_tcl.c \ 408 radeon_swtcl.c \ 409 radeon_maos.c \ 410 radeon_sanity.c \ 411 radeon_blit.c 412 413 .for _f in ${DRI_SOURCES.radeon} 414 CPPFLAGS.${_f} += -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/radeon/server \ 415 -I${X11SRCDIR.Mesa}/src/mesa/drivers/dri/radeon \ 416 -DRADEON_R100 417 .endfor 418 419 .for _d in ${DRI_SUBDIRS} 420 SRCS+= ${DRI_SOURCES.${_d}} 421 .PATH: ${X11SRCDIR.Mesa}/src/mesa/drivers/dri/${_d} 422 .endfor 423 424 425 LIBDPLIBS+= expat ${NETBSDSRCDIR}/external/mit/expat/lib/libexpat 426 LIBDPLIBS+= m ${NETBSDSRCDIR}/lib/libm 427 LIBDPLIBS+= pthread ${NETBSDSRCDIR}/lib/libpthread 428 LIBDPLIBS+= glapi ${.CURDIR}/../libglapi 429 LIBDPLIBS+= drm ${.CURDIR}/../libdrm 430 .if ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "x86_64" 431 LIBDPLIBS+= drm_intel ${.CURDIR}/../libdrm_intel 432 .endif 433 LIBDPLIBS+= drm_radeon ${.CURDIR}/../libdrm_radeon 434 435 MESA_SRC_MODULES= main math math_xform vbo tnl swrast ss common asm_c program asm_s 436 .include "../libmesa.mk" 437 .include "../libglsl.mk" 438 439 .if ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "x86_64" 440 SRCS+= streaming-load-memcpy.c 441 CPPFLAGS.streaming-load-memcpy.c+= -msse4.1 442 CPPFLAGS.isl_tiled_memcpy_sse41.c+= -msse4.1 443 .endif 444 445 CFLAGS+= ${${ACTIVE_CC} == "clang":? -Wno-error=atomic-alignment :} 446 447 .include "../driver.mk" 448 449 .for _d in ${DRIVERS} 450 SYMLINKS+= mesa_dri_drivers.so.${SHLIB_MAJOR} ${DRIDIR}/${_d}_dri.so.${SHLIB_MAJOR} 451 SYMLINKS+= ${_d}_dri.so.${SHLIB_MAJOR} ${DRIDIR}/${_d}_dri.so 452 .if ${MKDEBUG} != "no" 453 SYMLINKS+= mesa_dri_drivers.so.${SHLIB_MAJOR}.debug ${DRIDEBUGDIR}/${_d}_dri.so.${SHLIB_MAJOR}.debug 454 .endif 455 .endfor 456 457 .endif 458 459 PKGCONFIG= dri 460 PKGDIST.dri= ${X11SRCDIR.Mesa}/../src/pkgconfig 461 .include "${.CURDIR}/../libGL/mesa-ver.mk" 462 PKGCONFIG_VERSION.dri= ${MESA_VER} 463 464 # XXX remove these from bsd.x11.mk 465 PKGCONFIG_SED_FLAGS= \ 466 -e "s,@DRI_DRIVER_INSTALL_DIR@,${X11USRLIBDIR}/modules/dri,; \ 467 s,@DRI_PC_REQ_PRIV@,," 468 469 .PATH: ${X11SRCDIR.Mesa}/src/util 470 471 FILESDIR= /etc 472 BUILDSYMLINKS+= 00-mesa-defaults.conf drirc 473 FILES= drirc 474 475 .PATH: ${X11SRCDIR.Mesa}/src/mesa/drivers/dri/common 476 477 .include <bsd.x11.mk> 478 .if ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "x86_64" || \ 479 ${MACHINE} == "evbarm" 480 LIBDIR= ${X11USRLIBDIR}/modules/dri 481 482 CWARNFLAGS.clang+= -Wno-error=initializer-overrides -Wno-error=switch \ 483 -Wno-error=tautological-constant-out-of-range-compare \ 484 -Wno-error=enum-conversion \ 485 -Wno-error=implicit-int-float-conversion \ 486 -Wno-error=tautological-constant-compare \ 487 -Wno-c99-designator -Wno-xor-used-as-pow 488 489 COPTS+= -Wno-error=stack-protector 490 491 COPTS.u_atomic.c+= ${${ACTIVE_CC} == "gcc" && ${HAVE_GCC:U0} >= 10:? -Wno-builtin-declaration-mismatch :} 492 493 .include <bsd.lib.mk> 494 .else 495 .include <bsd.inc.mk> 496 .endif 497 # Don't re-build .c files when .y files change 498 .y.c: 499
Indexes created Wed Apr 01 00:32:07 UTC 2026