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      1  1.7     joerg /*	$NetBSD: modf.S,v 1.7 2013/09/12 15:36:16 joerg Exp $	*/
      2  1.5  christos 
      3  1.1       cgd /*
      4  1.1       cgd  * Copyright (c) 1992, 1993
      5  1.1       cgd  *	The Regents of the University of California.  All rights reserved.
      6  1.1       cgd  *
      7  1.1       cgd  * This software was developed by the Computer Systems Engineering group
      8  1.1       cgd  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
      9  1.1       cgd  * contributed to Berkeley.
     10  1.1       cgd  *
     11  1.1       cgd  * Redistribution and use in source and binary forms, with or without
     12  1.1       cgd  * modification, are permitted provided that the following conditions
     13  1.1       cgd  * are met:
     14  1.1       cgd  * 1. Redistributions of source code must retain the above copyright
     15  1.1       cgd  *    notice, this list of conditions and the following disclaimer.
     16  1.1       cgd  * 2. Redistributions in binary form must reproduce the above copyright
     17  1.1       cgd  *    notice, this list of conditions and the following disclaimer in the
     18  1.1       cgd  *    documentation and/or other materials provided with the distribution.
     19  1.6       agc  * 3. Neither the name of the University nor the names of its contributors
     20  1.1       cgd  *    may be used to endorse or promote products derived from this software
     21  1.1       cgd  *    without specific prior written permission.
     22  1.1       cgd  *
     23  1.1       cgd  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     24  1.1       cgd  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     25  1.1       cgd  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     26  1.1       cgd  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     27  1.1       cgd  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     28  1.1       cgd  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     29  1.1       cgd  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     30  1.1       cgd  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     31  1.1       cgd  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     32  1.1       cgd  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     33  1.1       cgd  * SUCH DAMAGE.
     34  1.1       cgd  *
     35  1.1       cgd  * from: Header: modf.s,v 1.3 92/06/20 00:00:54 torek Exp
     36  1.1       cgd  */
     37  1.1       cgd 
     38  1.5  christos #include <machine/asm.h>
     39  1.1       cgd #if defined(LIBC_SCCS) && !defined(lint)
     40  1.5  christos #if 0
     41  1.1       cgd 	.asciz "@(#)modf.s	8.1 (Berkeley) 6/4/93"
     42  1.5  christos #else
     43  1.7     joerg 	RCSID("$NetBSD: modf.S,v 1.7 2013/09/12 15:36:16 joerg Exp $")
     44  1.5  christos #endif
     45  1.1       cgd #endif /* LIBC_SCCS and not lint */
     46  1.1       cgd 
     47  1.1       cgd #include <machine/fsr.h>
     48  1.1       cgd 
     49  1.1       cgd /*
     50  1.1       cgd  * double modf(double val, double *iptr)
     51  1.1       cgd  *
     52  1.1       cgd  * Returns the fractional part of `val', storing the integer part of
     53  1.1       cgd  * `val' in *iptr.  Both *iptr and the return value have the same sign
     54  1.1       cgd  * as `val'.
     55  1.1       cgd  *
     56  1.1       cgd  * Method:
     57  1.1       cgd  *
     58  1.1       cgd  * We use the fpu's normalization hardware to compute the integer portion
     59  1.1       cgd  * of the double precision argument.  Sun IEEE double precision numbers
     60  1.1       cgd  * have 52 bits of mantissa, 11 bits of exponent, and one bit of sign,
     61  1.1       cgd  * with the sign occupying bit 31 of word 0, and the exponent bits 30:20
     62  1.1       cgd  * of word 0.  Thus, values >= 2^52 are by definition integers.
     63  1.1       cgd  *
     64  1.1       cgd  * If we take a value that is in the range [+0..2^52) and add 2^52, all
     65  1.1       cgd  * of the fractional bits fall out and all of the integer bits are summed
     66  1.1       cgd  * with 2^52.  If we then subtract 2^52, we get those integer bits back.
     67  1.1       cgd  * This must be done with rounding set to `towards 0' or `towards -inf'.
     68  1.1       cgd  * `Toward -inf' fails when the value is 0 (we get -0 back)....
     69  1.1       cgd  *
     70  1.1       cgd  * Note that this method will work anywhere, but is machine dependent in
     71  1.1       cgd  * various aspects.
     72  1.1       cgd  *
     73  1.1       cgd  * Stack usage:
     74  1.1       cgd  *	4@[%fp - 4]	saved %fsr
     75  1.1       cgd  *	4@[%fp - 8]	new %fsr with rounding set to `towards 0'
     76  1.1       cgd  *	8@[%fp - 16]	space for moving between %i and %f registers
     77  1.1       cgd  * Register usage:
     78  1.1       cgd  *	%i0%i1		double val;
     79  1.1       cgd  *	%l0		scratch
     80  1.1       cgd  *	%l1		sign bit (0x80000000)
     81  1.1       cgd  *	%i2		double *iptr;
     82  1.1       cgd  *	%f2:f3		`magic number' 2^52, in fpu registers
     83  1.1       cgd  *	%f4:f5		double v, in fpu registers
     84  1.1       cgd  */
     85  1.1       cgd 
     86  1.1       cgd 	.align	8
     87  1.1       cgd Lmagic:
     88  1.1       cgd 	.word	0x43300000	! sign = 0, exponent = 52 + 1023, mantissa = 0
     89  1.1       cgd 	.word	0		! (i.e., .double 0r4503599627370496e+00)
     90  1.1       cgd 
     91  1.1       cgd L0:
     92  1.1       cgd 	.word	0		! 0.0
     93  1.1       cgd 	.word	0
     94  1.1       cgd 
     95  1.1       cgd ENTRY(modf)
     96  1.1       cgd 	save	%sp, -64-16, %sp
     97  1.1       cgd 
     98  1.1       cgd 	/*
     99  1.1       cgd 	 * First, compute v = abs(val) by clearing sign bit,
    100  1.1       cgd 	 * and then set up the fpu registers.  This would be
    101  1.1       cgd 	 * much easier if we could do alu operations on fpu registers!
    102  1.1       cgd 	 */
    103  1.2        pk 	sethi	%hi(0x80000000), %l1	! sign bit
    104  1.1       cgd 	andn	%i0, %l1, %l0
    105  1.1       cgd 	st	%l0, [%fp - 16]
    106  1.7     joerg #ifdef __PIC__
    107  1.3        pk 	PICCY_SET(Lmagic, %l0, %o7)
    108  1.3        pk 	ldd	[%l0], %f2
    109  1.3        pk #else
    110  1.1       cgd 	sethi	%hi(Lmagic), %l0
    111  1.1       cgd 	ldd	[%l0 + %lo(Lmagic)], %f2
    112  1.3        pk #endif
    113  1.1       cgd 	st	%i1, [%fp - 12]
    114  1.1       cgd 	ldd	[%fp - 16], %f4		! %f4:f5 = v
    115  1.1       cgd 
    116  1.1       cgd 	/*
    117  1.1       cgd 	 * Is %f4:f5 >= %f2:f3 ?  If so, it is all integer bits.
    118  1.1       cgd 	 * It is probably less, though.
    119  1.1       cgd 	 */
    120  1.1       cgd 	fcmped	%f4, %f2
    121  1.1       cgd 	nop				! fpop2 delay
    122  1.1       cgd 	fbuge	Lbig			! if >= (or unordered), go out
    123  1.1       cgd 	nop
    124  1.1       cgd 
    125  1.1       cgd 	/*
    126  1.1       cgd 	 * v < 2^52, so add 2^52, then subtract 2^52, but do it all
    127  1.1       cgd 	 * with rounding set towards zero.  We leave any enabled
    128  1.1       cgd 	 * traps enabled, but change the rounding mode.  This might
    129  1.1       cgd 	 * not be so good.  Oh well....
    130  1.1       cgd 	 */
    131  1.1       cgd 	st	%fsr, [%fp - 4]		! %l5 = current FSR mode
    132  1.1       cgd 	set	FSR_RD, %l3		! %l3 = rounding direction mask
    133  1.1       cgd 	ld	[%fp - 4], %l5
    134  1.1       cgd 	set	FSR_RD_RZ << FSR_RD_SHIFT, %l4
    135  1.1       cgd 	andn	%l5, %l3, %l6
    136  1.1       cgd 	or	%l6, %l4, %l6		! round towards zero, please
    137  1.1       cgd 	and	%l5, %l3, %l5		! save original rounding mode
    138  1.1       cgd 	st	%l6, [%fp - 8]
    139  1.1       cgd 	ld	[%fp - 8], %fsr
    140  1.1       cgd 
    141  1.1       cgd 	faddd	%f4, %f2, %f4		! %f4:f5 += 2^52
    142  1.1       cgd 	fsubd	%f4, %f2, %f4		! %f4:f5 -= 2^52
    143  1.1       cgd 
    144  1.1       cgd 	/*
    145  1.1       cgd 	 * Restore %fsr, but leave exceptions accrued.
    146  1.1       cgd 	 */
    147  1.1       cgd 	st	%fsr, [%fp - 4]
    148  1.1       cgd 	ld	[%fp - 4], %l6
    149  1.1       cgd 	andn	%l6, %l3, %l6		! %l6 = %fsr & ~FSR_RD;
    150  1.1       cgd 	or	%l5, %l6, %l5		! %l5 |= %l6;
    151  1.1       cgd 	st	%l5, [%fp - 4]
    152  1.1       cgd 	ld	[%fp - 4], %fsr		! restore %fsr, leaving accrued stuff
    153  1.1       cgd 
    154  1.1       cgd 	/*
    155  1.1       cgd 	 * Now insert the original sign in %f4:f5.
    156  1.1       cgd 	 * This is a lot of work, so it is conditional here.
    157  1.1       cgd 	 */
    158  1.1       cgd 	btst	%l1, %i0
    159  1.1       cgd 	be	1f
    160  1.1       cgd 	nop
    161  1.1       cgd 	st	%f4, [%fp - 16]
    162  1.1       cgd 	ld	[%fp - 16], %g1
    163  1.1       cgd 	or	%l1, %g1, %g1
    164  1.1       cgd 	st	%g1, [%fp - 16]
    165  1.1       cgd 	ld	[%fp - 16], %f4
    166  1.1       cgd 1:
    167  1.1       cgd 
    168  1.1       cgd 	/*
    169  1.1       cgd 	 * The value in %f4:f5 is now the integer portion of the original
    170  1.1       cgd 	 * argument.  We need to store this in *ival (%i2), subtract it
    171  1.1       cgd 	 * from the original value argument (%i0:i1), and return the result.
    172  1.1       cgd 	 */
    173  1.1       cgd 	std	%f4, [%i2]		! *ival = %f4:f5;
    174  1.1       cgd 	std	%i0, [%fp - 16]
    175  1.1       cgd 	ldd	[%fp - 16], %f0		! %f0:f1 = val;
    176  1.1       cgd 	fsubd	%f0, %f4, %f0		! %f0:f1 -= %f4:f5;
    177  1.1       cgd 	ret
    178  1.1       cgd 	restore
    179  1.1       cgd 
    180  1.1       cgd Lbig:
    181  1.1       cgd 	/*
    182  1.1       cgd 	 * We get here if the original comparison of %f4:f5 (v) to
    183  1.1       cgd 	 * %f2:f3 (2^52) came out `greater or unordered'.  In this
    184  1.1       cgd 	 * case the integer part is the original value, and the
    185  1.1       cgd 	 * fractional part is 0.
    186  1.1       cgd 	 */
    187  1.7     joerg #ifdef __PIC__
    188  1.3        pk 	PICCY_SET(L0, %l0, %o7)
    189  1.3        pk 	std	%f0, [%i2]		! *ival = val;
    190  1.3        pk 	ldd	[%l0], %f0		! return 0.0;
    191  1.3        pk #else
    192  1.1       cgd 	sethi	%hi(L0), %l0
    193  1.1       cgd 	std	%f0, [%i2]		! *ival = val;
    194  1.1       cgd 	ldd	[%l0 + %lo(L0)], %f0	! return 0.0;
    195  1.3        pk #endif
    196  1.1       cgd 	ret
    197  1.1       cgd 	restore
    198