1 # $NetBSD: Makefile.inc,v 1.22 2014/08/10 05:57:31 matt Exp $ 2 3 COMPILER_RT_SRCDIR= ${NETBSDSRCDIR}/sys/external/bsd/compiler_rt/dist 4 5 .if ${LIBC_MACHINE_ARCH} == "powerpc" 6 COMPILER_RT_CPU_DIR= ${COMPILER_RT_SRCDIR}/lib/builtins/ppc 7 COMPILER_RT_ARCH_DIR= ${COMPILER_RT_SRCDIR}/lib/builtins/ppc 8 .else 9 COMPILER_RT_CPU_DIR= ${COMPILER_RT_SRCDIR}/lib/builtins/${MACHINE_CPU} 10 COMPILER_RT_ARCH_DIR= ${COMPILER_RT_SRCDIR}/lib/builtins/${LIBC_MACHINE_ARCH} 11 .endif 12 13 .PATH: ${COMPILER_RT_CPU_DIR} 14 .PATH: ${COMPILER_RT_ARCH_DIR} 15 .PATH: ${COMPILER_RT_SRCDIR}/lib/builtins 16 .PATH: ${COMPILER_RT_SRCDIR}/lib/profile 17 18 # Complex support needs parts of libm 19 #GENERIC_SRCS+= 20 # mulxc3.c \ 21 # mulsc3.c \ 22 # divxc3.c \ 23 # divdc3.c \ 24 # divsc3.c 25 26 # Implemented on top of our atomic interface. 27 #GENERIC_SRCS+= atomic.c 28 29 .if ${HAVE_LIBGCC_EH} == "no" 30 GENERIC_SRCS+= \ 31 gcc_personality_v0.c 32 .endif 33 34 .if 0 35 # Conflicts with soft-float 36 GENERIC_SRCS+= \ 37 comparedf2.c \ 38 comparesf2.c \ 39 adddf3.c \ 40 addsf3.c \ 41 divdf3.c \ 42 divsf3.c \ 43 extendsfdf2.c \ 44 fixdfsi.c \ 45 fixdfti.c \ 46 fixsfsi.c \ 47 fixsfti.c \ 48 floatsidf.c \ 49 floatsisf.c \ 50 floatunsidf.c \ 51 floatunsisf.c \ 52 muldf3.c \ 53 mulsf3.c \ 54 subdf3.c \ 55 subsf3.c \ 56 truncdfsf2.c 57 .endif 58 59 GENERIC_SRCS+= \ 60 absvsi2.c \ 61 absvti2.c \ 62 addvsi3.c \ 63 addvti3.c \ 64 ashlti3.c \ 65 ashrti3.c \ 66 clzti2.c \ 67 cmpti2.c \ 68 ctzti2.c \ 69 divti3.c \ 70 ffsti2.c \ 71 fixsfdi.c \ 72 fixdfdi.c \ 73 fixunsdfdi.c \ 74 fixunsdfsi.c \ 75 fixunssfdi.c \ 76 fixunssfsi.c \ 77 fixunsxfdi.c \ 78 fixunsxfsi.c \ 79 fixxfdi.c \ 80 floatdidf.c \ 81 floatdisf.c \ 82 floatdixf.c \ 83 floatundidf.c \ 84 floatundisf.c \ 85 floatundixf.c \ 86 int_util.c \ 87 lshrti3.c \ 88 modti3.c \ 89 muldc3.c \ 90 mulosi4.c \ 91 muloti4.c \ 92 multi3.c \ 93 mulvsi3.c \ 94 mulvti3.c \ 95 negdf2.c \ 96 negsf2.c \ 97 negti2.c \ 98 negvsi2.c \ 99 negvti2.c \ 100 paritysi2.c \ 101 parityti2.c \ 102 popcountsi2.c \ 103 popcountti2.c \ 104 powidf2.c \ 105 powisf2.c \ 106 powitf2.c \ 107 powixf2.c \ 108 subvsi3.c \ 109 subvti3.c \ 110 ucmpti2.c \ 111 udivmodti4.c \ 112 udivti3.c \ 113 umodti3.c 114 115 .if ${MACHINE_ARCH} != "aarch64" 116 GENERIC_SRCS+= \ 117 fixunsdfti.c \ 118 fixunssfti.c \ 119 fixunsxfti.c \ 120 fixxfti.c \ 121 floattidf.c \ 122 floattisf.c \ 123 floattixf.c \ 124 floatuntidf.c \ 125 floatuntisf.c \ 126 floatuntixf.c 127 .endif 128 129 # These have h/w instructions which are always used. 130 .if ${MACHINE_ARCH} != "alpha" && ${MACHINE_CPU} != "powerpc" \ 131 && ${MACHINE_CPU} != "aarch64" && ${MACHINE_ARCH} != "vax" 132 GENERIC_SRCS+= \ 133 clzsi2.c \ 134 ctzsi2.c \ 135 divmodsi4.c \ 136 divsi3.c \ 137 modsi3.c \ 138 udivmodsi4.c \ 139 umodsi3.c 140 141 . if ${MACHINE_CPU} != "sh3" 142 # On sh3 __udivsi3 is gcc "millicode" with special calling convention 143 # (less registers clobbered than usual). Each DSO that needs it gets 144 # its own hidden copy from libgcc.a. 145 GENERIC_SRCS+= \ 146 udivsi3.c 147 . endif 148 .endif 149 150 151 GENERIC_SRCS+= \ 152 absvdi2.c \ 153 addvdi3.c \ 154 mulodi4.c \ 155 mulvdi3.c \ 156 negvdi2.c \ 157 paritydi2.c \ 158 popcountdi2.c \ 159 subvdi3.c 160 161 # These have h/w instructions which are always used. 162 .if ${MACHINE_ARCH} != "alpha" && ${MACHINE_CPU} != "powerpc64" \ 163 && ${MACHINE_ARCH} != "aarch64" 164 GENERIC_SRCS+= \ 165 clzdi2.c \ 166 ctzdi2.c \ 167 ffsdi2.c 168 .endif 169 170 # Don't need these on 64-bit machines. 171 .if empty(LIBC_MACHINE_ARCH:M*64*) && ${LIBC_MACHINE_ARCH} != "alpha" 172 GENERIC_SRCS+= \ 173 cmpdi2.c \ 174 ashldi3.c \ 175 ashrdi3.c \ 176 divdi3.c \ 177 divmoddi4.c \ 178 lshrdi3.c \ 179 moddi3.c \ 180 muldi3.c \ 181 negdi2.c \ 182 ucmpdi2.c \ 183 udivdi3.c \ 184 udivmoddi4.c \ 185 umoddi3.c 186 .endif 187 188 GENERIC_SRCS+= \ 189 GCDAProfiling.c \ 190 InstrProfiling.c \ 191 InstrProfilingBuffer.c \ 192 InstrProfilingFile.c \ 193 InstrProfilingPlatformOther.c 194 195 .if ${LIBC_MACHINE_ARCH} == "powerpc" 196 GENERIC_SRCS+= \ 197 fixtfdi.c \ 198 fixunstfdi.c \ 199 floatditf.c \ 200 floatunditf.c \ 201 gcc_qadd.c \ 202 gcc_qdiv.c \ 203 gcc_qmul.c \ 204 gcc_qsub.c 205 .endif 206 207 .if ${MACHINE_CPU} == "aarch64" 208 GENERIC_SRCS+= \ 209 clear_cache.c 210 .endif 211 212 .if ${MACHINE_CPU} == "arm" 213 .if !empty(LIBC_MACHINE_ARCH:Mearm*) 214 GENERIC_SRCS+= \ 215 aeabi_idivmod.S \ 216 aeabi_ldivmod.S \ 217 aeabi_uidivmod.S \ 218 aeabi_uldivmod.S 219 .endif 220 GENERIC_SRCS+= \ 221 clear_cache.c 222 # Not yet, overlaps with softfloat 223 # aeabi_dcmp.S \ 224 # aeabi_fcmp.S 225 # Not yet, requires ARMv6 226 #GENERIC_SRCS+= \ 227 # bswapdi2.S \ 228 # bswapsi2.S 229 .endif 230 231 .for src in ${GENERIC_SRCS} 232 . if exists(${COMPILER_RT_CPU_DIR}/${src:R}.S) || \ 233 exists(${COMPILER_RT_ARCH_DIR}/${src:R}.S) 234 SRCS+= ${src:R}.S 235 . else 236 SRCS+= ${src} 237 . if ${src:E} != "cc" 238 COPTS.${src}+= -Wno-missing-prototypes \ 239 -Wno-old-style-definition \ 240 -Wno-strict-prototypes \ 241 -Wno-uninitialized \ 242 -Wno-cast-qual 243 . endif 244 . endif 245 .endfor 246