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Makefile.inc revision 1.33.2.1
      1 # $NetBSD: Makefile.inc,v 1.33.2.1 2017/07/25 02:21:26 snj Exp $
      2 
      3 COMPILER_RT_SRCDIR=	${NETBSDSRCDIR}/sys/external/bsd/compiler_rt/dist
      4 
      5 .if ${LIBC_MACHINE_ARCH} == "powerpc" || ${LIBC_MACHINE_ARCH} == "powerpc64"
      6 COMPILER_RT_CPU_DIR=	${COMPILER_RT_SRCDIR}/lib/builtins/ppc
      7 COMPILER_RT_ARCH_DIR=	${COMPILER_RT_SRCDIR}/lib/builtins/ppc
      8 .else
      9 COMPILER_RT_CPU_DIR=	${COMPILER_RT_SRCDIR}/lib/builtins/${LIBC_MACHINE_CPU}
     10 COMPILER_RT_ARCH_DIR=	${COMPILER_RT_SRCDIR}/lib/builtins/${LIBC_MACHINE_ARCH}
     11 .endif
     12 
     13 .PATH: ${COMPILER_RT_CPU_DIR}
     14 .PATH: ${COMPILER_RT_ARCH_DIR}
     15 .PATH: ${COMPILER_RT_SRCDIR}/lib/builtins
     16 .PATH: ${COMPILER_RT_SRCDIR}/lib/profile
     17 
     18 # Complex support needs parts of libm
     19 #GENERIC_SRCS+=
     20 #	mulxc3.c \
     21 #	mulsc3.c \
     22 #	divxc3.c \
     23 #	divdc3.c \
     24 #	divsc3.c
     25 
     26 # Implemented on top of our atomic interface.
     27 #GENERIC_SRCS+= atomic.c
     28 
     29 .if ${HAVE_LIBGCC_EH} == "no"
     30 GENERIC_SRCS+= \
     31 	gcc_personality_v0.c
     32 .endif
     33 
     34 GENERIC_SRCS+= \
     35 	absvsi2.c \
     36 	absvti2.c \
     37 	addvsi3.c \
     38 	addvti3.c \
     39 	ashlti3.c \
     40 	ashrti3.c \
     41 	clzti2.c \
     42 	cmpti2.c \
     43 	ctzti2.c \
     44 	divti3.c \
     45 	ffsti2.c \
     46 	fixsfdi.c \
     47 	fixdfdi.c \
     48 	fixunsdfdi.c \
     49 	fixunsdfsi.c \
     50 	fixunssfdi.c \
     51 	fixunssfsi.c \
     52 	fixunsxfdi.c \
     53 	fixunsxfsi.c \
     54 	int_util.c \
     55 	lshrti3.c \
     56 	modti3.c \
     57 	muldc3.c \
     58 	mulosi4.c \
     59 	muloti4.c \
     60 	multi3.c \
     61 	mulvsi3.c \
     62 	mulvti3.c \
     63 	negti2.c \
     64 	negvsi2.c \
     65 	negvti2.c \
     66 	paritysi2.c \
     67 	parityti2.c \
     68 	popcountsi2.c \
     69 	popcountti2.c \
     70 	subvsi3.c \
     71 	subvti3.c \
     72 	ucmpti2.c \
     73 	udivmodti4.c \
     74 	udivti3.c \
     75 	umodti3.c
     76 
     77 # only used for machines using IEEE 754 floating point formats
     78 .if ${MACHINE_ARCH} != "vax"
     79 
     80 .if 0
     81 # Conflicts with soft-float
     82 GENERIC_SRCS+= \
     83 	comparedf2.c \
     84 	comparesf2.c \
     85 	adddf3.c \
     86 	addsf3.c \
     87 	addtf3.c \
     88 	divdf3.c \
     89 	divsf3.c \
     90 	divtf3.c \
     91 	extendsfdf2.c \
     92 	extendsftf2.c \
     93 	extenddftf2.c \
     94 	fixdfsi.c \
     95 	fixdfti.c \
     96 	fixsfsi.c \
     97 	fixsfti.c \
     98 	floatsidf.c \
     99 	floatsisf.c \
    100 	floatunsidf.c \
    101 	floatunsisf.c \
    102 	muldf3.c \
    103 	mulsf3.c \
    104 	multf3.c \
    105 	subdf3.c \
    106 	subsf3.c \
    107 	subtf3.c \
    108 	truncdfsf2.c \
    109 	trunctfdf2.c \
    110 	trunctfsf2.c
    111 .endif
    112 
    113 GENERIC_SRCS+=	\
    114 	floatdidf.c \
    115 	floatdisf.c \
    116 	floatdixf.c \
    117 	floatundidf.c \
    118 	floatundisf.c \
    119 	floatundixf.c \
    120 	negdf2.c \
    121 	negsf2.c \
    122 	powidf2.c \
    123 	powisf2.c \
    124 	powitf2.c \
    125 	powixf2.c
    126 
    127 .endif # IEEE 754 only machines
    128 
    129 .if ${MACHINE_ARCH} != "m68k"
    130 GENERIC_SRCS+= \
    131 	fixxfdi.c
    132 .endif
    133 
    134 
    135 .if ${MACHINE_ARCH} != "aarch64"
    136 GENERIC_SRCS+= \
    137 	fixunsdfti.c \
    138 	fixunssfti.c \
    139 	fixunsxfti.c \
    140 	fixxfti.c \
    141 	floattidf.c \
    142 	floattisf.c \
    143 	floattixf.c \
    144 	floatuntidf.c \
    145 	floatuntisf.c \
    146 	floatuntixf.c
    147 .endif
    148 
    149 # These have h/w instructions which are always used.
    150 .if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_CPU} != "aarch64" \
    151     && ${LIBC_MACHINE_CPU} != "powerpc" && ${LIBC_MACHINE_CPU} != "or1k"
    152 GENERIC_SRCS+= \
    153 	clzsi2.c
    154 .endif
    155 
    156 # These have h/w instructions which are always used.
    157 .if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_ARCH} != "vax" \
    158     && ${LIBC_MACHINE_CPU} != "aarch64" && ${LIBC_MACHINE_CPU} != "powerpc" \
    159     && ${LIBC_MACHINE_CPU} != "or1k"
    160 GENERIC_SRCS+= \
    161 	ctzsi2.c
    162 .endif
    163 
    164 # These have h/w instructions which are always used.
    165 .if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_CPU} != "powerpc" \
    166     && ${LIBC_MACHINE_CPU} != "aarch64" && ${LIBC_MACHINE_ARCH} != "vax"
    167 GENERIC_SRCS+= \
    168 	divmodsi4.c \
    169 	divsi3.c \
    170 	modsi3.c \
    171 	udivmodsi4.c \
    172 	umodsi3.c
    173 
    174 . if ${LIBC_MACHINE_CPU} != "sh3"
    175 # On sh3 __udivsi3 is gcc "millicode" with special calling convention
    176 # (less registers clobbered than usual).  Each DSO that needs it gets
    177 # its own hidden copy from libgcc.a.
    178 GENERIC_SRCS+= \
    179 	udivsi3.c
    180 . endif
    181 .endif
    182 
    183 
    184 GENERIC_SRCS+= \
    185 	absvdi2.c \
    186 	addvdi3.c \
    187 	mulodi4.c \
    188 	mulvdi3.c \
    189 	negvdi2.c \
    190 	paritydi2.c \
    191 	popcountdi2.c \
    192 	subvdi3.c
    193 
    194 # These have h/w instructions which are always used.
    195 .if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_CPU} != "powerpc64" \
    196     && ${LIBC_MACHINE_ARCH} != "aarch64" && ${LIBC_MACHINE_CPU} != "or1k"
    197 GENERIC_SRCS+= \
    198 	clzdi2.c \
    199 	ctzdi2.c \
    200 	ffsdi2.c
    201 .endif
    202 
    203 # Don't need these on 64-bit machines.
    204 .if empty(LIBC_MACHINE_ARCH:M*64*) && ${LIBC_MACHINE_ARCH} != "alpha"
    205 GENERIC_SRCS+= \
    206 	cmpdi2.c \
    207 	ashldi3.c \
    208 	ashrdi3.c \
    209 	divdi3.c \
    210 	divmoddi4.c \
    211 	lshrdi3.c \
    212 	moddi3.c \
    213 	muldi3.c \
    214 	negdi2.c \
    215 	ucmpdi2.c \
    216 	udivdi3.c \
    217 	udivmoddi4.c \
    218 	umoddi3.c
    219 .endif
    220 
    221 GENERIC_SRCS+= \
    222 	GCDAProfiling.c \
    223 	InstrProfiling.c \
    224 	InstrProfilingBuffer.c \
    225 	InstrProfilingFile.c \
    226 	InstrProfilingPlatformLinux.c \
    227 	InstrProfilingUtil.c \
    228 	InstrProfilingValue.c \
    229 	InstrProfilingWriter.c
    230 
    231 .if ${MKPROFILE} != "no"
    232 POBJS+= InstrProfilingRuntime.po
    233 .endif
    234 
    235 .if ${LIBC_MACHINE_ARCH} == "powerpc" || ${LIBC_MACHINE_ARCH} == "powerpc64"
    236 GENERIC_SRCS+= \
    237 	fixtfdi.c \
    238 	fixunstfdi.c \
    239 	floatditf.c \
    240 	floatunditf.c \
    241 	gcc_qadd.c \
    242 	gcc_qdiv.c \
    243 	gcc_qmul.c \
    244 	gcc_qsub.c
    245 .endif
    246 
    247 .if ${LIBC_MACHINE_CPU} == "aarch64"
    248 GENERIC_SRCS+= \
    249 	clear_cache.c
    250 .endif
    251 
    252 .if ${LIBC_MACHINE_ARCH} == "sparc" || ${LIBC_MACHINE_ARCH} == "sparc64"
    253 GENERIC_SRCS+= \
    254 	clear_cache.c
    255 .endif
    256 
    257 .if ${LIBC_MACHINE_CPU} == "arm"
    258 .if !empty(LIBC_MACHINE_ARCH:Mearm*)
    259 GENERIC_SRCS+= \
    260 	aeabi_idivmod.S \
    261 	aeabi_ldivmod.S \
    262 	aeabi_uidivmod.S \
    263 	aeabi_uldivmod.S
    264 .endif
    265 GENERIC_SRCS+= \
    266 	clear_cache.c
    267 # Not yet, overlaps with softfloat
    268 #	aeabi_dcmp.S \
    269 #	aeabi_fcmp.S
    270 # Not yet, requires ARMv6
    271 #GENERIC_SRCS+= \
    272 #	bswapdi2.S \
    273 #	bswapsi2.S
    274 .endif
    275 
    276 .for src in ${GENERIC_SRCS}
    277 .  if exists(${COMPILER_RT_CPU_DIR}/${src:R}.S) || \
    278       exists(${COMPILER_RT_ARCH_DIR}/${src:R}.S)
    279 SRCS+=	${src:R}.S
    280 .  else
    281 SRCS+=	${src}
    282 .    if ${src:E} != "cc"
    283 COPTS.${src}+=	-Wno-missing-prototypes \
    284 		-Wno-old-style-definition \
    285 		-Wno-strict-prototypes \
    286 		-Wno-uninitialized \
    287 		-Wno-cast-qual
    288 .    endif
    289 .  endif
    290 .if ${MKSOFTFLOAT:Uno} != "no"
    291 COPTS.${src}+=	-D__SOFT_FP__
    292 .endif
    293 .endfor
    294