Makefile.inc revision 1.34
1 # $NetBSD: Makefile.inc,v 1.34 2017/06/16 21:22:14 joerg Exp $ 2 3 COMPILER_RT_SRCDIR= ${NETBSDSRCDIR}/sys/external/bsd/compiler_rt/dist 4 5 .if ${LIBC_MACHINE_ARCH} == "powerpc" || ${LIBC_MACHINE_ARCH} == "powerpc64" 6 COMPILER_RT_CPU_DIR= ${COMPILER_RT_SRCDIR}/lib/builtins/ppc 7 COMPILER_RT_ARCH_DIR= ${COMPILER_RT_SRCDIR}/lib/builtins/ppc 8 .else 9 COMPILER_RT_CPU_DIR= ${COMPILER_RT_SRCDIR}/lib/builtins/${LIBC_MACHINE_CPU} 10 COMPILER_RT_ARCH_DIR= ${COMPILER_RT_SRCDIR}/lib/builtins/${LIBC_MACHINE_ARCH} 11 .endif 12 13 .PATH: ${COMPILER_RT_CPU_DIR} 14 .PATH: ${COMPILER_RT_ARCH_DIR} 15 .PATH: ${COMPILER_RT_SRCDIR}/lib/builtins 16 .PATH: ${COMPILER_RT_SRCDIR}/lib/profile 17 18 # Complex support needs parts of libm 19 #GENERIC_SRCS+= 20 # mulxc3.c \ 21 # mulsc3.c \ 22 # divxc3.c \ 23 # divdc3.c \ 24 # divsc3.c 25 26 # Implemented on top of our atomic interface. 27 #GENERIC_SRCS+= atomic.c 28 29 .if ${HAVE_LIBGCC_EH} == "no" 30 GENERIC_SRCS+= \ 31 gcc_personality_v0.c 32 .endif 33 34 .if 0 35 # Conflicts with soft-float 36 GENERIC_SRCS+= \ 37 comparedf2.c \ 38 comparesf2.c \ 39 adddf3.c \ 40 addsf3.c \ 41 addtf3.c \ 42 divdf3.c \ 43 divsf3.c \ 44 divtf3.c \ 45 extendsfdf2.c \ 46 extendsftf2.c \ 47 extenddftf2.c \ 48 fixdfsi.c \ 49 fixdfti.c \ 50 fixsfsi.c \ 51 fixsfti.c \ 52 floatsidf.c \ 53 floatsisf.c \ 54 floatunsidf.c \ 55 floatunsisf.c \ 56 muldf3.c \ 57 mulsf3.c \ 58 multf3.c \ 59 subdf3.c \ 60 subsf3.c \ 61 subtf3.c \ 62 truncdfsf2.c \ 63 trunctfdf2.c \ 64 trunctfsf2.c 65 .endif 66 67 GENERIC_SRCS+= \ 68 absvsi2.c \ 69 absvti2.c \ 70 addvsi3.c \ 71 addvti3.c \ 72 ashlti3.c \ 73 ashrti3.c \ 74 clzti2.c \ 75 cmpti2.c \ 76 ctzti2.c \ 77 divti3.c \ 78 ffsti2.c \ 79 fixsfdi.c \ 80 fixdfdi.c \ 81 fixunsdfdi.c \ 82 fixunsdfsi.c \ 83 fixunssfdi.c \ 84 fixunssfsi.c \ 85 fixunsxfdi.c \ 86 fixunsxfsi.c \ 87 floatdidf.c \ 88 floatdisf.c \ 89 floatdixf.c \ 90 floatundidf.c \ 91 floatundisf.c \ 92 floatundixf.c \ 93 int_util.c \ 94 lshrti3.c \ 95 modti3.c \ 96 muldc3.c \ 97 mulosi4.c \ 98 muloti4.c \ 99 multi3.c \ 100 mulvsi3.c \ 101 mulvti3.c \ 102 negdf2.c \ 103 negsf2.c \ 104 negti2.c \ 105 negvsi2.c \ 106 negvti2.c \ 107 paritysi2.c \ 108 parityti2.c \ 109 popcountsi2.c \ 110 popcountti2.c \ 111 powidf2.c \ 112 powisf2.c \ 113 powitf2.c \ 114 powixf2.c \ 115 subvsi3.c \ 116 subvti3.c \ 117 ucmpti2.c \ 118 udivmodti4.c \ 119 udivti3.c \ 120 umodti3.c 121 122 .if ${MACHINE_ARCH} != "m68k" 123 GENERIC_SRCS+= \ 124 fixxfdi.c 125 .endif 126 127 128 .if ${MACHINE_ARCH} != "aarch64" 129 GENERIC_SRCS+= \ 130 fixunsdfti.c \ 131 fixunssfti.c \ 132 fixunsxfti.c \ 133 fixxfti.c \ 134 floattidf.c \ 135 floattisf.c \ 136 floattixf.c \ 137 floatuntidf.c \ 138 floatuntisf.c \ 139 floatuntixf.c 140 .endif 141 142 # These have h/w instructions which are always used. 143 .if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_CPU} != "aarch64" \ 144 && ${LIBC_MACHINE_CPU} != "powerpc" && ${LIBC_MACHINE_CPU} != "or1k" 145 GENERIC_SRCS+= \ 146 clzsi2.c 147 .endif 148 149 # These have h/w instructions which are always used. 150 .if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_ARCH} != "vax" \ 151 && ${LIBC_MACHINE_CPU} != "aarch64" && ${LIBC_MACHINE_CPU} != "powerpc" \ 152 && ${LIBC_MACHINE_CPU} != "or1k" 153 GENERIC_SRCS+= \ 154 ctzsi2.c 155 .endif 156 157 # These have h/w instructions which are always used. 158 .if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_CPU} != "powerpc" \ 159 && ${LIBC_MACHINE_CPU} != "aarch64" && ${LIBC_MACHINE_ARCH} != "vax" 160 GENERIC_SRCS+= \ 161 divmodsi4.c \ 162 divsi3.c \ 163 modsi3.c \ 164 udivmodsi4.c \ 165 umodsi3.c 166 167 . if ${LIBC_MACHINE_CPU} != "sh3" 168 # On sh3 __udivsi3 is gcc "millicode" with special calling convention 169 # (less registers clobbered than usual). Each DSO that needs it gets 170 # its own hidden copy from libgcc.a. 171 GENERIC_SRCS+= \ 172 udivsi3.c 173 . endif 174 .endif 175 176 177 GENERIC_SRCS+= \ 178 absvdi2.c \ 179 addvdi3.c \ 180 mulodi4.c \ 181 mulvdi3.c \ 182 negvdi2.c \ 183 paritydi2.c \ 184 popcountdi2.c \ 185 subvdi3.c 186 187 # These have h/w instructions which are always used. 188 .if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_CPU} != "powerpc64" \ 189 && ${LIBC_MACHINE_ARCH} != "aarch64" && ${LIBC_MACHINE_CPU} != "or1k" 190 GENERIC_SRCS+= \ 191 clzdi2.c \ 192 ctzdi2.c \ 193 ffsdi2.c 194 .endif 195 196 # Don't need these on 64-bit machines. 197 .if empty(LIBC_MACHINE_ARCH:M*64*) && ${LIBC_MACHINE_ARCH} != "alpha" 198 GENERIC_SRCS+= \ 199 cmpdi2.c \ 200 ashldi3.c \ 201 ashrdi3.c \ 202 divdi3.c \ 203 divmoddi4.c \ 204 lshrdi3.c \ 205 moddi3.c \ 206 muldi3.c \ 207 negdi2.c \ 208 ucmpdi2.c \ 209 udivdi3.c \ 210 udivmoddi4.c \ 211 umoddi3.c 212 .endif 213 214 GENERIC_SRCS+= \ 215 GCDAProfiling.c \ 216 InstrProfiling.c \ 217 InstrProfilingBuffer.c \ 218 InstrProfilingFile.c \ 219 InstrProfilingPlatformLinux.c \ 220 InstrProfilingUtil.c \ 221 InstrProfilingValue.c \ 222 InstrProfilingWriter.c 223 224 .if ${MKPROFILE} != "no" 225 POBJS+= InstrProfilingRuntime.po 226 .endif 227 228 .if ${LIBC_MACHINE_ARCH} == "powerpc" || ${LIBC_MACHINE_ARCH} == "powerpc64" 229 GENERIC_SRCS+= \ 230 fixtfdi.c \ 231 fixunstfdi.c \ 232 floatditf.c \ 233 floatunditf.c \ 234 gcc_qadd.c \ 235 gcc_qdiv.c \ 236 gcc_qmul.c \ 237 gcc_qsub.c 238 .endif 239 240 .if ${LIBC_MACHINE_CPU} == "aarch64" 241 GENERIC_SRCS+= \ 242 clear_cache.c 243 .endif 244 245 .if ${LIBC_MACHINE_ARCH} == "powerpc" || ${LIBC_MACHINE_ARCH} == "powerpc64" 246 GENERIC_SRCS+= \ 247 clear_cache.c 248 .endif 249 250 .if ${LIBC_MACHINE_ARCH} == "sparc" || ${LIBC_MACHINE_ARCH} == "sparc64" 251 GENERIC_SRCS+= \ 252 clear_cache.c 253 .endif 254 255 .if ${LIBC_MACHINE_CPU} == "arm" 256 .if !empty(LIBC_MACHINE_ARCH:Mearm*) 257 GENERIC_SRCS+= \ 258 aeabi_idivmod.S \ 259 aeabi_ldivmod.S \ 260 aeabi_uidivmod.S \ 261 aeabi_uldivmod.S 262 .endif 263 GENERIC_SRCS+= \ 264 clear_cache.c 265 # Not yet, overlaps with softfloat 266 # aeabi_dcmp.S \ 267 # aeabi_fcmp.S 268 # Not yet, requires ARMv6 269 #GENERIC_SRCS+= \ 270 # bswapdi2.S \ 271 # bswapsi2.S 272 .endif 273 274 .for src in ${GENERIC_SRCS} 275 . if exists(${COMPILER_RT_CPU_DIR}/${src:R}.S) || \ 276 exists(${COMPILER_RT_ARCH_DIR}/${src:R}.S) 277 SRCS+= ${src:R}.S 278 . else 279 SRCS+= ${src} 280 . if ${src:E} != "cc" 281 COPTS.${src}+= -Wno-missing-prototypes \ 282 -Wno-old-style-definition \ 283 -Wno-strict-prototypes \ 284 -Wno-uninitialized \ 285 -Wno-cast-qual 286 . endif 287 . endif 288 .if ${MKSOFTFLOAT:Uno} != "no" 289 COPTS.${src}+= -D__SOFT_FP__ 290 .endif 291 .endfor 292
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