1 # $NetBSD: Makefile.inc,v 1.35.6.1 2021/08/08 10:11:39 martin Exp $ 2 3 COMPILER_RT_DIR= ${NETBSDSRCDIR}/sys/external/bsd/compiler_rt 4 COMPILER_RT_SRCDIR= ${COMPILER_RT_DIR}/dist 5 6 .if ${LIBC_MACHINE_ARCH} == "powerpc" || ${LIBC_MACHINE_ARCH} == "powerpc64" 7 COMPILER_RT_CPU_DIR= ${COMPILER_RT_SRCDIR}/lib/builtins/ppc 8 COMPILER_RT_ARCH_DIR= ${COMPILER_RT_SRCDIR}/lib/builtins/ppc 9 .else 10 COMPILER_RT_CPU_DIR= ${COMPILER_RT_SRCDIR}/lib/builtins/${LIBC_MACHINE_CPU} 11 COMPILER_RT_ARCH_DIR= ${COMPILER_RT_SRCDIR}/lib/builtins/${LIBC_MACHINE_ARCH} 12 .endif 13 14 .PATH: ${COMPILER_RT_CPU_DIR} 15 .PATH: ${COMPILER_RT_ARCH_DIR} 16 .PATH: ${COMPILER_RT_SRCDIR}/lib/builtins 17 .PATH: ${COMPILER_RT_SRCDIR}/lib/profile 18 19 # Complex support needs parts of libm 20 #GENERIC_SRCS+= 21 # mulxc3.c \ 22 # mulsc3.c \ 23 # divxc3.c \ 24 # divdc3.c \ 25 # divsc3.c 26 27 # Implemented on top of our atomic interface. 28 #GENERIC_SRCS+= atomic.c 29 30 .if ${HAVE_LIBGCC_EH} == "no" 31 GENERIC_SRCS+= \ 32 gcc_personality_v0.c 33 .endif 34 35 GENERIC_SRCS+= \ 36 absvsi2.c \ 37 absvti2.c \ 38 addvsi3.c \ 39 addvti3.c \ 40 ashlti3.c \ 41 ashrti3.c \ 42 clzti2.c \ 43 cmpti2.c \ 44 ctzti2.c \ 45 divti3.c \ 46 ffsti2.c \ 47 fixsfdi.c \ 48 fixdfdi.c \ 49 fixunsdfdi.c \ 50 fixunsdfsi.c \ 51 fixunssfdi.c \ 52 fixunssfsi.c \ 53 fixunsxfdi.c \ 54 fixunsxfsi.c \ 55 int_util.c \ 56 lshrti3.c \ 57 modti3.c \ 58 muldc3.c \ 59 mulosi4.c \ 60 muloti4.c \ 61 multi3.c \ 62 mulvsi3.c \ 63 mulvti3.c \ 64 negti2.c \ 65 negvsi2.c \ 66 negvti2.c \ 67 paritysi2.c \ 68 parityti2.c \ 69 popcountsi2.c \ 70 popcountti2.c \ 71 subvsi3.c \ 72 subvti3.c \ 73 ucmpti2.c \ 74 udivmodti4.c \ 75 udivti3.c \ 76 umodti3.c 77 78 # only used for machines using IEEE 754 floating point formats 79 .if ${MACHINE_ARCH} != "vax" 80 81 .if 0 82 # Conflicts with soft-float 83 GENERIC_SRCS+= \ 84 comparedf2.c \ 85 comparesf2.c \ 86 adddf3.c \ 87 addsf3.c \ 88 addtf3.c \ 89 divdf3.c \ 90 divsf3.c \ 91 divtf3.c \ 92 extendsfdf2.c \ 93 extendsftf2.c \ 94 extenddftf2.c \ 95 fixdfsi.c \ 96 fixdfti.c \ 97 fixsfsi.c \ 98 fixsfti.c \ 99 floatsidf.c \ 100 floatsisf.c \ 101 floatunsidf.c \ 102 floatunsisf.c \ 103 muldf3.c \ 104 mulsf3.c \ 105 multf3.c \ 106 subdf3.c \ 107 subsf3.c \ 108 subtf3.c \ 109 truncdfsf2.c \ 110 trunctfdf2.c \ 111 trunctfsf2.c 112 .endif 113 114 GENERIC_SRCS+= \ 115 floatdidf.c \ 116 floatdisf.c \ 117 floatdixf.c \ 118 floatundidf.c \ 119 floatundisf.c \ 120 floatundixf.c \ 121 negdf2.c \ 122 negsf2.c \ 123 powidf2.c \ 124 powisf2.c \ 125 powitf2.c \ 126 powixf2.c 127 128 .endif # IEEE 754 only machines 129 130 .if ${MACHINE_ARCH} != "m68k" 131 GENERIC_SRCS+= \ 132 fixxfdi.c 133 .endif 134 135 136 .if ${MACHINE_ARCH} != "aarch64" 137 GENERIC_SRCS+= \ 138 fixunsdfti.c \ 139 fixunssfti.c \ 140 fixunsxfti.c \ 141 fixxfti.c \ 142 floattidf.c \ 143 floattisf.c \ 144 floattixf.c \ 145 floatuntidf.c \ 146 floatuntisf.c \ 147 floatuntixf.c 148 .endif 149 150 # These have h/w instructions which are always used. 151 .if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_CPU} != "aarch64" \ 152 && ${LIBC_MACHINE_CPU} != "powerpc" && ${LIBC_MACHINE_CPU} != "or1k" 153 GENERIC_SRCS+= \ 154 clzsi2.c 155 .endif 156 157 # These have h/w instructions which are always used. 158 .if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_ARCH} != "vax" \ 159 && ${LIBC_MACHINE_CPU} != "aarch64" && ${LIBC_MACHINE_CPU} != "powerpc" \ 160 && ${LIBC_MACHINE_CPU} != "or1k" 161 GENERIC_SRCS+= \ 162 ctzsi2.c 163 .endif 164 165 # These have h/w instructions which are always used. 166 .if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_CPU} != "powerpc" \ 167 && ${LIBC_MACHINE_CPU} != "aarch64" && ${LIBC_MACHINE_ARCH} != "vax" 168 GENERIC_SRCS+= \ 169 divmodsi4.c \ 170 divsi3.c \ 171 modsi3.c \ 172 udivmodsi4.c \ 173 umodsi3.c 174 175 . if ${LIBC_MACHINE_CPU} != "sh3" 176 # On sh3 __udivsi3 is gcc "millicode" with special calling convention 177 # (less registers clobbered than usual). Each DSO that needs it gets 178 # its own hidden copy from libgcc.a. 179 GENERIC_SRCS+= \ 180 udivsi3.c 181 . endif 182 .endif 183 184 185 GENERIC_SRCS+= \ 186 absvdi2.c \ 187 addvdi3.c \ 188 mulodi4.c \ 189 mulvdi3.c \ 190 negvdi2.c \ 191 paritydi2.c \ 192 popcountdi2.c \ 193 subvdi3.c 194 195 # These have h/w instructions which are always used. 196 .if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_CPU} != "powerpc64" \ 197 && ${LIBC_MACHINE_ARCH} != "aarch64" && ${LIBC_MACHINE_CPU} != "or1k" 198 GENERIC_SRCS+= \ 199 clzdi2.c \ 200 ctzdi2.c \ 201 ffsdi2.c 202 .endif 203 204 # Don't need these on 64-bit machines. 205 .if empty(LIBC_MACHINE_ARCH:M*64*) && ${LIBC_MACHINE_ARCH} != "alpha" 206 GENERIC_SRCS+= \ 207 cmpdi2.c \ 208 ashldi3.c \ 209 ashrdi3.c \ 210 divdi3.c \ 211 divmoddi4.c \ 212 lshrdi3.c \ 213 moddi3.c \ 214 muldi3.c \ 215 negdi2.c \ 216 ucmpdi2.c \ 217 udivdi3.c \ 218 udivmoddi4.c \ 219 umoddi3.c 220 .endif 221 222 GENERIC_SRCS+= \ 223 GCDAProfiling.c \ 224 InstrProfiling.c \ 225 InstrProfilingBuffer.c \ 226 InstrProfilingFile.c \ 227 InstrProfilingPlatformLinux.c \ 228 InstrProfilingUtil.c \ 229 InstrProfilingValue.c \ 230 InstrProfilingWriter.c 231 232 .if ${MKPROFILE} != "no" 233 POBJS+= InstrProfilingRuntime.po 234 .endif 235 236 .if ${LIBC_MACHINE_ARCH} == "powerpc" || ${LIBC_MACHINE_ARCH} == "powerpc64" 237 GENERIC_SRCS+= \ 238 fixtfdi.c \ 239 fixunstfdi.c \ 240 floatditf.c \ 241 floatunditf.c \ 242 gcc_qadd.c \ 243 gcc_qdiv.c \ 244 gcc_qmul.c \ 245 gcc_qsub.c 246 .endif 247 248 .if ${LIBC_MACHINE_CPU} == "aarch64" 249 GENERIC_SRCS+= \ 250 clear_cache.c 251 .endif 252 253 .if ${LIBC_MACHINE_ARCH} == "powerpc" || ${LIBC_MACHINE_ARCH} == "powerpc64" 254 GENERIC_SRCS+= \ 255 clear_cache.c 256 .endif 257 258 .if ${LIBC_MACHINE_ARCH} == "sparc" || ${LIBC_MACHINE_ARCH} == "sparc64" 259 GENERIC_SRCS+= \ 260 clear_cache.c 261 .endif 262 263 .if ${LIBC_MACHINE_CPU} == "arm" 264 .if !empty(LIBC_MACHINE_ARCH:Mearm*) 265 GENERIC_SRCS+= \ 266 aeabi_idivmod.S \ 267 aeabi_ldivmod.S \ 268 aeabi_uidivmod.S \ 269 aeabi_uldivmod.S 270 .endif 271 GENERIC_SRCS+= \ 272 clear_cache.c 273 # Not yet, overlaps with softfloat 274 # aeabi_dcmp.S \ 275 # aeabi_fcmp.S 276 # Not yet, requires ARMv6 277 #GENERIC_SRCS+= \ 278 # bswapdi2.S \ 279 # bswapsi2.S 280 .endif 281 282 .for src in ${GENERIC_SRCS} 283 . if exists(${COMPILER_RT_CPU_DIR}/${src:R}.S) || \ 284 exists(${COMPILER_RT_ARCH_DIR}/${src:R}.S) 285 SRCS+= ${src:R}.S 286 . else 287 SRCS+= ${src} 288 . if ${src:E} != "cc" 289 COPTS.${src}+= -Wno-missing-prototypes \ 290 -Wno-old-style-definition \ 291 -Wno-strict-prototypes \ 292 -Wno-uninitialized \ 293 -Wno-cast-qual 294 . endif 295 . endif 296 .if ${MKSOFTFLOAT:Uno} != "no" 297 COPTS.${src}+= -D__SOFT_FP__ 298 .endif 299 .endfor 300 301 .include "${COMPILER_RT_DIR}/abi.mk" 302