1 # $NetBSD: Makefile.inc,v 1.38 2020/04/22 11:28:56 rin Exp $ 2 3 COMPILER_RT_SRCDIR= ${NETBSDSRCDIR}/sys/external/bsd/compiler_rt/dist 4 5 .if ${LIBC_MACHINE_ARCH} == "powerpc" || ${LIBC_MACHINE_ARCH} == "powerpc64" 6 COMPILER_RT_CPU_DIR= ${COMPILER_RT_SRCDIR}/lib/builtins/ppc 7 COMPILER_RT_ARCH_DIR= ${COMPILER_RT_SRCDIR}/lib/builtins/ppc 8 .else 9 COMPILER_RT_CPU_DIR= ${COMPILER_RT_SRCDIR}/lib/builtins/${LIBC_MACHINE_CPU} 10 COMPILER_RT_ARCH_DIR= ${COMPILER_RT_SRCDIR}/lib/builtins/${LIBC_MACHINE_ARCH} 11 .endif 12 13 .PATH: ${COMPILER_RT_CPU_DIR} 14 .PATH: ${COMPILER_RT_ARCH_DIR} 15 .PATH: ${COMPILER_RT_SRCDIR}/lib/builtins 16 .PATH: ${COMPILER_RT_SRCDIR}/lib/profile 17 18 # Complex support needs parts of libm 19 #GENERIC_SRCS+= 20 # mulxc3.c \ 21 # mulsc3.c \ 22 # divxc3.c \ 23 # divdc3.c \ 24 # divsc3.c 25 26 # Implemented on top of our atomic interface. 27 #GENERIC_SRCS+= atomic.c 28 29 .if ${HAVE_LIBGCC_EH} == "no" 30 GENERIC_SRCS+= \ 31 gcc_personality_v0.c 32 .endif 33 34 GENERIC_SRCS+= \ 35 absvsi2.c \ 36 absvti2.c \ 37 addvsi3.c \ 38 addvti3.c \ 39 ashlti3.c \ 40 ashrti3.c \ 41 clzti2.c \ 42 cmpti2.c \ 43 ctzti2.c \ 44 divti3.c \ 45 ffsti2.c \ 46 fixsfdi.c \ 47 fixdfdi.c \ 48 fixunsdfdi.c \ 49 fixunsdfsi.c \ 50 fixunssfdi.c \ 51 fixunssfsi.c \ 52 fixunsxfdi.c \ 53 fixunsxfsi.c \ 54 int_util.c \ 55 lshrti3.c \ 56 modti3.c \ 57 muldc3.c \ 58 mulosi4.c \ 59 muloti4.c \ 60 multi3.c \ 61 mulvsi3.c \ 62 mulvti3.c \ 63 negti2.c \ 64 negvsi2.c \ 65 negvti2.c \ 66 paritysi2.c \ 67 parityti2.c \ 68 popcountsi2.c \ 69 popcountti2.c \ 70 subvsi3.c \ 71 subvti3.c \ 72 ucmpti2.c \ 73 udivmodti4.c \ 74 udivti3.c \ 75 umodti3.c 76 77 # only used for machines using IEEE 754 floating point formats 78 .if ${MACHINE_ARCH} != "vax" 79 80 .if 0 81 # Conflicts with soft-float 82 GENERIC_SRCS+= \ 83 comparedf2.c \ 84 comparesf2.c \ 85 adddf3.c \ 86 addsf3.c \ 87 addtf3.c \ 88 divdf3.c \ 89 divsf3.c \ 90 divtf3.c \ 91 extendsfdf2.c \ 92 extendsftf2.c \ 93 extenddftf2.c \ 94 fixdfsi.c \ 95 fixdfti.c \ 96 fixsfsi.c \ 97 fixsfti.c \ 98 floatsidf.c \ 99 floatsisf.c \ 100 floatunsidf.c \ 101 floatunsisf.c \ 102 muldf3.c \ 103 mulsf3.c \ 104 multf3.c \ 105 subdf3.c \ 106 subsf3.c \ 107 subtf3.c \ 108 truncdfsf2.c \ 109 trunctfdf2.c \ 110 trunctfsf2.c 111 .endif 112 113 GENERIC_SRCS+= \ 114 floatdidf.c \ 115 floatdisf.c \ 116 floatdixf.c \ 117 floatundidf.c \ 118 floatundisf.c \ 119 floatundixf.c \ 120 negdf2.c \ 121 negsf2.c \ 122 powidf2.c \ 123 powisf2.c \ 124 powitf2.c \ 125 powixf2.c 126 127 .endif # IEEE 754 only machines 128 129 .if ${MACHINE_ARCH} != "m68k" 130 GENERIC_SRCS+= \ 131 fixxfdi.c 132 .endif 133 134 135 .if ${MACHINE_ARCH} != "aarch64" 136 GENERIC_SRCS+= \ 137 fixunsdfti.c \ 138 fixunssfti.c \ 139 fixunsxfti.c \ 140 fixxfti.c \ 141 floattidf.c \ 142 floattisf.c \ 143 floattixf.c \ 144 floatuntidf.c \ 145 floatuntisf.c \ 146 floatuntixf.c 147 .else 148 GENERIC_SRCS+= \ 149 comparetf2.c 150 .endif 151 152 # These have h/w instructions which are always used. 153 .if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_CPU} != "aarch64" \ 154 && ${LIBC_MACHINE_CPU} != "powerpc" && ${LIBC_MACHINE_CPU} != "or1k" 155 GENERIC_SRCS+= \ 156 clzsi2.c 157 .endif 158 159 # These have h/w instructions which are always used. 160 .if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_ARCH} != "vax" \ 161 && ${LIBC_MACHINE_CPU} != "aarch64" && ${LIBC_MACHINE_CPU} != "powerpc" \ 162 && ${LIBC_MACHINE_CPU} != "or1k" 163 GENERIC_SRCS+= \ 164 ctzsi2.c 165 .endif 166 167 # These have h/w instructions which are always used. 168 .if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_CPU} != "powerpc" \ 169 && ${LIBC_MACHINE_CPU} != "aarch64" && ${LIBC_MACHINE_ARCH} != "vax" 170 GENERIC_SRCS+= \ 171 divmodsi4.c \ 172 divsi3.c \ 173 modsi3.c \ 174 udivmodsi4.c \ 175 umodsi3.c 176 177 . if ${LIBC_MACHINE_CPU} != "sh3" 178 # On sh3 __udivsi3 is gcc "millicode" with special calling convention 179 # (less registers clobbered than usual). Each DSO that needs it gets 180 # its own hidden copy from libgcc.a. 181 GENERIC_SRCS+= \ 182 udivsi3.c 183 . endif 184 .endif 185 186 187 GENERIC_SRCS+= \ 188 absvdi2.c \ 189 addvdi3.c \ 190 mulodi4.c \ 191 mulvdi3.c \ 192 negvdi2.c \ 193 paritydi2.c \ 194 popcountdi2.c \ 195 subvdi3.c 196 197 # These have h/w instructions which are always used. 198 .if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_CPU} != "powerpc64" \ 199 && ${LIBC_MACHINE_ARCH} != "aarch64" && ${LIBC_MACHINE_CPU} != "or1k" 200 GENERIC_SRCS+= \ 201 clzdi2.c \ 202 ctzdi2.c \ 203 ffsdi2.c 204 .endif 205 206 # Don't need these on 64-bit machines. 207 .if empty(LIBC_MACHINE_ARCH:M*64*) && ${LIBC_MACHINE_ARCH} != "alpha" 208 GENERIC_SRCS+= \ 209 cmpdi2.c \ 210 ashldi3.c \ 211 ashrdi3.c \ 212 divdi3.c \ 213 divmoddi4.c \ 214 lshrdi3.c \ 215 moddi3.c \ 216 muldi3.c \ 217 negdi2.c \ 218 ucmpdi2.c \ 219 udivdi3.c \ 220 udivmoddi4.c \ 221 umoddi3.c 222 .endif 223 224 GENERIC_SRCS+= \ 225 GCDAProfiling.c \ 226 InstrProfiling.c \ 227 InstrProfilingBuffer.c \ 228 InstrProfilingFile.c \ 229 InstrProfilingPlatformLinux.c \ 230 InstrProfilingUtil.c \ 231 InstrProfilingValue.c \ 232 InstrProfilingWriter.c 233 234 .if ${MKPROFILE} != "no" 235 POBJS+= InstrProfilingRuntime.po 236 .endif 237 238 .if ${LIBC_MACHINE_ARCH} == "powerpc" || ${LIBC_MACHINE_ARCH} == "powerpc64" 239 GENERIC_SRCS+= \ 240 fixtfdi.c \ 241 fixunstfdi.c \ 242 floatditf.c \ 243 floatunditf.c \ 244 gcc_qadd.c \ 245 gcc_qdiv.c \ 246 gcc_qmul.c \ 247 gcc_qsub.c 248 .endif 249 250 .if ${LIBC_MACHINE_CPU} == "aarch64" 251 GENERIC_SRCS+= \ 252 clear_cache.c 253 .endif 254 255 .if ${LIBC_MACHINE_ARCH} == "powerpc" || ${LIBC_MACHINE_ARCH} == "powerpc64" 256 GENERIC_SRCS+= \ 257 clear_cache.c 258 .endif 259 260 .if ${LIBC_MACHINE_ARCH} == "sparc" || ${LIBC_MACHINE_ARCH} == "sparc64" 261 GENERIC_SRCS+= \ 262 clear_cache.c 263 .endif 264 265 .if ${LIBC_MACHINE_CPU} == "arm" 266 .if !empty(LIBC_MACHINE_ARCH:Mearm*) 267 GENERIC_SRCS+= \ 268 aeabi_idivmod.S \ 269 aeabi_ldivmod.S \ 270 aeabi_uidivmod.S \ 271 aeabi_uldivmod.S 272 .endif 273 GENERIC_SRCS+= \ 274 clear_cache.c 275 # Not yet, overlaps with softfloat 276 # aeabi_dcmp.S \ 277 # aeabi_fcmp.S 278 # Not yet, requires ARMv6 279 #GENERIC_SRCS+= \ 280 # bswapdi2.S \ 281 # bswapsi2.S 282 .endif 283 284 .for src in ${GENERIC_SRCS} 285 . if exists(${COMPILER_RT_CPU_DIR}/${src:R}.S) || \ 286 exists(${COMPILER_RT_ARCH_DIR}/${src:R}.S) 287 SRCS+= ${src:R}.S 288 . else 289 SRCS+= ${src} 290 . if ${src:E} != "cc" 291 COPTS.${src}+= -Wno-missing-prototypes \ 292 -Wno-old-style-definition \ 293 -Wno-strict-prototypes \ 294 -Wno-uninitialized \ 295 -Wno-cast-qual 296 . endif 297 . endif 298 .if ${MKSOFTFLOAT:Uno} != "no" 299 COPTS.${src}+= -D__SOFT_FP__ 300 .endif 301 .endfor 302