mdreloc.c revision 1.1
1 /* $NetBSD: mdreloc.c,v 1.1 2000/07/13 23:14:18 eeh Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Eduardo Horvath. 5 * Copyright (c) 1999 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Paul Kranenburg. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 #include <errno.h> 41 #include <stdio.h> 42 #include <stdlib.h> 43 #include <string.h> 44 #include <unistd.h> 45 #include <sys/stat.h> 46 47 #include "rtldenv.h" 48 #include "debug.h" 49 #include "rtld.h" 50 51 /* 52 * The following table holds for each relocation type: 53 * - the width in bits of the memory location the relocation 54 * applies to (not currently used) 55 * - the number of bits the relocation value must be shifted to the 56 * right (i.e. discard least significant bits) to fit into 57 * the appropriate field in the instruction word. 58 * - flags indicating whether 59 * * the relocation involves a symbol 60 * * the relocation is relative to the current position 61 * * the relocation is for a GOT entry 62 * * the relocation is relative to the load address 63 * 64 */ 65 #define _RF_S 0x80000000 /* Resolve symbol */ 66 #define _RF_A 0x40000000 /* Use addend */ 67 #define _RF_P 0x20000000 /* Location relative */ 68 #define _RF_G 0x10000000 /* GOT offset */ 69 #define _RF_B 0x08000000 /* Load address relative */ 70 #define _RF_SZ(s) (((s) & 0xff) << 8) /* memory target size */ 71 #define _RF_RS(s) ( (s) & 0xff) /* right shift */ 72 static int reloc_target_flags[] = { 73 0, /* NONE */ 74 _RF_S|_RF_A| _RF_SZ(8) | _RF_RS(0), /* RELOC_8 */ 75 _RF_S|_RF_A| _RF_SZ(16) | _RF_RS(0), /* RELOC_16 */ 76 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* RELOC_32 */ 77 _RF_S|_RF_A|_RF_P| _RF_SZ(8) | _RF_RS(0), /* DISP_8 */ 78 _RF_S|_RF_A|_RF_P| _RF_SZ(16) | _RF_RS(0), /* DISP_16 */ 79 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(0), /* DISP_32 */ 80 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WDISP_30 */ 81 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WDISP_22 */ 82 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(10), /* HI22 */ 83 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 22 */ 84 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 13 */ 85 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* LO10 */ 86 _RF_G| _RF_SZ(32) | _RF_RS(0), /* GOT10 */ 87 _RF_G| _RF_SZ(32) | _RF_RS(0), /* GOT13 */ 88 _RF_G| _RF_SZ(32) | _RF_RS(10), /* GOT22 */ 89 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(0), /* PC10 */ 90 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(10), /* PC22 */ 91 _RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WPLT30 */ 92 _RF_SZ(32) | _RF_RS(0), /* COPY */ 93 _RF_S|_RF_A| _RF_SZ(64) | _RF_RS(0), /* GLOB_DAT */ 94 _RF_SZ(32) | _RF_RS(0), /* JMP_SLOT */ 95 _RF_A| _RF_B| _RF_SZ(64) | _RF_RS(0), /* RELATIVE */ 96 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* UA_32 */ 97 98 _RF_A| _RF_SZ(32) | _RF_RS(0), /* PLT32 */ 99 _RF_A| _RF_SZ(32) | _RF_RS(10), /* HIPLT22 */ 100 _RF_A| _RF_SZ(32) | _RF_RS(0), /* LOPLT10 */ 101 _RF_A|_RF_P| _RF_SZ(32) | _RF_RS(0), /* PCPLT32 */ 102 _RF_A|_RF_P| _RF_SZ(32) | _RF_RS(10), /* PCPLT22 */ 103 _RF_A|_RF_P| _RF_SZ(32) | _RF_RS(0), /* PCPLT10 */ 104 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 10 */ 105 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 11 */ 106 _RF_S|_RF_A| _RF_SZ(64) | _RF_RS(0), /* 64 */ 107 _RF_S|_RF_A|/*extra*/ _RF_SZ(32) | _RF_RS(0), /* OLO10 */ 108 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(42), /* HH22 */ 109 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(32), /* HM10 */ 110 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(10), /* LM22 */ 111 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(42), /* PC_HH22 */ 112 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(32), /* PC_HM10 */ 113 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(10), /* PC_LM22 */ 114 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WDISP16 */ 115 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WDISP19 */ 116 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* GLOB_JMP */ 117 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 7 */ 118 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 5 */ 119 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 6 */ 120 _RF_S|_RF_A|_RF_P| _RF_SZ(64) | _RF_RS(0), /* DISP64 */ 121 _RF_A| _RF_SZ(64) | _RF_RS(0), /* PLT64 */ 122 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(10), /* HIX22 */ 123 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* LOX10 */ 124 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(22), /* H44 */ 125 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(12), /* M44 */ 126 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* L44 */ 127 _RF_S|_RF_A| _RF_SZ(64) | _RF_RS(0), /* REGISTER */ 128 _RF_S|_RF_A| _RF_SZ(64) | _RF_RS(0), /* UA64 */ 129 _RF_S|_RF_A| _RF_SZ(16) | _RF_RS(0), /* UA16 */ 130 }; 131 132 #ifdef RTLD_DEBUG_RELOC 133 static const char *reloc_names[] = { 134 "NONE", "RELOC_8", "RELOC_16", "RELOC_32", "DISP_8", 135 "DISP_16", "DISP_32", "WDISP_30", "WDISP_22", "HI22", 136 "22", "13", "LO10", "GOT10", "GOT13", 137 "GOT22", "PC10", "PC22", "WPLT30", "COPY", 138 "GLOB_DAT", "JMP_SLOT", "RELATIVE", "UA_32", "PLT32", 139 "HIPLT22", "LOPLT10", "LOPLT10", "PCPLT22", "PCPLT32", 140 "10", "11", "64", "OLO10", "HH22", 141 "HM10", "LM22", "PC_HH22", "PC_HM10", "PC_LM22", 142 "WDISP16", "WDISP19", "GLOB_JMP", "7", "5", "6", 143 "DISP64", "PLT64", "HIX22", "LOX10", "H44", "M44", 144 "L44", "REGISTER", "UA64", "UA16" 145 }; 146 #endif 147 148 #define RELOC_RESOLVE_SYMBOL(t) ((reloc_target_flags[t] & _RF_S) != 0) 149 #define RELOC_PC_RELATIVE(t) ((reloc_target_flags[t] & _RF_P) != 0) 150 #define RELOC_BASE_RELATIVE(t) ((reloc_target_flags[t] & _RF_B) != 0) 151 #define RELOC_TARGET_SIZE(t) ((reloc_target_flags[t] >> 8) & 0xff) 152 #define RELOC_VALUE_RIGHTSHIFT(t) (reloc_target_flags[t] & 0xff) 153 154 static long reloc_target_bitmask[] = { 155 #define _BM(x) (~(-(1ULL << (x)))) 156 0, /* NONE */ 157 _BM(8), _BM(16), _BM(32), /* RELOC_8, _16, _32 */ 158 _BM(8), _BM(16), _BM(32), /* DISP8, DISP16, DISP32 */ 159 _BM(30), _BM(22), /* WDISP30, WDISP22 */ 160 _BM(22), _BM(22), /* HI22, _22 */ 161 _BM(13), _BM(10), /* RELOC_13, _LO10 */ 162 _BM(10), _BM(13), _BM(22), /* GOT10, GOT13, GOT22 */ 163 _BM(10), _BM(22), /* _PC10, _PC22 */ 164 _BM(30), 0, /* _WPLT30, _COPY */ 165 _BM(32), _BM(32), _BM(32), /* _GLOB_DAT, JMP_SLOT, _RELATIVE */ 166 _BM(32), _BM(32), /* _UA32, PLT32 */ 167 _BM(22), _BM(10), /* _HIPLT22, LOPLT10 */ 168 _BM(32), _BM(22), _BM(10), /* _PCPLT32, _PCPLT22, _PCPLT10 */ 169 _BM(10), _BM(11), -1, /* _10, _11, _64 */ 170 _BM(10), _BM(22), /* _OLO10, _HH22 */ 171 _BM(10), _BM(22), /* _HM10, _LM22 */ 172 _BM(22), _BM(10), _BM(22), /* _PC_HH22, _PC_HM10, _PC_LM22 */ 173 _BM(16), _BM(19), /* _WDISP16, _WDISP19 */ 174 -1, /* GLOB_JMP */ 175 _BM(7), _BM(5), _BM(6) /* _7, _5, _6 */ 176 -1, -1, /* DISP64, PLT64 */ 177 _BM(22), _BM(13), /* HIX22, LOX10 */ 178 _BM(22), _BM(10), _BM(13), /* H44, M44, L44 */ 179 -1, -1, _BM(16), /* REGISTER, UA64, UA16 */ 180 #undef _BM 181 }; 182 #define RELOC_VALUE_BITMASK(t) (reloc_target_bitmask[t]) 183 184 185 int 186 _rtld_relocate_nonplt_object(obj, rela, dodebug) 187 Obj_Entry *obj; 188 const Elf_RelA *rela; 189 bool dodebug; 190 { 191 Elf_Addr *where = (Elf_Addr *) (obj->relocbase + rela->r_offset); 192 Elf_Word type, value, mask; 193 const Elf_Sym *def = NULL; 194 const Obj_Entry *defobj = NULL; 195 196 type = ELF_R_TYPE(rela->r_info); 197 if (type == R_TYPE(NONE)) 198 return (0); 199 200 /* We do JMP_SLOTs in relocate_plt_object() below */ 201 if (type == R_TYPE(JMP_SLOT)) 202 return (0); 203 204 /* COPY relocs are also handled elsewhere */ 205 if (type == R_TYPE(COPY)) 206 return (0); 207 208 /* 209 * We use the fact that relocation types are an `enum' 210 * Note: R_SPARC_UA16 is currently numerically largest. 211 */ 212 if (type > R_TYPE(UA16)) 213 return (-1); 214 215 value = rela->r_addend; 216 217 /* 218 * Handle relative relocs here, because we might not 219 * be able to access globals yet. 220 */ 221 if (!dodebug && type == R_TYPE(RELATIVE)) { 222 *where += (Elf_Addr)(obj->relocbase + value); 223 return (0); 224 } 225 226 if (RELOC_RESOLVE_SYMBOL(type)) { 227 228 /* Find the symbol */ 229 def = _rtld_find_symdef(_rtld_objlist, rela->r_info, 230 NULL, obj, &defobj, false); 231 if (def == NULL) 232 return (-1); 233 234 /* Add in the symbol's absolute address */ 235 value += (Elf_Word)(defobj->relocbase + def->st_value); 236 } 237 238 if (RELOC_PC_RELATIVE(type)) { 239 value -= (Elf_Word)where; 240 } 241 242 if (RELOC_BASE_RELATIVE(type)) { 243 /* 244 * Note that even though sparcs use `Elf_rela' exclusively 245 * we still need the implicit memory addend in relocations 246 * referring to GOT entries. Undoubtedly, someone f*cked 247 * this up in the distant past, and now we're stuck with 248 * it in the name of compatibility for all eternity.. 249 * 250 * In any case, the implicit and explicit should be mutually 251 * exclusive. We provide a check for that here. 252 */ 253 #define DIAGNOSTIC 254 #ifdef DIAGNOSTIC 255 if (value != 0 && *where != 0) { 256 xprintf("BASE_REL(%s): where=%p, *where 0x%lx, " 257 "addend=0x%lx, base %p\n", 258 obj->path, where, *where, 259 rela->r_addend, obj->relocbase); 260 } 261 #endif 262 value += (Elf_Word)(obj->relocbase + *where); 263 } 264 265 mask = RELOC_VALUE_BITMASK(type); 266 value >>= RELOC_VALUE_RIGHTSHIFT(type); 267 value &= mask; 268 269 /* We ignore alignment restrictions here */ 270 if (RELOC_TARGET_SIZE(type) > 32) { 271 *where &= ~mask; 272 *where |= value; 273 #ifdef RTLD_DEBUG_RELOC 274 value = (Elf_Word)*where; 275 #endif 276 } else { 277 Elf32_Addr *where32 = (Elf32_Addr *)where; 278 279 *where32 &= ~mask; 280 *where32 |= value; 281 #ifdef RTLD_DEBUG_RELOC 282 value = (Elf_Word)*where32; 283 #endif 284 } 285 286 #ifdef RTLD_DEBUG_RELOC 287 if (RELOC_RESOLVE_SYMBOL(type)) { 288 rdbg(dodebug, ("%s %s in %s --> %p %s", 289 reloc_names[type], 290 defobj->strtab + def->st_name, obj->path, 291 (void *)value, defobj->path)); 292 } 293 else { 294 rdbg(dodebug, ("%s --> %p", reloc_names[type], 295 (void *)value)); 296 } 297 #endif 298 return (0); 299 } 300 301 /* 302 * Instruction templates: 303 */ 304 #define BAA 0x10400000 /* ba,a %xcc, 0 */ 305 #define SETHI 0x03000000 /* sethi %hi(0), %g1 */ 306 #define JMP 0x81c06000 /* jmpl %g1+%lo(0), %g0 */ 307 #define NOP 0x01000000 /* sethi %hi(0), %g0 */ 308 #define OR 0x82806000 /* or %g1, 0, %g1 */ 309 #define XOR 0x82c06000 /* xor %g1, 0, %g1 */ 310 #define MOV71 0x8283a000 /* or %o7, 0, %g1 */ 311 #define MOV17 0x9c806000 /* or %g1, 0, %o7 */ 312 #define CALL 0x40000000 /* call 0 */ 313 #define SLLX 0x8b407000 /* sllx %g1, 0, %g1 */ 314 #define SETHIG5 0x0b000000 /* sethi %hi(0), %g5 */ 315 #define ORG5 0x82804005 /* or %g1, %g5, %g1 */ 316 317 318 /* %hi(v) with variable shift */ 319 #define HIVAL(v, s) (((v) >> (s)) & 0x003fffff) 320 #define LOVAL(v) ((v) & 0x000003ff) 321 322 int 323 _rtld_relocate_plt_object(obj, rela, addrp, bind_now, dodebug) 324 Obj_Entry *obj; 325 const Elf_RelA *rela; 326 caddr_t *addrp; 327 bool bind_now; 328 bool dodebug; 329 { 330 const Elf_Sym *def; 331 const Obj_Entry *defobj; 332 Elf32_Word *where = (Elf32_Word *) (obj->relocbase + rela->r_offset); 333 Elf_Addr value, offset; 334 335 if (bind_now == 0 && obj->pltgot != NULL) 336 return (0); 337 338 /* Fully resolve procedure addresses now */ 339 340 assert(ELF_R_TYPE(rela->r_info) == R_TYPE(JMP_SLOT)); 341 342 def = _rtld_find_symdef(_rtld_objlist, rela->r_info, 343 NULL, obj, &defobj, true); 344 if (def == NULL) 345 return (-1); 346 347 value = (Elf_Addr) (defobj->relocbase + def->st_value); 348 rdbg(dodebug, ("bind now %d/fixup in %s --> old=%p new=%p", 349 (int)bind_now, defobj->strtab + def->st_name, 350 (void *)*where, (void *)value)); 351 352 /* 353 * At the PLT entry pointed at by `where', we now construct 354 * a direct transfer to the now fully resolved function 355 * address. 356 * 357 * A PLT entry is supposed to start by looking like this: 358 * 359 * sethi %hi(. - .PLT0), %g1 360 * ba,a %xcc, .PLT1 361 * nop 362 * nop 363 * nop 364 * nop 365 * nop 366 * nop 367 * 368 * When we replace these entries we start from the second 369 * entry and do it in reverse order so the last thing we 370 * do is replace the branch. That allows us to change this 371 * atomically. 372 * 373 * We now need to find out how far we need to jump. We 374 * have a choice of several different relocation techniques 375 * which are increasingly expensive. 376 */ 377 378 offset = ((Elf_Addr)where) - value; 379 if (rela->r_addend) { 380 Elf_Addr *ptr = (Elf_Addr *)where; 381 /* 382 * This entry is >32768. Just replace the pointer. 383 */ 384 ptr[0] = value; 385 386 } else if (offset <= (1L<<20) && offset >= -(1L<<20)) { 387 /* 388 * We're within 1MB -- we can use a direct branch insn. 389 * 390 * We can generate this pattern: 391 * 392 * sethi %hi(. - .PLT0), %g1 393 * ba,a %xcc, addr 394 * nop 395 * nop 396 * nop 397 * nop 398 * nop 399 * nop 400 * 401 */ 402 where[1] = BAA | ((offset >> 2) &0x3fffff); 403 __asm __volatile("iflush %0+4" : : "r" (where)); 404 } else if (value >= 0 && value < (1L<<32)) { 405 /* 406 * We're withing 32-bits of address zero. 407 * 408 * The resulting code in the jump slot is: 409 * 410 * sethi %hi(. - .PLT0), %g1 411 * sethi %hi(addr), %g1 412 * jmp %g1+%lo(addr) 413 * nop 414 * nop 415 * nop 416 * nop 417 * nop 418 * 419 */ 420 where[2] = JMP | LOVAL(value); 421 where[1] = SETHI | HIVAL(value, 10); 422 __asm __volatile("iflush %0+8" : : "r" (where)); 423 __asm __volatile("iflush %0+4" : : "r" (where)); 424 425 } else if (value <= 0 && value > -(1L<<32)) { 426 /* 427 * We're withing 32-bits of address -1. 428 * 429 * The resulting code in the jump slot is: 430 * 431 * sethi %hi(. - .PLT0), %g1 432 * sethi %hix(addr), %g1 433 * xor %g1, %lox(addr), %g1 434 * jmp %g1 435 * nop 436 * nop 437 * nop 438 * nop 439 * 440 */ 441 where[3] = JMP; 442 where[2] = XOR | ((~value) & 0x00001fff); 443 where[1] = SETHI | HIVAL(~value, 10); 444 __asm __volatile("iflush %0+12" : : "r" (where)); 445 __asm __volatile("iflush %0+8" : : "r" (where)); 446 __asm __volatile("iflush %0+4" : : "r" (where)); 447 448 } else if (offset <= (1L<<32) && offset >= -((1L<<32) - 4)) { 449 /* 450 * We're withing 32-bits -- we can use a direct call insn 451 * 452 * The resulting code in the jump slot is: 453 * 454 * sethi %hi(. - .PLT0), %g1 455 * mov %o7, %g1 456 * call (.+offset) 457 * mov %g1, %o7 458 * nop 459 * nop 460 * nop 461 * nop 462 * 463 */ 464 where[3] = MOV17; 465 where[2] = CALL | ((offset >> 4) & 0x3fffffff); 466 where[1] = MOV71; 467 __asm __volatile("iflush %0+12" : : "r" (where)); 468 __asm __volatile("iflush %0+8" : : "r" (where)); 469 __asm __volatile("iflush %0+4" : : "r" (where)); 470 471 } else if (offset >= 0 && offset < (1L<<44)) { 472 /* 473 * We're withing 44 bits. We can generate this pattern: 474 * 475 * The resulting code in the jump slot is: 476 * 477 * sethi %hi(. - .PLT0), %g1 478 * sethi %h44(addr), %g1 479 * or %g1, %m44(addr), %g1 480 * sllx %g1, 12, %g1 481 * jmp %g1+%l44(addr) 482 * nop 483 * nop 484 * nop 485 * 486 */ 487 where[4] = JMP | LOVAL(offset); 488 where[3] = SLLX | 12; 489 where[2] = OR | (((offset) >> 12) & 0x00001fff); 490 where[1] = SETHI | HIVAL(offset, 22); 491 __asm __volatile("iflush %0+16" : : "r" (where)); 492 __asm __volatile("iflush %0+12" : : "r" (where)); 493 __asm __volatile("iflush %0+8" : : "r" (where)); 494 __asm __volatile("iflush %0+4" : : "r" (where)); 495 496 } else if (offset < 0 && offset > -(1L<<44)) { 497 /* 498 * We're withing 44 bits. We can generate this pattern: 499 * 500 * The resulting code in the jump slot is: 501 * 502 * sethi %hi(. - .PLT0), %g1 503 * sethi %h44(-addr), %g1 504 * xor %g1, %m44(-addr), %g1 505 * sllx %g1, 12, %g1 506 * jmp %g1+%l44(addr) 507 * nop 508 * nop 509 * nop 510 * 511 */ 512 where[4] = JMP | LOVAL(offset); 513 where[3] = SLLX | 12; 514 where[2] = XOR | (((~offset) >> 12) & 0x00001fff); 515 where[1] = SETHI | HIVAL(~offset, 22); 516 __asm __volatile("iflush %0+16" : : "r" (where)); 517 __asm __volatile("iflush %0+12" : : "r" (where)); 518 __asm __volatile("iflush %0+8" : : "r" (where)); 519 __asm __volatile("iflush %0+4" : : "r" (where)); 520 521 } else { 522 /* 523 * We need to load all 64-bits 524 * 525 * The resulting code in the jump slot is: 526 * 527 * sethi %hi(. - .PLT0), %g1 528 * sethi %hh(addr), %g1 529 * sethi %lm(addr), %g5 530 * or %g1, %hm(addr), %g1 531 * sllx %g1, 32, %g1 532 * or %g1, %g5, %g1 533 * jmp %g1+%lo(addr) 534 * nop 535 * 536 */ 537 where[6] = JMP | LOVAL(value); 538 where[5] = ORG5; 539 where[4] = SLLX | 12; 540 where[3] = OR | LOVAL((value) >> 32); 541 where[2] = SETHIG5 | HIVAL(value, 10); 542 where[1] = SETHI | HIVAL(value, 42); 543 __asm __volatile("iflush %0+20" : : "r" (where)); 544 __asm __volatile("iflush %0+16" : : "r" (where)); 545 __asm __volatile("iflush %0+16" : : "r" (where)); 546 __asm __volatile("iflush %0+12" : : "r" (where)); 547 __asm __volatile("iflush %0+8" : : "r" (where)); 548 __asm __volatile("iflush %0+4" : : "r" (where)); 549 550 } 551 552 if (addrp != NULL) 553 *addrp = (caddr_t)value; 554 555 return (0); 556 } 557 558 /* 559 * Install rtld function call into this PLT slot. 560 */ 561 #define SAVE 0x9de3bf50 562 #define SETHI_l0 0x21000000 563 #define SETHI_l1 0x23000000 564 #define OR_l0_l0 0xa0142000 565 #define SLLX_l0_32_l0 0xa12c3020 566 #define OR_l0_l1_l0 0xa0140011 567 #define JMPL_l0_o0 0x93c42000 568 #define MOV_g1_o0 0x90100001 569 570 void _rtld_install_plt __P((Elf32_Word *pltgot, Elf_Addr proc)); 571 572 void 573 _rtld_install_plt(pltgot, proc) 574 Elf32_Word *pltgot; 575 Elf_Addr proc; 576 { 577 pltgot[0] = SAVE; 578 pltgot[1] = SETHI_l0 | HIVAL(proc, 42); 579 pltgot[2] = SETHI_l1 | HIVAL(proc, 10); 580 pltgot[3] = OR_l0_l0 | LOVAL((proc) >> 32); 581 pltgot[4] = SLLX_l0_32_l0; 582 pltgot[5] = OR_l0_l1_l0; 583 pltgot[6] = JMPL_l0_o0 | LOVAL(proc); 584 pltgot[7] = MOV_g1_o0; 585 } 586
Indexes created Tue Sep 30 07:10:03 GMT 2025