mdreloc.c revision 1.21
1 /* $NetBSD: mdreloc.c,v 1.21 2002/09/12 22:56:31 mycroft Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Eduardo Horvath. 5 * Copyright (c) 1999 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Paul Kranenburg. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 #include <errno.h> 41 #include <stdio.h> 42 #include <stdlib.h> 43 #include <string.h> 44 #include <unistd.h> 45 #include <sys/stat.h> 46 47 #include "rtldenv.h" 48 #include "debug.h" 49 #include "rtld.h" 50 51 /* 52 * The following table holds for each relocation type: 53 * - the width in bits of the memory location the relocation 54 * applies to (not currently used) 55 * - the number of bits the relocation value must be shifted to the 56 * right (i.e. discard least significant bits) to fit into 57 * the appropriate field in the instruction word. 58 * - flags indicating whether 59 * * the relocation involves a symbol 60 * * the relocation is relative to the current position 61 * * the relocation is for a GOT entry 62 * * the relocation is relative to the load address 63 * 64 */ 65 #define _RF_S 0x80000000 /* Resolve symbol */ 66 #define _RF_A 0x40000000 /* Use addend */ 67 #define _RF_P 0x20000000 /* Location relative */ 68 #define _RF_G 0x10000000 /* GOT offset */ 69 #define _RF_B 0x08000000 /* Load address relative */ 70 #define _RF_U 0x04000000 /* Unaligned */ 71 #define _RF_SZ(s) (((s) & 0xff) << 8) /* memory target size */ 72 #define _RF_RS(s) ( (s) & 0xff) /* right shift */ 73 static const int reloc_target_flags[] = { 74 0, /* NONE */ 75 _RF_S|_RF_A| _RF_SZ(8) | _RF_RS(0), /* RELOC_8 */ 76 _RF_S|_RF_A| _RF_SZ(16) | _RF_RS(0), /* RELOC_16 */ 77 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* RELOC_32 */ 78 _RF_S|_RF_A|_RF_P| _RF_SZ(8) | _RF_RS(0), /* DISP_8 */ 79 _RF_S|_RF_A|_RF_P| _RF_SZ(16) | _RF_RS(0), /* DISP_16 */ 80 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(0), /* DISP_32 */ 81 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WDISP_30 */ 82 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WDISP_22 */ 83 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(10), /* HI22 */ 84 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 22 */ 85 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 13 */ 86 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* LO10 */ 87 _RF_G| _RF_SZ(32) | _RF_RS(0), /* GOT10 */ 88 _RF_G| _RF_SZ(32) | _RF_RS(0), /* GOT13 */ 89 _RF_G| _RF_SZ(32) | _RF_RS(10), /* GOT22 */ 90 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(0), /* PC10 */ 91 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(10), /* PC22 */ 92 _RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WPLT30 */ 93 _RF_SZ(32) | _RF_RS(0), /* COPY */ 94 _RF_S|_RF_A| _RF_SZ(64) | _RF_RS(0), /* GLOB_DAT */ 95 _RF_SZ(32) | _RF_RS(0), /* JMP_SLOT */ 96 _RF_A| _RF_B| _RF_SZ(64) | _RF_RS(0), /* RELATIVE */ 97 _RF_S|_RF_A| _RF_U| _RF_SZ(32) | _RF_RS(0), /* UA_32 */ 98 99 _RF_A| _RF_SZ(32) | _RF_RS(0), /* PLT32 */ 100 _RF_A| _RF_SZ(32) | _RF_RS(10), /* HIPLT22 */ 101 _RF_A| _RF_SZ(32) | _RF_RS(0), /* LOPLT10 */ 102 _RF_A|_RF_P| _RF_SZ(32) | _RF_RS(0), /* PCPLT32 */ 103 _RF_A|_RF_P| _RF_SZ(32) | _RF_RS(10), /* PCPLT22 */ 104 _RF_A|_RF_P| _RF_SZ(32) | _RF_RS(0), /* PCPLT10 */ 105 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 10 */ 106 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 11 */ 107 _RF_S|_RF_A| _RF_SZ(64) | _RF_RS(0), /* 64 */ 108 _RF_S|_RF_A|/*extra*/ _RF_SZ(32) | _RF_RS(0), /* OLO10 */ 109 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(42), /* HH22 */ 110 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(32), /* HM10 */ 111 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(10), /* LM22 */ 112 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(42), /* PC_HH22 */ 113 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(32), /* PC_HM10 */ 114 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(10), /* PC_LM22 */ 115 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WDISP16 */ 116 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WDISP19 */ 117 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* GLOB_JMP */ 118 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 7 */ 119 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 5 */ 120 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 6 */ 121 _RF_S|_RF_A|_RF_P| _RF_SZ(64) | _RF_RS(0), /* DISP64 */ 122 _RF_A| _RF_SZ(64) | _RF_RS(0), /* PLT64 */ 123 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(10), /* HIX22 */ 124 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* LOX10 */ 125 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(22), /* H44 */ 126 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(12), /* M44 */ 127 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* L44 */ 128 _RF_S|_RF_A| _RF_SZ(64) | _RF_RS(0), /* REGISTER */ 129 _RF_S|_RF_A| _RF_U| _RF_SZ(64) | _RF_RS(0), /* UA64 */ 130 _RF_S|_RF_A| _RF_U| _RF_SZ(16) | _RF_RS(0), /* UA16 */ 131 }; 132 133 #ifdef RTLD_DEBUG_RELOC 134 static const char *reloc_names[] = { 135 "NONE", "RELOC_8", "RELOC_16", "RELOC_32", "DISP_8", 136 "DISP_16", "DISP_32", "WDISP_30", "WDISP_22", "HI22", 137 "22", "13", "LO10", "GOT10", "GOT13", 138 "GOT22", "PC10", "PC22", "WPLT30", "COPY", 139 "GLOB_DAT", "JMP_SLOT", "RELATIVE", "UA_32", "PLT32", 140 "HIPLT22", "LOPLT10", "LOPLT10", "PCPLT22", "PCPLT32", 141 "10", "11", "64", "OLO10", "HH22", 142 "HM10", "LM22", "PC_HH22", "PC_HM10", "PC_LM22", 143 "WDISP16", "WDISP19", "GLOB_JMP", "7", "5", "6", 144 "DISP64", "PLT64", "HIX22", "LOX10", "H44", "M44", 145 "L44", "REGISTER", "UA64", "UA16" 146 }; 147 #endif 148 149 #define RELOC_RESOLVE_SYMBOL(t) ((reloc_target_flags[t] & _RF_S) != 0) 150 #define RELOC_PC_RELATIVE(t) ((reloc_target_flags[t] & _RF_P) != 0) 151 #define RELOC_BASE_RELATIVE(t) ((reloc_target_flags[t] & _RF_B) != 0) 152 #define RELOC_UNALIGNED(t) ((reloc_target_flags[t] & _RF_U) != 0) 153 #define RELOC_USE_ADDEND(t) ((reloc_target_flags[t] & _RF_A) != 0) 154 #define RELOC_TARGET_SIZE(t) ((reloc_target_flags[t] >> 8) & 0xff) 155 #define RELOC_VALUE_RIGHTSHIFT(t) (reloc_target_flags[t] & 0xff) 156 157 static const long reloc_target_bitmask[] = { 158 #define _BM(x) (~(-(1ULL << (x)))) 159 0, /* NONE */ 160 _BM(8), _BM(16), _BM(32), /* RELOC_8, _16, _32 */ 161 _BM(8), _BM(16), _BM(32), /* DISP8, DISP16, DISP32 */ 162 _BM(30), _BM(22), /* WDISP30, WDISP22 */ 163 _BM(22), _BM(22), /* HI22, _22 */ 164 _BM(13), _BM(10), /* RELOC_13, _LO10 */ 165 _BM(10), _BM(13), _BM(22), /* GOT10, GOT13, GOT22 */ 166 _BM(10), _BM(22), /* _PC10, _PC22 */ 167 _BM(30), 0, /* _WPLT30, _COPY */ 168 _BM(32), _BM(32), _BM(32), /* _GLOB_DAT, JMP_SLOT, _RELATIVE */ 169 _BM(32), _BM(32), /* _UA32, PLT32 */ 170 _BM(22), _BM(10), /* _HIPLT22, LOPLT10 */ 171 _BM(32), _BM(22), _BM(10), /* _PCPLT32, _PCPLT22, _PCPLT10 */ 172 _BM(10), _BM(11), -1, /* _10, _11, _64 */ 173 _BM(10), _BM(22), /* _OLO10, _HH22 */ 174 _BM(10), _BM(22), /* _HM10, _LM22 */ 175 _BM(22), _BM(10), _BM(22), /* _PC_HH22, _PC_HM10, _PC_LM22 */ 176 _BM(16), _BM(19), /* _WDISP16, _WDISP19 */ 177 -1, /* GLOB_JMP */ 178 _BM(7), _BM(5), _BM(6) /* _7, _5, _6 */ 179 -1, -1, /* DISP64, PLT64 */ 180 _BM(22), _BM(13), /* HIX22, LOX10 */ 181 _BM(22), _BM(10), _BM(13), /* H44, M44, L44 */ 182 -1, -1, _BM(16), /* REGISTER, UA64, UA16 */ 183 #undef _BM 184 }; 185 #define RELOC_VALUE_BITMASK(t) (reloc_target_bitmask[t]) 186 187 /* 188 * Instruction templates: 189 */ 190 #define BAA 0x10400000 /* ba,a %xcc, 0 */ 191 #define SETHI 0x03000000 /* sethi %hi(0), %g1 */ 192 #define JMP 0x81c06000 /* jmpl %g1+%lo(0), %g0 */ 193 #define NOP 0x01000000 /* sethi %hi(0), %g0 */ 194 #define OR 0x82806000 /* or %g1, 0, %g1 */ 195 #define XOR 0x82c06000 /* xor %g1, 0, %g1 */ 196 #define MOV71 0x8283a000 /* or %o7, 0, %g1 */ 197 #define MOV17 0x9c806000 /* or %g1, 0, %o7 */ 198 #define CALL 0x40000000 /* call 0 */ 199 #define SLLX 0x8b407000 /* sllx %g1, 0, %g1 */ 200 #define SETHIG5 0x0b000000 /* sethi %hi(0), %g5 */ 201 #define ORG5 0x82804005 /* or %g1, %g5, %g1 */ 202 203 204 /* %hi(v) with variable shift */ 205 #define HIVAL(v, s) (((v) >> (s)) & 0x003fffff) 206 #define LOVAL(v) ((v) & 0x000003ff) 207 208 void _rtld_bind_start_0(long, long); 209 void _rtld_bind_start_1(long, long); 210 void _rtld_relocate_nonplt_self(Elf_Dyn *, Elf_Addr); 211 212 int 213 _rtld_relocate_plt_object(obj, rela, addrp) 214 const Obj_Entry *obj; 215 const Elf_Rela *rela; 216 caddr_t *addrp; 217 { 218 const Elf_Sym *def; 219 const Obj_Entry *defobj; 220 Elf_Word *where = (Elf_Word *)((Elf_Addr)obj->relocbase + rela->r_offset); 221 Elf_Addr value, offset; 222 223 /* Fully resolve procedure addresses now */ 224 225 assert(ELF_R_TYPE(rela->r_info) == R_TYPE(JMP_SLOT)); 226 227 def = _rtld_find_symdef(ELF_R_SYM(rela->r_info), obj, &defobj, true); 228 if (def == NULL) 229 return (-1); 230 231 value = (Elf_Addr) (defobj->relocbase + def->st_value); 232 rdbg(("bind now/fixup in %s --> old=%lx new=%lx", 233 defobj->strtab + def->st_name, (u_long)*where, (u_long)value)); 234 235 /* 236 * At the PLT entry pointed at by `where', we now construct 237 * a direct transfer to the now fully resolved function 238 * address. 239 * 240 * A PLT entry is supposed to start by looking like this: 241 * 242 * sethi %hi(. - .PLT0), %g1 243 * ba,a %xcc, .PLT1 244 * nop 245 * nop 246 * nop 247 * nop 248 * nop 249 * nop 250 * 251 * When we replace these entries we start from the second 252 * entry and do it in reverse order so the last thing we 253 * do is replace the branch. That allows us to change this 254 * atomically. 255 * 256 * We now need to find out how far we need to jump. We 257 * have a choice of several different relocation techniques 258 * which are increasingly expensive. 259 */ 260 261 offset = ((Elf_Addr)where) - value; 262 if (rela->r_addend) { 263 Elf_Addr *ptr = (Elf_Addr *)where; 264 /* 265 * This entry is >32768. Just replace the pointer. 266 */ 267 ptr[0] = value; 268 269 } else if (offset <= (1L<<20) && offset >= -(1L<<20)) { 270 /* 271 * We're within 1MB -- we can use a direct branch insn. 272 * 273 * We can generate this pattern: 274 * 275 * sethi %hi(. - .PLT0), %g1 276 * ba,a %xcc, addr 277 * nop 278 * nop 279 * nop 280 * nop 281 * nop 282 * nop 283 * 284 */ 285 where[1] = BAA | ((offset >> 2) &0x3fffff); 286 __asm __volatile("iflush %0+4" : : "r" (where)); 287 } else if (value >= 0 && value < (1L<<32)) { 288 /* 289 * We're withing 32-bits of address zero. 290 * 291 * The resulting code in the jump slot is: 292 * 293 * sethi %hi(. - .PLT0), %g1 294 * sethi %hi(addr), %g1 295 * jmp %g1+%lo(addr) 296 * nop 297 * nop 298 * nop 299 * nop 300 * nop 301 * 302 */ 303 where[2] = JMP | LOVAL(value); 304 where[1] = SETHI | HIVAL(value, 10); 305 __asm __volatile("iflush %0+8" : : "r" (where)); 306 __asm __volatile("iflush %0+4" : : "r" (where)); 307 308 } else if (value <= 0 && value > -(1L<<32)) { 309 /* 310 * We're withing 32-bits of address -1. 311 * 312 * The resulting code in the jump slot is: 313 * 314 * sethi %hi(. - .PLT0), %g1 315 * sethi %hix(addr), %g1 316 * xor %g1, %lox(addr), %g1 317 * jmp %g1 318 * nop 319 * nop 320 * nop 321 * nop 322 * 323 */ 324 where[3] = JMP; 325 where[2] = XOR | ((~value) & 0x00001fff); 326 where[1] = SETHI | HIVAL(~value, 10); 327 __asm __volatile("iflush %0+12" : : "r" (where)); 328 __asm __volatile("iflush %0+8" : : "r" (where)); 329 __asm __volatile("iflush %0+4" : : "r" (where)); 330 331 } else if (offset <= (1L<<32) && offset >= -((1L<<32) - 4)) { 332 /* 333 * We're withing 32-bits -- we can use a direct call insn 334 * 335 * The resulting code in the jump slot is: 336 * 337 * sethi %hi(. - .PLT0), %g1 338 * mov %o7, %g1 339 * call (.+offset) 340 * mov %g1, %o7 341 * nop 342 * nop 343 * nop 344 * nop 345 * 346 */ 347 where[3] = MOV17; 348 where[2] = CALL | ((offset >> 4) & 0x3fffffff); 349 where[1] = MOV71; 350 __asm __volatile("iflush %0+12" : : "r" (where)); 351 __asm __volatile("iflush %0+8" : : "r" (where)); 352 __asm __volatile("iflush %0+4" : : "r" (where)); 353 354 } else if (offset >= 0 && offset < (1L<<44)) { 355 /* 356 * We're withing 44 bits. We can generate this pattern: 357 * 358 * The resulting code in the jump slot is: 359 * 360 * sethi %hi(. - .PLT0), %g1 361 * sethi %h44(addr), %g1 362 * or %g1, %m44(addr), %g1 363 * sllx %g1, 12, %g1 364 * jmp %g1+%l44(addr) 365 * nop 366 * nop 367 * nop 368 * 369 */ 370 where[4] = JMP | LOVAL(offset); 371 where[3] = SLLX | 12; 372 where[2] = OR | (((offset) >> 12) & 0x00001fff); 373 where[1] = SETHI | HIVAL(offset, 22); 374 __asm __volatile("iflush %0+16" : : "r" (where)); 375 __asm __volatile("iflush %0+12" : : "r" (where)); 376 __asm __volatile("iflush %0+8" : : "r" (where)); 377 __asm __volatile("iflush %0+4" : : "r" (where)); 378 379 } else if (offset < 0 && offset > -(1L<<44)) { 380 /* 381 * We're withing 44 bits. We can generate this pattern: 382 * 383 * The resulting code in the jump slot is: 384 * 385 * sethi %hi(. - .PLT0), %g1 386 * sethi %h44(-addr), %g1 387 * xor %g1, %m44(-addr), %g1 388 * sllx %g1, 12, %g1 389 * jmp %g1+%l44(addr) 390 * nop 391 * nop 392 * nop 393 * 394 */ 395 where[4] = JMP | LOVAL(offset); 396 where[3] = SLLX | 12; 397 where[2] = XOR | (((~offset) >> 12) & 0x00001fff); 398 where[1] = SETHI | HIVAL(~offset, 22); 399 __asm __volatile("iflush %0+16" : : "r" (where)); 400 __asm __volatile("iflush %0+12" : : "r" (where)); 401 __asm __volatile("iflush %0+8" : : "r" (where)); 402 __asm __volatile("iflush %0+4" : : "r" (where)); 403 404 } else { 405 /* 406 * We need to load all 64-bits 407 * 408 * The resulting code in the jump slot is: 409 * 410 * sethi %hi(. - .PLT0), %g1 411 * sethi %hh(addr), %g1 412 * sethi %lm(addr), %g5 413 * or %g1, %hm(addr), %g1 414 * sllx %g1, 32, %g1 415 * or %g1, %g5, %g1 416 * jmp %g1+%lo(addr) 417 * nop 418 * 419 */ 420 where[6] = JMP | LOVAL(value); 421 where[5] = ORG5; 422 where[4] = SLLX | 12; 423 where[3] = OR | LOVAL((value) >> 32); 424 where[2] = SETHIG5 | HIVAL(value, 10); 425 where[1] = SETHI | HIVAL(value, 42); 426 __asm __volatile("iflush %0+20" : : "r" (where)); 427 __asm __volatile("iflush %0+16" : : "r" (where)); 428 __asm __volatile("iflush %0+16" : : "r" (where)); 429 __asm __volatile("iflush %0+12" : : "r" (where)); 430 __asm __volatile("iflush %0+8" : : "r" (where)); 431 __asm __volatile("iflush %0+4" : : "r" (where)); 432 433 } 434 435 *addrp = (caddr_t)value; 436 return (0); 437 } 438 439 /* 440 * Install rtld function call into this PLT slot. 441 */ 442 #define SAVE 0x9de3bf50 443 #define SETHI_l0 0x21000000 444 #define SETHI_l1 0x23000000 445 #define OR_l0_l0 0xa0142000 446 #define SLLX_l0_32_l0 0xa12c3020 447 #define OR_l0_l1_l0 0xa0140011 448 #define JMPL_l0_o1 0x93c42000 449 #define MOV_g1_o0 0x90100001 450 451 void _rtld_install_plt __P((Elf_Word *pltgot, Elf_Addr proc)); 452 453 void 454 _rtld_install_plt(pltgot, proc) 455 Elf_Word *pltgot; 456 Elf_Addr proc; 457 { 458 pltgot[0] = SAVE; 459 pltgot[1] = SETHI_l0 | HIVAL(proc, 42); 460 pltgot[2] = SETHI_l1 | HIVAL(proc, 10); 461 pltgot[3] = OR_l0_l0 | LOVAL((proc) >> 32); 462 pltgot[4] = SLLX_l0_32_l0; 463 pltgot[5] = OR_l0_l1_l0; 464 pltgot[6] = JMPL_l0_o1 | LOVAL(proc); 465 pltgot[7] = MOV_g1_o0; 466 } 467 468 long _rtld_bind_start_0_stub __P((long x, long y)); 469 long 470 _rtld_bind_start_0_stub(x, y) 471 long x, y; 472 { 473 long i; 474 long n; 475 476 i = x - y + 1048596; 477 n = 32768 + (i/5120)*160 + (i%5120)/24; 478 479 return (n); 480 } 481 482 void 483 _rtld_setup_pltgot(const Obj_Entry *obj) 484 { 485 /* 486 * On sparc64 we got troubles. 487 * 488 * Instructions are 4 bytes long. 489 * Elf[64]_Addr is 8 bytes long, so are our pltglot[] 490 * array entries. 491 * Each PLT entry jumps to PLT0 to enter the dynamic 492 * linker. 493 * Loading an arbitrary 64-bit pointer takes 6 494 * instructions and 2 registers. 495 * 496 * Somehow we need to issue a save to get a new stack 497 * frame, load the address of the dynamic linker, and 498 * jump there, in 8 instructions or less. 499 * 500 * Oh, we need to fill out both PLT0 and PLT1. 501 */ 502 { 503 Elf_Word *entry = (Elf_Word *)obj->pltgot; 504 505 /* Install in entries 0 and 1 */ 506 _rtld_install_plt(&entry[0], (Elf_Addr) &_rtld_bind_start_0); 507 _rtld_install_plt(&entry[8], (Elf_Addr) &_rtld_bind_start_1); 508 509 /* 510 * Install the object reference in first slot 511 * of entry 2. 512 */ 513 obj->pltgot[8] = (Elf_Addr) obj; 514 } 515 } 516 517 void 518 _rtld_relocate_nonplt_self(dynp, relocbase) 519 Elf_Dyn *dynp; 520 Elf_Addr relocbase; 521 { 522 const Elf_Rela *rela = 0, *relalim; 523 Elf_Addr relasz = 0; 524 Elf_Addr *where; 525 526 for (; dynp->d_tag != DT_NULL; dynp++) { 527 switch (dynp->d_tag) { 528 case DT_RELA: 529 rela = (const Elf_Rela *)(relocbase + dynp->d_un.d_ptr); 530 break; 531 case DT_RELASZ: 532 relasz = dynp->d_un.d_val; 533 break; 534 } 535 } 536 relalim = (const Elf_Rela *)((caddr_t)rela + relasz); 537 for (; rela < relalim; rela++) { 538 where = (Elf_Addr *)(relocbase + rela->r_offset); 539 *where = (Elf_Addr)(relocbase + rela->r_addend); 540 } 541 } 542 543 int 544 _rtld_relocate_nonplt_objects(obj, self) 545 const Obj_Entry *obj; 546 bool self; 547 { 548 const Elf_Rela *rela; 549 550 if (self) 551 return (0); 552 553 for (rela = obj->rela; rela < obj->relalim; rela++) { 554 Elf_Addr *where; 555 Elf_Word type; 556 Elf_Addr value = 0, mask; 557 const Elf_Sym *def = NULL; 558 const Obj_Entry *defobj = NULL; 559 unsigned long symnum; 560 561 where = (Elf_Addr *) (obj->relocbase + rela->r_offset); 562 symnum = ELF_R_SYM(rela->r_info); 563 564 type = ELF_R_TYPE(rela->r_info); 565 if (type == R_TYPE(NONE)) 566 continue; 567 568 /* We do JMP_SLOTs in relocate_plt_object() below */ 569 if (type == R_TYPE(JMP_SLOT)) 570 continue; 571 572 /* COPY relocs are also handled elsewhere */ 573 if (type == R_TYPE(COPY)) 574 continue; 575 576 /* 577 * We use the fact that relocation types are an `enum' 578 * Note: R_SPARC_UA16 is currently numerically largest. 579 */ 580 if (type > R_TYPE(UA16)) 581 return (-1); 582 583 value = rela->r_addend; 584 585 /* 586 * Handle relative relocs here, as an optimization. 587 */ 588 if (type == R_TYPE(RELATIVE)) { 589 *where = (Elf_Addr)(obj->relocbase + value); 590 rdbg(("RELATIVE in %s --> %p", obj->path, 591 (void *)*where)); 592 continue; 593 } 594 595 if (RELOC_RESOLVE_SYMBOL(type)) { 596 597 /* Find the symbol */ 598 def = _rtld_find_symdef(symnum, obj, &defobj, false); 599 if (def == NULL) 600 return (-1); 601 602 /* Add in the symbol's absolute address */ 603 value += (Elf_Addr)(defobj->relocbase + def->st_value); 604 } 605 606 if (RELOC_PC_RELATIVE(type)) { 607 value -= (Elf_Addr)where; 608 } 609 610 if (RELOC_BASE_RELATIVE(type)) { 611 /* 612 * Note that even though sparcs use `Elf_rela' 613 * exclusively we still need the implicit memory addend 614 * in relocations referring to GOT entries. 615 * Undoubtedly, someone f*cked this up in the distant 616 * past, and now we're stuck with it in the name of 617 * compatibility for all eternity.. 618 * 619 * In any case, the implicit and explicit should be 620 * mutually exclusive. We provide a check for that 621 * here. 622 */ 623 #ifdef DIAGNOSTIC 624 if (value != 0 && *where != 0) { 625 xprintf("BASE_REL(%s): where=%p, *where 0x%lx, " 626 "addend=0x%lx, base %p\n", 627 obj->path, where, *where, 628 rela->r_addend, obj->relocbase); 629 } 630 #endif 631 /* XXXX -- apparently we ignore the preexisting value */ 632 value += (Elf_Addr)(obj->relocbase); 633 } 634 635 mask = RELOC_VALUE_BITMASK(type); 636 value >>= RELOC_VALUE_RIGHTSHIFT(type); 637 value &= mask; 638 639 if (RELOC_UNALIGNED(type)) { 640 /* Handle unaligned relocations. */ 641 Elf_Addr tmp = 0; 642 char *ptr = (char *)where; 643 int i, size = RELOC_TARGET_SIZE(type)/8; 644 645 /* Read it in one byte at a time. */ 646 for (i=0; i<size; i++) 647 tmp = (tmp << 8) | ptr[i]; 648 649 tmp &= ~mask; 650 tmp |= value; 651 652 /* Write it back out. */ 653 for (i=0; i<size; i++) 654 ptr[i] = ((tmp >> (8*i)) & 0xff); 655 #ifdef RTLD_DEBUG_RELOC 656 value = (Elf_Addr)tmp; 657 #endif 658 659 } else if (RELOC_TARGET_SIZE(type) > 32) { 660 *where &= ~mask; 661 *where |= value; 662 #ifdef RTLD_DEBUG_RELOC 663 value = (Elf_Addr)*where; 664 #endif 665 } else { 666 Elf32_Addr *where32 = (Elf32_Addr *)where; 667 668 *where32 &= ~mask; 669 *where32 |= value; 670 #ifdef RTLD_DEBUG_RELOC 671 value = (Elf_Addr)*where32; 672 #endif 673 } 674 675 #ifdef RTLD_DEBUG_RELOC 676 if (RELOC_RESOLVE_SYMBOL(type)) { 677 rdbg(("%s %s in %s --> %p in %s", reloc_names[type], 678 obj->strtab + obj->symtab[symnum].st_name, 679 obj->path, (void *)*where, defobj->path)); 680 } else { 681 rdbg(("%s in %s --> %p", reloc_names[type], 682 obj->path, (void *)*where)); 683 } 684 #endif 685 } 686 return (0); 687 } 688 689 int 690 _rtld_relocate_plt_lazy(obj) 691 const Obj_Entry *obj; 692 { 693 return (0); 694 } 695
Indexes created Tue Sep 30 07:10:03 GMT 2025