mdreloc.c revision 1.41
1 /* $NetBSD: mdreloc.c,v 1.41 2007/02/23 01:17:11 matt Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Eduardo Horvath. 5 * Copyright (c) 1999, 2002 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Paul Kranenburg and by Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 #include <sys/cdefs.h> 41 #ifndef lint 42 __RCSID("$NetBSD: mdreloc.c,v 1.41 2007/02/23 01:17:11 matt Exp $"); 43 #endif /* not lint */ 44 45 #include <errno.h> 46 #include <stdio.h> 47 #include <stdlib.h> 48 #include <string.h> 49 #include <unistd.h> 50 #include <sys/stat.h> 51 52 #include "rtldenv.h" 53 #include "debug.h" 54 #include "rtld.h" 55 56 /* 57 * The following table holds for each relocation type: 58 * - the width in bits of the memory location the relocation 59 * applies to (not currently used) 60 * - the number of bits the relocation value must be shifted to the 61 * right (i.e. discard least significant bits) to fit into 62 * the appropriate field in the instruction word. 63 * - flags indicating whether 64 * * the relocation involves a symbol 65 * * the relocation is relative to the current position 66 * * the relocation is for a GOT entry 67 * * the relocation is relative to the load address 68 * 69 */ 70 #define _RF_S 0x80000000 /* Resolve symbol */ 71 #define _RF_A 0x40000000 /* Use addend */ 72 #define _RF_P 0x20000000 /* Location relative */ 73 #define _RF_G 0x10000000 /* GOT offset */ 74 #define _RF_B 0x08000000 /* Load address relative */ 75 #define _RF_U 0x04000000 /* Unaligned */ 76 #define _RF_SZ(s) (((s) & 0xff) << 8) /* memory target size */ 77 #define _RF_RS(s) ( (s) & 0xff) /* right shift */ 78 static const int reloc_target_flags[] = { 79 0, /* NONE */ 80 _RF_S|_RF_A| _RF_SZ(8) | _RF_RS(0), /* RELOC_8 */ 81 _RF_S|_RF_A| _RF_SZ(16) | _RF_RS(0), /* RELOC_16 */ 82 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* RELOC_32 */ 83 _RF_S|_RF_A|_RF_P| _RF_SZ(8) | _RF_RS(0), /* DISP_8 */ 84 _RF_S|_RF_A|_RF_P| _RF_SZ(16) | _RF_RS(0), /* DISP_16 */ 85 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(0), /* DISP_32 */ 86 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WDISP_30 */ 87 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WDISP_22 */ 88 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(10), /* HI22 */ 89 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 22 */ 90 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 13 */ 91 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* LO10 */ 92 _RF_G| _RF_SZ(32) | _RF_RS(0), /* GOT10 */ 93 _RF_G| _RF_SZ(32) | _RF_RS(0), /* GOT13 */ 94 _RF_G| _RF_SZ(32) | _RF_RS(10), /* GOT22 */ 95 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(0), /* PC10 */ 96 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(10), /* PC22 */ 97 _RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WPLT30 */ 98 _RF_SZ(32) | _RF_RS(0), /* COPY */ 99 _RF_S|_RF_A| _RF_SZ(64) | _RF_RS(0), /* GLOB_DAT */ 100 _RF_SZ(32) | _RF_RS(0), /* JMP_SLOT */ 101 _RF_A| _RF_B| _RF_SZ(64) | _RF_RS(0), /* RELATIVE */ 102 _RF_S|_RF_A| _RF_U| _RF_SZ(32) | _RF_RS(0), /* UA_32 */ 103 104 _RF_A| _RF_SZ(32) | _RF_RS(0), /* PLT32 */ 105 _RF_A| _RF_SZ(32) | _RF_RS(10), /* HIPLT22 */ 106 _RF_A| _RF_SZ(32) | _RF_RS(0), /* LOPLT10 */ 107 _RF_A|_RF_P| _RF_SZ(32) | _RF_RS(0), /* PCPLT32 */ 108 _RF_A|_RF_P| _RF_SZ(32) | _RF_RS(10), /* PCPLT22 */ 109 _RF_A|_RF_P| _RF_SZ(32) | _RF_RS(0), /* PCPLT10 */ 110 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 10 */ 111 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 11 */ 112 _RF_S|_RF_A| _RF_SZ(64) | _RF_RS(0), /* 64 */ 113 _RF_S|_RF_A|/*extra*/ _RF_SZ(32) | _RF_RS(0), /* OLO10 */ 114 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(42), /* HH22 */ 115 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(32), /* HM10 */ 116 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(10), /* LM22 */ 117 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(42), /* PC_HH22 */ 118 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(32), /* PC_HM10 */ 119 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(10), /* PC_LM22 */ 120 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WDISP16 */ 121 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WDISP19 */ 122 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* GLOB_JMP */ 123 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 7 */ 124 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 5 */ 125 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 6 */ 126 _RF_S|_RF_A|_RF_P| _RF_SZ(64) | _RF_RS(0), /* DISP64 */ 127 _RF_A| _RF_SZ(64) | _RF_RS(0), /* PLT64 */ 128 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(10), /* HIX22 */ 129 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* LOX10 */ 130 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(22), /* H44 */ 131 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(12), /* M44 */ 132 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* L44 */ 133 _RF_S|_RF_A| _RF_SZ(64) | _RF_RS(0), /* REGISTER */ 134 _RF_S|_RF_A| _RF_U| _RF_SZ(64) | _RF_RS(0), /* UA64 */ 135 _RF_S|_RF_A| _RF_U| _RF_SZ(16) | _RF_RS(0), /* UA16 */ 136 }; 137 138 #ifdef RTLD_DEBUG_RELOC 139 static const char *reloc_names[] = { 140 "NONE", "RELOC_8", "RELOC_16", "RELOC_32", "DISP_8", 141 "DISP_16", "DISP_32", "WDISP_30", "WDISP_22", "HI22", 142 "22", "13", "LO10", "GOT10", "GOT13", 143 "GOT22", "PC10", "PC22", "WPLT30", "COPY", 144 "GLOB_DAT", "JMP_SLOT", "RELATIVE", "UA_32", "PLT32", 145 "HIPLT22", "LOPLT10", "LOPLT10", "PCPLT22", "PCPLT32", 146 "10", "11", "64", "OLO10", "HH22", 147 "HM10", "LM22", "PC_HH22", "PC_HM10", "PC_LM22", 148 "WDISP16", "WDISP19", "GLOB_JMP", "7", "5", "6", 149 "DISP64", "PLT64", "HIX22", "LOX10", "H44", "M44", 150 "L44", "REGISTER", "UA64", "UA16" 151 }; 152 #endif 153 154 #define RELOC_RESOLVE_SYMBOL(t) ((reloc_target_flags[t] & _RF_S) != 0) 155 #define RELOC_PC_RELATIVE(t) ((reloc_target_flags[t] & _RF_P) != 0) 156 #define RELOC_BASE_RELATIVE(t) ((reloc_target_flags[t] & _RF_B) != 0) 157 #define RELOC_UNALIGNED(t) ((reloc_target_flags[t] & _RF_U) != 0) 158 #define RELOC_USE_ADDEND(t) ((reloc_target_flags[t] & _RF_A) != 0) 159 #define RELOC_TARGET_SIZE(t) ((reloc_target_flags[t] >> 8) & 0xff) 160 #define RELOC_VALUE_RIGHTSHIFT(t) (reloc_target_flags[t] & 0xff) 161 162 static const long reloc_target_bitmask[] = { 163 #define _BM(x) (~(-(1ULL << (x)))) 164 0, /* NONE */ 165 _BM(8), _BM(16), _BM(32), /* RELOC_8, _16, _32 */ 166 _BM(8), _BM(16), _BM(32), /* DISP8, DISP16, DISP32 */ 167 _BM(30), _BM(22), /* WDISP30, WDISP22 */ 168 _BM(22), _BM(22), /* HI22, _22 */ 169 _BM(13), _BM(10), /* RELOC_13, _LO10 */ 170 _BM(10), _BM(13), _BM(22), /* GOT10, GOT13, GOT22 */ 171 _BM(10), _BM(22), /* _PC10, _PC22 */ 172 _BM(30), 0, /* _WPLT30, _COPY */ 173 _BM(32), _BM(32), _BM(32), /* _GLOB_DAT, JMP_SLOT, _RELATIVE */ 174 _BM(32), _BM(32), /* _UA32, PLT32 */ 175 _BM(22), _BM(10), /* _HIPLT22, LOPLT10 */ 176 _BM(32), _BM(22), _BM(10), /* _PCPLT32, _PCPLT22, _PCPLT10 */ 177 _BM(10), _BM(11), -1, /* _10, _11, _64 */ 178 _BM(10), _BM(22), /* _OLO10, _HH22 */ 179 _BM(10), _BM(22), /* _HM10, _LM22 */ 180 _BM(22), _BM(10), _BM(22), /* _PC_HH22, _PC_HM10, _PC_LM22 */ 181 _BM(16), _BM(19), /* _WDISP16, _WDISP19 */ 182 -1, /* GLOB_JMP */ 183 _BM(7), _BM(5), _BM(6) /* _7, _5, _6 */ 184 -1, -1, /* DISP64, PLT64 */ 185 _BM(22), _BM(13), /* HIX22, LOX10 */ 186 _BM(22), _BM(10), _BM(13), /* H44, M44, L44 */ 187 -1, -1, _BM(16), /* REGISTER, UA64, UA16 */ 188 #undef _BM 189 }; 190 #define RELOC_VALUE_BITMASK(t) (reloc_target_bitmask[t]) 191 192 /* 193 * Instruction templates: 194 */ 195 #define BAA 0x10400000 /* ba,a %xcc, 0 */ 196 #define SETHI 0x03000000 /* sethi %hi(0), %g1 */ 197 #define JMP 0x81c06000 /* jmpl %g1+%lo(0), %g0 */ 198 #define NOP 0x01000000 /* sethi %hi(0), %g0 */ 199 #define OR 0x82806000 /* or %g1, 0, %g1 */ 200 #define XOR 0x82c06000 /* xor %g1, 0, %g1 */ 201 #define MOV71 0x8283a000 /* or %o7, 0, %g1 */ 202 #define MOV17 0x9c806000 /* or %g1, 0, %o7 */ 203 #define CALL 0x40000000 /* call 0 */ 204 #define SLLX 0x8b407000 /* sllx %g1, 0, %g1 */ 205 #define SETHIG5 0x0b000000 /* sethi %hi(0), %g5 */ 206 #define ORG5 0x82804005 /* or %g1, %g5, %g1 */ 207 208 209 /* %hi(v)/%lo(v) with variable shift */ 210 #define HIVAL(v, s) (((v) >> (s)) & 0x003fffff) 211 #define LOVAL(v, s) (((v) >> (s)) & 0x000003ff) 212 213 void _rtld_bind_start_0(long, long); 214 void _rtld_bind_start_1(long, long); 215 void _rtld_relocate_nonplt_self(Elf_Dyn *, Elf_Addr); 216 caddr_t _rtld_bind(const Obj_Entry *, Elf_Word); 217 218 /* 219 * Install rtld function call into this PLT slot. 220 */ 221 #define SAVE 0x9de3bf50 /* i.e. `save %sp,-176,%sp' */ 222 #define SETHI_l0 0x21000000 223 #define SETHI_l1 0x23000000 224 #define OR_l0_l0 0xa0142000 225 #define SLLX_l0_32_l0 0xa12c3020 226 #define OR_l0_l1_l0 0xa0140011 227 #define JMPL_l0_o0 0x91c42000 228 #define MOV_g1_o1 0x92100001 229 230 void _rtld_install_plt(Elf_Word *, Elf_Addr); 231 static inline int _rtld_relocate_plt_object(const Obj_Entry *, 232 const Elf_Rela *, Elf_Addr *); 233 234 void 235 _rtld_install_plt(Elf_Word *pltgot, Elf_Addr proc) 236 { 237 pltgot[0] = SAVE; 238 pltgot[1] = SETHI_l0 | HIVAL(proc, 42); 239 pltgot[2] = SETHI_l1 | HIVAL(proc, 10); 240 pltgot[3] = OR_l0_l0 | LOVAL(proc, 32); 241 pltgot[4] = SLLX_l0_32_l0; 242 pltgot[5] = OR_l0_l1_l0; 243 pltgot[6] = JMPL_l0_o0 | LOVAL(proc, 0); 244 pltgot[7] = MOV_g1_o1; 245 } 246 247 void 248 _rtld_setup_pltgot(const Obj_Entry *obj) 249 { 250 /* 251 * On sparc64 we got troubles. 252 * 253 * Instructions are 4 bytes long. 254 * Elf[64]_Addr is 8 bytes long, so are our pltglot[] 255 * array entries. 256 * Each PLT entry jumps to PLT0 to enter the dynamic 257 * linker. 258 * Loading an arbitrary 64-bit pointer takes 6 259 * instructions and 2 registers. 260 * 261 * Somehow we need to issue a save to get a new stack 262 * frame, load the address of the dynamic linker, and 263 * jump there, in 8 instructions or less. 264 * 265 * Oh, we need to fill out both PLT0 and PLT1. 266 */ 267 { 268 Elf_Word *entry = (Elf_Word *)obj->pltgot; 269 270 /* Install in entries 0 and 1 */ 271 _rtld_install_plt(&entry[0], (Elf_Addr) &_rtld_bind_start_0); 272 _rtld_install_plt(&entry[8], (Elf_Addr) &_rtld_bind_start_1); 273 274 /* 275 * Install the object reference in first slot 276 * of entry 2. 277 */ 278 obj->pltgot[8] = (Elf_Addr) obj; 279 } 280 } 281 282 void 283 _rtld_relocate_nonplt_self(Elf_Dyn *dynp, Elf_Addr relocbase) 284 { 285 const Elf_Rela *rela = 0, *relalim; 286 Elf_Addr relasz = 0; 287 Elf_Addr *where; 288 289 for (; dynp->d_tag != DT_NULL; dynp++) { 290 switch (dynp->d_tag) { 291 case DT_RELA: 292 rela = (const Elf_Rela *)(relocbase + dynp->d_un.d_ptr); 293 break; 294 case DT_RELASZ: 295 relasz = dynp->d_un.d_val; 296 break; 297 } 298 } 299 relalim = (const Elf_Rela *)((caddr_t)rela + relasz); 300 for (; rela < relalim; rela++) { 301 where = (Elf_Addr *)(relocbase + rela->r_offset); 302 *where = (Elf_Addr)(relocbase + rela->r_addend); 303 } 304 } 305 306 int 307 _rtld_relocate_nonplt_objects(const Obj_Entry *obj) 308 { 309 const Elf_Rela *rela; 310 const Elf_Sym *def = NULL; 311 const Obj_Entry *defobj = NULL; 312 313 for (rela = obj->rela; rela < obj->relalim; rela++) { 314 Elf_Addr *where; 315 Elf_Word type; 316 Elf_Addr value = 0, mask; 317 unsigned long symnum; 318 319 where = (Elf_Addr *) (obj->relocbase + rela->r_offset); 320 symnum = ELF_R_SYM(rela->r_info); 321 322 type = ELF_R_TYPE(rela->r_info); 323 if (type == R_TYPE(NONE)) 324 continue; 325 326 /* We do JMP_SLOTs in _rtld_bind() below */ 327 if (type == R_TYPE(JMP_SLOT)) 328 continue; 329 330 /* COPY relocs are also handled elsewhere */ 331 if (type == R_TYPE(COPY)) 332 continue; 333 334 /* 335 * We use the fact that relocation types are an `enum' 336 * Note: R_SPARC_UA16 is currently numerically largest. 337 */ 338 if (type > R_TYPE(UA16)) 339 return (-1); 340 341 value = rela->r_addend; 342 343 /* 344 * Handle relative relocs here, as an optimization. 345 */ 346 if (type == R_TYPE(RELATIVE)) { 347 *where = (Elf_Addr)(obj->relocbase + value); 348 rdbg(("RELATIVE in %s --> %p", obj->path, 349 (void *)*where)); 350 continue; 351 } 352 353 if (RELOC_RESOLVE_SYMBOL(type)) { 354 355 /* Find the symbol */ 356 def = _rtld_find_symdef(symnum, obj, &defobj, 357 false); 358 if (def == NULL) 359 return -1; 360 361 /* Add in the symbol's absolute address */ 362 value += (Elf_Addr)(defobj->relocbase + def->st_value); 363 } 364 365 if (RELOC_PC_RELATIVE(type)) { 366 value -= (Elf_Addr)where; 367 } 368 369 if (RELOC_BASE_RELATIVE(type)) { 370 /* 371 * Note that even though sparcs use `Elf_rela' 372 * exclusively we still need the implicit memory addend 373 * in relocations referring to GOT entries. 374 * Undoubtedly, someone f*cked this up in the distant 375 * past, and now we're stuck with it in the name of 376 * compatibility for all eternity.. 377 * 378 * In any case, the implicit and explicit should be 379 * mutually exclusive. We provide a check for that 380 * here. 381 */ 382 #ifdef DIAGNOSTIC 383 if (value != 0 && *where != 0) { 384 xprintf("BASE_REL(%s): where=%p, *where 0x%lx, " 385 "addend=0x%lx, base %p\n", 386 obj->path, where, *where, 387 rela->r_addend, obj->relocbase); 388 } 389 #endif 390 /* XXXX -- apparently we ignore the preexisting value */ 391 value += (Elf_Addr)(obj->relocbase); 392 } 393 394 mask = RELOC_VALUE_BITMASK(type); 395 value >>= RELOC_VALUE_RIGHTSHIFT(type); 396 value &= mask; 397 398 if (RELOC_UNALIGNED(type)) { 399 /* Handle unaligned relocations. */ 400 Elf_Addr tmp = 0; 401 char *ptr = (char *)where; 402 int i, size = RELOC_TARGET_SIZE(type)/8; 403 404 /* Read it in one byte at a time. */ 405 for (i=0; i<size; i++) 406 tmp = (tmp << 8) | ptr[i]; 407 408 tmp &= ~mask; 409 tmp |= value; 410 411 /* Write it back out. */ 412 for (i=0; i<size; i++) 413 ptr[i] = ((tmp >> (8*i)) & 0xff); 414 #ifdef RTLD_DEBUG_RELOC 415 value = (Elf_Addr)tmp; 416 #endif 417 418 } else if (RELOC_TARGET_SIZE(type) > 32) { 419 *where &= ~mask; 420 *where |= value; 421 #ifdef RTLD_DEBUG_RELOC 422 value = (Elf_Addr)*where; 423 #endif 424 } else { 425 Elf32_Addr *where32 = (Elf32_Addr *)where; 426 427 *where32 &= ~mask; 428 *where32 |= value; 429 #ifdef RTLD_DEBUG_RELOC 430 value = (Elf_Addr)*where32; 431 #endif 432 } 433 434 #ifdef RTLD_DEBUG_RELOC 435 if (RELOC_RESOLVE_SYMBOL(type)) { 436 rdbg(("%s %s in %s --> %p in %s", reloc_names[type], 437 obj->strtab + obj->symtab[symnum].st_name, 438 obj->path, (void *)value, defobj->path)); 439 } else { 440 rdbg(("%s in %s --> %p", reloc_names[type], 441 obj->path, (void *)value)); 442 } 443 #endif 444 } 445 return (0); 446 } 447 448 int 449 _rtld_relocate_plt_lazy(const Obj_Entry *obj) 450 { 451 return (0); 452 } 453 454 caddr_t 455 _rtld_bind(const Obj_Entry *obj, Elf_Word reloff) 456 { 457 const Elf_Rela *rela = obj->pltrela + reloff; 458 Elf_Addr result; 459 int err; 460 461 result = 0; /* XXX gcc */ 462 463 if (ELF_R_TYPE(obj->pltrela->r_info) == R_TYPE(JMP_SLOT)) { 464 /* 465 * XXXX 466 * 467 * The first four PLT entries are reserved. There is some 468 * disagreement whether they should have associated relocation 469 * entries. Both the SPARC 32-bit and 64-bit ELF 470 * specifications say that they should have relocation entries, 471 * but the 32-bit SPARC binutils do not generate them, and now 472 * the 64-bit SPARC binutils have stopped generating them too. 473 * 474 * So, to provide binary compatibility, we will check the first 475 * entry, if it is reserved it should not be of the type 476 * JMP_SLOT. If it is JMP_SLOT, then the 4 reserved entries 477 * were not generated and our index is 4 entries too far. 478 */ 479 rela -= 4; 480 } 481 482 err = _rtld_relocate_plt_object(obj, rela, &result); 483 if (err) 484 _rtld_die(); 485 486 return (caddr_t)result; 487 } 488 489 int 490 _rtld_relocate_plt_objects(const Obj_Entry *obj) 491 { 492 const Elf_Rela *rela; 493 494 rela = obj->pltrela; 495 496 /* 497 * Check for first four reserved entries - and skip them. 498 * See above for details. 499 */ 500 if (ELF_R_TYPE(obj->pltrela->r_info) != R_TYPE(JMP_SLOT)) 501 rela += 4; 502 503 for (; rela < obj->pltrelalim; rela++) 504 if (_rtld_relocate_plt_object(obj, rela, NULL) < 0) 505 return -1; 506 507 return 0; 508 } 509 510 /* 511 * New inline function that is called by _rtld_relocate_plt_object and 512 * _rtld_bind 513 */ 514 static inline int 515 _rtld_relocate_plt_object(const Obj_Entry *obj, const Elf_Rela *rela, Elf_Addr *tp) 516 { 517 Elf_Word *where = (Elf_Word *)(obj->relocbase + rela->r_offset); 518 const Elf_Sym *def; 519 const Obj_Entry *defobj; 520 Elf_Addr value, offset; 521 522 /* Fully resolve procedure addresses now */ 523 524 assert(ELF_R_TYPE(rela->r_info) == R_TYPE(JMP_SLOT)); 525 526 def = _rtld_find_symdef(ELF_R_SYM(rela->r_info), obj, &defobj, true); 527 if (def == NULL) 528 return -1; 529 530 value = (Elf_Addr)(defobj->relocbase + def->st_value); 531 rdbg(("bind now/fixup in %s --> new=%p", 532 defobj->strtab + def->st_name, (void *)value)); 533 534 /* 535 * At the PLT entry pointed at by `where', we now construct 536 * a direct transfer to the now fully resolved function 537 * address. 538 * 539 * A PLT entry is supposed to start by looking like this: 540 * 541 * sethi %hi(. - .PLT0), %g1 542 * ba,a %xcc, .PLT1 543 * nop 544 * nop 545 * nop 546 * nop 547 * nop 548 * nop 549 * 550 * When we replace these entries we start from the second 551 * entry and do it in reverse order so the last thing we 552 * do is replace the branch. That allows us to change this 553 * atomically. 554 * 555 * We now need to find out how far we need to jump. We 556 * have a choice of several different relocation techniques 557 * which are increasingly expensive. 558 */ 559 560 offset = ((Elf_Addr)where) - value; 561 if (rela->r_addend) { 562 Elf_Addr *ptr = (Elf_Addr *)where; 563 /* 564 * This entry is >=32768. The relocations points to a 565 * PC-relative pointer to the bind_0 stub at the top of the 566 * PLT section. Update it to point to the target function. 567 */ 568 ptr[0] += value - (Elf_Addr)obj->pltgot; 569 570 } else if (offset <= (1L<<20) && offset >= -(1L<<20)) { 571 /* 572 * We're within 1MB -- we can use a direct branch insn. 573 * 574 * We can generate this pattern: 575 * 576 * sethi %hi(. - .PLT0), %g1 577 * ba,a %xcc, addr 578 * nop 579 * nop 580 * nop 581 * nop 582 * nop 583 * nop 584 * 585 */ 586 where[1] = BAA | ((offset >> 2) &0x3fffff); 587 __asm volatile("iflush %0+4" : : "r" (where)); 588 } else if (value >= 0 && value < (1L<<32)) { 589 /* 590 * We're within 32-bits of address zero. 591 * 592 * The resulting code in the jump slot is: 593 * 594 * sethi %hi(. - .PLT0), %g1 595 * sethi %hi(addr), %g1 596 * jmp %g1+%lo(addr) 597 * nop 598 * nop 599 * nop 600 * nop 601 * nop 602 * 603 */ 604 where[2] = JMP | LOVAL(value, 0); 605 where[1] = SETHI | HIVAL(value, 10); 606 __asm volatile("iflush %0+8" : : "r" (where)); 607 __asm volatile("iflush %0+4" : : "r" (where)); 608 609 } else if (value <= 0 && value > -(1L<<32)) { 610 /* 611 * We're within 32-bits of address -1. 612 * 613 * The resulting code in the jump slot is: 614 * 615 * sethi %hi(. - .PLT0), %g1 616 * sethi %hix(addr), %g1 617 * xor %g1, %lox(addr), %g1 618 * jmp %g1 619 * nop 620 * nop 621 * nop 622 * nop 623 * 624 */ 625 where[3] = JMP; 626 where[2] = XOR | ((~value) & 0x00001fff); 627 where[1] = SETHI | HIVAL(~value, 10); 628 __asm volatile("iflush %0+12" : : "r" (where)); 629 __asm volatile("iflush %0+8" : : "r" (where)); 630 __asm volatile("iflush %0+4" : : "r" (where)); 631 632 } else if (offset <= (1L<<32) && offset >= -((1L<<32) - 4)) { 633 /* 634 * We're within 32-bits -- we can use a direct call insn 635 * 636 * The resulting code in the jump slot is: 637 * 638 * sethi %hi(. - .PLT0), %g1 639 * mov %o7, %g1 640 * call (.+offset) 641 * mov %g1, %o7 642 * nop 643 * nop 644 * nop 645 * nop 646 * 647 */ 648 where[3] = MOV17; 649 where[2] = CALL | ((offset >> 4) & 0x3fffffff); 650 where[1] = MOV71; 651 __asm volatile("iflush %0+12" : : "r" (where)); 652 __asm volatile("iflush %0+8" : : "r" (where)); 653 __asm volatile("iflush %0+4" : : "r" (where)); 654 655 } else if (offset >= 0 && offset < (1L<<44)) { 656 /* 657 * We're within 44 bits. We can generate this pattern: 658 * 659 * The resulting code in the jump slot is: 660 * 661 * sethi %hi(. - .PLT0), %g1 662 * sethi %h44(addr), %g1 663 * or %g1, %m44(addr), %g1 664 * sllx %g1, 12, %g1 665 * jmp %g1+%l44(addr) 666 * nop 667 * nop 668 * nop 669 * 670 */ 671 where[4] = JMP | LOVAL(offset, 0); 672 where[3] = SLLX | 12; 673 where[2] = OR | (((offset) >> 12) & 0x00001fff); 674 where[1] = SETHI | HIVAL(offset, 22); 675 __asm volatile("iflush %0+16" : : "r" (where)); 676 __asm volatile("iflush %0+12" : : "r" (where)); 677 __asm volatile("iflush %0+8" : : "r" (where)); 678 __asm volatile("iflush %0+4" : : "r" (where)); 679 680 } else if (offset < 0 && offset > -(1L<<44)) { 681 /* 682 * We're within 44 bits. We can generate this pattern: 683 * 684 * The resulting code in the jump slot is: 685 * 686 * sethi %hi(. - .PLT0), %g1 687 * sethi %h44(-addr), %g1 688 * xor %g1, %m44(-addr), %g1 689 * sllx %g1, 12, %g1 690 * jmp %g1+%l44(addr) 691 * nop 692 * nop 693 * nop 694 * 695 */ 696 where[4] = JMP | LOVAL(offset, 0); 697 where[3] = SLLX | 12; 698 where[2] = XOR | (((~offset) >> 12) & 0x00001fff); 699 where[1] = SETHI | HIVAL(~offset, 22); 700 __asm volatile("iflush %0+16" : : "r" (where)); 701 __asm volatile("iflush %0+12" : : "r" (where)); 702 __asm volatile("iflush %0+8" : : "r" (where)); 703 __asm volatile("iflush %0+4" : : "r" (where)); 704 705 } else { 706 /* 707 * We need to load all 64-bits 708 * 709 * The resulting code in the jump slot is: 710 * 711 * sethi %hi(. - .PLT0), %g1 712 * sethi %hh(addr), %g1 713 * sethi %lm(addr), %g5 714 * or %g1, %hm(addr), %g1 715 * sllx %g1, 32, %g1 716 * or %g1, %g5, %g1 717 * jmp %g1+%lo(addr) 718 * nop 719 * 720 */ 721 where[6] = JMP | LOVAL(value, 0); 722 where[5] = ORG5; 723 where[4] = SLLX | 32; 724 where[3] = OR | LOVAL(value, 32); 725 where[2] = SETHIG5 | HIVAL(value, 10); 726 where[1] = SETHI | HIVAL(value, 42); 727 __asm volatile("iflush %0+24" : : "r" (where)); 728 __asm volatile("iflush %0+20" : : "r" (where)); 729 __asm volatile("iflush %0+16" : : "r" (where)); 730 __asm volatile("iflush %0+12" : : "r" (where)); 731 __asm volatile("iflush %0+8" : : "r" (where)); 732 __asm volatile("iflush %0+4" : : "r" (where)); 733 734 } 735 736 if (tp) 737 *tp = value; 738 739 return 0; 740 } 741
Indexes created Tue Sep 30 11:09:46 GMT 2025