mdreloc.c revision 1.45
1 /* $NetBSD: mdreloc.c,v 1.45 2009/05/22 21:47:46 martin Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Eduardo Horvath. 5 * Copyright (c) 1999, 2002 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Paul Kranenburg and by Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 #ifndef lint 35 __RCSID("$NetBSD: mdreloc.c,v 1.45 2009/05/22 21:47:46 martin Exp $"); 36 #endif /* not lint */ 37 38 #include <errno.h> 39 #include <stdio.h> 40 #include <stdlib.h> 41 #include <string.h> 42 #include <unistd.h> 43 #include <sys/stat.h> 44 45 #include "rtldenv.h" 46 #include "debug.h" 47 #include "rtld.h" 48 49 /* 50 * The following table holds for each relocation type: 51 * - the width in bits of the memory location the relocation 52 * applies to (not currently used) 53 * - the number of bits the relocation value must be shifted to the 54 * right (i.e. discard least significant bits) to fit into 55 * the appropriate field in the instruction word. 56 * - flags indicating whether 57 * * the relocation involves a symbol 58 * * the relocation is relative to the current position 59 * * the relocation is for a GOT entry 60 * * the relocation is relative to the load address 61 * 62 */ 63 #define _RF_S 0x80000000 /* Resolve symbol */ 64 #define _RF_A 0x40000000 /* Use addend */ 65 #define _RF_P 0x20000000 /* Location relative */ 66 #define _RF_G 0x10000000 /* GOT offset */ 67 #define _RF_B 0x08000000 /* Load address relative */ 68 #define _RF_U 0x04000000 /* Unaligned */ 69 #define _RF_SZ(s) (((s) & 0xff) << 8) /* memory target size */ 70 #define _RF_RS(s) ( (s) & 0xff) /* right shift */ 71 static const int reloc_target_flags[] = { 72 0, /* NONE */ 73 _RF_S|_RF_A| _RF_SZ(8) | _RF_RS(0), /* RELOC_8 */ 74 _RF_S|_RF_A| _RF_SZ(16) | _RF_RS(0), /* RELOC_16 */ 75 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* RELOC_32 */ 76 _RF_S|_RF_A|_RF_P| _RF_SZ(8) | _RF_RS(0), /* DISP_8 */ 77 _RF_S|_RF_A|_RF_P| _RF_SZ(16) | _RF_RS(0), /* DISP_16 */ 78 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(0), /* DISP_32 */ 79 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WDISP_30 */ 80 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WDISP_22 */ 81 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(10), /* HI22 */ 82 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 22 */ 83 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 13 */ 84 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* LO10 */ 85 _RF_G| _RF_SZ(32) | _RF_RS(0), /* GOT10 */ 86 _RF_G| _RF_SZ(32) | _RF_RS(0), /* GOT13 */ 87 _RF_G| _RF_SZ(32) | _RF_RS(10), /* GOT22 */ 88 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(0), /* PC10 */ 89 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(10), /* PC22 */ 90 _RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WPLT30 */ 91 _RF_SZ(32) | _RF_RS(0), /* COPY */ 92 _RF_S|_RF_A| _RF_SZ(64) | _RF_RS(0), /* GLOB_DAT */ 93 _RF_SZ(32) | _RF_RS(0), /* JMP_SLOT */ 94 _RF_A| _RF_B| _RF_SZ(64) | _RF_RS(0), /* RELATIVE */ 95 _RF_S|_RF_A| _RF_U| _RF_SZ(32) | _RF_RS(0), /* UA_32 */ 96 97 _RF_A| _RF_SZ(32) | _RF_RS(0), /* PLT32 */ 98 _RF_A| _RF_SZ(32) | _RF_RS(10), /* HIPLT22 */ 99 _RF_A| _RF_SZ(32) | _RF_RS(0), /* LOPLT10 */ 100 _RF_A|_RF_P| _RF_SZ(32) | _RF_RS(0), /* PCPLT32 */ 101 _RF_A|_RF_P| _RF_SZ(32) | _RF_RS(10), /* PCPLT22 */ 102 _RF_A|_RF_P| _RF_SZ(32) | _RF_RS(0), /* PCPLT10 */ 103 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 10 */ 104 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 11 */ 105 _RF_S|_RF_A| _RF_SZ(64) | _RF_RS(0), /* 64 */ 106 _RF_S|_RF_A|/*extra*/ _RF_SZ(32) | _RF_RS(0), /* OLO10 */ 107 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(42), /* HH22 */ 108 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(32), /* HM10 */ 109 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(10), /* LM22 */ 110 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(42), /* PC_HH22 */ 111 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(32), /* PC_HM10 */ 112 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(10), /* PC_LM22 */ 113 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WDISP16 */ 114 _RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WDISP19 */ 115 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* GLOB_JMP */ 116 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 7 */ 117 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 5 */ 118 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 6 */ 119 _RF_S|_RF_A|_RF_P| _RF_SZ(64) | _RF_RS(0), /* DISP64 */ 120 _RF_A| _RF_SZ(64) | _RF_RS(0), /* PLT64 */ 121 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(10), /* HIX22 */ 122 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* LOX10 */ 123 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(22), /* H44 */ 124 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(12), /* M44 */ 125 _RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* L44 */ 126 _RF_S|_RF_A| _RF_SZ(64) | _RF_RS(0), /* REGISTER */ 127 _RF_S|_RF_A| _RF_U| _RF_SZ(64) | _RF_RS(0), /* UA64 */ 128 _RF_S|_RF_A| _RF_U| _RF_SZ(16) | _RF_RS(0), /* UA16 */ 129 }; 130 131 #ifdef RTLD_DEBUG_RELOC 132 static const char *reloc_names[] = { 133 "NONE", "RELOC_8", "RELOC_16", "RELOC_32", "DISP_8", 134 "DISP_16", "DISP_32", "WDISP_30", "WDISP_22", "HI22", 135 "22", "13", "LO10", "GOT10", "GOT13", 136 "GOT22", "PC10", "PC22", "WPLT30", "COPY", 137 "GLOB_DAT", "JMP_SLOT", "RELATIVE", "UA_32", "PLT32", 138 "HIPLT22", "LOPLT10", "LOPLT10", "PCPLT22", "PCPLT32", 139 "10", "11", "64", "OLO10", "HH22", 140 "HM10", "LM22", "PC_HH22", "PC_HM10", "PC_LM22", 141 "WDISP16", "WDISP19", "GLOB_JMP", "7", "5", "6", 142 "DISP64", "PLT64", "HIX22", "LOX10", "H44", "M44", 143 "L44", "REGISTER", "UA64", "UA16" 144 }; 145 #endif 146 147 #define RELOC_RESOLVE_SYMBOL(t) ((reloc_target_flags[t] & _RF_S) != 0) 148 #define RELOC_PC_RELATIVE(t) ((reloc_target_flags[t] & _RF_P) != 0) 149 #define RELOC_BASE_RELATIVE(t) ((reloc_target_flags[t] & _RF_B) != 0) 150 #define RELOC_UNALIGNED(t) ((reloc_target_flags[t] & _RF_U) != 0) 151 #define RELOC_USE_ADDEND(t) ((reloc_target_flags[t] & _RF_A) != 0) 152 #define RELOC_TARGET_SIZE(t) ((reloc_target_flags[t] >> 8) & 0xff) 153 #define RELOC_VALUE_RIGHTSHIFT(t) (reloc_target_flags[t] & 0xff) 154 155 static const long reloc_target_bitmask[] = { 156 #define _BM(x) (~(-(1ULL << (x)))) 157 0, /* NONE */ 158 _BM(8), _BM(16), _BM(32), /* RELOC_8, _16, _32 */ 159 _BM(8), _BM(16), _BM(32), /* DISP8, DISP16, DISP32 */ 160 _BM(30), _BM(22), /* WDISP30, WDISP22 */ 161 _BM(22), _BM(22), /* HI22, _22 */ 162 _BM(13), _BM(10), /* RELOC_13, _LO10 */ 163 _BM(10), _BM(13), _BM(22), /* GOT10, GOT13, GOT22 */ 164 _BM(10), _BM(22), /* _PC10, _PC22 */ 165 _BM(30), 0, /* _WPLT30, _COPY */ 166 _BM(32), _BM(32), _BM(32), /* _GLOB_DAT, JMP_SLOT, _RELATIVE */ 167 _BM(32), _BM(32), /* _UA32, PLT32 */ 168 _BM(22), _BM(10), /* _HIPLT22, LOPLT10 */ 169 _BM(32), _BM(22), _BM(10), /* _PCPLT32, _PCPLT22, _PCPLT10 */ 170 _BM(10), _BM(11), -1, /* _10, _11, _64 */ 171 _BM(10), _BM(22), /* _OLO10, _HH22 */ 172 _BM(10), _BM(22), /* _HM10, _LM22 */ 173 _BM(22), _BM(10), _BM(22), /* _PC_HH22, _PC_HM10, _PC_LM22 */ 174 _BM(16), _BM(19), /* _WDISP16, _WDISP19 */ 175 -1, /* GLOB_JMP */ 176 _BM(7), _BM(5), _BM(6) /* _7, _5, _6 */ 177 -1, -1, /* DISP64, PLT64 */ 178 _BM(22), _BM(13), /* HIX22, LOX10 */ 179 _BM(22), _BM(10), _BM(13), /* H44, M44, L44 */ 180 -1, -1, _BM(16), /* REGISTER, UA64, UA16 */ 181 #undef _BM 182 }; 183 #define RELOC_VALUE_BITMASK(t) (reloc_target_bitmask[t]) 184 185 /* 186 * Instruction templates: 187 */ 188 #define BAA 0x10400000 /* ba,a %xcc, 0 */ 189 #define SETHI 0x03000000 /* sethi %hi(0), %g1 */ 190 #define JMP 0x81c06000 /* jmpl %g1+%lo(0), %g0 */ 191 #define NOP 0x01000000 /* sethi %hi(0), %g0 */ 192 #define OR 0x82806000 /* or %g1, 0, %g1 */ 193 #define XOR 0x82c06000 /* xor %g1, 0, %g1 */ 194 #define MOV71 0x8283a000 /* or %o7, 0, %g1 */ 195 #define MOV17 0x9c806000 /* or %g1, 0, %o7 */ 196 #define CALL 0x40000000 /* call 0 */ 197 #define SLLX 0x8b407000 /* sllx %g1, 0, %g1 */ 198 #define SETHIG5 0x0b000000 /* sethi %hi(0), %g5 */ 199 #define ORG5 0x82804005 /* or %g1, %g5, %g1 */ 200 201 202 /* %hi(v)/%lo(v) with variable shift */ 203 #define HIVAL(v, s) (((v) >> (s)) & 0x003fffff) 204 #define LOVAL(v, s) (((v) >> (s)) & 0x000003ff) 205 206 void _rtld_bind_start_0(long, long); 207 void _rtld_bind_start_1(long, long); 208 void _rtld_relocate_nonplt_self(Elf_Dyn *, Elf_Addr); 209 caddr_t _rtld_bind(const Obj_Entry *, Elf_Word); 210 211 /* 212 * Install rtld function call into this PLT slot. 213 */ 214 #define SAVE 0x9de3bf50 /* i.e. `save %sp,-176,%sp' */ 215 #define SETHI_l0 0x21000000 216 #define SETHI_l1 0x23000000 217 #define OR_l0_l0 0xa0142000 218 #define SLLX_l0_32_l0 0xa12c3020 219 #define OR_l0_l1_l0 0xa0140011 220 #define JMPL_l0_o0 0x91c42000 221 #define MOV_g1_o1 0x92100001 222 223 void _rtld_install_plt(Elf_Word *, Elf_Addr); 224 static inline int _rtld_relocate_plt_object(const Obj_Entry *, 225 const Elf_Rela *, Elf_Addr *); 226 227 void 228 _rtld_install_plt(Elf_Word *pltgot, Elf_Addr proc) 229 { 230 pltgot[0] = SAVE; 231 pltgot[1] = SETHI_l0 | HIVAL(proc, 42); 232 pltgot[2] = SETHI_l1 | HIVAL(proc, 10); 233 pltgot[3] = OR_l0_l0 | LOVAL(proc, 32); 234 pltgot[4] = SLLX_l0_32_l0; 235 pltgot[5] = OR_l0_l1_l0; 236 pltgot[6] = JMPL_l0_o0 | LOVAL(proc, 0); 237 pltgot[7] = MOV_g1_o1; 238 } 239 240 void 241 _rtld_setup_pltgot(const Obj_Entry *obj) 242 { 243 /* 244 * On sparc64 we got troubles. 245 * 246 * Instructions are 4 bytes long. 247 * Elf[64]_Addr is 8 bytes long, so are our pltglot[] 248 * array entries. 249 * Each PLT entry jumps to PLT0 to enter the dynamic 250 * linker. 251 * Loading an arbitrary 64-bit pointer takes 6 252 * instructions and 2 registers. 253 * 254 * Somehow we need to issue a save to get a new stack 255 * frame, load the address of the dynamic linker, and 256 * jump there, in 8 instructions or less. 257 * 258 * Oh, we need to fill out both PLT0 and PLT1. 259 */ 260 { 261 Elf_Word *entry = (Elf_Word *)obj->pltgot; 262 263 /* Install in entries 0 and 1 */ 264 _rtld_install_plt(&entry[0], (Elf_Addr) &_rtld_bind_start_0); 265 _rtld_install_plt(&entry[8], (Elf_Addr) &_rtld_bind_start_1); 266 267 /* 268 * Install the object reference in first slot 269 * of entry 2. 270 */ 271 obj->pltgot[8] = (Elf_Addr) obj; 272 } 273 } 274 275 void 276 _rtld_relocate_nonplt_self(Elf_Dyn *dynp, Elf_Addr relocbase) 277 { 278 const Elf_Rela *rela = 0, *relalim; 279 Elf_Addr relasz = 0; 280 Elf_Addr *where; 281 282 for (; dynp->d_tag != DT_NULL; dynp++) { 283 switch (dynp->d_tag) { 284 case DT_RELA: 285 rela = (const Elf_Rela *)(relocbase + dynp->d_un.d_ptr); 286 break; 287 case DT_RELASZ: 288 relasz = dynp->d_un.d_val; 289 break; 290 } 291 } 292 relalim = (const Elf_Rela *)((const uint8_t *)rela + relasz); 293 for (; rela < relalim; rela++) { 294 where = (Elf_Addr *)(relocbase + rela->r_offset); 295 *where = (Elf_Addr)(relocbase + rela->r_addend); 296 } 297 } 298 299 int 300 _rtld_relocate_nonplt_objects(const Obj_Entry *obj) 301 { 302 const Elf_Rela *rela; 303 const Elf_Sym *def = NULL; 304 const Obj_Entry *defobj = NULL; 305 306 for (rela = obj->rela; rela < obj->relalim; rela++) { 307 Elf_Addr *where; 308 Elf_Word type; 309 Elf_Addr value = 0, mask; 310 unsigned long symnum; 311 312 where = (Elf_Addr *) (obj->relocbase + rela->r_offset); 313 symnum = ELF_R_SYM(rela->r_info); 314 315 type = ELF_R_TYPE(rela->r_info); 316 if (type == R_TYPE(NONE)) 317 continue; 318 319 /* We do JMP_SLOTs in _rtld_bind() below */ 320 if (type == R_TYPE(JMP_SLOT)) 321 continue; 322 323 /* COPY relocs are also handled elsewhere */ 324 if (type == R_TYPE(COPY)) 325 continue; 326 327 /* 328 * We use the fact that relocation types are an `enum' 329 * Note: R_SPARC_UA16 is currently numerically largest. 330 */ 331 if (type > R_TYPE(UA16)) 332 return (-1); 333 334 value = rela->r_addend; 335 336 /* 337 * Handle relative relocs here, as an optimization. 338 */ 339 if (type == R_TYPE(RELATIVE)) { 340 *where = (Elf_Addr)(obj->relocbase + value); 341 rdbg(("RELATIVE in %s --> %p", obj->path, 342 (void *)*where)); 343 continue; 344 } 345 346 if (RELOC_RESOLVE_SYMBOL(type)) { 347 348 /* Find the symbol */ 349 def = _rtld_find_symdef(symnum, obj, &defobj, 350 false); 351 if (def == NULL) 352 return -1; 353 354 /* Add in the symbol's absolute address */ 355 value += (Elf_Addr)(defobj->relocbase + def->st_value); 356 } 357 358 if (RELOC_PC_RELATIVE(type)) { 359 value -= (Elf_Addr)where; 360 } 361 362 if (RELOC_BASE_RELATIVE(type)) { 363 /* 364 * Note that even though sparcs use `Elf_rela' 365 * exclusively we still need the implicit memory addend 366 * in relocations referring to GOT entries. 367 * Undoubtedly, someone f*cked this up in the distant 368 * past, and now we're stuck with it in the name of 369 * compatibility for all eternity.. 370 * 371 * In any case, the implicit and explicit should be 372 * mutually exclusive. We provide a check for that 373 * here. 374 */ 375 #ifdef DIAGNOSTIC 376 if (value != 0 && *where != 0) { 377 xprintf("BASE_REL(%s): where=%p, *where 0x%lx, " 378 "addend=0x%lx, base %p\n", 379 obj->path, where, *where, 380 rela->r_addend, obj->relocbase); 381 } 382 #endif 383 /* XXXX -- apparently we ignore the preexisting value */ 384 value += (Elf_Addr)(obj->relocbase); 385 } 386 387 mask = RELOC_VALUE_BITMASK(type); 388 value >>= RELOC_VALUE_RIGHTSHIFT(type); 389 value &= mask; 390 391 if (RELOC_UNALIGNED(type)) { 392 /* Handle unaligned relocations. */ 393 Elf_Addr tmp = 0; 394 char *ptr = (char *)where; 395 int i, size = RELOC_TARGET_SIZE(type)/8; 396 397 /* Read it in one byte at a time. */ 398 for (i=0; i<size; i++) 399 tmp = (tmp << 8) | ptr[i]; 400 401 tmp &= ~mask; 402 tmp |= value; 403 404 /* Write it back out. */ 405 for (i=0; i<size; i++) 406 ptr[i] = ((tmp >> (8*i)) & 0xff); 407 #ifdef RTLD_DEBUG_RELOC 408 value = (Elf_Addr)tmp; 409 #endif 410 411 } else if (RELOC_TARGET_SIZE(type) > 32) { 412 *where &= ~mask; 413 *where |= value; 414 #ifdef RTLD_DEBUG_RELOC 415 value = (Elf_Addr)*where; 416 #endif 417 } else { 418 Elf32_Addr *where32 = (Elf32_Addr *)where; 419 420 *where32 &= ~mask; 421 *where32 |= value; 422 #ifdef RTLD_DEBUG_RELOC 423 value = (Elf_Addr)*where32; 424 #endif 425 } 426 427 #ifdef RTLD_DEBUG_RELOC 428 if (RELOC_RESOLVE_SYMBOL(type)) { 429 rdbg(("%s %s in %s --> %p in %s", reloc_names[type], 430 obj->strtab + obj->symtab[symnum].st_name, 431 obj->path, (void *)value, defobj->path)); 432 } else { 433 rdbg(("%s in %s --> %p", reloc_names[type], 434 obj->path, (void *)value)); 435 } 436 #endif 437 } 438 return (0); 439 } 440 441 int 442 _rtld_relocate_plt_lazy(const Obj_Entry *obj) 443 { 444 return (0); 445 } 446 447 caddr_t 448 _rtld_bind(const Obj_Entry *obj, Elf_Word reloff) 449 { 450 const Elf_Rela *rela = obj->pltrela + reloff; 451 Elf_Addr result; 452 int err; 453 454 result = 0; /* XXX gcc */ 455 456 if (ELF_R_TYPE(obj->pltrela->r_info) == R_TYPE(JMP_SLOT)) { 457 /* 458 * XXXX 459 * 460 * The first four PLT entries are reserved. There is some 461 * disagreement whether they should have associated relocation 462 * entries. Both the SPARC 32-bit and 64-bit ELF 463 * specifications say that they should have relocation entries, 464 * but the 32-bit SPARC binutils do not generate them, and now 465 * the 64-bit SPARC binutils have stopped generating them too. 466 * 467 * So, to provide binary compatibility, we will check the first 468 * entry, if it is reserved it should not be of the type 469 * JMP_SLOT. If it is JMP_SLOT, then the 4 reserved entries 470 * were not generated and our index is 4 entries too far. 471 */ 472 rela -= 4; 473 } 474 475 err = _rtld_relocate_plt_object(obj, rela, &result); 476 if (err || result == 0) 477 _rtld_die(); 478 479 return (caddr_t)result; 480 } 481 482 int 483 _rtld_relocate_plt_objects(const Obj_Entry *obj) 484 { 485 const Elf_Rela *rela; 486 487 rela = obj->pltrela; 488 489 /* 490 * Check for first four reserved entries - and skip them. 491 * See above for details. 492 */ 493 if (ELF_R_TYPE(obj->pltrela->r_info) != R_TYPE(JMP_SLOT)) 494 rela += 4; 495 496 for (; rela < obj->pltrelalim; rela++) 497 if (_rtld_relocate_plt_object(obj, rela, NULL) < 0) 498 return -1; 499 500 return 0; 501 } 502 503 /* 504 * New inline function that is called by _rtld_relocate_plt_object and 505 * _rtld_bind 506 */ 507 static inline int 508 _rtld_relocate_plt_object(const Obj_Entry *obj, const Elf_Rela *rela, Elf_Addr *tp) 509 { 510 Elf_Word *where = (Elf_Word *)(obj->relocbase + rela->r_offset); 511 const Elf_Sym *def; 512 const Obj_Entry *defobj; 513 Elf_Addr value, offset; 514 515 /* Fully resolve procedure addresses now */ 516 517 assert(ELF_R_TYPE(rela->r_info) == R_TYPE(JMP_SLOT)); 518 519 def = _rtld_find_symdef(ELF_R_SYM(rela->r_info), obj, &defobj, true); 520 if (def == NULL) 521 return -1; 522 523 value = (Elf_Addr)(defobj->relocbase + def->st_value); 524 rdbg(("bind now/fixup in %s --> new=%p", 525 defobj->strtab + def->st_name, (void *)value)); 526 527 /* 528 * At the PLT entry pointed at by `where', we now construct 529 * a direct transfer to the now fully resolved function 530 * address. 531 * 532 * A PLT entry is supposed to start by looking like this: 533 * 534 * sethi %hi(. - .PLT0), %g1 535 * ba,a %xcc, .PLT1 536 * nop 537 * nop 538 * nop 539 * nop 540 * nop 541 * nop 542 * 543 * When we replace these entries we start from the second 544 * entry and do it in reverse order so the last thing we 545 * do is replace the branch. That allows us to change this 546 * atomically. 547 * 548 * We now need to find out how far we need to jump. We 549 * have a choice of several different relocation techniques 550 * which are increasingly expensive. 551 */ 552 553 offset = ((Elf_Addr)where) - value; 554 if (rela->r_addend) { 555 Elf_Addr *ptr = (Elf_Addr *)where; 556 /* 557 * This entry is >=32768. The relocations points to a 558 * PC-relative pointer to the bind_0 stub at the top of the 559 * PLT section. Update it to point to the target function. 560 */ 561 ptr[0] += value - (Elf_Addr)obj->pltgot; 562 563 } else if (offset <= (1L<<20) && (Elf_SOff)offset >= -(1L<<20)) { 564 /* 565 * We're within 1MB -- we can use a direct branch insn. 566 * 567 * We can generate this pattern: 568 * 569 * sethi %hi(. - .PLT0), %g1 570 * ba,a %xcc, addr 571 * nop 572 * nop 573 * nop 574 * nop 575 * nop 576 * nop 577 * 578 */ 579 where[1] = BAA | ((offset >> 2) &0x3fffff); 580 __asm volatile("iflush %0+4" : : "r" (where)); 581 } else if (value < (1L<<32)) { 582 /* 583 * We're within 32-bits of address zero. 584 * 585 * The resulting code in the jump slot is: 586 * 587 * sethi %hi(. - .PLT0), %g1 588 * sethi %hi(addr), %g1 589 * jmp %g1+%lo(addr) 590 * nop 591 * nop 592 * nop 593 * nop 594 * nop 595 * 596 */ 597 where[2] = JMP | LOVAL(value, 0); 598 where[1] = SETHI | HIVAL(value, 10); 599 __asm volatile("iflush %0+8" : : "r" (where)); 600 __asm volatile("iflush %0+4" : : "r" (where)); 601 602 } else if ((Elf_SOff)value <= 0 && (Elf_SOff)value > -(1L<<32)) { 603 /* 604 * We're within 32-bits of address -1. 605 * 606 * The resulting code in the jump slot is: 607 * 608 * sethi %hi(. - .PLT0), %g1 609 * sethi %hix(addr), %g1 610 * xor %g1, %lox(addr), %g1 611 * jmp %g1 612 * nop 613 * nop 614 * nop 615 * nop 616 * 617 */ 618 where[3] = JMP; 619 where[2] = XOR | ((~value) & 0x00001fff); 620 where[1] = SETHI | HIVAL(~value, 10); 621 __asm volatile("iflush %0+12" : : "r" (where)); 622 __asm volatile("iflush %0+8" : : "r" (where)); 623 __asm volatile("iflush %0+4" : : "r" (where)); 624 625 } else if (offset <= (1L<<32) && (Elf_SOff)offset >= -((1L<<32) - 4)) { 626 /* 627 * We're within 32-bits -- we can use a direct call insn 628 * 629 * The resulting code in the jump slot is: 630 * 631 * sethi %hi(. - .PLT0), %g1 632 * mov %o7, %g1 633 * call (.+offset) 634 * mov %g1, %o7 635 * nop 636 * nop 637 * nop 638 * nop 639 * 640 */ 641 where[3] = MOV17; 642 where[2] = CALL | ((offset >> 4) & 0x3fffffff); 643 where[1] = MOV71; 644 __asm volatile("iflush %0+12" : : "r" (where)); 645 __asm volatile("iflush %0+8" : : "r" (where)); 646 __asm volatile("iflush %0+4" : : "r" (where)); 647 648 } else if (offset < (1L<<44)) { 649 /* 650 * We're within 44 bits. We can generate this pattern: 651 * 652 * The resulting code in the jump slot is: 653 * 654 * sethi %hi(. - .PLT0), %g1 655 * sethi %h44(addr), %g1 656 * or %g1, %m44(addr), %g1 657 * sllx %g1, 12, %g1 658 * jmp %g1+%l44(addr) 659 * nop 660 * nop 661 * nop 662 * 663 */ 664 where[4] = JMP | LOVAL(offset, 0); 665 where[3] = SLLX | 12; 666 where[2] = OR | (((offset) >> 12) & 0x00001fff); 667 where[1] = SETHI | HIVAL(offset, 22); 668 __asm volatile("iflush %0+16" : : "r" (where)); 669 __asm volatile("iflush %0+12" : : "r" (where)); 670 __asm volatile("iflush %0+8" : : "r" (where)); 671 __asm volatile("iflush %0+4" : : "r" (where)); 672 673 } else if ((Elf_SOff)offset < 0 && (Elf_SOff)offset > -(1L<<44)) { 674 /* 675 * We're within 44 bits. We can generate this pattern: 676 * 677 * The resulting code in the jump slot is: 678 * 679 * sethi %hi(. - .PLT0), %g1 680 * sethi %h44(-addr), %g1 681 * xor %g1, %m44(-addr), %g1 682 * sllx %g1, 12, %g1 683 * jmp %g1+%l44(addr) 684 * nop 685 * nop 686 * nop 687 * 688 */ 689 where[4] = JMP | LOVAL(offset, 0); 690 where[3] = SLLX | 12; 691 where[2] = XOR | (((~offset) >> 12) & 0x00001fff); 692 where[1] = SETHI | HIVAL(~offset, 22); 693 __asm volatile("iflush %0+16" : : "r" (where)); 694 __asm volatile("iflush %0+12" : : "r" (where)); 695 __asm volatile("iflush %0+8" : : "r" (where)); 696 __asm volatile("iflush %0+4" : : "r" (where)); 697 698 } else { 699 /* 700 * We need to load all 64-bits 701 * 702 * The resulting code in the jump slot is: 703 * 704 * sethi %hi(. - .PLT0), %g1 705 * sethi %hh(addr), %g1 706 * sethi %lm(addr), %g5 707 * or %g1, %hm(addr), %g1 708 * sllx %g1, 32, %g1 709 * or %g1, %g5, %g1 710 * jmp %g1+%lo(addr) 711 * nop 712 * 713 */ 714 where[6] = JMP | LOVAL(value, 0); 715 where[5] = ORG5; 716 where[4] = SLLX | 32; 717 where[3] = OR | LOVAL(value, 32); 718 where[2] = SETHIG5 | HIVAL(value, 10); 719 where[1] = SETHI | HIVAL(value, 42); 720 __asm volatile("iflush %0+24" : : "r" (where)); 721 __asm volatile("iflush %0+20" : : "r" (where)); 722 __asm volatile("iflush %0+16" : : "r" (where)); 723 __asm volatile("iflush %0+12" : : "r" (where)); 724 __asm volatile("iflush %0+8" : : "r" (where)); 725 __asm volatile("iflush %0+4" : : "r" (where)); 726 727 } 728 729 if (tp) 730 *tp = value; 731 732 return 0; 733 } 734
Indexes created Tue Sep 30 17:09:57 GMT 2025