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      1   1.6    ryo #include "assym.h"
      2   1.6    ryo 
      3   1.1   matt /* Default linker script, for normal executables */
      4   1.1   matt OUTPUT_FORMAT("elf64-littleaarch64", "elf64-bigaarch64",
      5   1.1   matt 	      "elf64-littleaarch64")
      6   1.1   matt OUTPUT_ARCH(aarch64)
      7   1.1   matt ENTRY(_start)
      8   1.8   maxv 
      9   1.1   matt SECTIONS
     10   1.1   matt {
     11   1.8   maxv 	.text :
     12   1.8   maxv 	{
     13   1.9   maxv 		PROVIDE(__kernel_text = .);
     14  1.12    ryo 		PROVIDE(kernel_text = .);
     15   1.8   maxv 		*(.text)
     16   1.9   maxv 		*(.text.*)
     17   1.9   maxv 		*(.stub)
     18   1.8   maxv 	} =0
     19   1.8   maxv 
     20   1.8   maxv 	/* Move .rodata to the next L2 block to set unexecutable */
     21   1.9   maxv 	. = ALIGN(L2_SIZE);
     22   1.9   maxv 
     23   1.9   maxv 	PROVIDE(__rodata_start = .);
     24   1.9   maxv 	.rodata :
     25   1.9   maxv 	{
     26   1.9   maxv 		*(.rodata)
     27   1.9   maxv 		*(.rodata.*)
     28  1.11   maxv 		. = ALIGN(64);
     29  1.11   maxv 		__CTOR_LIST__ = .;
     30  1.11   maxv 		*(.ctors)
     31  1.11   maxv 		*(.init_array)
     32  1.11   maxv 		__CTOR_END__ = .;
     33   1.9   maxv 	}
     34   1.9   maxv 
     35   1.9   maxv 	PROVIDE(_etext = .);
     36   1.9   maxv 	PROVIDE(etext = .);
     37   1.8   maxv 
     38   1.8   maxv 	/*
     39   1.8   maxv 	 * Adjust the address for the data segment. Move .data to the next
     40   1.8   maxv 	 * L2 block, and .text and .rodata will be set readonly if needed.
     41   1.8   maxv 	 */
     42   1.9   maxv 	PROVIDE(_erodata = .);
     43   1.9   maxv 	. = ALIGN(L2_SIZE);
     44   1.9   maxv 
     45   1.9   maxv 	.data :
     46   1.8   maxv 	{
     47   1.9   maxv 		PROVIDE(__data_start = .);
     48   1.9   maxv 		*(.data)
     49   1.8   maxv 	}
     50   1.8   maxv 
     51  1.10  skrll 	. = ALIGN(COHERENCY_UNIT);
     52   1.8   maxv 	.data.cacheline_aligned :
     53   1.8   maxv 	{
     54   1.8   maxv 		*(.data.cacheline_aligned)
     55   1.8   maxv 	}
     56  1.10  skrll 	. = ALIGN(COHERENCY_UNIT);
     57   1.8   maxv 	.data.read_mostly :
     58   1.8   maxv 	{
     59   1.8   maxv 		*(.data.read_mostly)
     60   1.8   maxv 	}
     61  1.10  skrll 	. = ALIGN(COHERENCY_UNIT);
     62   1.8   maxv 
     63   1.9   maxv 	_edata = .;
     64   1.9   maxv 	PROVIDE (edata = .);
     65   1.8   maxv 
     66   1.8   maxv 	__bss_start = .;
     67   1.8   maxv 	__bss_start__ = .;
     68   1.8   maxv 	.bss :
     69   1.8   maxv 	{
     70   1.9   maxv 		*(.bss)
     71   1.9   maxv 		*(.bss.*)
     72   1.8   maxv 		*(COMMON)
     73   1.8   maxv 
     74   1.8   maxv 		/*
     75   1.8   maxv 		 * Align here to ensure that the .bss section occupies space
     76   1.8   maxv 		 * up to _end. Align after .bss to ensure correct alignment
     77   1.8   maxv 		 * even if the .bss section disappears because there are no
     78   1.8   maxv 		 * input sections.
     79   1.8   maxv 		 *
     80   1.8   maxv 		 * FIXME: Why do we need it? When there is no .bss section,
     81   1.8   maxv 		 * we don't pad the .data section.
     82   1.8   maxv 		 */
     83   1.8   maxv 		. = ALIGN(. != 0 ? 32 / 8 : 1);
     84   1.8   maxv 	}
     85   1.9   maxv 	_bss_end__ = . ;
     86   1.9   maxv 	__bss_end__ = . ;
     87   1.8   maxv 	. = ALIGN(32 / 8);
     88   1.8   maxv 
     89   1.8   maxv 	__end__ = . ;
     90   1.9   maxv 	_end = .;
     91   1.9   maxv 	PROVIDE(end = .);
     92   1.1   matt }
     93