cpu.h revision 1.11 1 1.11 mrg /* $NetBSD: cpu.h,v 1.11 2018/11/20 01:59:51 mrg Exp $ */
2 1.1 matt
3 1.1 matt /*-
4 1.1 matt * Copyright (c) 2014 The NetBSD Foundation, Inc.
5 1.1 matt * All rights reserved.
6 1.1 matt *
7 1.1 matt * This code is derived from software contributed to The NetBSD Foundation
8 1.1 matt * by Matt Thomas of 3am Software Foundry.
9 1.1 matt *
10 1.1 matt * Redistribution and use in source and binary forms, with or without
11 1.1 matt * modification, are permitted provided that the following conditions
12 1.1 matt * are met:
13 1.1 matt * 1. Redistributions of source code must retain the above copyright
14 1.1 matt * notice, this list of conditions and the following disclaimer.
15 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 matt * notice, this list of conditions and the following disclaimer in the
17 1.1 matt * documentation and/or other materials provided with the distribution.
18 1.1 matt *
19 1.1 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 matt * POSSIBILITY OF SUCH DAMAGE.
30 1.1 matt */
31 1.1 matt
32 1.1 matt #ifndef _AARCH64_CPU_H_
33 1.1 matt #define _AARCH64_CPU_H_
34 1.1 matt
35 1.1 matt #ifdef __aarch64__
36 1.1 matt
37 1.2 ryo #ifdef _KERNEL_OPT
38 1.2 ryo #include "opt_multiprocessor.h"
39 1.2 ryo #endif
40 1.2 ryo
41 1.7 ryo #include <sys/param.h>
42 1.7 ryo
43 1.1 matt #if defined(_KERNEL) || defined(_KMEMUSER)
44 1.2 ryo #include <sys/evcnt.h>
45 1.11 mrg
46 1.2 ryo #include <aarch64/frame.h>
47 1.11 mrg #include <aarch64/armreg.h>
48 1.2 ryo
49 1.1 matt struct clockframe {
50 1.2 ryo struct trapframe cf_tf;
51 1.1 matt };
52 1.1 matt
53 1.2 ryo /* (spsr & 15) == SPSR_M_EL0T(64bit,0) or USER(32bit,0) */
54 1.2 ryo #define CLKF_USERMODE(cf) ((((cf)->cf_tf.tf_spsr) & 0x0f) == 0)
55 1.2 ryo #define CLKF_PC(cf) ((cf)->cf_tf.tf_pc)
56 1.2 ryo #define CLKF_INTR(cf) ((void)(cf), curcpu()->ci_intr_depth > 1)
57 1.1 matt
58 1.1 matt #include <sys/cpu_data.h>
59 1.1 matt #include <sys/device_if.h>
60 1.1 matt #include <sys/intr.h>
61 1.1 matt
62 1.1 matt struct cpu_info {
63 1.1 matt struct cpu_data ci_data;
64 1.1 matt device_t ci_dev;
65 1.1 matt cpuid_t ci_cpuid;
66 1.1 matt struct lwp *ci_curlwp;
67 1.1 matt struct lwp *ci_softlwps[SOFTINT_COUNT];
68 1.1 matt
69 1.1 matt uint64_t ci_lastintr;
70 1.1 matt
71 1.1 matt int ci_mtx_oldspl;
72 1.1 matt int ci_mtx_count;
73 1.1 matt
74 1.1 matt int ci_want_resched;
75 1.1 matt int ci_cpl;
76 1.2 ryo volatile u_int ci_softints;
77 1.1 matt volatile u_int ci_astpending;
78 1.1 matt volatile u_int ci_intr_depth;
79 1.2 ryo
80 1.2 ryo /* event counters */
81 1.2 ryo struct evcnt ci_vfp_use;
82 1.2 ryo struct evcnt ci_vfp_reuse;
83 1.2 ryo struct evcnt ci_vfp_save;
84 1.2 ryo struct evcnt ci_vfp_release;
85 1.6 jmcneill
86 1.6 jmcneill /* interrupt controller */
87 1.6 jmcneill u_int ci_gic_redist; /* GICv3 redistributor index */
88 1.6 jmcneill uint64_t ci_gic_sgir; /* GICv3 SGIR target */
89 1.7 ryo
90 1.9 jmcneill /* ACPI */
91 1.9 jmcneill uint64_t ci_acpiid; /* ACPI Processor Unique ID */
92 1.9 jmcneill
93 1.11 mrg struct aarch64_sysctl_cpu_id ci_id;
94 1.7 ryo
95 1.7 ryo struct aarch64_cache_info *ci_cacheinfo;
96 1.7 ryo
97 1.7 ryo } __aligned(COHERENCY_UNIT);
98 1.1 matt
99 1.1 matt static inline struct cpu_info *
100 1.1 matt curcpu(void)
101 1.1 matt {
102 1.1 matt struct cpu_info *ci;
103 1.2 ryo __asm __volatile ("mrs %0, tpidr_el1" : "=r"(ci));
104 1.1 matt return ci;
105 1.1 matt }
106 1.2 ryo #define curlwp (curcpu()->ci_curlwp)
107 1.1 matt
108 1.2 ryo #define setsoftast(ci) atomic_or_uint(&(ci)->ci_astpending, __BIT(0))
109 1.2 ryo #define cpu_signotify(l) setsoftast((l)->l_cpu)
110 1.10 skrll
111 1.2 ryo void cpu_set_curpri(int);
112 1.2 ryo void cpu_proc_fork(struct proc *, struct proc *);
113 1.2 ryo void cpu_need_proftick(struct lwp *l);
114 1.2 ryo void cpu_boot_secondary_processors(void);
115 1.10 skrll void cpu_mpstart(void);
116 1.3 ryo void cpu_hatch(struct cpu_info *);
117 1.2 ryo
118 1.2 ryo extern struct cpu_info *cpu_info[];
119 1.2 ryo extern volatile u_int arm_cpu_hatched; /* MULTIPROCESSOR */
120 1.8 ryo extern uint64_t cpu_mpidr[]; /* MULTIPROCESSOR */
121 1.1 matt
122 1.2 ryo #define CPU_INFO_ITERATOR cpuid_t
123 1.2 ryo #ifdef MULTIPROCESSOR
124 1.2 ryo #define cpu_number() (curcpu()->ci_index)
125 1.2 ryo #define CPU_IS_PRIMARY(ci) ((ci)->ci_index == 0)
126 1.3 ryo #define CPU_INFO_FOREACH(cii, ci) \
127 1.3 ryo cii = 0, ci = cpu_info[0]; \
128 1.3 ryo cii < (ncpu ? ncpu : 1) && (ci = cpu_info[cii]) != NULL; \
129 1.2 ryo cii++
130 1.2 ryo #else /* MULTIPROCESSOR */
131 1.2 ryo #define cpu_number() 0
132 1.2 ryo #define CPU_IS_PRIMARY(ci) true
133 1.3 ryo #define CPU_INFO_FOREACH(cii, ci) \
134 1.2 ryo cii = 0, __USE(cii), ci = curcpu(); ci != NULL; ci = NULL
135 1.2 ryo #endif /* MULTIPROCESSOR */
136 1.1 matt
137 1.1 matt
138 1.1 matt static inline void
139 1.1 matt cpu_dosoftints(void)
140 1.1 matt {
141 1.2 ryo #if defined(__HAVE_FAST_SOFTINTS) && !defined(__HAVE_PIC_FAST_SOFTINTS)
142 1.2 ryo void dosoftints(void);
143 1.2 ryo struct cpu_info * const ci = curcpu();
144 1.2 ryo
145 1.2 ryo if (ci->ci_intr_depth == 0 && (ci->ci_softints >> ci->ci_cpl) > 0)
146 1.2 ryo dosoftints();
147 1.2 ryo #endif
148 1.1 matt }
149 1.1 matt
150 1.1 matt static inline bool
151 1.1 matt cpu_intr_p(void)
152 1.1 matt {
153 1.2 ryo #ifdef __HAVE_PIC_FAST_SOFTINTS
154 1.2 ryo if (ci->ci_cpl < IPL_VM)
155 1.2 ryo return false;
156 1.2 ryo #endif
157 1.1 matt return curcpu()->ci_intr_depth > 0;
158 1.1 matt }
159 1.1 matt
160 1.2 ryo void cpu_attach(device_t, cpuid_t);
161 1.2 ryo
162 1.1 matt #endif /* _KERNEL || _KMEMUSER */
163 1.1 matt
164 1.1 matt #elif defined(__arm__)
165 1.1 matt
166 1.1 matt #include <arm/cpu.h>
167 1.1 matt
168 1.1 matt #endif
169 1.1 matt
170 1.1 matt #endif /* _AARCH64_CPU_H_ */
171