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cpu.h revision 1.17.2.2
      1  1.17.2.2        ad /* $NetBSD: cpu.h,v 1.17.2.2 2020/02/29 20:18:15 ad Exp $ */
      2       1.1      matt 
      3       1.1      matt /*-
      4       1.1      matt  * Copyright (c) 2014 The NetBSD Foundation, Inc.
      5       1.1      matt  * All rights reserved.
      6       1.1      matt  *
      7       1.1      matt  * This code is derived from software contributed to The NetBSD Foundation
      8       1.1      matt  * by Matt Thomas of 3am Software Foundry.
      9       1.1      matt  *
     10       1.1      matt  * Redistribution and use in source and binary forms, with or without
     11       1.1      matt  * modification, are permitted provided that the following conditions
     12       1.1      matt  * are met:
     13       1.1      matt  * 1. Redistributions of source code must retain the above copyright
     14       1.1      matt  *    notice, this list of conditions and the following disclaimer.
     15       1.1      matt  * 2. Redistributions in binary form must reproduce the above copyright
     16       1.1      matt  *    notice, this list of conditions and the following disclaimer in the
     17       1.1      matt  *    documentation and/or other materials provided with the distribution.
     18       1.1      matt  *
     19       1.1      matt  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20       1.1      matt  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21       1.1      matt  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22       1.1      matt  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23       1.1      matt  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24       1.1      matt  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25       1.1      matt  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26       1.1      matt  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27       1.1      matt  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28       1.1      matt  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29       1.1      matt  * POSSIBILITY OF SUCH DAMAGE.
     30       1.1      matt  */
     31       1.1      matt 
     32       1.1      matt #ifndef _AARCH64_CPU_H_
     33       1.1      matt #define _AARCH64_CPU_H_
     34       1.1      matt 
     35  1.17.2.2        ad #include <arm/cpu.h>
     36  1.17.2.2        ad 
     37       1.1      matt #ifdef __aarch64__
     38       1.1      matt 
     39       1.2       ryo #ifdef _KERNEL_OPT
     40       1.2       ryo #include "opt_multiprocessor.h"
     41       1.2       ryo #endif
     42       1.2       ryo 
     43       1.7       ryo #include <sys/param.h>
     44       1.7       ryo 
     45       1.1      matt #if defined(_KERNEL) || defined(_KMEMUSER)
     46       1.2       ryo #include <sys/evcnt.h>
     47      1.11       mrg 
     48       1.2       ryo #include <aarch64/frame.h>
     49      1.11       mrg #include <aarch64/armreg.h>
     50       1.2       ryo 
     51       1.1      matt struct clockframe {
     52       1.2       ryo 	struct trapframe cf_tf;
     53       1.1      matt };
     54       1.1      matt 
     55       1.2       ryo /* (spsr & 15) == SPSR_M_EL0T(64bit,0) or USER(32bit,0) */
     56       1.2       ryo #define CLKF_USERMODE(cf)	((((cf)->cf_tf.tf_spsr) & 0x0f) == 0)
     57       1.2       ryo #define CLKF_PC(cf)		((cf)->cf_tf.tf_pc)
     58       1.2       ryo #define CLKF_INTR(cf)		((void)(cf), curcpu()->ci_intr_depth > 1)
     59       1.1      matt 
     60      1.12     skrll /*
     61      1.12     skrll  * LWP_PC: Find out the program counter for the given lwp.
     62      1.12     skrll  */
     63      1.12     skrll #define LWP_PC(l)		((l)->l_md.md_utf->tf_pc)
     64      1.12     skrll 
     65       1.1      matt #include <sys/cpu_data.h>
     66       1.1      matt #include <sys/device_if.h>
     67       1.1      matt #include <sys/intr.h>
     68       1.1      matt 
     69      1.13       ryo struct aarch64_cpufuncs {
     70      1.13       ryo 	void (*cf_set_ttbr0)(uint64_t);
     71      1.13       ryo };
     72      1.13       ryo 
     73       1.1      matt struct cpu_info {
     74       1.1      matt 	struct cpu_data ci_data;
     75       1.1      matt 	device_t ci_dev;
     76       1.1      matt 	cpuid_t ci_cpuid;
     77       1.1      matt 	struct lwp *ci_curlwp;
     78      1.16        ad 	struct lwp *ci_onproc;
     79       1.1      matt 	struct lwp *ci_softlwps[SOFTINT_COUNT];
     80       1.1      matt 
     81       1.1      matt 	uint64_t ci_lastintr;
     82       1.1      matt 
     83       1.1      matt 	int ci_mtx_oldspl;
     84       1.1      matt 	int ci_mtx_count;
     85       1.1      matt 
     86       1.1      matt 	int ci_want_resched;
     87       1.1      matt 	int ci_cpl;
     88       1.2       ryo 	volatile u_int ci_softints;
     89       1.1      matt 	volatile u_int ci_astpending;
     90       1.1      matt 	volatile u_int ci_intr_depth;
     91       1.2       ryo 
     92       1.2       ryo 	/* event counters */
     93       1.2       ryo 	struct evcnt ci_vfp_use;
     94       1.2       ryo 	struct evcnt ci_vfp_reuse;
     95       1.2       ryo 	struct evcnt ci_vfp_save;
     96       1.2       ryo 	struct evcnt ci_vfp_release;
     97       1.6  jmcneill 
     98  1.17.2.1        ad 	/* FDT or similar supplied "cpu capacity" */
     99  1.17.2.1        ad 	uint32_t ci_capacity_dmips_mhz;
    100  1.17.2.1        ad 
    101       1.6  jmcneill 	/* interrupt controller */
    102       1.6  jmcneill 	u_int ci_gic_redist;	/* GICv3 redistributor index */
    103       1.6  jmcneill 	uint64_t ci_gic_sgir;	/* GICv3 SGIR target */
    104       1.7       ryo 
    105       1.9  jmcneill 	/* ACPI */
    106       1.9  jmcneill 	uint64_t ci_acpiid;	/* ACPI Processor Unique ID */
    107       1.9  jmcneill 
    108      1.11       mrg 	struct aarch64_sysctl_cpu_id ci_id;
    109       1.7       ryo 
    110       1.7       ryo 	struct aarch64_cache_info *ci_cacheinfo;
    111      1.13       ryo 	struct aarch64_cpufuncs ci_cpufuncs;
    112       1.7       ryo 
    113       1.7       ryo } __aligned(COHERENCY_UNIT);
    114       1.1      matt 
    115       1.1      matt static inline struct cpu_info *
    116       1.1      matt curcpu(void)
    117       1.1      matt {
    118       1.1      matt 	struct cpu_info *ci;
    119       1.2       ryo 	__asm __volatile ("mrs %0, tpidr_el1" : "=r"(ci));
    120       1.1      matt 	return ci;
    121       1.1      matt }
    122       1.2       ryo #define curlwp			(curcpu()->ci_curlwp)
    123       1.1      matt 
    124       1.2       ryo #define setsoftast(ci)		atomic_or_uint(&(ci)->ci_astpending, __BIT(0))
    125       1.2       ryo #define cpu_signotify(l)	setsoftast((l)->l_cpu)
    126      1.10     skrll 
    127  1.17.2.2        ad void	cpu_need_proftick(struct lwp *l);
    128  1.17.2.2        ad 
    129  1.17.2.2        ad void	cpu_hatch(struct cpu_info *);
    130       1.2       ryo 
    131       1.2       ryo extern struct cpu_info *cpu_info[];
    132  1.17.2.2        ad extern struct cpu_info cpu_info_store[];
    133       1.1      matt 
    134       1.2       ryo #define CPU_INFO_ITERATOR	cpuid_t
    135  1.17.2.2        ad #if defined(MULTIPROCESSOR) || defined(_MODULE)
    136       1.2       ryo #define cpu_number()		(curcpu()->ci_index)
    137       1.2       ryo #define CPU_IS_PRIMARY(ci)	((ci)->ci_index == 0)
    138       1.3       ryo #define CPU_INFO_FOREACH(cii, ci)					\
    139       1.3       ryo 	cii = 0, ci = cpu_info[0];					\
    140       1.3       ryo 	cii < (ncpu ? ncpu : 1) && (ci = cpu_info[cii]) != NULL;	\
    141       1.2       ryo 	cii++
    142       1.2       ryo #else /* MULTIPROCESSOR */
    143       1.2       ryo #define cpu_number()		0
    144       1.2       ryo #define CPU_IS_PRIMARY(ci)	true
    145       1.3       ryo #define CPU_INFO_FOREACH(cii, ci)					\
    146       1.2       ryo 	cii = 0, __USE(cii), ci = curcpu(); ci != NULL; ci = NULL
    147       1.2       ryo #endif /* MULTIPROCESSOR */
    148       1.1      matt 
    149       1.1      matt 
    150       1.1      matt static inline void
    151       1.1      matt cpu_dosoftints(void)
    152       1.1      matt {
    153       1.2       ryo #if defined(__HAVE_FAST_SOFTINTS) && !defined(__HAVE_PIC_FAST_SOFTINTS)
    154       1.2       ryo 	void dosoftints(void);
    155       1.2       ryo 	struct cpu_info * const ci = curcpu();
    156       1.2       ryo 
    157       1.2       ryo 	if (ci->ci_intr_depth == 0 && (ci->ci_softints >> ci->ci_cpl) > 0)
    158       1.2       ryo 		dosoftints();
    159       1.2       ryo #endif
    160       1.1      matt }
    161       1.1      matt 
    162       1.1      matt #endif /* _KERNEL || _KMEMUSER */
    163       1.1      matt 
    164       1.1      matt #endif
    165       1.1      matt 
    166       1.1      matt #endif /* _AARCH64_CPU_H_ */
    167