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cpu.h revision 1.21 
      1 /* $NetBSD: cpu.h,v 1.21 2020/02/15 08:16:10 skrll Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2014 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Matt Thomas of 3am Software Foundry.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #ifndef _AARCH64_CPU_H_
     33 #define _AARCH64_CPU_H_
     34 
     35 #include <arm/cpu.h>
     36 
     37 #ifdef __aarch64__
     38 
     39 #ifdef _KERNEL_OPT
     40 #include "opt_multiprocessor.h"
     41 #endif
     42 
     43 #include <sys/param.h>
     44 
     45 #if defined(_KERNEL) || defined(_KMEMUSER)
     46 #include <sys/evcnt.h>
     47 
     48 #include <aarch64/frame.h>
     49 #include <aarch64/armreg.h>
     50 
     51 struct clockframe {
     52 	struct trapframe cf_tf;
     53 };
     54 
     55 /* (spsr & 15) == SPSR_M_EL0T(64bit,0) or USER(32bit,0) */
     56 #define CLKF_USERMODE(cf)	((((cf)->cf_tf.tf_spsr) & 0x0f) == 0)
     57 #define CLKF_PC(cf)		((cf)->cf_tf.tf_pc)
     58 #define CLKF_INTR(cf)		((void)(cf), curcpu()->ci_intr_depth > 1)
     59 
     60 /*
     61  * LWP_PC: Find out the program counter for the given lwp.
     62  */
     63 #define LWP_PC(l)		((l)->l_md.md_utf->tf_pc)
     64 
     65 #include <sys/cpu_data.h>
     66 #include <sys/device_if.h>
     67 #include <sys/intr.h>
     68 
     69 struct aarch64_cpufuncs {
     70 	void (*cf_set_ttbr0)(uint64_t);
     71 };
     72 
     73 struct cpu_info {
     74 	struct cpu_data ci_data;
     75 	device_t ci_dev;
     76 	cpuid_t ci_cpuid;
     77 	struct lwp *ci_curlwp;
     78 	struct lwp *ci_onproc;
     79 	struct lwp *ci_softlwps[SOFTINT_COUNT];
     80 
     81 	uint64_t ci_lastintr;
     82 
     83 	int ci_mtx_oldspl;
     84 	int ci_mtx_count;
     85 
     86 	int ci_want_resched;
     87 	int ci_cpl;
     88 	volatile u_int ci_softints;
     89 	volatile u_int ci_astpending;
     90 	volatile u_int ci_intr_depth;
     91 
     92 	/* event counters */
     93 	struct evcnt ci_vfp_use;
     94 	struct evcnt ci_vfp_reuse;
     95 	struct evcnt ci_vfp_save;
     96 	struct evcnt ci_vfp_release;
     97 
     98 	/* FDT or similar supplied "cpu capacity" */
     99 	uint32_t ci_capacity_dmips_mhz;
    100 
    101 	/* interrupt controller */
    102 	u_int ci_gic_redist;	/* GICv3 redistributor index */
    103 	uint64_t ci_gic_sgir;	/* GICv3 SGIR target */
    104 
    105 	/* ACPI */
    106 	uint64_t ci_acpiid;	/* ACPI Processor Unique ID */
    107 
    108 	struct aarch64_sysctl_cpu_id ci_id;
    109 
    110 	struct aarch64_cache_info *ci_cacheinfo;
    111 	struct aarch64_cpufuncs ci_cpufuncs;
    112 
    113 } __aligned(COHERENCY_UNIT);
    114 
    115 static inline struct cpu_info *
    116 curcpu(void)
    117 {
    118 	struct cpu_info *ci;
    119 	__asm __volatile ("mrs %0, tpidr_el1" : "=r"(ci));
    120 	return ci;
    121 }
    122 #define curlwp			(curcpu()->ci_curlwp)
    123 
    124 #define setsoftast(ci)		atomic_or_uint(&(ci)->ci_astpending, __BIT(0))
    125 #define cpu_signotify(l)	setsoftast((l)->l_cpu)
    126 
    127 void	cpu_need_proftick(struct lwp *l);
    128 
    129 void	cpu_hatch(struct cpu_info *);
    130 
    131 extern struct cpu_info *cpu_info[];
    132 extern struct cpu_info cpu_info_store[];
    133 
    134 #define CPU_INFO_ITERATOR	cpuid_t
    135 #if defined(MULTIPROCESSOR) || defined(_MODULE)
    136 #define cpu_number()		(curcpu()->ci_index)
    137 #define CPU_IS_PRIMARY(ci)	((ci)->ci_index == 0)
    138 #define CPU_INFO_FOREACH(cii, ci)					\
    139 	cii = 0, ci = cpu_info[0];					\
    140 	cii < (ncpu ? ncpu : 1) && (ci = cpu_info[cii]) != NULL;	\
    141 	cii++
    142 #else /* MULTIPROCESSOR */
    143 #define cpu_number()		0
    144 #define CPU_IS_PRIMARY(ci)	true
    145 #define CPU_INFO_FOREACH(cii, ci)					\
    146 	cii = 0, __USE(cii), ci = curcpu(); ci != NULL; ci = NULL
    147 #endif /* MULTIPROCESSOR */
    148 
    149 
    150 static inline void
    151 cpu_dosoftints(void)
    152 {
    153 #if defined(__HAVE_FAST_SOFTINTS) && !defined(__HAVE_PIC_FAST_SOFTINTS)
    154 	void dosoftints(void);
    155 	struct cpu_info * const ci = curcpu();
    156 
    157 	if (ci->ci_intr_depth == 0 && (ci->ci_softints >> ci->ci_cpl) > 0)
    158 		dosoftints();
    159 #endif
    160 }
    161 
    162 #endif /* _KERNEL || _KMEMUSER */
    163 
    164 #endif
    165 
    166 #endif /* _AARCH64_CPU_H_ */
    167