cpu.h revision 1.26
1 /* $NetBSD: cpu.h,v 1.26 2020/08/12 13:19:35 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2014, 2020 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas of 3am Software Foundry. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _AARCH64_CPU_H_ 33 #define _AARCH64_CPU_H_ 34 35 #include <arm/cpu.h> 36 37 #ifdef __aarch64__ 38 39 #ifdef _KERNEL_OPT 40 #include "opt_multiprocessor.h" 41 #endif 42 43 #include <sys/param.h> 44 45 #if defined(_KERNEL) || defined(_KMEMUSER) 46 #include <sys/evcnt.h> 47 48 #include <aarch64/frame.h> 49 #include <aarch64/armreg.h> 50 51 struct clockframe { 52 struct trapframe cf_tf; 53 }; 54 55 /* (spsr & 15) == SPSR_M_EL0T(64bit,0) or USER(32bit,0) */ 56 #define CLKF_USERMODE(cf) ((((cf)->cf_tf.tf_spsr) & 0x0f) == 0) 57 #define CLKF_PC(cf) ((cf)->cf_tf.tf_pc) 58 #define CLKF_INTR(cf) ((void)(cf), curcpu()->ci_intr_depth > 1) 59 60 /* 61 * LWP_PC: Find out the program counter for the given lwp. 62 */ 63 #define LWP_PC(l) ((l)->l_md.md_utf->tf_pc) 64 65 #include <sys/cpu_data.h> 66 #include <sys/device_if.h> 67 #include <sys/intr.h> 68 69 struct aarch64_cpufuncs { 70 void (*cf_set_ttbr0)(uint64_t); 71 void (*cf_icache_sync_range)(vaddr_t, vsize_t); 72 }; 73 74 struct cpu_info { 75 struct cpu_data ci_data; 76 device_t ci_dev; 77 cpuid_t ci_cpuid; 78 79 /* 80 * the following are in their own cache line, as they are stored to 81 * regularly by remote CPUs; when they were mixed with other fields 82 * we observed frequent cache misses. 83 */ 84 int ci_want_resched __aligned(COHERENCY_UNIT); 85 /* XXX pending IPIs? */ 86 87 /* 88 * this is stored frequently, and is fetched by remote CPUs. 89 */ 90 struct lwp *ci_curlwp __aligned(COHERENCY_UNIT); 91 struct lwp *ci_onproc; 92 93 /* 94 * largely CPU-private. 95 */ 96 struct lwp *ci_softlwps[SOFTINT_COUNT] __aligned(COHERENCY_UNIT); 97 98 uint64_t ci_lastintr; 99 100 int ci_mtx_oldspl; 101 int ci_mtx_count; 102 103 int ci_cpl; 104 volatile u_int ci_softints; 105 volatile u_int ci_intr_depth; 106 107 int ci_kfpu_spl; 108 109 /* event counters */ 110 struct evcnt ci_vfp_use; 111 struct evcnt ci_vfp_reuse; 112 struct evcnt ci_vfp_save; 113 struct evcnt ci_vfp_release; 114 struct evcnt ci_uct_trap; 115 116 /* FDT or similar supplied "cpu capacity" */ 117 uint32_t ci_capacity_dmips_mhz; 118 119 /* interrupt controller */ 120 u_int ci_gic_redist; /* GICv3 redistributor index */ 121 uint64_t ci_gic_sgir; /* GICv3 SGIR target */ 122 123 /* ACPI */ 124 uint64_t ci_acpiid; /* ACPI Processor Unique ID */ 125 126 struct aarch64_sysctl_cpu_id ci_id; 127 128 struct aarch64_cache_info *ci_cacheinfo; 129 struct aarch64_cpufuncs ci_cpufuncs; 130 131 } __aligned(COHERENCY_UNIT); 132 133 #ifdef _KERNEL 134 static inline struct lwp * __attribute__ ((const)) 135 aarch64_curlwp(void) 136 { 137 struct lwp *l; 138 __asm("mrs %0, tpidr_el1" : "=r"(l)); 139 return l; 140 } 141 142 /* forward declaration; defined in sys/lwp.h. */ 143 static __inline struct cpu_info *lwp_getcpu(struct lwp *); 144 145 #define curcpu() (lwp_getcpu(aarch64_curlwp())) 146 #define setsoftast(ci) (cpu_signotify((ci)->ci_onproc)) 147 #undef curlwp 148 #define curlwp (aarch64_curlwp()) 149 150 void cpu_signotify(struct lwp *l); 151 void cpu_need_proftick(struct lwp *l); 152 153 void cpu_hatch(struct cpu_info *); 154 155 extern struct cpu_info *cpu_info[]; 156 extern struct cpu_info cpu_info_store[]; 157 158 #define CPU_INFO_ITERATOR cpuid_t 159 #if defined(MULTIPROCESSOR) || defined(_MODULE) 160 #define cpu_number() (curcpu()->ci_index) 161 #define CPU_IS_PRIMARY(ci) ((ci)->ci_index == 0) 162 #define CPU_INFO_FOREACH(cii, ci) \ 163 cii = 0, ci = cpu_info[0]; \ 164 cii < (ncpu ? ncpu : 1) && (ci = cpu_info[cii]) != NULL; \ 165 cii++ 166 #else /* MULTIPROCESSOR */ 167 #define cpu_number() 0 168 #define CPU_IS_PRIMARY(ci) true 169 #define CPU_INFO_FOREACH(cii, ci) \ 170 cii = 0, __USE(cii), ci = curcpu(); ci != NULL; ci = NULL 171 #endif /* MULTIPROCESSOR */ 172 173 #define LWP0_CPU_INFO (&cpu_info_store[0]) 174 175 static inline void 176 cpu_dosoftints(void) 177 { 178 #if defined(__HAVE_FAST_SOFTINTS) && !defined(__HAVE_PIC_FAST_SOFTINTS) 179 void dosoftints(void); 180 struct cpu_info * const ci = curcpu(); 181 182 if (ci->ci_intr_depth == 0 && (ci->ci_softints >> ci->ci_cpl) > 0) 183 dosoftints(); 184 #endif 185 } 186 187 #endif /* _KERNEL */ 188 189 #endif /* _KERNEL || _KMEMUSER */ 190 191 #endif 192 193 #endif /* _AARCH64_CPU_H_ */ 194
Indexes created Tue Sep 30 11:09:46 GMT 2025