locore.h revision 1.1 1 1.1 matt /* $NetBSD: locore.h,v 1.1 2014/08/10 05:47:38 matt Exp $ */
2 1.1 matt
3 1.1 matt /*-
4 1.1 matt * Copyright (c) 2014 The NetBSD Foundation, Inc.
5 1.1 matt * All rights reserved.
6 1.1 matt *
7 1.1 matt * This code is derived from software contributed to The NetBSD Foundation
8 1.1 matt * by Matt Thomas of 3am Software Foundry.
9 1.1 matt *
10 1.1 matt * Redistribution and use in source and binary forms, with or without
11 1.1 matt * modification, are permitted provided that the following conditions
12 1.1 matt * are met:
13 1.1 matt * 1. Redistributions of source code must retain the above copyright
14 1.1 matt * notice, this list of conditions and the following disclaimer.
15 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 matt * notice, this list of conditions and the following disclaimer in the
17 1.1 matt * documentation and/or other materials provided with the distribution.
18 1.1 matt *
19 1.1 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 matt * POSSIBILITY OF SUCH DAMAGE.
30 1.1 matt */
31 1.1 matt
32 1.1 matt #ifndef _AARCH64_LOCORE_H_
33 1.1 matt #define _AARCH64_LOCORE_H_
34 1.1 matt
35 1.1 matt #ifdef __aarch64__
36 1.1 matt
37 1.1 matt #include <sys/types.h>
38 1.1 matt
39 1.1 matt #include <sys/cpu.h>
40 1.1 matt #include <sys/lwp.h>
41 1.1 matt #include <sys/bus.h>
42 1.1 matt
43 1.1 matt #include <aarch64/armreg.h>
44 1.1 matt #include <aarch64/frame.h>
45 1.1 matt
46 1.1 matt struct mainbus_attach_args {
47 1.1 matt const char *mba_name;
48 1.1 matt bus_space_tag_t mba_memt;
49 1.1 matt bus_dma_tag_t mba_dmat;
50 1.1 matt bus_addr_t mba_addr;
51 1.1 matt bus_size_t mba_size;
52 1.1 matt int mba_intr;
53 1.1 matt int mba_intrbase;
54 1.1 matt int mba_package;
55 1.1 matt };
56 1.1 matt
57 1.1 matt void userret(struct lwp *, struct trapframe *);
58 1.1 matt void lwp_trampoline(void);
59 1.1 matt void cpu_dosoftints(void);
60 1.1 matt void dosoftints(void);
61 1.1 matt void cpu_switchto_softint(struct lwp *, int);
62 1.1 matt void cpu_send_ipi(struct cpu_info *, int);
63 1.1 matt
64 1.1 matt extern paddr_t physical_start;
65 1.1 matt extern paddr_t physical_end;
66 1.1 matt
67 1.1 matt extern const pcu_ops_t pcu_fpu_ops;
68 1.1 matt
69 1.1 matt static inline bool
70 1.1 matt fpu_used_p(lwp_t *l)
71 1.1 matt {
72 1.1 matt KASSERT(l == curlwp);
73 1.1 matt return pcu_valid_p(&pcu_fpu_ops);
74 1.1 matt }
75 1.1 matt
76 1.1 matt static inline void
77 1.1 matt fpu_discard(lwp_t *l, bool usesw)
78 1.1 matt {
79 1.1 matt KASSERT(l == curlwp);
80 1.1 matt pcu_discard(&pcu_fpu_ops, usesw);
81 1.1 matt }
82 1.1 matt
83 1.1 matt static inline void
84 1.1 matt fpu_save(lwp_t *l)
85 1.1 matt {
86 1.1 matt KASSERT(l == curlwp);
87 1.1 matt pcu_save(&pcu_fpu_ops);
88 1.1 matt }
89 1.1 matt
90 1.1 matt static inline void cpsie(register_t psw) __attribute__((__unused__));
91 1.1 matt static inline register_t cpsid(register_t psw) __attribute__((__unused__));
92 1.1 matt
93 1.1 matt static inline void
94 1.1 matt cpsie(register_t psw)
95 1.1 matt {
96 1.1 matt if (!__builtin_constant_p(psw)) {
97 1.1 matt reg_daif_write(psw);
98 1.1 matt } else {
99 1.1 matt reg_daifset_write(psw);
100 1.1 matt }
101 1.1 matt }
102 1.1 matt
103 1.1 matt static inline void
104 1.1 matt enable_interrupts(register_t psw)
105 1.1 matt {
106 1.1 matt reg_daif_write(psw);
107 1.1 matt }
108 1.1 matt
109 1.1 matt static inline register_t
110 1.1 matt cpsid(register_t psw)
111 1.1 matt {
112 1.1 matt register_t oldpsw = reg_daif_read();
113 1.1 matt if (!__builtin_constant_p(psw)) {
114 1.1 matt reg_daif_write(oldpsw & ~psw);
115 1.1 matt } else {
116 1.1 matt reg_daifclr_write(psw);
117 1.1 matt }
118 1.1 matt return oldpsw;
119 1.1 matt }
120 1.1 matt
121 1.1 matt static const paddr_t VTOPHYS_FAILED = (paddr_t) -1L;
122 1.1 matt
123 1.1 matt static inline paddr_t
124 1.1 matt vtophys(vaddr_t va)
125 1.1 matt {
126 1.1 matt const uint64_t daif = reg_daif_read();
127 1.1 matt /*
128 1.1 matt * Use the address translation instruction to do the lookup.
129 1.1 matt */
130 1.1 matt reg_daifset_write(DAIF_I|DAIF_F);
131 1.1 matt __asm __volatile("at\ts1e1r, %0" :: "r"(va));
132 1.1 matt paddr_t pa = reg_par_el1_read();
133 1.1 matt pa = (pa & PAR_F) ? VTOPHYS_FAILED : (pa & PAR_PA);
134 1.1 matt reg_daif_write(daif);
135 1.1 matt return pa;
136 1.1 matt }
137 1.1 matt
138 1.1 matt static inline paddr_t
139 1.1 matt vtophysw(vaddr_t va)
140 1.1 matt {
141 1.1 matt const uint64_t daif = reg_daif_read();
142 1.1 matt /*
143 1.1 matt * Use the address translation instruction to do the lookup.
144 1.1 matt */
145 1.1 matt reg_daifset_write(DAIF_I|DAIF_F);
146 1.1 matt __asm __volatile("at\ts1e1w, %0" :: "r"(va));
147 1.1 matt paddr_t pa = reg_par_el1_read();
148 1.1 matt pa = (pa & PAR_F) ? VTOPHYS_FAILED : (pa & PAR_PA);
149 1.1 matt reg_daif_write(daif);
150 1.1 matt return pa;
151 1.1 matt }
152 1.1 matt
153 1.1 matt #elif defined(__arm__)
154 1.1 matt
155 1.1 matt #include <arm/locore.h>
156 1.1 matt
157 1.1 matt #endif /* __aarch64__/__arm__ */
158 1.1 matt
159 1.1 matt #endif /* _AARCH64_LOCORE_H_ */
160