mcontext.h revision 1.2
1/* $NetBSD: mcontext.h,v 1.2 2018/02/15 15:53:56 kamil Exp $ */ 2 3/*- 4 * Copyright (c) 2014 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas of 3am Software Foundry. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31#ifndef _AARCH64_MCONTEXT_H_ 32#define _AARCH64_MCONTEXT_H_ 33 34#ifdef __aarch64__ 35 36/* 37 * Layout of mcontext_t based on the System V Application Binary Interface, 38 * Edition 4.1, PowerPC Processor ABI Supplement - September 1995, and 39 * extended for the AltiVec Register File. Note that due to the increased 40 * alignment requirements of the latter, the offset of mcontext_t within 41 * an ucontext_t is different from System V. 42 */ 43 44#define _NGREG 35 /* GR0-30, SP, PC, APSR, TPIDR */ 45 46typedef __int64_t __greg_t; 47typedef __greg_t __gregset_t[_NGREG]; 48 49#define _REG_X0 0 50#define _REG_X1 1 51#define _REG_X2 2 52#define _REG_X3 3 53#define _REG_X4 4 54#define _REG_X5 5 55#define _REG_X6 6 56#define _REG_X7 7 57#define _REG_X8 8 58#define _REG_X9 9 59#define _REG_X10 10 60#define _REG_X11 11 61#define _REG_X12 12 62#define _REG_X13 13 63#define _REG_X14 14 64#define _REG_X15 15 65#define _REG_X16 16 66#define _REG_X17 17 67#define _REG_X18 18 68#define _REG_X19 19 69#define _REG_X20 20 70#define _REG_X21 21 71#define _REG_X22 22 72#define _REG_X23 23 73#define _REG_X24 24 74#define _REG_X25 25 75#define _REG_X26 26 76#define _REG_X27 27 77#define _REG_X28 28 78#define _REG_X29 29 79#define _REG_X30 30 80#define _REG_SP 31 81#define _REG_PC 32 82#define _REG_SPSR 33 83#define _REG_TPIDR 34 84 85#define _NFREG 32 /* Number of SIMD registers */ 86 87typedef struct { 88 union __freg { 89 __uint8_t __b8[16]; 90 __uint16_t __h16[8]; 91 __uint32_t __s32[4]; 92 __uint64_t __d64[2]; 93 __uint128_t __q128[1]; 94 } __qregs[_NFREG] __aligned(16); 95 __uint32_t __fpcr; /* FPCR */ 96 __uint32_t __fpsr; /* FPSR */ 97} __fregset_t; 98 99typedef struct { 100 __gregset_t __gregs; /* General Purpose Register set */ 101 __fregset_t __fregs; /* FPU/SIMD Register File */ 102 __greg_t __spare[8]; /* future proof */ 103} mcontext_t; 104 105/* Machine-dependent uc_flags */ 106#define _UC_TLSBASE 0x00080000 /* see <sys/ucontext.h> */ 107 108#define _UC_MACHINE_SP(uc) ((uc)->uc_mcontext.__gregs[_REG_SP]) 109#define _UC_MACHINE_FP(uc) ((uc)->uc_mcontext.__gregs[_REG_X29]) 110#define _UC_MACHINE_PC(uc) ((uc)->uc_mcontext.__gregs[_REG_PC]) 111#define _UC_MACHINE_INTRV(uc) ((uc)->uc_mcontext.__gregs[_REG_X0]) 112 113#define _UC_MACHINE_SET_PC(uc, pc) _UC_MACHINE_PC(uc) = (pc) 114 115#if defined(_RTLD_SOURCE) || defined(_LIBC_SOURCE) || defined(__LIBPTHREAD_SOURCE__) 116#include <sys/tls.h> 117 118static __inline void * 119__lwp_getprivate_fast(void) 120{ 121 void *__tpidr; 122 __asm __volatile("mrs\t%0, tpidr_el0" : "=r"(__tpidr)); 123 return __tpidr; 124} 125 126static __inline void * 127__lwp_gettcb_fast(void) 128{ 129 void *__tpidr; 130 __asm __volatile("mrs\t%0, tpidr_el0" : "=r"(__tpidr)); 131 return __tpidr; 132} 133 134static __inline void 135__lwp_settcb(void *__tcb) 136{ 137 __asm __volatile("msr\ttpidr_el0, %0" :: "r"(__tcb)); 138} 139#endif /* _RTLD_SOURCE || _LIBC_SOURCE || __LIBPTHREAD_SOURCE__ */ 140 141#elif defined(__arm__) 142 143#include <arm/mcontext.h> 144 145#endif /* __aarch64__/__arm__ */ 146 147#endif /* !_AARCH64_MCONTEXT_H_ */ 148