mcontext.h revision 1.3 
1/* $NetBSD: mcontext.h,v 1.3 2018/02/27 07:24:13 skrll Exp $ */
2
3/*-
4 * Copyright (c) 2014 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matt Thomas of 3am Software Foundry.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31#ifndef _AARCH64_MCONTEXT_H_
32#define _AARCH64_MCONTEXT_H_
33
34#ifdef __aarch64__
35
36#define	_NGREG	35		/* GR0-30, SP, PC, APSR, TPIDR */
37
38typedef	__int64_t	__greg_t;
39typedef	__greg_t	__gregset_t[_NGREG];
40
41#define	_REG_X0		0
42#define	_REG_X1		1
43#define	_REG_X2		2
44#define	_REG_X3		3
45#define	_REG_X4		4
46#define	_REG_X5		5
47#define	_REG_X6		6
48#define	_REG_X7		7
49#define	_REG_X8		8
50#define	_REG_X9		9
51#define	_REG_X10	10
52#define	_REG_X11	11
53#define	_REG_X12	12
54#define	_REG_X13	13
55#define	_REG_X14	14
56#define	_REG_X15	15
57#define	_REG_X16	16
58#define	_REG_X17	17
59#define	_REG_X18	18
60#define	_REG_X19	19
61#define	_REG_X20	20
62#define	_REG_X21	21
63#define	_REG_X22	22
64#define	_REG_X23	23
65#define	_REG_X24	24
66#define	_REG_X25	25
67#define	_REG_X26	26
68#define	_REG_X27	27
69#define	_REG_X28	28
70#define	_REG_X29	29
71#define	_REG_X30	30
72#define	_REG_SP		31
73#define	_REG_PC		32
74#define	_REG_SPSR	33
75#define	_REG_TPIDR	34
76
77#define	_NFREG	32			/* Number of SIMD registers */
78
79typedef struct {
80	union __freg {
81		__uint8_t	__b8[16];
82		__uint16_t	__h16[8];
83		__uint32_t	__s32[4];
84		__uint64_t	__d64[2];
85		__uint128_t	__q128[1];
86	} 	__qregs[_NFREG] __aligned(16);
87	__uint32_t	__fpcr;		/* FPCR */
88	__uint32_t	__fpsr;		/* FPSR */
89} __fregset_t;
90
91typedef struct {
92	__gregset_t	__gregs;	/* General Purpose Register set */
93	__fregset_t	__fregs;	/* FPU/SIMD Register File */
94	__greg_t	__spare[8];	/* future proof */
95} mcontext_t;
96
97/* Machine-dependent uc_flags */
98#define	_UC_TLSBASE	0x00080000	/* see <sys/ucontext.h> */
99
100#define _UC_MACHINE_SP(uc)	((uc)->uc_mcontext.__gregs[_REG_SP])
101#define _UC_MACHINE_FP(uc)	((uc)->uc_mcontext.__gregs[_REG_X29])
102#define _UC_MACHINE_PC(uc)	((uc)->uc_mcontext.__gregs[_REG_PC])
103#define _UC_MACHINE_INTRV(uc)	((uc)->uc_mcontext.__gregs[_REG_X0])
104
105#define	_UC_MACHINE_SET_PC(uc, pc)	_UC_MACHINE_PC(uc) = (pc)
106
107#if defined(_RTLD_SOURCE) || defined(_LIBC_SOURCE) || defined(__LIBPTHREAD_SOURCE__)
108#include <sys/tls.h>
109
110static __inline void *
111__lwp_getprivate_fast(void)
112{
113	void *__tpidr;
114	__asm __volatile("mrs\t%0, tpidr_el0" : "=r"(__tpidr));
115	return __tpidr;
116}
117
118static __inline void *
119__lwp_gettcb_fast(void)
120{
121	void *__tpidr;
122	__asm __volatile("mrs\t%0, tpidr_el0" : "=r"(__tpidr));
123	return __tpidr;
124}
125
126static __inline void
127__lwp_settcb(void *__tcb)
128{
129	__asm __volatile("msr\ttpidr_el0, %0" :: "r"(__tcb));
130}
131#endif /* _RTLD_SOURCE || _LIBC_SOURCE || __LIBPTHREAD_SOURCE__ */
132
133#elif defined(__arm__)
134
135#include <arm/mcontext.h>
136
137#endif /* __aarch64__/__arm__ */
138
139#endif /* !_AARCH64_MCONTEXT_H_ */
140