rside.c revision 1.3.2.3
1 1.3.2.3 skrll /* $NetBSD: rside.c,v 1.3.2.3 2004/08/25 06:57:17 skrll Exp $ */ 2 1.3.2.2 skrll 3 1.3.2.2 skrll /* 4 1.3.2.2 skrll * Copyright (c) 2004 Christopher Gilbert 5 1.3.2.2 skrll * All rights reserved. 6 1.3.2.2 skrll * 7 1.3.2.2 skrll * 1. Redistributions of source code must retain the above copyright 8 1.3.2.2 skrll * notice, this list of conditions and the following disclaimer. 9 1.3.2.2 skrll * 2. Redistributions in binary form must reproduce the above copyright 10 1.3.2.2 skrll * notice, this list of conditions and the following disclaimer in the 11 1.3.2.2 skrll * documentation and/or other materials provided with the distribution. 12 1.3.2.2 skrll * 3. The name of the author may be used to endorse or promote products 13 1.3.2.2 skrll * derived from this software without specific prior written permission. 14 1.3.2.2 skrll * 15 1.3.2.2 skrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 16 1.3.2.2 skrll * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 17 1.3.2.2 skrll * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 1.3.2.2 skrll * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 19 1.3.2.2 skrll * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 20 1.3.2.2 skrll * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 21 1.3.2.2 skrll * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 1.3.2.2 skrll * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 1.3.2.2 skrll * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 1.3.2.2 skrll * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 1.3.2.2 skrll * SUCH DAMAGE. 26 1.3.2.2 skrll */ 27 1.3.2.2 skrll /* 28 1.3.2.2 skrll * Copyright (c) 1997-1998 Mark Brinicombe 29 1.3.2.2 skrll * Copyright (c) 1997-1998 Causality Limited 30 1.3.2.2 skrll * 31 1.3.2.2 skrll * Redistribution and use in source and binary forms, with or without 32 1.3.2.2 skrll * modification, are permitted provided that the following conditions 33 1.3.2.2 skrll * are met: 34 1.3.2.2 skrll * 1. Redistributions of source code must retain the above copyright 35 1.3.2.2 skrll * notice, this list of conditions and the following disclaimer. 36 1.3.2.2 skrll * 2. Redistributions in binary form must reproduce the above copyright 37 1.3.2.2 skrll * notice, this list of conditions and the following disclaimer in the 38 1.3.2.2 skrll * documentation and/or other materials provided with the distribution. 39 1.3.2.2 skrll * 3. All advertising materials mentioning features or use of this software 40 1.3.2.2 skrll * must display the following acknowledgement: 41 1.3.2.2 skrll * This product includes software developed by Mark Brinicombe 42 1.3.2.2 skrll * for the NetBSD Project. 43 1.3.2.2 skrll * 4. The name of the author may not be used to endorse or promote products 44 1.3.2.2 skrll * derived from this software without specific prior written permission. 45 1.3.2.2 skrll * 46 1.3.2.2 skrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 47 1.3.2.2 skrll * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 48 1.3.2.2 skrll * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 49 1.3.2.2 skrll * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 50 1.3.2.2 skrll * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 51 1.3.2.2 skrll * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 52 1.3.2.2 skrll * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 53 1.3.2.2 skrll * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 54 1.3.2.2 skrll * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 55 1.3.2.2 skrll * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 56 1.3.2.2 skrll */ 57 1.3.2.2 skrll 58 1.3.2.2 skrll #include <sys/cdefs.h> 59 1.3.2.3 skrll __KERNEL_RCSID(0, "$NetBSD: rside.c,v 1.3.2.3 2004/08/25 06:57:17 skrll Exp $"); 60 1.3.2.2 skrll 61 1.3.2.2 skrll #include <sys/param.h> 62 1.3.2.2 skrll #include <sys/systm.h> 63 1.3.2.2 skrll #include <sys/conf.h> 64 1.3.2.2 skrll #include <sys/device.h> 65 1.3.2.2 skrll #include <sys/malloc.h> 66 1.3.2.2 skrll 67 1.3.2.2 skrll #include <machine/intr.h> 68 1.3.2.2 skrll #include <machine/io.h> 69 1.3.2.2 skrll #include <machine/bus.h> 70 1.3.2.2 skrll #include <acorn32/eb7500atx/rsidereg.h> 71 1.3.2.2 skrll #include <machine/irqhandler.h> 72 1.3.2.2 skrll 73 1.3.2.2 skrll #include <dev/ata/atavar.h> 74 1.3.2.2 skrll #include <dev/ic/wdcvar.h> 75 1.3.2.2 skrll #include <acorn32/eb7500atx/rsbus.h> 76 1.3.2.2 skrll 77 1.3.2.2 skrll /* 78 1.3.2.2 skrll * RiscStation IDE device. 79 1.3.2.2 skrll * 80 1.3.2.2 skrll * This probes and attaches the top level IDE device to the rsbus. 81 1.3.2.2 skrll * It then configures any children of the IDE device. 82 1.3.2.2 skrll * The attach args specify whether it is configuring the primary or 83 1.3.2.2 skrll * secondary channel. 84 1.3.2.2 skrll * The children are expected to be wdc devices using rside attachments. 85 1.3.2.2 skrll * 86 1.3.2.2 skrll * The hardware notes are: 87 1.3.2.2 skrll * Two ide ports are fitted, each with registers spaced 0x40 bytes apart 88 1.3.2.2 skrll * with the extra control register at offset 0x380 from the base of the 89 1.3.2.2 skrll * port. 90 1.3.2.2 skrll * 91 1.3.2.2 skrll * Primary: 92 1.3.2.2 skrll * Registers at 0x302b800 (nPCCS1 + 0x0) 93 1.3.2.2 skrll * IRQ connected to nEvent1 (IRQ register D) 94 1.3.2.2 skrll * 95 1.3.2.2 skrll * Secondary: 96 1.3.2.2 skrll * Registers at 0x302bc00 (nPCCS1 + 0x400) 97 1.3.2.2 skrll * IRQ connected to nEvent2 (IRQ register D) 98 1.3.2.2 skrll * 99 1.3.2.2 skrll * PIO timings can be changed by modifying the access speed register in the 100 1.3.2.2 skrll * IOMD, as there is nothing else in the nPCCS1 space. 101 1.3.2.2 skrll * 102 1.3.2.2 skrll * The Reset line is asserted by unsetting bit 4 in IO register 103 1.3.2.2 skrll * IOMD + 0x121CC. 104 1.3.2.2 skrll */ 105 1.3.2.2 skrll 106 1.3.2.2 skrll /* 107 1.3.2.2 skrll * RiscStation IDE card softc structure. 108 1.3.2.2 skrll * 109 1.3.2.2 skrll * Contains the device node, and global information required by the driver 110 1.3.2.2 skrll */ 111 1.3.2.2 skrll 112 1.3.2.2 skrll struct rside_softc { 113 1.3.2.2 skrll struct wdc_softc sc_wdcdev; /* common wdc definitions */ 114 1.3.2.3 skrll struct ata_channel *sc_chanarray[2]; /* channels definition */ 115 1.3.2.2 skrll struct bus_space sc_tag; /* custom tag */ 116 1.3.2.2 skrll struct rside_channel { 117 1.3.2.3 skrll struct ata_channel rc_channel; /* generic part */ 118 1.3.2.3 skrll struct ata_queue rc_chqueue; /* channel queue */ 119 1.3.2.3 skrll irqhandler_t *rc_ih; /* irq handler */ 120 1.3.2.2 skrll } rside_channels[2]; 121 1.3.2.3 skrll struct wdc_regs sc_wdc_regs[2]; 122 1.3.2.2 skrll }; 123 1.3.2.2 skrll 124 1.3.2.2 skrll static int rside_probe (struct device *, struct cfdata *, void *); 125 1.3.2.2 skrll static void rside_attach (struct device *, struct device *, void *); 126 1.3.2.2 skrll 127 1.3.2.2 skrll CFATTACH_DECL(rside, sizeof(struct rside_softc), 128 1.3.2.2 skrll rside_probe, rside_attach, NULL, NULL); 129 1.3.2.2 skrll 130 1.3.2.2 skrll /* 131 1.3.2.2 skrll * Create an array of address structures. These define the addresses and 132 1.3.2.2 skrll * masks needed for the different channels. 133 1.3.2.2 skrll * 134 1.3.2.2 skrll * index = channel 135 1.3.2.2 skrll */ 136 1.3.2.2 skrll 137 1.3.2.2 skrll struct { 138 1.3.2.2 skrll u_int drive_registers; 139 1.3.2.2 skrll u_int aux_register; 140 1.3.2.2 skrll } rside_info[] = { 141 1.3.2.2 skrll { PRIMARY_DRIVE_REGISTERS_POFFSET, PRIMARY_AUX_REGISTER_POFFSET }, 142 1.3.2.2 skrll { SECONDARY_DRIVE_REGISTERS_POFFSET, SECONDARY_AUX_REGISTER_POFFSET } 143 1.3.2.2 skrll }; 144 1.3.2.2 skrll 145 1.3.2.2 skrll /* 146 1.3.2.2 skrll * Card probe function 147 1.3.2.2 skrll */ 148 1.3.2.2 skrll 149 1.3.2.2 skrll static int 150 1.3.2.2 skrll rside_probe(struct device *parent, struct cfdata *cf, void *aux) 151 1.3.2.2 skrll { 152 1.3.2.2 skrll /* if we're including this, then for now assume it exists */ 153 1.3.2.2 skrll return 1; 154 1.3.2.2 skrll } 155 1.3.2.2 skrll 156 1.3.2.2 skrll /* 157 1.3.2.2 skrll * Card attach function 158 1.3.2.2 skrll * 159 1.3.2.2 skrll */ 160 1.3.2.2 skrll 161 1.3.2.2 skrll static void 162 1.3.2.2 skrll rside_attach(struct device *parent, struct device *self, void *aux) 163 1.3.2.2 skrll { 164 1.3.2.2 skrll struct rside_softc *sc = (void *)self; 165 1.3.2.2 skrll struct rsbus_attach_args *rs = aux; 166 1.3.2.2 skrll int channel, i; 167 1.3.2.2 skrll struct rside_channel *scp; 168 1.3.2.3 skrll struct ata_channel *cp; 169 1.3.2.3 skrll struct wdc_regs *wdr; 170 1.3.2.2 skrll 171 1.3.2.2 skrll printf("\n"); 172 1.3.2.2 skrll 173 1.3.2.2 skrll /* 174 1.3.2.2 skrll * we need our own bus tag as the register spacing 175 1.3.2.2 skrll * is not the default. 176 1.3.2.2 skrll * 177 1.3.2.2 skrll * For the rsbus the bus tag cookie is the shift 178 1.3.2.2 skrll * to apply to registers 179 1.3.2.2 skrll * So duplicate the bus space tag and change the 180 1.3.2.2 skrll * cookie. 181 1.3.2.2 skrll */ 182 1.3.2.2 skrll 183 1.3.2.3 skrll sc->sc_wdcdev.regs = sc->sc_wdc_regs; 184 1.3.2.2 skrll sc->sc_tag = *rs->sa_iot; 185 1.3.2.2 skrll sc->sc_tag.bs_cookie = (void *) DRIVE_REGISTER_SPACING_SHIFT; 186 1.3.2.2 skrll 187 1.3.2.2 skrll /* Fill in wdc and channel infos */ 188 1.3.2.3 skrll sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16; 189 1.3.2.3 skrll sc->sc_wdcdev.sc_atac.atac_pio_cap = 0; 190 1.3.2.3 skrll sc->sc_wdcdev.sc_atac.atac_dma_cap = 0; 191 1.3.2.3 skrll sc->sc_wdcdev.sc_atac.atac_udma_cap = 0; 192 1.3.2.3 skrll sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanarray; 193 1.3.2.3 skrll sc->sc_wdcdev.sc_atac.atac_nchannels = 2; 194 1.3.2.2 skrll for (channel = 0 ; channel < 2; channel++) { 195 1.3.2.2 skrll scp = &sc->rside_channels[channel]; 196 1.3.2.3 skrll sc->sc_chanarray[channel] = &scp->rc_channel; 197 1.3.2.3 skrll cp = &scp->rc_channel; 198 1.3.2.3 skrll wdr = &sc->sc_wdc_regs[channel]; 199 1.3.2.2 skrll 200 1.3.2.2 skrll cp->ch_channel = channel; 201 1.3.2.3 skrll cp->ch_atac = &sc->sc_wdcdev.sc_atac; 202 1.3.2.3 skrll cp->ch_queue = &scp->rc_chqueue; 203 1.3.2.3 skrll wdr->cmd_iot = wdr->ctl_iot = &sc->sc_tag; 204 1.3.2.3 skrll if (bus_space_map(wdr->cmd_iot, 205 1.3.2.2 skrll rside_info[channel].drive_registers, 206 1.3.2.3 skrll DRIVE_REGISTERS_SPACE, 0, &wdr->cmd_baseioh)) 207 1.3.2.2 skrll panic("couldn't map drive registers channel = %d," 208 1.3.2.2 skrll "registers@0x08%x\n", 209 1.3.2.3 skrll channel, 210 1.3.2.3 skrll rside_info[channel].drive_registers); 211 1.3.2.2 skrll 212 1.3.2.2 skrll for (i = 0; i < WDC_NREG; i++) { 213 1.3.2.3 skrll if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh, 214 1.3.2.2 skrll i * (DRIVE_REGISTER_BYTE_SPACING >> 2), 4, 215 1.3.2.3 skrll &wdr->cmd_iohs[i]) != 0) { 216 1.3.2.3 skrll bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh, 217 1.3.2.2 skrll DRIVE_REGISTERS_SPACE); 218 1.3.2.2 skrll continue; 219 1.3.2.2 skrll } 220 1.3.2.2 skrll } 221 1.3.2.2 skrll wdc_init_shadow_regs(cp); 222 1.3.2.2 skrll 223 1.3.2.3 skrll if (bus_space_map(wdr->ctl_iot, 224 1.3.2.3 skrll rside_info[channel].aux_register, 0x4, 0, &wdr->ctl_ioh)) 225 1.3.2.2 skrll { 226 1.3.2.3 skrll bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh, 227 1.3.2.2 skrll DRIVE_REGISTERS_SPACE); 228 1.3.2.2 skrll continue; 229 1.3.2.2 skrll } 230 1.3.2.2 skrll 231 1.3.2.2 skrll /* attach it to the interrupt */ 232 1.3.2.3 skrll if ((scp->rc_ih = intr_claim((channel == 0 ? IRQ_NEVENT1 : IRQ_NEVENT2), 233 1.3.2.2 skrll IPL_BIO, "rside", wdcintr, cp)) == NULL) 234 1.3.2.2 skrll panic("%s: Cannot claim interrupt %d\n", 235 1.3.2.2 skrll self->dv_xname, (channel == 0 ? IRQ_NEVENT1 : IRQ_NEVENT2)); 236 1.3.2.2 skrll 237 1.3.2.2 skrll wdcattach(cp); 238 1.3.2.2 skrll } 239 1.3.2.2 skrll } 240
Indexes created Sat Oct 25 16:10:12 GMT 2025