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rside.c revision 1.4
      1  1.4  thorpej /*	$NetBSD: rside.c,v 1.4 2004/08/14 15:08:04 thorpej Exp $	*/
      2  1.1    chris 
      3  1.1    chris /*
      4  1.2    chris  * Copyright (c) 2004 Christopher Gilbert
      5  1.2    chris  * All rights reserved.
      6  1.2    chris  *
      7  1.2    chris  * 1. Redistributions of source code must retain the above copyright
      8  1.2    chris  *    notice, this list of conditions and the following disclaimer.
      9  1.2    chris  * 2. Redistributions in binary form must reproduce the above copyright
     10  1.2    chris  *    notice, this list of conditions and the following disclaimer in the
     11  1.2    chris  *    documentation and/or other materials provided with the distribution.
     12  1.2    chris  * 3. The name of the author may be used to endorse or promote products
     13  1.2    chris  *    derived from this software without specific prior written permission.
     14  1.2    chris  *
     15  1.2    chris  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
     16  1.2    chris  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     17  1.2    chris  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     18  1.2    chris  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     19  1.2    chris  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     20  1.2    chris  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     21  1.2    chris  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     22  1.2    chris  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     23  1.2    chris  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     24  1.2    chris  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     25  1.2    chris  * SUCH DAMAGE.
     26  1.2    chris  */
     27  1.2    chris /*
     28  1.1    chris  * Copyright (c) 1997-1998 Mark Brinicombe
     29  1.1    chris  * Copyright (c) 1997-1998 Causality Limited
     30  1.1    chris  *
     31  1.1    chris  * Redistribution and use in source and binary forms, with or without
     32  1.1    chris  * modification, are permitted provided that the following conditions
     33  1.1    chris  * are met:
     34  1.1    chris  * 1. Redistributions of source code must retain the above copyright
     35  1.1    chris  *    notice, this list of conditions and the following disclaimer.
     36  1.1    chris  * 2. Redistributions in binary form must reproduce the above copyright
     37  1.1    chris  *    notice, this list of conditions and the following disclaimer in the
     38  1.1    chris  *    documentation and/or other materials provided with the distribution.
     39  1.1    chris  * 3. All advertising materials mentioning features or use of this software
     40  1.1    chris  *    must display the following acknowledgement:
     41  1.1    chris  *	This product includes software developed by Mark Brinicombe
     42  1.1    chris  *	for the NetBSD Project.
     43  1.1    chris  * 4. The name of the author may not be used to endorse or promote products
     44  1.1    chris  *    derived from this software without specific prior written permission.
     45  1.1    chris  *
     46  1.1    chris  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     47  1.1    chris  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     48  1.1    chris  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     49  1.1    chris  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     50  1.1    chris  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     51  1.1    chris  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     52  1.1    chris  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     53  1.1    chris  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     54  1.1    chris  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     55  1.1    chris  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     56  1.1    chris  */
     57  1.1    chris 
     58  1.2    chris #include <sys/cdefs.h>
     59  1.4  thorpej __KERNEL_RCSID(0, "$NetBSD: rside.c,v 1.4 2004/08/14 15:08:04 thorpej Exp $");
     60  1.2    chris 
     61  1.1    chris #include <sys/param.h>
     62  1.1    chris #include <sys/systm.h>
     63  1.1    chris #include <sys/conf.h>
     64  1.1    chris #include <sys/device.h>
     65  1.1    chris #include <sys/malloc.h>
     66  1.1    chris 
     67  1.1    chris #include <machine/intr.h>
     68  1.1    chris #include <machine/io.h>
     69  1.1    chris #include <machine/bus.h>
     70  1.1    chris #include <acorn32/eb7500atx/rsidereg.h>
     71  1.1    chris #include <machine/irqhandler.h>
     72  1.1    chris 
     73  1.1    chris #include <dev/ata/atavar.h>
     74  1.1    chris #include <dev/ic/wdcvar.h>
     75  1.1    chris #include <acorn32/eb7500atx/rsbus.h>
     76  1.1    chris 
     77  1.1    chris /*
     78  1.1    chris  * RiscStation IDE device.
     79  1.1    chris  *
     80  1.1    chris  * This probes and attaches the top level IDE device to the rsbus.
     81  1.1    chris  * It then configures any children of the IDE device.
     82  1.1    chris  * The attach args specify whether it is configuring the primary or
     83  1.1    chris  * secondary channel.
     84  1.1    chris  * The children are expected to be wdc devices using rside attachments.
     85  1.1    chris  *
     86  1.1    chris  * The hardware notes are:
     87  1.1    chris  * Two ide ports are fitted, each with registers spaced 0x40 bytes apart
     88  1.1    chris  * with the extra control register at offset 0x380 from the base of the
     89  1.1    chris  * port.
     90  1.1    chris  *
     91  1.1    chris  * Primary:
     92  1.1    chris  * 	Registers at 0x302b800 (nPCCS1 + 0x0)
     93  1.1    chris  * 	IRQ connected to nEvent1 (IRQ register D)
     94  1.1    chris  *
     95  1.1    chris  * Secondary:
     96  1.1    chris  * 	Registers at 0x302bc00 (nPCCS1 + 0x400)
     97  1.1    chris  * 	IRQ connected to nEvent2 (IRQ register D)
     98  1.1    chris  *
     99  1.1    chris  * PIO timings can be changed by modifying the access speed register in the
    100  1.1    chris  * IOMD, as there is nothing else in the nPCCS1 space.
    101  1.1    chris  *
    102  1.1    chris  * The Reset line is asserted by unsetting bit 4 in IO register
    103  1.1    chris  * IOMD + 0x121CC.
    104  1.1    chris  */
    105  1.1    chris 
    106  1.1    chris /*
    107  1.1    chris  * RiscStation IDE card softc structure.
    108  1.1    chris  *
    109  1.2    chris  * Contains the device node, and global information required by the driver
    110  1.1    chris  */
    111  1.1    chris 
    112  1.1    chris struct rside_softc {
    113  1.1    chris 	struct wdc_softc	sc_wdcdev;	/* common wdc definitions */
    114  1.4  thorpej 	struct ata_channel	*sc_chanarray[2]; /* channels definition */
    115  1.2    chris 	struct bus_space        sc_tag;			/* custom tag */
    116  1.1    chris 	struct rside_channel {
    117  1.4  thorpej 		struct ata_channel rc_channel;		/* generic part */
    118  1.4  thorpej 		struct ata_queue rc_chqueue;		/* channel queue */
    119  1.4  thorpej 		irqhandler_t *rc_ih;			/* irq handler */
    120  1.1    chris 	} rside_channels[2];
    121  1.4  thorpej 	struct wdc_regs sc_wdc_regs[2];
    122  1.1    chris };
    123  1.1    chris 
    124  1.2    chris static int	rside_probe	(struct device *, struct cfdata *, void *);
    125  1.2    chris static void	rside_attach	(struct device *, struct device *, void *);
    126  1.1    chris 
    127  1.1    chris CFATTACH_DECL(rside, sizeof(struct rside_softc),
    128  1.1    chris 		rside_probe, rside_attach, NULL, NULL);
    129  1.1    chris 
    130  1.1    chris /*
    131  1.1    chris  * Create an array of address structures. These define the addresses and
    132  1.1    chris  * masks needed for the different channels.
    133  1.1    chris  *
    134  1.1    chris  * index = channel
    135  1.1    chris  */
    136  1.1    chris 
    137  1.1    chris struct {
    138  1.1    chris 	u_int drive_registers;
    139  1.1    chris 	u_int aux_register;
    140  1.1    chris } rside_info[] = {
    141  1.2    chris 	{ PRIMARY_DRIVE_REGISTERS_POFFSET, PRIMARY_AUX_REGISTER_POFFSET },
    142  1.2    chris 	{ SECONDARY_DRIVE_REGISTERS_POFFSET, SECONDARY_AUX_REGISTER_POFFSET }
    143  1.1    chris };
    144  1.1    chris 
    145  1.1    chris /*
    146  1.1    chris  * Card probe function
    147  1.1    chris  */
    148  1.1    chris 
    149  1.2    chris static int
    150  1.2    chris rside_probe(struct device *parent, struct cfdata *cf, void *aux)
    151  1.1    chris {
    152  1.1    chris 	/* if we're including this, then for now assume it exists */
    153  1.1    chris 	return 1;
    154  1.1    chris }
    155  1.1    chris 
    156  1.1    chris /*
    157  1.1    chris  * Card attach function
    158  1.1    chris  *
    159  1.1    chris  */
    160  1.1    chris 
    161  1.2    chris static void
    162  1.2    chris rside_attach(struct device *parent, struct device *self, void *aux)
    163  1.1    chris {
    164  1.1    chris 	struct rside_softc *sc = (void *)self;
    165  1.2    chris 	struct rsbus_attach_args *rs = aux;
    166  1.1    chris 	int channel, i;
    167  1.1    chris 	struct rside_channel *scp;
    168  1.4  thorpej 	struct ata_channel *cp;
    169  1.4  thorpej 	struct wdc_regs *wdr;
    170  1.1    chris 
    171  1.1    chris 	printf("\n");
    172  1.1    chris 
    173  1.1    chris 	/*
    174  1.1    chris 	 * we need our own bus tag as the register spacing
    175  1.1    chris 	 * is not the default.
    176  1.1    chris 	 *
    177  1.1    chris 	 * For the rsbus the bus tag cookie is the shift
    178  1.1    chris 	 * to apply to registers
    179  1.1    chris 	 * So duplicate the bus space tag and change the
    180  1.1    chris 	 * cookie.
    181  1.1    chris 	 */
    182  1.1    chris 
    183  1.4  thorpej 	sc->sc_wdcdev.regs = sc->sc_wdc_regs;
    184  1.2    chris 	sc->sc_tag = *rs->sa_iot;
    185  1.2    chris 	sc->sc_tag.bs_cookie = (void *) DRIVE_REGISTER_SPACING_SHIFT;
    186  1.1    chris 
    187  1.1    chris 	/* Fill in wdc and channel infos */
    188  1.1    chris 	sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16;
    189  1.1    chris 	sc->sc_wdcdev.PIO_cap = 0;
    190  1.1    chris 	sc->sc_wdcdev.DMA_cap = 0;
    191  1.1    chris 	sc->sc_wdcdev.UDMA_cap = 0;
    192  1.4  thorpej 	sc->sc_wdcdev.channels = sc->sc_chanarray;
    193  1.1    chris 	sc->sc_wdcdev.nchannels = 2;
    194  1.1    chris 	for (channel = 0 ; channel < 2; channel++) {
    195  1.1    chris 		scp = &sc->rside_channels[channel];
    196  1.4  thorpej 		sc->sc_chanarray[channel] = &scp->rc_channel;
    197  1.4  thorpej 		cp = &scp->rc_channel;
    198  1.4  thorpej 		wdr = &sc->sc_wdc_regs[channel];
    199  1.1    chris 
    200  1.2    chris 		cp->ch_channel = channel;
    201  1.2    chris 		cp->ch_wdc = &sc->sc_wdcdev;
    202  1.4  thorpej 		cp->ch_queue = &scp->rc_chqueue;
    203  1.4  thorpej 		wdr->cmd_iot = wdr->ctl_iot = &sc->sc_tag;
    204  1.4  thorpej 		if (bus_space_map(wdr->cmd_iot,
    205  1.1    chris 		    rside_info[channel].drive_registers,
    206  1.4  thorpej 		    DRIVE_REGISTERS_SPACE, 0, &wdr->cmd_baseioh))
    207  1.1    chris 			panic("couldn't map drive registers channel = %d,"
    208  1.1    chris 					"registers@0x08%x\n",
    209  1.4  thorpej 					channel,
    210  1.4  thorpej 					rside_info[channel].drive_registers);
    211  1.1    chris 
    212  1.1    chris 		for (i = 0; i < WDC_NREG; i++) {
    213  1.4  thorpej 			if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh,
    214  1.1    chris 				i * (DRIVE_REGISTER_BYTE_SPACING >> 2), 4,
    215  1.4  thorpej 				&wdr->cmd_iohs[i]) != 0) {
    216  1.4  thorpej 				bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh,
    217  1.1    chris 				    DRIVE_REGISTERS_SPACE);
    218  1.1    chris 				continue;
    219  1.1    chris 			}
    220  1.1    chris 		}
    221  1.3  thorpej 		wdc_init_shadow_regs(cp);
    222  1.1    chris 
    223  1.4  thorpej 		if (bus_space_map(wdr->ctl_iot,
    224  1.4  thorpej 		    rside_info[channel].aux_register, 0x4, 0, &wdr->ctl_ioh))
    225  1.1    chris 		{
    226  1.4  thorpej 			bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh,
    227  1.1    chris 			    DRIVE_REGISTERS_SPACE);
    228  1.1    chris 			continue;
    229  1.1    chris 		}
    230  1.1    chris 
    231  1.1    chris 		/* attach it to the interrupt */
    232  1.4  thorpej 		if ((scp->rc_ih = intr_claim((channel == 0 ? IRQ_NEVENT1 : IRQ_NEVENT2),
    233  1.2    chris 						IPL_BIO, "rside", wdcintr, cp)) == NULL)
    234  1.1    chris 			panic("%s: Cannot claim interrupt %d\n",
    235  1.1    chris 			    self->dv_xname, (channel == 0 ? IRQ_NEVENT1 : IRQ_NEVENT2));
    236  1.1    chris 
    237  1.1    chris 		wdcattach(cp);
    238  1.1    chris 	}
    239  1.1    chris }
    240