1 1.9 dsl /* $NetBSD: irqhandler.h,v 1.9 2009/03/14 14:45:51 dsl Exp $ */ 2 1.1 reinoud 3 1.1 reinoud /* 4 1.1 reinoud * Copyright (c) 1994-1996 Mark Brinicombe. 5 1.1 reinoud * Copyright (c) 1994 Brini. 6 1.1 reinoud * All rights reserved. 7 1.1 reinoud * 8 1.1 reinoud * This code is derived from software written for Brini by Mark Brinicombe 9 1.1 reinoud * 10 1.1 reinoud * Redistribution and use in source and binary forms, with or without 11 1.1 reinoud * modification, are permitted provided that the following conditions 12 1.1 reinoud * are met: 13 1.1 reinoud * 1. Redistributions of source code must retain the above copyright 14 1.1 reinoud * notice, this list of conditions and the following disclaimer. 15 1.1 reinoud * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 reinoud * notice, this list of conditions and the following disclaimer in the 17 1.1 reinoud * documentation and/or other materials provided with the distribution. 18 1.1 reinoud * 3. All advertising materials mentioning features or use of this software 19 1.1 reinoud * must display the following acknowledgement: 20 1.1 reinoud * This product includes software developed by Mark Brinicombe 21 1.1 reinoud * for the NetBSD Project. 22 1.1 reinoud * 4. The name of the company nor the name of the author may be used to 23 1.1 reinoud * endorse or promote products derived from this software without specific 24 1.1 reinoud * prior written permission. 25 1.1 reinoud * 26 1.1 reinoud * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 27 1.1 reinoud * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 28 1.1 reinoud * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 29 1.1 reinoud * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 30 1.1 reinoud * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 31 1.1 reinoud * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 32 1.1 reinoud * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 1.1 reinoud * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 1.1 reinoud * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 1.1 reinoud * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 1.1 reinoud * SUCH DAMAGE. 37 1.1 reinoud * 38 1.1 reinoud * IRQ related stuff (defines + structures) 39 1.1 reinoud * 40 1.1 reinoud * Created : 30/09/94 41 1.1 reinoud */ 42 1.1 reinoud 43 1.1 reinoud #ifndef _ARM32_IRQHANDLER_H_ 44 1.1 reinoud #define _ARM32_IRQHANDLER_H_ 45 1.1 reinoud 46 1.1 reinoud #if defined(_KERNEL_OPT) 47 1.1 reinoud #include "iomd.h" 48 1.1 reinoud #endif 49 1.1 reinoud 50 1.1 reinoud #ifndef _LOCORE 51 1.1 reinoud #include <sys/types.h> 52 1.1 reinoud #endif /* _LOCORE */ 53 1.1 reinoud 54 1.1 reinoud /* Define the IRQ bits */ 55 1.1 reinoud 56 1.1 reinoud /* 57 1.1 reinoud * XXX this is really getting rather horrible. 58 1.1 reinoud * Shortly to be replaced with system specific interrupt tables and handling 59 1.1 reinoud */ 60 1.1 reinoud 61 1.1 reinoud #if NIOMD > 0 62 1.1 reinoud 63 1.1 reinoud /* Only for ARM7500 : */ 64 1.1 reinoud 65 1.1 reinoud /*#define IRQ_PRINTER 0x00*/ 66 1.6 chris #define IRQ_INT2 0x00 67 1.1 reinoud /*#define IRQ_RESERVED0 0x01*/ 68 1.1 reinoud #define IRQ_BUTTON 0x02 69 1.6 chris #define IRQ_NINT1 0x02 70 1.1 reinoud #define IRQ_FLYBACK 0x03 71 1.6 chris #define IRQ_NPOR 0x04 72 1.1 reinoud #define IRQ_TIMER0 0x05 73 1.1 reinoud #define IRQ_TIMER1 0x06 74 1.6 chris #define IRQ_SOFTINT 0x07 75 1.1 reinoud 76 1.1 reinoud #define IRQ_DREQ3 0x08 77 1.6 chris #define IRQ_NINT8 0x08 78 1.1 reinoud /*#define IRQ_HD1 0x09*/ 79 1.6 chris #define IRQ_INT7 0x09 80 1.1 reinoud /*#define IRQ_HD IRQ_HD1*/ 81 1.1 reinoud #define IRQ_DREQ2 0x0A 82 1.6 chris #define IRQ_NINT6 0x0A 83 1.6 chris #define IRQ_INT5 0x0B 84 1.1 reinoud /*#define IRQ_FLOPPY 0x0C*/ 85 1.6 chris #define IRQ_NINT4 0x0C 86 1.1 reinoud /*#define IRQ_SERIAL 0x0D*/ 87 1.6 chris #define IRQ_NINT3 0x0D 88 1.1 reinoud #define IRQ_KBDTX 0x0E 89 1.1 reinoud #define IRQ_KBDRX 0x0F 90 1.1 reinoud 91 1.1 reinoud #define IRQ_IRQ3 0x10 92 1.1 reinoud #define IRQ_IRQ4 0x11 93 1.1 reinoud #define IRQ_IRQ5 0x12 94 1.1 reinoud #define IRQ_IRQ6 0x13 95 1.1 reinoud #define IRQ_IRQ7 0x14 96 1.1 reinoud #define IRQ_IRQ9 0x15 97 1.1 reinoud #define IRQ_IRQ10 0x16 98 1.1 reinoud #define IRQ_IRQ11 0x17 99 1.1 reinoud 100 1.6 chris #define IRQ_IOP0 0x10 101 1.6 chris #define IRQ_IOP1 0x11 102 1.6 chris #define IRQ_IOP2 0x12 103 1.6 chris #define IRQ_IOP3 0x13 104 1.6 chris #define IRQ_IOP4 0x14 105 1.6 chris #define IRQ_IOP5 0x15 106 1.6 chris #define IRQ_IOP6 0x16 107 1.6 chris #define IRQ_IOP7 0x17 108 1.6 chris 109 1.1 reinoud #define IRQ_MSDRX 0x18 110 1.1 reinoud #define IRQ_MSDTX 0x19 111 1.1 reinoud #define IRQ_ATOD 0x1A 112 1.5 chris #define IRQ_NEVENT1 0x1B 113 1.1 reinoud #define IRQ_CLOCK 0x1B 114 1.5 chris #define IRQ_NEVENT2 0x1C 115 1.1 reinoud #define IRQ_PANIC 0x1C 116 1.1 reinoud /*#define IRQ_RESERVED2 0x1D*/ 117 1.1 reinoud /*#define IRQ_RESERVED3 0x1E*/ 118 1.1 reinoud 119 1.1 reinoud 120 1.1 reinoud /* 121 1.1 reinoud * Note that Sound DMA IRQ is on the 31st vector. 122 1.1 reinoud * It's not part of the IRQD. 123 1.1 reinoud */ 124 1.1 reinoud #define IRQ_SDMA 0x1F 125 1.1 reinoud 126 1.1 reinoud /* Several interrupts are different between the A7000 and RC7500 */ 127 1.1 reinoud #ifdef RC7500 128 1.1 reinoud 129 1.1 reinoud #define IRQ_FIQDOWN 0x07 130 1.1 reinoud #define IRQ_ETHERNET 0x0B 131 1.1 reinoud #define IRQ_HD2 IRQ_IRQ11 132 1.1 reinoud 133 1.1 reinoud #else /* RC7500 */ 134 1.1 reinoud 135 1.1 reinoud /*#define IRQ_RESERVED1 0x07 */ 136 1.1 reinoud #define IRQ_EXTENDED 0x0B 137 1.1 reinoud #define IRQ_PODULE 0x0D 138 1.1 reinoud 139 1.1 reinoud #endif /* RC7500 */ 140 1.1 reinoud 141 1.1 reinoud 142 1.1 reinoud 143 1.1 reinoud 144 1.1 reinoud /* for non ARM7500 machines : */ 145 1.1 reinoud 146 1.1 reinoud /*#define IRQ_PRINTER 0x00*/ 147 1.1 reinoud /*#define IRQ_RESERVED0 0x01*/ 148 1.1 reinoud /*#define IRQ_FLOPPYIDX 0x02*/ 149 1.1 reinoud #define IRQ_FLYBACK 0x03 150 1.1 reinoud #define IRQ_POR 0x04 151 1.1 reinoud #define IRQ_TIMER0 0x05 152 1.1 reinoud #define IRQ_TIMER1 0x06 153 1.1 reinoud /*#define IRQ_RESERVED1 0x07*/ 154 1.1 reinoud 155 1.1 reinoud /*#define IRQ_RESERVED2 0x08*/ 156 1.1 reinoud /*#define IRQ_HD 0x09*/ 157 1.1 reinoud /*#define IRQ_SERIAL 0x0A*/ 158 1.1 reinoud #define IRQ_EXTENDED 0x0B 159 1.1 reinoud /*#define IRQ_FLOPPY 0x0C*/ 160 1.1 reinoud #define IRQ_PODULE 0x0D 161 1.1 reinoud #define IRQ_KBDTX 0x0E 162 1.1 reinoud #define IRQ_KBDRX 0x0F 163 1.1 reinoud 164 1.1 reinoud #define IRQ_DMACH0 0x10 165 1.1 reinoud #define IRQ_DMACH1 0x11 166 1.1 reinoud #define IRQ_DMACH2 0x12 167 1.1 reinoud #define IRQ_DMACH3 0x13 168 1.1 reinoud #define IRQ_DMASCH0 0x14 169 1.1 reinoud #define IRQ_DMASCH1 0x15 170 1.1 reinoud /*#define IRQ_RESERVED3 0x16*/ 171 1.1 reinoud /*#define IRQ_RESERVED4 0x17*/ 172 1.1 reinoud 173 1.1 reinoud 174 1.1 reinoud 175 1.1 reinoud #endif /* NIOMD > 0 */ 176 1.1 reinoud 177 1.1 reinoud #define IRQ_VSYNC IRQ_FLYBACK /* Aliased */ 178 1.1 reinoud #define IRQ_NETSLOT IRQ_EXTENDED 179 1.1 reinoud 180 1.1 reinoud #define IRQ_INSTRUCT -1 181 1.1 reinoud #define NIRQS 0x20 182 1.1 reinoud 183 1.1 reinoud #include <machine/intr.h> 184 1.1 reinoud 185 1.1 reinoud #ifndef _LOCORE 186 1.1 reinoud typedef struct irqhandler { 187 1.9 dsl int (*ih_func)(void *arg);/* handler function */ 188 1.1 reinoud void *ih_arg; /* Argument to handler */ 189 1.1 reinoud int ih_level; /* Interrupt level */ 190 1.1 reinoud int ih_num; /* Interrupt number (for accounting) */ 191 1.1 reinoud const char *ih_name; /* Name of interrupt (for vmstat -i) */ 192 1.1 reinoud u_int ih_flags; /* Interrupt flags */ 193 1.1 reinoud u_int ih_maskaddr; /* mask address for expansion cards */ 194 1.1 reinoud u_int ih_maskbits; /* interrupt bit for expansion cards */ 195 1.1 reinoud struct irqhandler *ih_next; /* next handler */ 196 1.1 reinoud } irqhandler_t; 197 1.1 reinoud 198 1.1 reinoud #ifdef _KERNEL 199 1.8 matt extern u_int irqmasks[NIPL]; 200 1.1 reinoud extern irqhandler_t *irqhandlers[NIRQS]; 201 1.1 reinoud 202 1.9 dsl void irq_init(void); 203 1.9 dsl int irq_claim(int, irqhandler_t *); 204 1.9 dsl int irq_release(int, irqhandler_t *); 205 1.9 dsl void *intr_claim(int irq, int level, const char *name, int (*func)(void *), void *arg); 206 1.9 dsl int intr_release(void *ih); 207 1.9 dsl void irq_setmasks(void); 208 1.9 dsl void disable_irq(int); 209 1.9 dsl void enable_irq(int); 210 1.9 dsl void stray_irqhandler(u_int); 211 1.1 reinoud #endif /* _KERNEL */ 212 1.1 reinoud #endif /* _LOCORE */ 213 1.1 reinoud 214 1.1 reinoud #define IRQ_FLAG_ACTIVE 0x00000001 /* This is the active handler in list */ 215 1.1 reinoud 216 1.1 reinoud #endif /* _ARM32_IRQHANDLER_H_ */ 217 1.1 reinoud 218 1.1 reinoud /* End of irqhandler.h */ 219