pioc.c revision 1.9
1 /* $NetBSD: pioc.c,v 1.9 2005/06/28 18:29:58 drochner Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Mark Brinicombe. 5 * Copyright (c) 1997 Causality Limited. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Mark Brinicombe. 19 * 4. The name of the company nor the name of the author may be used to 20 * endorse or promote products derived from this software without specific 21 * prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 24 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 25 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * Peripheral I/O controller - wd, fd, com, lpt Combo chip 36 * 37 * Parent device for combo chip I/O drivers 38 * Currently supports the SMC FDC37GT66[56] controllers. 39 */ 40 41 /*#define PIOC_DEBUG*/ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: pioc.c,v 1.9 2005/06/28 18:29:58 drochner Exp $"); 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/kernel.h> 49 #include <sys/device.h> 50 51 #include <machine/bus.h> 52 #include <arm/mainbus/mainbus.h> 53 #include <acorn32/mainbus/piocreg.h> 54 #include <acorn32/mainbus/piocvar.h> 55 56 #include "locators.h" 57 58 /* 59 * PIOC device. 60 * 61 * This probes and attaches the top level pioc device. 62 * It then configures any children of the pioc device. 63 */ 64 65 /* 66 * pioc softc structure. 67 * 68 * Contains the device node, bus space tag, handle and address along with 69 * other global information such as id and config registers. 70 */ 71 72 struct pioc_softc { 73 struct device sc_dev; /* device node */ 74 bus_space_tag_t sc_iot; /* bus tag */ 75 bus_space_handle_t sc_ioh; /* bus handle */ 76 bus_addr_t sc_iobase; /* IO base address */ 77 int sc_id; /* chip ID */ 78 int sc_config[PIOC_CM_REGS];/* config regs */ 79 }; 80 81 /* 82 * The pioc device is a parent to the com device. 83 * This means that it needs to provide a bus space tag for 84 * a serial console. 85 * 86 * XXX - This is not fully tested yet. 87 */ 88 89 extern struct bus_space mainbus_bs_tag; 90 bus_space_tag_t comconstag = &mainbus_bs_tag; 91 92 /* Prototypes for functions */ 93 94 static int piocmatch __P((struct device *, struct cfdata *, void *)); 95 static void piocattach __P((struct device *, struct device *, void *)); 96 static int piocprint __P((void *aux, const char *name)); 97 #if 0 98 static int piocsearch __P((struct device *, struct cfdata *, void *)); 99 #endif 100 static int piocsubmatch __P((struct device *, struct cfdata *, 101 const locdesc_t *, void *)); 102 static void piocgetid __P((bus_space_tag_t iot, bus_space_handle_t ioh, 103 int config_entry, int *id, int *revision)); 104 105 /* device attach and driver structure */ 106 107 CFATTACH_DECL(pioc, sizeof(struct pioc_softc), 108 piocmatch, piocattach, NULL, NULL); 109 110 /* 111 * void piocgetid(bus_space_tag_t iot, bus_space_handle_t ioh, 112 * int config_entry, int *id, int *revision) 113 * 114 * Enter config mode and return the id and revision 115 */ 116 117 static void 118 piocgetid(iot, ioh, config_entry, id, revision) 119 bus_space_tag_t iot; 120 bus_space_handle_t ioh; 121 int config_entry; 122 int *id; 123 int *revision; 124 { 125 /* 126 * Put the chip info configuration mode and read the ID and revision 127 */ 128 bus_space_write_1(iot, ioh, PIOC_CM_SELECT_REG, config_entry); 129 bus_space_write_1(iot, ioh, PIOC_CM_SELECT_REG, config_entry); 130 131 bus_space_write_1(iot, ioh, PIOC_CM_SELECT_REG, PIOC_CM_CRD); 132 *id = bus_space_read_1(iot, ioh, PIOC_CM_DATA_REG); 133 bus_space_write_1(iot, ioh, PIOC_CM_SELECT_REG, PIOC_CM_CRE); 134 *revision = bus_space_read_1(iot, ioh, PIOC_CM_DATA_REG); 135 136 bus_space_write_1(iot, ioh, PIOC_CM_SELECT_REG, PIOC_CM_EXIT); 137 } 138 139 /* 140 * int piocmatch(struct device *parent, struct cfdata *cf, void *aux) 141 * 142 * Put the controller into config mode and probe the ID to see if 143 * we recognise it. 144 * 145 * XXX - INTRUSIVE PROBE 146 */ 147 148 static int 149 piocmatch(parent, cf, aux) 150 struct device *parent; 151 struct cfdata *cf; 152 void *aux; 153 { 154 struct mainbus_attach_args *mb = aux; 155 bus_space_tag_t iot; 156 bus_space_handle_t ioh; 157 int id, rev; 158 int rv = 1; 159 160 /* We need a base address */ 161 if (mb->mb_iobase == MAINBUSCF_BASE_DEFAULT) 162 return(0); 163 164 iot = mb->mb_iot; 165 if (bus_space_map(iot, mb->mb_iobase, PIOC_SIZE, 0, &ioh)) 166 return(0); 167 168 mb->mb_iosize = PIOC_SIZE; 169 170 piocgetid(iot, ioh, PIOC_CM_ENTER_665, &id, &rev); 171 if (id == PIOC_CM_ID_665) 172 goto out; 173 174 piocgetid(iot, ioh, PIOC_CM_ENTER_666, &id, &rev); 175 if (id == PIOC_CM_ID_666) 176 goto out; 177 178 rv = 0; 179 180 out: 181 bus_space_unmap(iot, ioh, PIOC_SIZE); 182 return(rv); 183 } 184 185 /* 186 * int piocprint(void *aux, const char *name) 187 * 188 * print routine used during child configuration 189 */ 190 191 static int 192 piocprint(aux, name) 193 void *aux; 194 const char *name; 195 { 196 struct pioc_attach_args *pa = aux; 197 198 if (!name) { 199 if (pa->pa_offset) 200 aprint_normal(" offset 0x%x", pa->pa_offset >> 2); 201 if (pa->pa_iosize > 1) 202 aprint_normal("-0x%x", 203 ((pa->pa_offset >> 2) + pa->pa_iosize) - 1); 204 if (pa->pa_irq != -1) 205 aprint_normal(" irq %d", pa->pa_irq); 206 if (pa->pa_drq != -1) 207 aprint_normal(" drq 0x%08x", pa->pa_drq); 208 } 209 210 /* XXX print flags */ 211 return (QUIET); 212 } 213 214 #if 0 215 /* 216 * int piocsearch(struct device *parent, struct cfdata *cf, void *aux) 217 * 218 * search function used to probe and attach the child devices. 219 * 220 * Note: since the offsets of the devices need to be specified in the 221 * config file we ignore the FSTAT_STAR. 222 */ 223 224 static int 225 piocsearch(parent, cf, aux) 226 struct device *parent; 227 struct cfdata *cf; 228 void *aux; 229 { 230 struct pioc_softc *sc = (struct pioc_softc *)parent; 231 struct pioc_attach_args pa; 232 int tryagain; 233 234 do { 235 pa.pa_name = NULL; 236 pa.pa_iobase = sc->sc_iobase; 237 pa.pa_iosize = 0; 238 pa.pa_iot = sc->sc_iot; 239 if (cf->cf_loc[PIOCCF_OFFSET] == PIOCCF_OFFSET_DEFAULT) { 240 pa.pa_offset = PIOCCF_OFFSET_DEFAULT; 241 pa.pa_drq = PIOCCF_DACK_DEFAULT; 242 pa.pa_irq = PIOCCF_IRQ_DEFAULT; 243 } else { 244 pa.pa_offset = (cf->cf_loc[PIOCCF_OFFSET] << 2); 245 pa.pa_drq = cf->cf_loc[PIOCCF_DACK]; 246 pa.pa_irq = cf->cf_loc[PIOCCF_IRQ]; 247 } 248 249 tryagain = 0; 250 if (config_match(parent, cf, &pa) > 0) { 251 config_attach(parent, cf, &pa, piocprint); 252 /* tryagain = (cf->cf_fstate == FSTATE_STAR);*/ 253 } 254 } while (tryagain); 255 256 return (0); 257 } 258 #endif 259 260 /* 261 * int piocsubmatch(struct device *parent, struct cfdata *cf, void *aux) 262 * 263 * search function used to probe and attach the child devices. 264 * 265 * Note: since the offsets of the devices need to be specified in the 266 * config file we ignore the FSTAT_STAR. 267 */ 268 269 static int 270 piocsubmatch(parent, cf, ldesc, aux) 271 struct device *parent; 272 struct cfdata *cf; 273 const locdesc_t *ldesc; 274 void *aux; 275 { 276 struct pioc_attach_args *pa = aux; 277 int tryagain; 278 279 if ((pa->pa_offset >> 2) != cf->cf_loc[PIOCCF_OFFSET]) 280 return(0); 281 do { 282 if (pa->pa_drq == -1) 283 pa->pa_drq = cf->cf_loc[PIOCCF_DACK]; 284 if (pa->pa_irq == -1) 285 pa->pa_irq = cf->cf_loc[PIOCCF_IRQ]; 286 tryagain = 0; 287 if (config_match(parent, cf, pa) > 0) { 288 config_attach(parent, cf, pa, piocprint); 289 /* tryagain = (cf->cf_fstate == FSTATE_STAR);*/ 290 } 291 } while (tryagain); 292 293 return (0); 294 } 295 296 /* 297 * void piocattach(struct device *parent, struct device *dev, void *aux) 298 * 299 * Identify the PIOC and read the config registers into the softc. 300 * Search and configure all children 301 */ 302 303 static void 304 piocattach(parent, self, aux) 305 struct device *parent; 306 struct device *self; 307 void *aux; 308 { 309 struct mainbus_attach_args *mb = aux; 310 struct pioc_softc *sc = (struct pioc_softc *)self; 311 bus_space_tag_t iot; 312 bus_space_handle_t ioh; 313 int id, rev; 314 int loop; 315 struct pioc_attach_args pa; 316 317 sc->sc_iobase = mb->mb_iobase; 318 iot = sc->sc_iot = mb->mb_iot; 319 320 if (bus_space_map(iot, sc->sc_iobase, PIOC_SIZE, 0, &ioh)) 321 panic("%s: couldn't map I/O space", self->dv_xname); 322 sc->sc_ioh = ioh; 323 324 piocgetid(iot, ioh, PIOC_CM_ENTER_665, &id, &rev); 325 if (id != PIOC_CM_ID_665) 326 piocgetid(iot, ioh, PIOC_CM_ENTER_666, &id, &rev); 327 328 printf("\n%s: ", self->dv_xname); 329 330 /* Do we recognise it ? */ 331 switch (id) { 332 case PIOC_CM_ID_665: 333 case PIOC_CM_ID_666: 334 printf("SMC FDC37C6%xGT peripheral controller rev %d\n", id, rev); 335 break; 336 default: 337 printf("Unrecognised peripheral controller id=%2x rev=%2x\n", id, rev); 338 return; 339 } 340 341 sc->sc_id = id; 342 343 /* 344 * Put the chip info configuration mode and save all the registers 345 */ 346 347 switch (id) { 348 case PIOC_CM_ID_665: 349 bus_space_write_1(iot, ioh, PIOC_CM_SELECT_REG, PIOC_CM_ENTER_665); 350 bus_space_write_1(iot, ioh, PIOC_CM_SELECT_REG, PIOC_CM_ENTER_665); 351 break; 352 353 case PIOC_CM_ID_666: 354 bus_space_write_1(iot, ioh, PIOC_CM_SELECT_REG, PIOC_CM_ENTER_666); 355 bus_space_write_1(iot, ioh, PIOC_CM_SELECT_REG, PIOC_CM_ENTER_666); 356 break; 357 } 358 359 for (loop = 0; loop < PIOC_CM_REGS; ++loop) { 360 bus_space_write_1(iot, ioh, PIOC_CM_SELECT_REG, loop); 361 sc->sc_config[loop] = bus_space_read_1(iot, ioh, PIOC_CM_DATA_REG); 362 } 363 364 bus_space_write_1(iot, ioh, PIOC_CM_SELECT_REG, PIOC_CM_EXIT); 365 366 #ifdef PIOC_DEBUG 367 printf("%s: ", self->dv_xname); 368 369 for (loop = 0; loop < PIOC_CM_REGS; ++loop) 370 printf("%02x ", sc->sc_config[loop]); 371 printf("\n"); 372 #endif 373 374 /* 375 * Ok as yet we cannot do specific config_found() calls 376 * for the children yet. This is because the pioc device does 377 * not know the interrupt numbers to use. 378 * Eventually this information will have to be provided by the 379 * riscpc specific code. 380 * Until then just do a config_search() and pick the info up 381 * from the cfdata. 382 * Note the child devices require some modifications as well. 383 */ 384 385 /* 386 * Ok Now configure the child devices of the pioc device 387 * Use the pioc config registers to determine the addressing 388 * of the children 389 */ 390 391 /* 392 * Start by configuring the IDE controller 393 */ 394 395 if (sc->sc_config[PIOC_CM_CR0] & PIOC_WDC_ENABLE) { 396 pa.pa_name = "wdc"; 397 pa.pa_iobase = sc->sc_iobase; 398 pa.pa_iosize = 0; 399 pa.pa_iot = iot; 400 if (sc->sc_config[PIOC_CM_CR5] & PIOC_WDC_SECONDARY) 401 pa.pa_offset = (PIOC_WDC_SECONDARY_OFFSET << 2); 402 else 403 pa.pa_offset = (PIOC_WDC_PRIMARY_OFFSET << 2); 404 pa.pa_drq = -1; 405 pa.pa_irq = -1; 406 config_found_sm_loc(self, "pioc", NULL, &pa, piocprint, 407 piocsubmatch); 408 } 409 410 /* 411 * Next configure the floppy controller 412 */ 413 414 if (sc->sc_config[PIOC_CM_CR0] & PIOC_FDC_ENABLE) { 415 pa.pa_name = "fdc"; 416 pa.pa_iobase = sc->sc_iobase; 417 pa.pa_iosize = 0; 418 pa.pa_iot = iot; 419 if (sc->sc_config[PIOC_CM_CR5] & PIOC_FDC_SECONDARY) 420 pa.pa_offset = (PIOC_FDC_SECONDARY_OFFSET << 2); 421 else 422 pa.pa_offset = (PIOC_FDC_PRIMARY_OFFSET << 2); 423 pa.pa_drq = -1; 424 pa.pa_irq = -1; 425 config_found_sm_loc(self, "pioc", NULL, &pa, piocprint, 426 piocsubmatch); 427 } 428 429 /* 430 * Next configure the serial ports 431 */ 432 433 /* 434 * XXX - There is a deficiency in the serial configuration 435 * If the PIOC has the serial ports configured for COM3 and COM4 436 * the standard COM3 and COM4 addresses are assumed rather than 437 * examining CR1 to determine the COM3 and COM4 addresses. 438 */ 439 440 if (sc->sc_config[PIOC_CM_CR2] & PIOC_UART1_ENABLE) { 441 pa.pa_name = "com"; 442 pa.pa_iobase = sc->sc_iobase; 443 pa.pa_iosize = 0; 444 pa.pa_iot = iot; 445 switch (sc->sc_config[PIOC_CM_CR2] & PIOC_UART1_ADDR_MASK) { 446 case PIOC_UART1_ADDR_COM1: 447 pa.pa_offset = (PIOC_COM1_OFFSET << 2); 448 break; 449 case PIOC_UART1_ADDR_COM2: 450 pa.pa_offset = (PIOC_COM2_OFFSET << 2); 451 break; 452 case PIOC_UART1_ADDR_COM3: 453 pa.pa_offset = (PIOC_COM3_OFFSET << 2); 454 break; 455 case PIOC_UART1_ADDR_COM4: 456 pa.pa_offset = (PIOC_COM4_OFFSET << 2); 457 break; 458 } 459 pa.pa_drq = -1; 460 pa.pa_irq = -1; 461 config_found_sm_loc(self, "pioc", NULL, &pa, piocprint, 462 piocsubmatch); 463 } 464 465 if (sc->sc_config[PIOC_CM_CR2] & PIOC_UART2_ENABLE) { 466 pa.pa_name = "com"; 467 pa.pa_iobase = sc->sc_iobase; 468 pa.pa_iosize = 0; 469 pa.pa_iot = iot; 470 switch (sc->sc_config[PIOC_CM_CR2] & PIOC_UART2_ADDR_MASK) { 471 case PIOC_UART2_ADDR_COM1: 472 pa.pa_offset = (PIOC_COM1_OFFSET << 2); 473 break; 474 case PIOC_UART2_ADDR_COM2: 475 pa.pa_offset = (PIOC_COM2_OFFSET << 2); 476 break; 477 case PIOC_UART2_ADDR_COM3: 478 pa.pa_offset = (PIOC_COM3_OFFSET << 2); 479 break; 480 case PIOC_UART2_ADDR_COM4: 481 pa.pa_offset = (PIOC_COM4_OFFSET << 2); 482 break; 483 } 484 pa.pa_drq = -1; 485 pa.pa_irq = -1; 486 config_found_sm_loc(self, "pioc", NULL, &pa, piocprint, 487 piocsubmatch); 488 } 489 490 /* 491 * Next configure the printer port 492 */ 493 494 if ((sc->sc_config[PIOC_CM_CR1] & PIOC_LPT_ADDR_MASK) != PIOC_LPT_ADDR_DISABLE) { 495 pa.pa_name = "lpt"; 496 pa.pa_iobase = sc->sc_iobase; 497 pa.pa_iosize = 0; 498 pa.pa_iot = iot; 499 switch (sc->sc_config[PIOC_CM_CR1] & PIOC_LPT_ADDR_MASK) { 500 case PIOC_LPT_ADDR_1: 501 pa.pa_offset = (PIOC_LPT1_OFFSET << 2); 502 break; 503 case PIOC_LPT_ADDR_2: 504 pa.pa_offset = (PIOC_LPT2_OFFSET << 2); 505 break; 506 case PIOC_LPT_ADDR_3: 507 pa.pa_offset = (PIOC_LPT3_OFFSET << 2); 508 break; 509 } 510 pa.pa_drq = -1; 511 pa.pa_irq = -1; 512 config_found_sm_loc(self, "pioc", NULL, &pa, piocprint, 513 piocsubmatch); 514 } 515 516 #if 0 517 config_search(piocsearch, self, NULL); 518 #endif 519 } 520 521 /* End of pioc.c */ 522
Indexes created Tue Sep 30 20:09:53 GMT 2025