cosc.c revision 1.1.4.5 1 1.1.4.5 nathanw /* $NetBSD: cosc.c,v 1.1.4.5 2002/10/18 02:33:42 nathanw Exp $ */
2 1.1.4.2 nathanw
3 1.1.4.2 nathanw /*
4 1.1.4.2 nathanw * Copyright (c) 1996 Mark Brinicombe
5 1.1.4.2 nathanw * All rights reserved.
6 1.1.4.2 nathanw *
7 1.1.4.2 nathanw * Redistribution and use in source and binary forms, with or without
8 1.1.4.2 nathanw * modification, are permitted provided that the following conditions
9 1.1.4.2 nathanw * are met:
10 1.1.4.2 nathanw * 1. Redistributions of source code must retain the above copyright
11 1.1.4.2 nathanw * notice, this list of conditions and the following disclaimer.
12 1.1.4.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
13 1.1.4.2 nathanw * notice, this list of conditions and the following disclaimer in the
14 1.1.4.2 nathanw * documentation and/or other materials provided with the distribution.
15 1.1.4.2 nathanw * 3. All advertising materials mentioning features or use of this software
16 1.1.4.2 nathanw * must display the following acknowledgement:
17 1.1.4.2 nathanw * This product includes software developed by Mark Brinicombe
18 1.1.4.2 nathanw * for the NetBSD Project.
19 1.1.4.2 nathanw * 4. Neither the name of the University nor the names of its contributors
20 1.1.4.2 nathanw * may be used to endorse or promote products derived from this software
21 1.1.4.2 nathanw * without specific prior written permission.
22 1.1.4.2 nathanw *
23 1.1.4.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24 1.1.4.2 nathanw * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 1.1.4.2 nathanw * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 1.1.4.2 nathanw * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27 1.1.4.2 nathanw * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 1.1.4.2 nathanw * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 1.1.4.2 nathanw * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 1.1.4.2 nathanw * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 1.1.4.2 nathanw * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32 1.1.4.2 nathanw * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 1.1.4.2 nathanw *
34 1.1.4.2 nathanw * from: asc.c,v 1.8 1996/06/12 20:46:58 mark Exp
35 1.1.4.2 nathanw */
36 1.1.4.2 nathanw
37 1.1.4.2 nathanw /*
38 1.1.4.2 nathanw * Driver for the MCS Connect 32 SCSI 2 card with AM53C94 SCSI controller.
39 1.1.4.2 nathanw *
40 1.1.4.2 nathanw * Thanks to Mike <mcsmike (at) knipp.de> at MCS for loaning a card.
41 1.1.4.2 nathanw * Thanks to Andreas Gandor <andi (at) knipp.de> for some technical information
42 1.1.4.2 nathanw */
43 1.1.4.2 nathanw
44 1.1.4.2 nathanw #include <sys/param.h>
45 1.1.4.2 nathanw #include <sys/systm.h>
46 1.1.4.2 nathanw #include <sys/kernel.h>
47 1.1.4.2 nathanw #include <sys/device.h>
48 1.1.4.2 nathanw #include <dev/scsipi/scsi_all.h>
49 1.1.4.2 nathanw #include <dev/scsipi/scsipi_all.h>
50 1.1.4.2 nathanw #include <dev/scsipi/scsiconf.h>
51 1.1.4.2 nathanw #include <machine/bootconfig.h>
52 1.1.4.2 nathanw #include <machine/io.h>
53 1.1.4.2 nathanw #include <machine/intr.h>
54 1.1.4.2 nathanw #include <arm/arm32/katelib.h>
55 1.1.4.2 nathanw #include <acorn32/podulebus/podulebus.h>
56 1.1.4.2 nathanw #include <acorn32/podulebus/escreg.h>
57 1.1.4.2 nathanw #include <acorn32/podulebus/escvar.h>
58 1.1.4.2 nathanw #include <acorn32/podulebus/coscreg.h>
59 1.1.4.2 nathanw #include <acorn32/podulebus/coscvar.h>
60 1.1.4.2 nathanw #include <dev/podulebus/podules.h>
61 1.1.4.2 nathanw
62 1.1.4.5 nathanw void coscattach(struct device *, struct device *, void *);
63 1.1.4.5 nathanw int coscmatch(struct device *, struct cfdata *, void *);
64 1.1.4.2 nathanw
65 1.1.4.5 nathanw CFATTACH_DECL(cosc, sizeof(struct cosc_softc),
66 1.1.4.5 nathanw coscmatch, coscattach, NULL, NULL);
67 1.1.4.2 nathanw
68 1.1.4.5 nathanw int cosc_intr(void *);
69 1.1.4.5 nathanw int cosc_setup_dma(struct esc_softc *, void *, int, int);
70 1.1.4.5 nathanw int cosc_build_dma_chain(struct esc_softc *, struct esc_dma_chain *, void *,
71 1.1.4.5 nathanw int);
72 1.1.4.5 nathanw int cosc_need_bump(struct esc_softc *, void *, int);
73 1.1.4.5 nathanw void cosc_led(struct esc_softc *, int);
74 1.1.4.5 nathanw void cosc_set_dma_adr(struct esc_softc *, void *);
75 1.1.4.5 nathanw void cosc_set_dma_tc(struct esc_softc *, unsigned int);
76 1.1.4.5 nathanw void cosc_set_dma_mode(struct esc_softc *, int);
77 1.1.4.2 nathanw
78 1.1.4.2 nathanw #if COSC_POLL > 0
79 1.1.4.2 nathanw int cosc_poll = 1;
80 1.1.4.2 nathanw #endif
81 1.1.4.2 nathanw
82 1.1.4.2 nathanw int
83 1.1.4.2 nathanw coscmatch(pdp, cf, auxp)
84 1.1.4.2 nathanw struct device *pdp;
85 1.1.4.2 nathanw struct cfdata *cf;
86 1.1.4.2 nathanw void *auxp;
87 1.1.4.2 nathanw {
88 1.1.4.2 nathanw struct podule_attach_args *pa = (struct podule_attach_args *)auxp;
89 1.1.4.2 nathanw
90 1.1.4.2 nathanw /* Look for the card */
91 1.1.4.2 nathanw
92 1.1.4.3 nathanw if (pa->pa_product == PODULE_CONNECT32)
93 1.1.4.2 nathanw return(1);
94 1.1.4.2 nathanw
95 1.1.4.2 nathanw /* Old versions of the ROM on this card could have the wrong ID */
96 1.1.4.2 nathanw
97 1.1.4.3 nathanw if (pa ->pa_product == PODULE_ACORN_SCSI &&
98 1.1.4.3 nathanw strncmp(pa->pa_podule->description, "MCS", 3) == 0)
99 1.1.4.3 nathanw return(1);
100 1.1.4.3 nathanw return(0);
101 1.1.4.2 nathanw }
102 1.1.4.2 nathanw
103 1.1.4.2 nathanw static int dummy[6];
104 1.1.4.2 nathanw
105 1.1.4.2 nathanw void
106 1.1.4.2 nathanw coscattach(pdp, dp, auxp)
107 1.1.4.2 nathanw struct device *pdp, *dp;
108 1.1.4.2 nathanw void *auxp;
109 1.1.4.2 nathanw {
110 1.1.4.2 nathanw struct cosc_softc *sc = (struct cosc_softc *)dp;
111 1.1.4.2 nathanw struct podule_attach_args *pa;
112 1.1.4.2 nathanw cosc_regmap_p rp = &sc->sc_regmap;
113 1.1.4.2 nathanw vu_char *esc;
114 1.1.4.2 nathanw
115 1.1.4.2 nathanw pa = (struct podule_attach_args *)auxp;
116 1.1.4.2 nathanw
117 1.1.4.2 nathanw if (pa->pa_podule_number == -1)
118 1.1.4.2 nathanw panic("Podule has disappeared !");
119 1.1.4.2 nathanw
120 1.1.4.2 nathanw sc->sc_podule_number = pa->pa_podule_number;
121 1.1.4.2 nathanw sc->sc_podule = pa->pa_podule;
122 1.1.4.2 nathanw podules[sc->sc_podule_number].attached = 1;
123 1.1.4.2 nathanw
124 1.1.4.2 nathanw printf(":");
125 1.1.4.2 nathanw
126 1.1.4.2 nathanw if (pa->pa_podule->manufacturer == MANUFACTURER_ACORN
127 1.1.4.2 nathanw && pa->pa_podule->product == PODULE_ACORN_SCSI)
128 1.1.4.2 nathanw printf(" Faulty expansion card identity\n");
129 1.1.4.2 nathanw
130 1.1.4.2 nathanw sc->sc_iobase = (vu_char *)sc->sc_podule->fast_base;
131 1.1.4.2 nathanw
132 1.1.4.2 nathanw /* Select page zero (so we can see the config info) */
133 1.1.4.2 nathanw
134 1.1.4.2 nathanw sc->sc_iobase[COSC_PAGE_REGISTER] = 0;
135 1.1.4.2 nathanw
136 1.1.4.2 nathanw rp->chipreset = (vu_char *)&dummy[0];
137 1.1.4.2 nathanw rp->inten = (vu_char *)&dummy[1];
138 1.1.4.2 nathanw rp->status = (vu_char *)&dummy[2];
139 1.1.4.2 nathanw rp->term = &sc->sc_iobase[COSC_TERMINATION_CONTROL];
140 1.1.4.2 nathanw rp->led = (vu_char *)&dummy[4];
141 1.1.4.2 nathanw esc = &sc->sc_iobase[COSC_ESCOFFSET_BASE];
142 1.1.4.2 nathanw
143 1.1.4.2 nathanw rp->esc.esc_tc_low = &esc[COSC_ESCOFFSET_TCL];
144 1.1.4.2 nathanw rp->esc.esc_tc_mid = &esc[COSC_ESCOFFSET_TCM];
145 1.1.4.2 nathanw rp->esc.esc_fifo = &esc[COSC_ESCOFFSET_FIFO];
146 1.1.4.2 nathanw rp->esc.esc_command = &esc[COSC_ESCOFFSET_COMMAND];
147 1.1.4.2 nathanw rp->esc.esc_dest_id = &esc[COSC_ESCOFFSET_DESTID];
148 1.1.4.2 nathanw rp->esc.esc_timeout = &esc[COSC_ESCOFFSET_TIMEOUT];
149 1.1.4.2 nathanw rp->esc.esc_syncper = &esc[COSC_ESCOFFSET_PERIOD];
150 1.1.4.2 nathanw rp->esc.esc_syncoff = &esc[COSC_ESCOFFSET_OFFSET];
151 1.1.4.2 nathanw rp->esc.esc_config1 = &esc[COSC_ESCOFFSET_CONFIG1];
152 1.1.4.2 nathanw rp->esc.esc_clkconv = &esc[COSC_ESCOFFSET_CLOCKCONV];
153 1.1.4.2 nathanw rp->esc.esc_test = &esc[COSC_ESCOFFSET_TEST];
154 1.1.4.2 nathanw rp->esc.esc_config2 = &esc[COSC_ESCOFFSET_CONFIG2];
155 1.1.4.2 nathanw rp->esc.esc_config3 = &esc[COSC_ESCOFFSET_CONFIG3];
156 1.1.4.2 nathanw rp->esc.esc_config4 = &esc[COSC_ESCOFFSET_CONFIG4];
157 1.1.4.2 nathanw rp->esc.esc_tc_high = &esc[COSC_ESCOFFSET_TCH];
158 1.1.4.2 nathanw rp->esc.esc_fifo_bot = &esc[COSC_ESCOFFSET_FIFOBOTTOM];
159 1.1.4.2 nathanw
160 1.1.4.2 nathanw *rp->esc.esc_command = ESC_CMD_RESET_CHIP;
161 1.1.4.2 nathanw delay(1000);
162 1.1.4.2 nathanw *rp->esc.esc_command = ESC_CMD_NOP;
163 1.1.4.2 nathanw
164 1.1.4.2 nathanw /* See if we recognise the controller */
165 1.1.4.2 nathanw
166 1.1.4.2 nathanw switch (*rp->esc.esc_tc_high) {
167 1.1.4.2 nathanw case 0x12:
168 1.1.4.2 nathanw printf(" AM53CF94");
169 1.1.4.2 nathanw break;
170 1.1.4.2 nathanw default:
171 1.1.4.2 nathanw printf(" Unknown controller (%02x)", *rp->esc.esc_tc_high);
172 1.1.4.2 nathanw break;
173 1.1.4.2 nathanw }
174 1.1.4.2 nathanw
175 1.1.4.2 nathanw /* Set termination power */
176 1.1.4.2 nathanw
177 1.1.4.2 nathanw if (sc->sc_iobase[COSC_CONFIG_TERMINATION] & COSC_CONFIG_TERMINATION_ON) {
178 1.1.4.2 nathanw printf(" termpwr on");
179 1.1.4.2 nathanw sc->sc_iobase[COSC_TERMINATION_CONTROL] = COSC_TERMINATION_ON;
180 1.1.4.2 nathanw } else {
181 1.1.4.2 nathanw printf(" termpwr off");
182 1.1.4.2 nathanw sc->sc_iobase[COSC_TERMINATION_CONTROL] = COSC_TERMINATION_OFF;
183 1.1.4.2 nathanw }
184 1.1.4.2 nathanw
185 1.1.4.2 nathanw /* Don't know what this is for */
186 1.1.4.2 nathanw
187 1.1.4.2 nathanw {
188 1.1.4.2 nathanw int byte;
189 1.1.4.2 nathanw int loop;
190 1.1.4.2 nathanw
191 1.1.4.2 nathanw byte = sc->sc_iobase[COSC_REGISTER_01];
192 1.1.4.2 nathanw byte = 0;
193 1.1.4.2 nathanw for (loop = 0; loop < 8; ++loop) {
194 1.1.4.2 nathanw if (sc->sc_iobase[COSC_REGISTER_00] & 0x01)
195 1.1.4.2 nathanw byte |= (1 << loop);
196 1.1.4.2 nathanw }
197 1.1.4.2 nathanw printf(" byte=%02x", byte);
198 1.1.4.2 nathanw }
199 1.1.4.2 nathanw
200 1.1.4.2 nathanw /*
201 1.1.4.2 nathanw * Control register 4 is an AMD special (not on FAS216)
202 1.1.4.2 nathanw *
203 1.1.4.2 nathanw * The powerdown and glitch eater facilities could be useful
204 1.1.4.2 nathanw * Use the podule configuration for this register
205 1.1.4.2 nathanw */
206 1.1.4.2 nathanw
207 1.1.4.2 nathanw sc->sc_softc.sc_config4 = sc->sc_iobase[COSC_CONFIG_CONTROL_REG4];
208 1.1.4.2 nathanw
209 1.1.4.2 nathanw sc->sc_softc.sc_esc = (esc_regmap_p)rp;
210 1.1.4.2 nathanw /* sc->sc_softc.sc_spec = &sc->sc_specific;*/
211 1.1.4.2 nathanw
212 1.1.4.2 nathanw sc->sc_softc.sc_led = cosc_led;
213 1.1.4.2 nathanw sc->sc_softc.sc_setup_dma = cosc_setup_dma;
214 1.1.4.2 nathanw sc->sc_softc.sc_build_dma_chain = cosc_build_dma_chain;
215 1.1.4.2 nathanw sc->sc_softc.sc_need_bump = cosc_need_bump;
216 1.1.4.2 nathanw
217 1.1.4.2 nathanw sc->sc_softc.sc_clock_freq = 40; /* Connect32 runs at 40MHz */
218 1.1.4.2 nathanw sc->sc_softc.sc_timeout = 250; /* Set default timeout to 250ms */
219 1.1.4.2 nathanw sc->sc_softc.sc_config_flags = ESC_NO_DMA;
220 1.1.4.2 nathanw sc->sc_softc.sc_host_id = sc->sc_iobase[COSC_CONFIG_CONTROL_REG1] & ESC_DEST_ID_MASK;
221 1.1.4.2 nathanw
222 1.1.4.2 nathanw printf(" hostid=%d", sc->sc_softc.sc_host_id);
223 1.1.4.2 nathanw
224 1.1.4.2 nathanw #if COSC_POLL > 0
225 1.1.4.2 nathanw if (boot_args)
226 1.1.4.2 nathanw get_bootconf_option(boot_args, "coscpoll",
227 1.1.4.2 nathanw BOOTOPT_TYPE_BOOLEAN, &cosc_poll);
228 1.1.4.2 nathanw
229 1.1.4.4 nathanw if (cosc_poll) {
230 1.1.4.2 nathanw printf(" polling");
231 1.1.4.4 nathanw sc->sc_softc.sc_adapter.adapt_flags |= SCSIPI_ADAPT_POLL_ONLY;
232 1.1.4.4 nathanw }
233 1.1.4.2 nathanw #endif
234 1.1.4.2 nathanw
235 1.1.4.2 nathanw sc->sc_softc.sc_bump_sz = NBPG;
236 1.1.4.2 nathanw sc->sc_softc.sc_bump_pa = 0x0;
237 1.1.4.2 nathanw
238 1.1.4.2 nathanw escinitialize((struct esc_softc *)sc);
239 1.1.4.2 nathanw
240 1.1.4.2 nathanw sc->sc_softc.sc_adapter.adapt_dev = &sc->sc_softc.sc_dev;
241 1.1.4.2 nathanw sc->sc_softc.sc_adapter.adapt_nchannels = 1;
242 1.1.4.2 nathanw sc->sc_softc.sc_adapter.adapt_openings = 7;
243 1.1.4.2 nathanw sc->sc_softc.sc_adapter.adapt_max_periph = 1;
244 1.1.4.2 nathanw sc->sc_softc.sc_adapter.adapt_ioctl = NULL;
245 1.1.4.2 nathanw sc->sc_softc.sc_adapter.adapt_minphys = esc_minphys;
246 1.1.4.4 nathanw sc->sc_softc.sc_adapter.adapt_request = esc_scsi_request;
247 1.1.4.2 nathanw
248 1.1.4.2 nathanw sc->sc_softc.sc_channel.chan_adapter = &sc->sc_softc.sc_adapter;
249 1.1.4.2 nathanw sc->sc_softc.sc_channel.chan_bustype = &scsi_bustype;
250 1.1.4.2 nathanw sc->sc_softc.sc_channel.chan_channel = 0;
251 1.1.4.2 nathanw sc->sc_softc.sc_channel.chan_ntargets = 8;
252 1.1.4.2 nathanw sc->sc_softc.sc_channel.chan_nluns = 8;
253 1.1.4.2 nathanw sc->sc_softc.sc_channel.chan_id = sc->sc_softc.sc_host_id;
254 1.1.4.2 nathanw
255 1.1.4.2 nathanw /* initialise the card */
256 1.1.4.2 nathanw #if 0
257 1.1.4.2 nathanw *rp->inten = (COSC_POLL?0:1);
258 1.1.4.2 nathanw *rp->led = 0;
259 1.1.4.2 nathanw #endif
260 1.1.4.2 nathanw
261 1.1.4.2 nathanw sc->sc_softc.sc_ih.ih_func = cosc_intr;
262 1.1.4.2 nathanw sc->sc_softc.sc_ih.ih_arg = &sc->sc_softc;
263 1.1.4.2 nathanw sc->sc_softc.sc_ih.ih_level = IPL_BIO;
264 1.1.4.2 nathanw sc->sc_softc.sc_ih.ih_name = "scsi: cosc";
265 1.1.4.2 nathanw sc->sc_softc.sc_ih.ih_maskaddr = sc->sc_podule->irq_addr;
266 1.1.4.2 nathanw sc->sc_softc.sc_ih.ih_maskbits = sc->sc_podule->irq_mask;
267 1.1.4.2 nathanw
268 1.1.4.2 nathanw #if COSC_POLL > 0
269 1.1.4.2 nathanw if (!cosc_poll)
270 1.1.4.2 nathanw #endif
271 1.1.4.2 nathanw {
272 1.1.4.2 nathanw evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, NULL,
273 1.1.4.2 nathanw dp->dv_xname, "intr");
274 1.1.4.2 nathanw sc->sc_ih = podulebus_irq_establish(pa->pa_ih, IPL_BIO,
275 1.1.4.2 nathanw cosc_intr, sc, &sc->sc_intrcnt);
276 1.1.4.2 nathanw if (sc->sc_ih == NULL)
277 1.1.4.5 nathanw panic("%s: Cannot install IRQ handler",
278 1.1.4.2 nathanw dp->dv_xname);
279 1.1.4.2 nathanw }
280 1.1.4.2 nathanw
281 1.1.4.2 nathanw printf("\n");
282 1.1.4.2 nathanw
283 1.1.4.2 nathanw /* attach all scsi units on us */
284 1.1.4.2 nathanw config_found(dp, &sc->sc_softc.sc_channel, scsiprint);
285 1.1.4.2 nathanw }
286 1.1.4.2 nathanw
287 1.1.4.2 nathanw
288 1.1.4.2 nathanw /* Turn on/off led */
289 1.1.4.2 nathanw
290 1.1.4.2 nathanw void
291 1.1.4.2 nathanw cosc_led(sc, mode)
292 1.1.4.2 nathanw struct esc_softc *sc;
293 1.1.4.2 nathanw int mode;
294 1.1.4.2 nathanw {
295 1.1.4.2 nathanw cosc_regmap_p rp;
296 1.1.4.2 nathanw
297 1.1.4.2 nathanw rp = (cosc_regmap_p)sc->sc_esc;
298 1.1.4.2 nathanw
299 1.1.4.2 nathanw if (mode) {
300 1.1.4.2 nathanw sc->sc_led_status++;
301 1.1.4.2 nathanw } else {
302 1.1.4.2 nathanw if (sc->sc_led_status)
303 1.1.4.2 nathanw sc->sc_led_status--;
304 1.1.4.2 nathanw }
305 1.1.4.2 nathanw /* *rp->led = (sc->sc_led_status?1:0);*/
306 1.1.4.2 nathanw }
307 1.1.4.2 nathanw
308 1.1.4.2 nathanw
309 1.1.4.2 nathanw int
310 1.1.4.2 nathanw cosc_intr(arg)
311 1.1.4.2 nathanw void *arg;
312 1.1.4.2 nathanw {
313 1.1.4.2 nathanw struct esc_softc *dev = arg;
314 1.1.4.2 nathanw cosc_regmap_p rp;
315 1.1.4.2 nathanw int quickints;
316 1.1.4.2 nathanw
317 1.1.4.2 nathanw rp = (cosc_regmap_p)dev->sc_esc;
318 1.1.4.2 nathanw
319 1.1.4.2 nathanw printf("cosc_intr:%08x %02x\n", (u_int)rp->esc.esc_status, *rp->esc.esc_status);
320 1.1.4.2 nathanw
321 1.1.4.2 nathanw if (*rp->esc.esc_status & ESC_STAT_INTERRUPT_PENDING) {
322 1.1.4.2 nathanw quickints = 16;
323 1.1.4.2 nathanw do {
324 1.1.4.2 nathanw dev->sc_status = *rp->esc.esc_status;
325 1.1.4.2 nathanw dev->sc_interrupt = *rp->esc.esc_interrupt;
326 1.1.4.2 nathanw
327 1.1.4.2 nathanw if (dev->sc_interrupt & ESC_INT_RESELECTED) {
328 1.1.4.2 nathanw dev->sc_resel[0] = *rp->esc.esc_fifo;
329 1.1.4.2 nathanw dev->sc_resel[1] = *rp->esc.esc_fifo;
330 1.1.4.2 nathanw }
331 1.1.4.2 nathanw
332 1.1.4.2 nathanw escintr(dev);
333 1.1.4.2 nathanw
334 1.1.4.2 nathanw } while((*rp->esc.esc_status & ESC_STAT_INTERRUPT_PENDING)
335 1.1.4.2 nathanw && --quickints);
336 1.1.4.2 nathanw }
337 1.1.4.2 nathanw
338 1.1.4.2 nathanw return(0); /* Pass interrupt on down the chain */
339 1.1.4.2 nathanw }
340 1.1.4.2 nathanw
341 1.1.4.2 nathanw
342 1.1.4.2 nathanw /* Load transfer address into dma register */
343 1.1.4.2 nathanw
344 1.1.4.2 nathanw void
345 1.1.4.2 nathanw cosc_set_dma_adr(sc, ptr)
346 1.1.4.2 nathanw struct esc_softc *sc;
347 1.1.4.2 nathanw void *ptr;
348 1.1.4.2 nathanw {
349 1.1.4.2 nathanw printf("cosc_set_dma_adr(sc = 0x%08x, ptr = 0x%08x)\n", (u_int)sc, (u_int)ptr);
350 1.1.4.2 nathanw return;
351 1.1.4.2 nathanw }
352 1.1.4.2 nathanw
353 1.1.4.2 nathanw
354 1.1.4.2 nathanw /* Set DMA transfer counter */
355 1.1.4.2 nathanw
356 1.1.4.2 nathanw void
357 1.1.4.2 nathanw cosc_set_dma_tc(sc, len)
358 1.1.4.2 nathanw struct esc_softc *sc;
359 1.1.4.2 nathanw unsigned int len;
360 1.1.4.2 nathanw {
361 1.1.4.2 nathanw printf("cosc_set_dma_tc(sc, len = 0x%08x)", len);
362 1.1.4.2 nathanw
363 1.1.4.2 nathanw /* Set the transfer size on the SCSI controller */
364 1.1.4.2 nathanw
365 1.1.4.2 nathanw *sc->sc_esc->esc_tc_low = len; len >>= 8;
366 1.1.4.2 nathanw *sc->sc_esc->esc_tc_mid = len; len >>= 8;
367 1.1.4.2 nathanw *sc->sc_esc->esc_tc_high = len;
368 1.1.4.2 nathanw }
369 1.1.4.2 nathanw
370 1.1.4.2 nathanw
371 1.1.4.2 nathanw /* Set DMA mode */
372 1.1.4.2 nathanw
373 1.1.4.2 nathanw void
374 1.1.4.2 nathanw cosc_set_dma_mode(sc, mode)
375 1.1.4.2 nathanw struct esc_softc *sc;
376 1.1.4.2 nathanw int mode;
377 1.1.4.2 nathanw {
378 1.1.4.2 nathanw printf("cosc_set_dma_mode(sc, mode = %d)", mode);
379 1.1.4.2 nathanw }
380 1.1.4.2 nathanw
381 1.1.4.2 nathanw
382 1.1.4.2 nathanw /* Initialize DMA for transfer */
383 1.1.4.2 nathanw
384 1.1.4.2 nathanw int
385 1.1.4.2 nathanw cosc_setup_dma(sc, ptr, len, mode)
386 1.1.4.2 nathanw struct esc_softc *sc;
387 1.1.4.2 nathanw void *ptr;
388 1.1.4.2 nathanw int len;
389 1.1.4.2 nathanw int mode;
390 1.1.4.2 nathanw {
391 1.1.4.2 nathanw /* printf("cosc_setup_dma(sc, ptr = 0x%08x, len = 0x%08x, mode = 0x%08x)\n", (u_int)ptr, len, mode);*/
392 1.1.4.2 nathanw return(0);
393 1.1.4.2 nathanw
394 1.1.4.2 nathanw }
395 1.1.4.2 nathanw
396 1.1.4.2 nathanw
397 1.1.4.2 nathanw /* Check if address and len is ok for DMA transfer */
398 1.1.4.2 nathanw
399 1.1.4.2 nathanw int
400 1.1.4.2 nathanw cosc_need_bump(sc, ptr, len)
401 1.1.4.2 nathanw struct esc_softc *sc;
402 1.1.4.2 nathanw void *ptr;
403 1.1.4.2 nathanw int len;
404 1.1.4.2 nathanw {
405 1.1.4.2 nathanw int p;
406 1.1.4.2 nathanw
407 1.1.4.2 nathanw p = (int)ptr & 0x03;
408 1.1.4.2 nathanw
409 1.1.4.2 nathanw if (p) {
410 1.1.4.2 nathanw p = 4-p;
411 1.1.4.2 nathanw
412 1.1.4.2 nathanw if (len < 256)
413 1.1.4.2 nathanw p = len;
414 1.1.4.2 nathanw }
415 1.1.4.2 nathanw
416 1.1.4.2 nathanw return(p);
417 1.1.4.2 nathanw }
418 1.1.4.2 nathanw
419 1.1.4.2 nathanw
420 1.1.4.2 nathanw /* Interrupt driven routines */
421 1.1.4.2 nathanw
422 1.1.4.2 nathanw int
423 1.1.4.2 nathanw cosc_build_dma_chain(sc, chain, p, l)
424 1.1.4.2 nathanw struct esc_softc *sc;
425 1.1.4.2 nathanw struct esc_dma_chain *chain;
426 1.1.4.2 nathanw void *p;
427 1.1.4.2 nathanw int l;
428 1.1.4.2 nathanw {
429 1.1.4.2 nathanw printf("cosc_build_dma_chain()\n");
430 1.1.4.2 nathanw return(0);
431 1.1.4.2 nathanw }
432