1 1.2 martin /* $NetBSD: cscreg.h,v 1.2 2008/04/28 20:23:10 martin Exp $ */ 2 1.1 reinoud 3 1.1 reinoud /*- 4 1.1 reinoud * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 1.1 reinoud * All rights reserved. 6 1.1 reinoud * 7 1.1 reinoud * This code is derived from software contributed to The NetBSD Foundation 8 1.1 reinoud * by Scott Stevens. 9 1.1 reinoud * 10 1.1 reinoud * Redistribution and use in source and binary forms, with or without 11 1.1 reinoud * modification, are permitted provided that the following conditions 12 1.1 reinoud * are met: 13 1.1 reinoud * 1. Redistributions of source code must retain the above copyright 14 1.1 reinoud * notice, this list of conditions and the following disclaimer. 15 1.1 reinoud * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 reinoud * notice, this list of conditions and the following disclaimer in the 17 1.1 reinoud * documentation and/or other materials provided with the distribution. 18 1.1 reinoud * 19 1.1 reinoud * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.1 reinoud * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.1 reinoud * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.1 reinoud * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.1 reinoud * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.1 reinoud * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.1 reinoud * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.1 reinoud * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.1 reinoud * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.1 reinoud * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.1 reinoud * POSSIBILITY OF SUCH DAMAGE. 30 1.1 reinoud */ 31 1.1 reinoud 32 1.1 reinoud /* 33 1.1 reinoud * Cumana SCSI-2 with FAS216 SCSI interface hardware description. 34 1.1 reinoud */ 35 1.1 reinoud 36 1.1 reinoud #ifndef _CSCREG_H_ 37 1.1 reinoud #define _CSCREG_H_ 38 1.1 reinoud 39 1.1 reinoud #include <acorn32/podulebus/sfasvar.h> 40 1.1 reinoud 41 1.1 reinoud typedef volatile unsigned short vu_short; 42 1.1 reinoud 43 1.1 reinoud typedef struct csc_regmap { 44 1.1 reinoud sfas_regmap_t FAS216; 45 1.1 reinoud vu_char *status0; 46 1.1 reinoud vu_char *alatch; 47 1.1 reinoud vu_short *dack; 48 1.1 reinoud } csc_regmap_t; 49 1.1 reinoud typedef csc_regmap_t *csc_regmap_p; 50 1.1 reinoud 51 1.1 reinoud /* 52 1.1 reinoud * Register information 53 1.1 reinoud */ 54 1.1 reinoud #define CSC_STATUS0 0x0000 55 1.1 reinoud #define CSC_ALATCH 0x0014 56 1.1 reinoud #define CSC_DACK 0x0200 57 1.1 reinoud #define CSC_FAS_OFFSET_BASE 0x0300 58 1.1 reinoud #define CSC_FAS_OFFSET_TCL 0x00 59 1.1 reinoud #define CSC_FAS_OFFSET_TCM 0x04 60 1.1 reinoud #define CSC_FAS_OFFSET_FIFO 0x08 61 1.1 reinoud #define CSC_FAS_OFFSET_COMMAND 0x0c 62 1.1 reinoud #define CSC_FAS_OFFSET_DESTID 0x10 63 1.1 reinoud #define CSC_FAS_OFFSET_TIMEOUT 0x14 64 1.1 reinoud #define CSC_FAS_OFFSET_PERIOD 0x18 65 1.1 reinoud #define CSC_FAS_OFFSET_OFFSET 0x1c 66 1.1 reinoud #define CSC_FAS_OFFSET_CONFIG1 0x20 67 1.1 reinoud #define CSC_FAS_OFFSET_CLKCONV 0x24 68 1.1 reinoud #define CSC_FAS_OFFSET_TEST 0x28 69 1.1 reinoud #define CSC_FAS_OFFSET_CONFIG2 0x2c 70 1.1 reinoud #define CSC_FAS_OFFSET_CONFIG3 0x30 71 1.1 reinoud #define CSC_FAS_OFFSET_TCH 0x38 72 1.1 reinoud #define CSC_FAS_OFFSET_FIFOBOT 0x3c 73 1.1 reinoud 74 1.1 reinoud #define CSC_STATUS0_INT 0x01 75 1.1 reinoud #define CSC_STATUS0_DREQ 0x02 76 1.1 reinoud #define CSC_STATUS0_EDOUT 0x04 77 1.1 reinoud #define CSC_STATUS0_LATCHED 0x08 78 1.1 reinoud 79 1.1 reinoud #define CSC_ALATCH_DEFS_P7 0x01 80 1.1 reinoud #define CSC_ALATCH_DEFS_INTEN 0x02 81 1.1 reinoud #define CSC_ALATCH_DEFS_TERM 0x04 82 1.1 reinoud #define CSC_ALATCH_DEFS_RSVD 0x08 83 1.1 reinoud #define CSC_ALATCH_DEFS_PROG 0x10 84 1.1 reinoud #define CSC_ALATCH_DEFS_DMA32 0x20 85 1.1 reinoud #define CSC_ALATCH_DEFS_DMAEN 0x40 86 1.1 reinoud #define CSC_ALATCH_DEFS_DMADIR 0x80 87 1.1 reinoud 88 1.1 reinoud #endif 89