ptsc.c revision 1.1.4.2 1 1.1.4.2 nathanw /* $NetBSD: ptsc.c,v 1.1.4.2 2002/01/08 00:22:47 nathanw Exp $ */
2 1.1.4.2 nathanw
3 1.1.4.2 nathanw /*
4 1.1.4.2 nathanw * Copyright (c) 1995 Scott Stevens
5 1.1.4.2 nathanw * Copyright (c) 1995 Daniel Widenfalk
6 1.1.4.2 nathanw * Copyright (c) 1994 Christian E. Hopps
7 1.1.4.2 nathanw * Copyright (c) 1982, 1990 The Regents of the University of California.
8 1.1.4.2 nathanw * All rights reserved.
9 1.1.4.2 nathanw *
10 1.1.4.2 nathanw * Redistribution and use in source and binary forms, with or without
11 1.1.4.2 nathanw * modification, are permitted provided that the following conditions
12 1.1.4.2 nathanw * are met:
13 1.1.4.2 nathanw * 1. Redistributions of source code must retain the above copyright
14 1.1.4.2 nathanw * notice, this list of conditions and the following disclaimer.
15 1.1.4.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
16 1.1.4.2 nathanw * notice, this list of conditions and the following disclaimer in the
17 1.1.4.2 nathanw * documentation and/or other materials provided with the distribution.
18 1.1.4.2 nathanw * 3. All advertising materials mentioning features or use of this software
19 1.1.4.2 nathanw * must display the following acknowledgement:
20 1.1.4.2 nathanw * This product includes software developed by the University of
21 1.1.4.2 nathanw * California, Berkeley and its contributors.
22 1.1.4.2 nathanw * 4. Neither the name of the University nor the names of its contributors
23 1.1.4.2 nathanw * may be used to endorse or promote products derived from this software
24 1.1.4.2 nathanw * without specific prior written permission.
25 1.1.4.2 nathanw *
26 1.1.4.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27 1.1.4.2 nathanw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 1.1.4.2 nathanw * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 1.1.4.2 nathanw * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30 1.1.4.2 nathanw * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 1.1.4.2 nathanw * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 1.1.4.2 nathanw * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 1.1.4.2 nathanw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 1.1.4.2 nathanw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 1.1.4.2 nathanw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 1.1.4.2 nathanw * SUCH DAMAGE.
37 1.1.4.2 nathanw *
38 1.1.4.2 nathanw * @(#)ptsc.c
39 1.1.4.2 nathanw */
40 1.1.4.2 nathanw
41 1.1.4.2 nathanw /*
42 1.1.4.2 nathanw * Power-tec SCSI-2 driver uses SFAS216 generic driver
43 1.1.4.2 nathanw *
44 1.1.4.2 nathanw * Thanks to Alsystems for loaning a development card and providing
45 1.1.4.2 nathanw * programming information.
46 1.1.4.2 nathanw */
47 1.1.4.2 nathanw
48 1.1.4.2 nathanw #include <sys/param.h>
49 1.1.4.2 nathanw #include <sys/systm.h>
50 1.1.4.2 nathanw #include <sys/kernel.h>
51 1.1.4.2 nathanw #include <sys/device.h>
52 1.1.4.2 nathanw #include <dev/scsipi/scsi_all.h>
53 1.1.4.2 nathanw #include <dev/scsipi/scsipi_all.h>
54 1.1.4.2 nathanw #include <dev/scsipi/scsiconf.h>
55 1.1.4.2 nathanw #include <uvm/uvm_extern.h>
56 1.1.4.2 nathanw #include <machine/pmap.h>
57 1.1.4.2 nathanw #include <machine/io.h>
58 1.1.4.2 nathanw #include <machine/intr.h>
59 1.1.4.2 nathanw #include <machine/bootconfig.h>
60 1.1.4.2 nathanw #include <acorn32/podulebus/podulebus.h>
61 1.1.4.2 nathanw #include <acorn32/podulebus/sfasreg.h>
62 1.1.4.2 nathanw #include <acorn32/podulebus/sfasvar.h>
63 1.1.4.2 nathanw #include <acorn32/podulebus/ptscreg.h>
64 1.1.4.2 nathanw #include <acorn32/podulebus/ptscvar.h>
65 1.1.4.2 nathanw #include <dev/podulebus/podules.h>
66 1.1.4.2 nathanw #include <dev/podulebus/powerromreg.h>
67 1.1.4.2 nathanw
68 1.1.4.2 nathanw void ptscattach __P((struct device *, struct device *, void *));
69 1.1.4.2 nathanw int ptscmatch __P((struct device *, struct cfdata *, void *));
70 1.1.4.2 nathanw void ptsc_scsi_request __P((struct scsipi_channel *,
71 1.1.4.2 nathanw scsipi_adapter_req_t, void *));
72 1.1.4.2 nathanw
73 1.1.4.2 nathanw struct cfattach ptsc_ca = {
74 1.1.4.2 nathanw sizeof(struct ptsc_softc), ptscmatch, ptscattach
75 1.1.4.2 nathanw };
76 1.1.4.2 nathanw
77 1.1.4.2 nathanw int ptsc_intr __P((void *arg));
78 1.1.4.2 nathanw int ptsc_setup_dma __P((struct sfas_softc *sc, void *ptr, int len,
79 1.1.4.2 nathanw int mode));
80 1.1.4.2 nathanw int ptsc_build_dma_chain __P((struct sfas_softc *sc,
81 1.1.4.2 nathanw struct sfas_dma_chain *chain, void *p, int l));
82 1.1.4.2 nathanw int ptsc_need_bump __P((struct sfas_softc *sc, void *ptr, int len));
83 1.1.4.2 nathanw void ptsc_led __P((struct sfas_softc *sc, int mode));
84 1.1.4.2 nathanw
85 1.1.4.2 nathanw /*
86 1.1.4.2 nathanw * if we are a Power-tec SCSI-2 card
87 1.1.4.2 nathanw */
88 1.1.4.2 nathanw int
89 1.1.4.2 nathanw ptscmatch(pdp, cf, auxp)
90 1.1.4.2 nathanw struct device *pdp;
91 1.1.4.2 nathanw struct cfdata *cf;
92 1.1.4.2 nathanw void *auxp;
93 1.1.4.2 nathanw {
94 1.1.4.2 nathanw struct podule_attach_args *pa = (struct podule_attach_args *)auxp;
95 1.1.4.2 nathanw
96 1.1.4.2 nathanw /* Look for the card */
97 1.1.4.2 nathanw
98 1.1.4.2 nathanw /*
99 1.1.4.2 nathanw * All Power-tec cards effectively have PowerROMS. Note,
100 1.1.4.2 nathanw * though, that here, if we fail to initialise the loader, we
101 1.1.4.2 nathanw * assume this _is_ the right kind of card.
102 1.1.4.2 nathanw */
103 1.1.4.2 nathanw if (pa->pa_product == PODULE_ALSYSTEMS_SCSI &&
104 1.1.4.2 nathanw (podulebus_initloader(pa) != 0 ||
105 1.1.4.2 nathanw podloader_callloader(pa, 0, 0) == PRID_POWERTEC))
106 1.1.4.2 nathanw return 1;
107 1.1.4.2 nathanw
108 1.1.4.2 nathanw return 0;
109 1.1.4.2 nathanw }
110 1.1.4.2 nathanw
111 1.1.4.2 nathanw void
112 1.1.4.2 nathanw ptscattach(pdp, dp, auxp)
113 1.1.4.2 nathanw struct device *pdp;
114 1.1.4.2 nathanw struct device *dp;
115 1.1.4.2 nathanw void *auxp;
116 1.1.4.2 nathanw {
117 1.1.4.2 nathanw struct ptsc_softc *sc = (struct ptsc_softc *)dp;
118 1.1.4.2 nathanw struct podule_attach_args *pa;
119 1.1.4.2 nathanw ptsc_regmap_p rp = &sc->sc_regmap;
120 1.1.4.2 nathanw vu_char *fas;
121 1.1.4.2 nathanw
122 1.1.4.2 nathanw pa = (struct podule_attach_args *)auxp;
123 1.1.4.2 nathanw
124 1.1.4.2 nathanw if (pa->pa_podule_number == -1)
125 1.1.4.2 nathanw panic("Podule has disappeared !");
126 1.1.4.2 nathanw
127 1.1.4.2 nathanw sc->sc_specific.sc_podule_number = pa->pa_podule_number;
128 1.1.4.2 nathanw sc->sc_specific.sc_podule = pa->pa_podule;
129 1.1.4.2 nathanw sc->sc_specific.sc_iobase =
130 1.1.4.2 nathanw (vu_char *)sc->sc_specific.sc_podule->fast_base;
131 1.1.4.2 nathanw
132 1.1.4.2 nathanw rp->chipreset = &sc->sc_specific.sc_iobase[PTSC_CONTROL_CHIPRESET];
133 1.1.4.2 nathanw rp->inten = &sc->sc_specific.sc_iobase[PTSC_CONTROL_INTEN];
134 1.1.4.2 nathanw rp->status = &sc->sc_specific.sc_iobase[PTSC_STATUS];
135 1.1.4.2 nathanw rp->term = &sc->sc_specific.sc_iobase[PTSC_CONTROL_TERM];
136 1.1.4.2 nathanw rp->led = &sc->sc_specific.sc_iobase[PTSC_CONTROL_LED];
137 1.1.4.2 nathanw fas = &sc->sc_specific.sc_iobase[PTSC_FASOFFSET_BASE];
138 1.1.4.2 nathanw
139 1.1.4.2 nathanw rp->FAS216.sfas_tc_low = &fas[PTSC_FASOFFSET_TCL];
140 1.1.4.2 nathanw rp->FAS216.sfas_tc_mid = &fas[PTSC_FASOFFSET_TCM];
141 1.1.4.2 nathanw rp->FAS216.sfas_fifo = &fas[PTSC_FASOFFSET_FIFO];
142 1.1.4.2 nathanw rp->FAS216.sfas_command = &fas[PTSC_FASOFFSET_COMMAND];
143 1.1.4.2 nathanw rp->FAS216.sfas_dest_id = &fas[PTSC_FASOFFSET_DESTID];
144 1.1.4.2 nathanw rp->FAS216.sfas_timeout = &fas[PTSC_FASOFFSET_TIMEOUT];
145 1.1.4.2 nathanw rp->FAS216.sfas_syncper = &fas[PTSC_FASOFFSET_PERIOD];
146 1.1.4.2 nathanw rp->FAS216.sfas_syncoff = &fas[PTSC_FASOFFSET_OFFSET];
147 1.1.4.2 nathanw rp->FAS216.sfas_config1 = &fas[PTSC_FASOFFSET_CONFIG1];
148 1.1.4.2 nathanw rp->FAS216.sfas_clkconv = &fas[PTSC_FASOFFSET_CLOCKCONV];
149 1.1.4.2 nathanw rp->FAS216.sfas_test = &fas[PTSC_FASOFFSET_TEST];
150 1.1.4.2 nathanw rp->FAS216.sfas_config2 = &fas[PTSC_FASOFFSET_CONFIG2];
151 1.1.4.2 nathanw rp->FAS216.sfas_config3 = &fas[PTSC_FASOFFSET_CONFIG3];
152 1.1.4.2 nathanw rp->FAS216.sfas_tc_high = &fas[PTSC_FASOFFSET_TCH];
153 1.1.4.2 nathanw rp->FAS216.sfas_fifo_bot = &fas[PTSC_FASOFFSET_FIFOBOTTOM];
154 1.1.4.2 nathanw
155 1.1.4.2 nathanw sc->sc_softc.sc_fas = (sfas_regmap_p)rp;
156 1.1.4.2 nathanw sc->sc_softc.sc_spec = &sc->sc_specific;
157 1.1.4.2 nathanw
158 1.1.4.2 nathanw sc->sc_softc.sc_led = ptsc_led;
159 1.1.4.2 nathanw
160 1.1.4.2 nathanw sc->sc_softc.sc_setup_dma = ptsc_setup_dma;
161 1.1.4.2 nathanw sc->sc_softc.sc_build_dma_chain = ptsc_build_dma_chain;
162 1.1.4.2 nathanw sc->sc_softc.sc_need_bump = ptsc_need_bump;
163 1.1.4.2 nathanw
164 1.1.4.2 nathanw sc->sc_softc.sc_clock_freq = 40; /* Power-Tec runs at 8MHz */
165 1.1.4.2 nathanw sc->sc_softc.sc_timeout = 250; /* Set default timeout to 250ms */
166 1.1.4.2 nathanw sc->sc_softc.sc_config_flags = SFAS_NO_DMA /*| SFAS_NF_DEBUG*/;
167 1.1.4.2 nathanw sc->sc_softc.sc_host_id = 7; /* Should check the jumpers */
168 1.1.4.2 nathanw
169 1.1.4.2 nathanw sc->sc_softc.sc_bump_sz = NBPG;
170 1.1.4.2 nathanw sc->sc_softc.sc_bump_pa = 0x0;
171 1.1.4.2 nathanw
172 1.1.4.2 nathanw sfasinitialize((struct sfas_softc *)sc);
173 1.1.4.2 nathanw
174 1.1.4.2 nathanw sc->sc_softc.sc_adapter.adapt_dev = &sc->sc_softc.sc_dev;
175 1.1.4.2 nathanw sc->sc_softc.sc_adapter.adapt_nchannels = 1;
176 1.1.4.2 nathanw sc->sc_softc.sc_adapter.adapt_openings = 7;
177 1.1.4.2 nathanw sc->sc_softc.sc_adapter.adapt_max_periph = 1;
178 1.1.4.2 nathanw sc->sc_softc.sc_adapter.adapt_ioctl = NULL;
179 1.1.4.2 nathanw sc->sc_softc.sc_adapter.adapt_minphys = sfas_minphys;
180 1.1.4.2 nathanw sc->sc_softc.sc_adapter.adapt_request = ptsc_scsi_request;
181 1.1.4.2 nathanw
182 1.1.4.2 nathanw sc->sc_softc.sc_channel.chan_adapter = &sc->sc_softc.sc_adapter;
183 1.1.4.2 nathanw sc->sc_softc.sc_channel.chan_bustype = &scsi_bustype;
184 1.1.4.2 nathanw sc->sc_softc.sc_channel.chan_channel = 0;
185 1.1.4.2 nathanw sc->sc_softc.sc_channel.chan_ntargets = 8;
186 1.1.4.2 nathanw sc->sc_softc.sc_channel.chan_nluns = 8;
187 1.1.4.2 nathanw sc->sc_softc.sc_channel.chan_id = sc->sc_softc.sc_host_id;
188 1.1.4.2 nathanw
189 1.1.4.2 nathanw /* Provide an override for the host id */
190 1.1.4.2 nathanw (void)get_bootconf_option(boot_args, "ptsc.hostid",
191 1.1.4.2 nathanw BOOTOPT_TYPE_INT, &sc->sc_softc.sc_channel.chan_id);
192 1.1.4.2 nathanw
193 1.1.4.2 nathanw printf(": host=%d", sc->sc_softc.sc_channel.chan_id);
194 1.1.4.2 nathanw
195 1.1.4.2 nathanw /* initialise the card */
196 1.1.4.2 nathanw /* *rp->term = 0;*/
197 1.1.4.2 nathanw *rp->inten = (PTSC_POLL?0:1);
198 1.1.4.2 nathanw *rp->led = 0;
199 1.1.4.2 nathanw
200 1.1.4.2 nathanw #if PTSC_POLL == 0
201 1.1.4.2 nathanw evcnt_attach_dynamic(&sc->sc_softc.sc_intrcnt, EVCNT_TYPE_INTR, NULL,
202 1.1.4.2 nathanw dp->dv_xname, "intr");
203 1.1.4.2 nathanw sc->sc_softc.sc_ih = podulebus_irq_establish(pa->pa_ih, IPL_BIO,
204 1.1.4.2 nathanw ptsc_intr, &sc->sc_softc, &sc->sc_softc.sc_intrcnt);
205 1.1.4.2 nathanw if (sc->sc_softc.sc_ih == NULL)
206 1.1.4.2 nathanw panic("%s: Cannot install IRQ handler\n", dp->dv_xname);
207 1.1.4.2 nathanw #else
208 1.1.4.2 nathanw printf(" polling");
209 1.1.4.2 nathanw #endif
210 1.1.4.2 nathanw
211 1.1.4.2 nathanw printf("\n");
212 1.1.4.2 nathanw
213 1.1.4.2 nathanw /* attach all scsi units on us */
214 1.1.4.2 nathanw config_found(dp, &sc->sc_softc.sc_channel, scsiprint);
215 1.1.4.2 nathanw }
216 1.1.4.2 nathanw
217 1.1.4.2 nathanw
218 1.1.4.2 nathanw int
219 1.1.4.2 nathanw ptsc_intr(arg)
220 1.1.4.2 nathanw void *arg;
221 1.1.4.2 nathanw {
222 1.1.4.2 nathanw struct sfas_softc *dev = arg;
223 1.1.4.2 nathanw ptsc_regmap_p rp;
224 1.1.4.2 nathanw int quickints;
225 1.1.4.2 nathanw
226 1.1.4.2 nathanw rp = (ptsc_regmap_p)dev->sc_fas;
227 1.1.4.2 nathanw
228 1.1.4.2 nathanw if (*rp->FAS216.sfas_status & SFAS_STAT_INTERRUPT_PENDING) {
229 1.1.4.2 nathanw quickints = 16;
230 1.1.4.2 nathanw do {
231 1.1.4.2 nathanw dev->sc_status = *rp->FAS216.sfas_status;
232 1.1.4.2 nathanw dev->sc_interrupt = *rp->FAS216.sfas_interrupt;
233 1.1.4.2 nathanw
234 1.1.4.2 nathanw if (dev->sc_interrupt & SFAS_INT_RESELECTED) {
235 1.1.4.2 nathanw dev->sc_resel[0] = *rp->FAS216.sfas_fifo;
236 1.1.4.2 nathanw dev->sc_resel[1] = *rp->FAS216.sfas_fifo;
237 1.1.4.2 nathanw }
238 1.1.4.2 nathanw
239 1.1.4.2 nathanw sfasintr(dev);
240 1.1.4.2 nathanw
241 1.1.4.2 nathanw } while((*rp->FAS216.sfas_status & SFAS_STAT_INTERRUPT_PENDING)
242 1.1.4.2 nathanw && --quickints);
243 1.1.4.2 nathanw }
244 1.1.4.2 nathanw
245 1.1.4.2 nathanw return(0); /* Pass interrupt on down the chain */
246 1.1.4.2 nathanw }
247 1.1.4.2 nathanw
248 1.1.4.2 nathanw /* Load transfer address into dma register */
249 1.1.4.2 nathanw void
250 1.1.4.2 nathanw ptsc_set_dma_adr(sc, ptr)
251 1.1.4.2 nathanw struct sfas_softc *sc;
252 1.1.4.2 nathanw void *ptr;
253 1.1.4.2 nathanw {
254 1.1.4.2 nathanw #if 0
255 1.1.4.2 nathanw ptsc_regmap_p rp;
256 1.1.4.2 nathanw unsigned int *p;
257 1.1.4.2 nathanw unsigned int d;
258 1.1.4.2 nathanw #endif
259 1.1.4.2 nathanw #if 0
260 1.1.4.2 nathanw printf("ptsc_set_dma_adr(sc = 0x%08x, ptr = 0x%08x)\n", (u_int)sc, (u_int)ptr);
261 1.1.4.2 nathanw #endif
262 1.1.4.2 nathanw return;
263 1.1.4.2 nathanw #if 0
264 1.1.4.2 nathanw rp = (ptsc_regmap_p)sc->sc_fas;
265 1.1.4.2 nathanw
266 1.1.4.2 nathanw d = (unsigned int)ptr;
267 1.1.4.2 nathanw p = (unsigned int *)((d & 0xFFFFFF) + (int)rp->dmabase);
268 1.1.4.2 nathanw
269 1.1.4.2 nathanw *rp->clear=0;
270 1.1.4.2 nathanw *p = d;
271 1.1.4.2 nathanw #endif
272 1.1.4.2 nathanw }
273 1.1.4.2 nathanw
274 1.1.4.2 nathanw /* Set DMA transfer counter */
275 1.1.4.2 nathanw void
276 1.1.4.2 nathanw ptsc_set_dma_tc(sc, len)
277 1.1.4.2 nathanw struct sfas_softc *sc;
278 1.1.4.2 nathanw unsigned int len;
279 1.1.4.2 nathanw {
280 1.1.4.2 nathanw printf("ptsc_set_dma_tc(sc, len = 0x%08x)", len);
281 1.1.4.2 nathanw
282 1.1.4.2 nathanw *sc->sc_fas->sfas_tc_low = len; len >>= 8;
283 1.1.4.2 nathanw *sc->sc_fas->sfas_tc_mid = len; len >>= 8;
284 1.1.4.2 nathanw *sc->sc_fas->sfas_tc_high = len;
285 1.1.4.2 nathanw }
286 1.1.4.2 nathanw
287 1.1.4.2 nathanw /* Set DMA mode */
288 1.1.4.2 nathanw void
289 1.1.4.2 nathanw ptsc_set_dma_mode(sc, mode)
290 1.1.4.2 nathanw struct sfas_softc *sc;
291 1.1.4.2 nathanw int mode;
292 1.1.4.2 nathanw {
293 1.1.4.2 nathanw #if 0
294 1.1.4.2 nathanw struct csc_specific *spec;
295 1.1.4.2 nathanw
296 1.1.4.2 nathanw spec = sc->sc_spec;
297 1.1.4.2 nathanw
298 1.1.4.2 nathanw spec->portbits = (spec->portbits & ~FLSC_PB_DMA_BITS) | mode;
299 1.1.4.2 nathanw *((flsc_regmap_p)sc->sc_fas)->hardbits = spec->portbits;
300 1.1.4.2 nathanw #endif
301 1.1.4.2 nathanw }
302 1.1.4.2 nathanw
303 1.1.4.2 nathanw /* Initialize DMA for transfer */
304 1.1.4.2 nathanw int
305 1.1.4.2 nathanw ptsc_setup_dma(sc, ptr, len, mode)
306 1.1.4.2 nathanw struct sfas_softc *sc;
307 1.1.4.2 nathanw void *ptr;
308 1.1.4.2 nathanw int len;
309 1.1.4.2 nathanw int mode;
310 1.1.4.2 nathanw {
311 1.1.4.2 nathanw int retval;
312 1.1.4.2 nathanw
313 1.1.4.2 nathanw retval = 0;
314 1.1.4.2 nathanw
315 1.1.4.2 nathanw #if 0
316 1.1.4.2 nathanw printf("ptsc_setup_dma(sc, ptr = 0x%08x, len = 0x%08x, mode = 0x%08x)\n", (u_int)ptr, len, mode);
317 1.1.4.2 nathanw #endif
318 1.1.4.2 nathanw return(0);
319 1.1.4.2 nathanw
320 1.1.4.2 nathanw #if 0
321 1.1.4.2 nathanw switch(mode) {
322 1.1.4.2 nathanw case SFAS_DMA_READ:
323 1.1.4.2 nathanw case SFAS_DMA_WRITE:
324 1.1.4.2 nathanw flsc_set_dma_adr(sc, ptr);
325 1.1.4.2 nathanw if (mode == SFAS_DMA_READ)
326 1.1.4.2 nathanw flsc_set_dma_mode(sc,FLSC_PB_ENABLE_DMA | FLSC_PB_DMA_READ);
327 1.1.4.2 nathanw else
328 1.1.4.2 nathanw flsc_set_dma_mode(sc,FLSC_PB_ENABLE_DMA | FLSC_PB_DMA_WRITE);
329 1.1.4.2 nathanw
330 1.1.4.2 nathanw flsc_set_dma_tc(sc, len);
331 1.1.4.2 nathanw break;
332 1.1.4.2 nathanw
333 1.1.4.2 nathanw case SFAS_DMA_CLEAR:
334 1.1.4.2 nathanw default:
335 1.1.4.2 nathanw flsc_set_dma_mode(sc, FLSC_PB_DISABLE_DMA);
336 1.1.4.2 nathanw flsc_set_dma_adr(sc, 0);
337 1.1.4.2 nathanw
338 1.1.4.2 nathanw retval = (*sc->sc_fas->sfas_tc_high << 16) |
339 1.1.4.2 nathanw (*sc->sc_fas->sfas_tc_mid << 8) |
340 1.1.4.2 nathanw *sc->sc_fas->sfas_tc_low;
341 1.1.4.2 nathanw
342 1.1.4.2 nathanw flsc_set_dma_tc(sc, 0);
343 1.1.4.2 nathanw break;
344 1.1.4.2 nathanw }
345 1.1.4.2 nathanw
346 1.1.4.2 nathanw return(retval);
347 1.1.4.2 nathanw #endif
348 1.1.4.2 nathanw }
349 1.1.4.2 nathanw
350 1.1.4.2 nathanw /* Check if address and len is ok for DMA transfer */
351 1.1.4.2 nathanw int
352 1.1.4.2 nathanw ptsc_need_bump(sc, ptr, len)
353 1.1.4.2 nathanw struct sfas_softc *sc;
354 1.1.4.2 nathanw void *ptr;
355 1.1.4.2 nathanw int len;
356 1.1.4.2 nathanw {
357 1.1.4.2 nathanw int p;
358 1.1.4.2 nathanw
359 1.1.4.2 nathanw p = (int)ptr & 0x03;
360 1.1.4.2 nathanw
361 1.1.4.2 nathanw if (p) {
362 1.1.4.2 nathanw p = 4-p;
363 1.1.4.2 nathanw
364 1.1.4.2 nathanw if (len < 256)
365 1.1.4.2 nathanw p = len;
366 1.1.4.2 nathanw }
367 1.1.4.2 nathanw
368 1.1.4.2 nathanw return(p);
369 1.1.4.2 nathanw }
370 1.1.4.2 nathanw
371 1.1.4.2 nathanw /* Interrupt driven routines */
372 1.1.4.2 nathanw int
373 1.1.4.2 nathanw ptsc_build_dma_chain(sc, chain, p, l)
374 1.1.4.2 nathanw struct sfas_softc *sc;
375 1.1.4.2 nathanw struct sfas_dma_chain *chain;
376 1.1.4.2 nathanw void *p;
377 1.1.4.2 nathanw int l;
378 1.1.4.2 nathanw {
379 1.1.4.2 nathanw #if 0
380 1.1.4.2 nathanw vm_offset_t pa, lastpa;
381 1.1.4.2 nathanw char *ptr;
382 1.1.4.2 nathanw int len, prelen, postlen, max_t, n;
383 1.1.4.2 nathanw #endif
384 1.1.4.2 nathanw #if 0
385 1.1.4.2 nathanw printf("ptsc_build_dma_chain()\n");
386 1.1.4.2 nathanw #endif
387 1.1.4.2 nathanw return(0);
388 1.1.4.2 nathanw
389 1.1.4.2 nathanw #if 0
390 1.1.4.2 nathanw if (l == 0)
391 1.1.4.2 nathanw return(0);
392 1.1.4.2 nathanw
393 1.1.4.2 nathanw #define set_link(n, p, l, f)\
394 1.1.4.2 nathanw do { chain[n].ptr = (p); chain[n].len = (l); chain[n++].flg = (f); } while(0)
395 1.1.4.2 nathanw
396 1.1.4.2 nathanw n = 0;
397 1.1.4.2 nathanw
398 1.1.4.2 nathanw if (l < 512)
399 1.1.4.2 nathanw set_link(n, (vm_offset_t)p, l, SFAS_CHAIN_BUMP);
400 1.1.4.2 nathanw else if (p >= (void *)0xFF000000) {
401 1.1.4.2 nathanw while(l != 0) {
402 1.1.4.2 nathanw len = ((l > sc->sc_bump_sz) ? sc->sc_bump_sz : l);
403 1.1.4.2 nathanw
404 1.1.4.2 nathanw set_link(n, (vm_offset_t)p, len, SFAS_CHAIN_BUMP);
405 1.1.4.2 nathanw
406 1.1.4.2 nathanw p += len;
407 1.1.4.2 nathanw l -= len;
408 1.1.4.2 nathanw }
409 1.1.4.2 nathanw } else {
410 1.1.4.2 nathanw ptr = p;
411 1.1.4.2 nathanw len = l;
412 1.1.4.2 nathanw
413 1.1.4.2 nathanw pa = kvtop(ptr);
414 1.1.4.2 nathanw prelen = ((int)ptr & 0x03);
415 1.1.4.2 nathanw
416 1.1.4.2 nathanw if (prelen) {
417 1.1.4.2 nathanw prelen = 4-prelen;
418 1.1.4.2 nathanw set_link(n, (vm_offset_t)ptr, prelen, SFAS_CHAIN_BUMP);
419 1.1.4.2 nathanw ptr += prelen;
420 1.1.4.2 nathanw len -= prelen;
421 1.1.4.2 nathanw }
422 1.1.4.2 nathanw
423 1.1.4.2 nathanw lastpa = 0;
424 1.1.4.2 nathanw while(len > 3) {
425 1.1.4.2 nathanw pa = kvtop(ptr);
426 1.1.4.2 nathanw max_t = NBPG - (pa & PGOFSET);
427 1.1.4.2 nathanw if (max_t > len)
428 1.1.4.2 nathanw max_t = len;
429 1.1.4.2 nathanw
430 1.1.4.2 nathanw max_t &= ~3;
431 1.1.4.2 nathanw
432 1.1.4.2 nathanw if (lastpa == pa)
433 1.1.4.2 nathanw sc->sc_chain[n-1].len += max_t;
434 1.1.4.2 nathanw else
435 1.1.4.2 nathanw set_link(n, pa, max_t, SFAS_CHAIN_DMA);
436 1.1.4.2 nathanw
437 1.1.4.2 nathanw lastpa = pa+max_t;
438 1.1.4.2 nathanw
439 1.1.4.2 nathanw ptr += max_t;
440 1.1.4.2 nathanw len -= max_t;
441 1.1.4.2 nathanw }
442 1.1.4.2 nathanw
443 1.1.4.2 nathanw if (len)
444 1.1.4.2 nathanw set_link(n, (vm_offset_t)ptr, len, SFAS_CHAIN_BUMP);
445 1.1.4.2 nathanw }
446 1.1.4.2 nathanw
447 1.1.4.2 nathanw return(n);
448 1.1.4.2 nathanw #endif
449 1.1.4.2 nathanw }
450 1.1.4.2 nathanw
451 1.1.4.2 nathanw /* Turn on/off led */
452 1.1.4.2 nathanw void
453 1.1.4.2 nathanw ptsc_led(sc, mode)
454 1.1.4.2 nathanw struct sfas_softc *sc;
455 1.1.4.2 nathanw int mode;
456 1.1.4.2 nathanw {
457 1.1.4.2 nathanw ptsc_regmap_p rp;
458 1.1.4.2 nathanw
459 1.1.4.2 nathanw rp = (ptsc_regmap_p)sc->sc_fas;
460 1.1.4.2 nathanw
461 1.1.4.2 nathanw if (mode) {
462 1.1.4.2 nathanw sc->sc_led_status++;
463 1.1.4.2 nathanw } else {
464 1.1.4.2 nathanw if (sc->sc_led_status)
465 1.1.4.2 nathanw sc->sc_led_status--;
466 1.1.4.2 nathanw }
467 1.1.4.2 nathanw *rp->led = (sc->sc_led_status?1:0);
468 1.1.4.2 nathanw }
469 1.1.4.2 nathanw
470 1.1.4.2 nathanw void
471 1.1.4.2 nathanw ptsc_scsi_request(chan, req, arg)
472 1.1.4.2 nathanw struct scsipi_channel *chan;
473 1.1.4.2 nathanw scsipi_adapter_req_t req;
474 1.1.4.2 nathanw void *arg;
475 1.1.4.2 nathanw {
476 1.1.4.2 nathanw struct scsipi_xfer *xs;
477 1.1.4.2 nathanw
478 1.1.4.2 nathanw switch (req) {
479 1.1.4.2 nathanw case ADAPTER_REQ_RUN_XFER:
480 1.1.4.2 nathanw xs = arg;
481 1.1.4.2 nathanw /* ensure command is polling for the moment */
482 1.1.4.2 nathanw #if PTSC_POLL > 0
483 1.1.4.2 nathanw xs->xs_control |= XS_CTL_POLL;
484 1.1.4.2 nathanw #endif
485 1.1.4.2 nathanw #if 0
486 1.1.4.2 nathanw printf("Opcode %d\n", (int)(xs->cmd->opcode));
487 1.1.4.2 nathanw #endif
488 1.1.4.2 nathanw default:
489 1.1.4.2 nathanw }
490 1.1.4.2 nathanw sfas_scsi_request(chan, req, arg);
491 1.1.4.2 nathanw }
492