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sbicvar.h revision 1.1
      1 /* $NetBSD: sbicvar.h,v 1.1 2001/10/05 22:27:59 reinoud Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1990 The Regents of the University of California.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to Berkeley by
      8  * Van Jacobson of Lawrence Berkeley Laboratory.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *	This product includes software developed by the University of
     21  *	California, Berkeley and its contributors.
     22  * 4. Neither the name of the University nor the names of its contributors
     23  *    may be used to endorse or promote products derived from this software
     24  *    without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     27  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     28  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     29  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     30  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     31  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     32  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     33  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     34  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     35  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     36  * SUCH DAMAGE.
     37  *
     38  *	@(#)scsivar.h	7.1 (Berkeley) 5/8/90
     39  */
     40 
     41 #ifndef _SBICVAR_H_
     42 #define _SBICVAR_H_
     43 #include <sys/malloc.h>
     44 #include <sys/callout.h>
     45 
     46 /*
     47  * ACB. Holds additional information for each SCSI command Comments: We
     48  * need a separate scsi command block because we may need to overwrite it
     49  * with a request sense command.  Basicly, we refrain from fiddling with
     50  * the scsi_xfer struct (except do the expected updating of return values).
     51  * We'll generally update: xs->{flags,resid,error,sense,status} and
     52  * occasionally xs->retries.
     53  */
     54 struct sbic_acb {
     55 	TAILQ_ENTRY(sbic_acb) chain;
     56 	struct scsipi_xfer *xs;		/* SCSI xfer ctrl block from above */
     57 	int		flags;		/* Status */
     58 #define ACB_FREE	0x00
     59 #define ACB_ACTIVE	0x01
     60 #define ACB_DONE	0x02
     61 #define ACB_DATAIN	0x04		/* DMA direction flag */
     62 #define	ACB_DMA		0x08		/* ACB using DMA this time */
     63 	struct scsi_generic cmd;	/* SCSI command block */
     64 	int	 	clen;
     65 	bus_dmamap_t	dmamap_xfer;	/* Handle for dma */
     66 	u_char	       *data;		/* Data buffer... */
     67 	int		datalen;	/* ... and its length. */
     68 	int		offset;
     69 	u_long		sc_tcnt;	/* number of bytes for this DMA */
     70 };
     71 
     72 /*
     73  * Some info about each (possible) target on the SCSI bus.  This should
     74  * probably have been a "per target+lunit" structure, but we'll leave it at
     75  * this for now.  Is there a way to reliably hook it up to sc->fordriver??
     76  */
     77 struct sbic_tinfo {
     78 	int	cmds;		/* #commands processed */
     79 	int	dconns;		/* #disconnects */
     80 	int	touts;		/* #timeouts */
     81 	int	perrs;		/* #parity errors */
     82 	u_char*	bounce;		/* Bounce buffer for this device */
     83 	ushort	lubusy;		/* What local units/subr. are busy? */
     84 	u_char  flags;
     85 	u_char  period;		/* Period suggestion */
     86 	u_char  offset;		/* Offset suggestion */
     87 } tinfo_t;
     88 
     89 struct	sbic_softc {
     90 	struct	device sc_dev;
     91 /*	struct	isr sc_isr;*/
     92 	struct  callout sc_timo_ch;
     93 	struct	target_sync {
     94 		u_char	state;
     95 		u_char	period;
     96 		u_char	offset;
     97 	} sc_sync[8];
     98 	u_char	target;			/* Currently active target */
     99 	u_char  lun;
    100 	struct	scsipi_channel sc_channel;
    101 	struct	scsipi_adapter sc_adapter;
    102 	sbic_regmap	sc_sbicp;	/* Handle for the SBIC */
    103 
    104 	volatile void 	*sc_cregs;	/* driver specific regs */
    105 
    106 	/* Lists of command blocks */
    107 	TAILQ_HEAD(acb_list, sbic_acb) free_list,
    108 				       ready_list,
    109 				       nexus_list;
    110 
    111 	struct sbic_acb *sc_nexus;	/* current command */
    112 	struct sbic_acb sc_acb[8];	/* the real command blocks */
    113 	struct sbic_tinfo sc_tinfo[8];
    114 
    115 	u_char	sc_flags;
    116 	u_char	sc_scsiaddr;
    117 	u_char	sc_stat[2];
    118 	u_char	sc_msg[7];
    119 	u_long	sc_clkfreq;
    120 
    121 	int	sc_dmaflags;		/* Target-specific busdma flags */
    122 	void	*sc_dmah;		/* Interface specific dma handle */
    123 	bus_dma_tag_t sc_dmat;		/* Tag for dma accesses */
    124 	int	sc_max_dmalen;		/* Maximum DMA segment length */
    125 	int	sc_dmamode;		/* Machine-specific DMA mode for
    126 					   the SBIC chip */
    127 
    128 	u_short	sc_dmatimo;		/* dma timeout */
    129 	int  (*sc_dmaok)     (void *, bus_dma_tag_t, struct sbic_acb *);
    130 	int  (*sc_dmasetup)  (void *, bus_dma_tag_t, struct sbic_acb *, int);
    131 	int  (*sc_dmanext)   (void *, bus_dma_tag_t, struct sbic_acb *, int);
    132 	void (*sc_dmastop)   (void *, bus_dma_tag_t, struct sbic_acb *);
    133 	void (*sc_dmafinish) (void *, bus_dma_tag_t, struct sbic_acb *);
    134 	void (*sc_enintr)    (struct sbic_softc *);
    135 };
    136 
    137 /* sc_flags */
    138 #define	SBICF_ALIVE	0x01	/* controller initialized */
    139 #define SBICF_SELECTED	0x02	/* bus is in selected state. */
    140 #define SBICF_ICMD	0x04	/* Immediate command in execution */
    141 #define SBICF_BADDMA	0x08	/* controller can only DMA to ztwobus space */
    142 #define SBICF_NODMA	0x10	/* Don't use DMA */
    143 #define	SBICF_INTR	0x20	/* SBICF interrupt expected */
    144 #define	SBICF_INDMA	0x40	/* not used yet, DMA I/O in progress */
    145 
    146 /* sync states */
    147 #define SYNC_START	0	/* no sync handshake started */
    148 #define SYNC_SENT	1	/* we sent sync request, no answer yet */
    149 #define SYNC_DONE	2	/* target accepted our (or inferior) settings,
    150 				   or it rejected the request and we stay
    151 				   async */
    152 #ifdef DEBUG
    153 #define	DDB_FOLLOW	0x04
    154 #define DDB_IO		0x08
    155 #endif
    156 extern u_char sbic_inhibit_sync[8];
    157 extern int sbic_no_dma;
    158 extern int sbic_clock_override;
    159 
    160 #define	PHASE_MASK	0x07		/* mask for psns/pctl phase */
    161 #define	DATA_OUT_PHASE	0x00
    162 #define	DATA_IN_PHASE	0x01
    163 #define	CMD_PHASE	0x02
    164 #define	STATUS_PHASE	0x03
    165 #define	BUS_FREE_PHASE	0x04
    166 #define	ARB_SEL_PHASE	0x05	/* Fuji chip combines arbitration with sel. */
    167 #define	MESG_OUT_PHASE	0x06
    168 #define	MESG_IN_PHASE	0x07
    169 
    170 #define	MSG_CMD_COMPLETE	0x00
    171 #define MSG_EXT_MESSAGE		0x01
    172 #define	MSG_SAVE_DATA_PTR	0x02
    173 #define	MSG_RESTORE_PTR		0x03
    174 #define	MSG_DISCONNECT		0x04
    175 #define	MSG_INIT_DETECT_ERROR	0x05
    176 #define	MSG_ABORT		0x06
    177 #define	MSG_REJECT		0x07
    178 #define	MSG_NOOP		0x08
    179 #define	MSG_PARITY_ERROR	0x09
    180 #define	MSG_BUS_DEVICE_RESET	0x0C
    181 #define	MSG_IDENTIFY		0x80
    182 #define	MSG_IDENTIFY_DR		0xc0	/* (disconnect/reconnect allowed) */
    183 #define	MSG_SYNC_REQ 		0x01
    184 
    185 #define MSG_ISIDENTIFY(x) (x&MSG_IDENTIFY)
    186 #define IFY_TRN		0x20
    187 #define IFY_LUNTRN(x)	(x&0x07)
    188 #define IFY_LUN(x)	(!(x&0x20))
    189 
    190 /* Check if high bit set */
    191 
    192 #define	STS_CHECKCOND	0x02	/* Check Condition (ie., read sense) */
    193 #define	STS_CONDMET	0x04	/* Condition Met (ie., search worked) */
    194 #define	STS_BUSY	0x08
    195 #define	STS_INTERMED	0x10	/* Intermediate status sent */
    196 #define	STS_EXT		0x80	/* Extended status valid */
    197 
    198 
    199 /* States returned by our state machine */
    200 
    201 #define SBIC_STATE_ERROR	-1
    202 #define SBIC_STATE_DONE		0
    203 #define SBIC_STATE_RUNNING	1
    204 #define SBIC_STATE_DISCONNECT	2
    205 
    206 /*
    207  * XXXX
    208  */
    209 struct scsi_fmt_cdb {
    210 	int len;		/* cdb length (in bytes) */
    211 	u_char cdb[28];		/* cdb to use on next read/write */
    212 };
    213 
    214 struct buf;
    215 struct scsipi_xfer;
    216 
    217 void sbic_minphys	(struct buf *bp);
    218 void sbic_scsi_request	(struct scsipi_channel *,
    219 				scsipi_adapter_req_t, void *);
    220 int  sbicinit		(struct sbic_softc *dev);
    221 int  sbicintr 		(struct sbic_softc *);
    222 void sbic_dump		(struct sbic_softc *dev);
    223 
    224 #endif /* _SBICVAR_H_ */
    225