sfas.c revision 1.1.4.2 1 1.1.4.2 nathanw /* $NetBSD: sfas.c,v 1.1.4.2 2002/01/08 00:22:47 nathanw Exp $ */
2 1.1.4.2 nathanw
3 1.1.4.2 nathanw /*
4 1.1.4.2 nathanw * Copyright (c) 1995 Scott Stevens
5 1.1.4.2 nathanw * Copyright (c) 1995 Daniel Widenfalk
6 1.1.4.2 nathanw * Copyright (c) 1994 Christian E. Hopps
7 1.1.4.2 nathanw * Copyright (c) 1990 The Regents of the University of California.
8 1.1.4.2 nathanw * All rights reserved.
9 1.1.4.2 nathanw *
10 1.1.4.2 nathanw * This code is derived from software contributed to Berkeley by
11 1.1.4.2 nathanw * Van Jacobson of Lawrence Berkeley Laboratory.
12 1.1.4.2 nathanw *
13 1.1.4.2 nathanw * Redistribution and use in source and binary forms, with or without
14 1.1.4.2 nathanw * modification, are permitted provided that the following conditions
15 1.1.4.2 nathanw * are met:
16 1.1.4.2 nathanw * 1. Redistributions of source code must retain the above copyright
17 1.1.4.2 nathanw * notice, this list of conditions and the following disclaimer.
18 1.1.4.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
19 1.1.4.2 nathanw * notice, this list of conditions and the following disclaimer in the
20 1.1.4.2 nathanw * documentation and/or other materials provided with the distribution.
21 1.1.4.2 nathanw * 3. All advertising materials mentioning features or use of this software
22 1.1.4.2 nathanw * must display the following acknowledgement:
23 1.1.4.2 nathanw * This product includes software developed by the University of
24 1.1.4.2 nathanw * California, Berkeley and its contributors.
25 1.1.4.2 nathanw * 4. Neither the name of the University nor the names of its contributors
26 1.1.4.2 nathanw * may be used to endorse or promote products derived from this software
27 1.1.4.2 nathanw * without specific prior written permission.
28 1.1.4.2 nathanw *
29 1.1.4.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
30 1.1.4.2 nathanw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31 1.1.4.2 nathanw * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
32 1.1.4.2 nathanw * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
33 1.1.4.2 nathanw * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 1.1.4.2 nathanw * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
35 1.1.4.2 nathanw * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36 1.1.4.2 nathanw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 1.1.4.2 nathanw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
38 1.1.4.2 nathanw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 1.1.4.2 nathanw * SUCH DAMAGE.
40 1.1.4.2 nathanw *
41 1.1.4.2 nathanw * @(#)scsi.c 7.5 (Berkeley) 5/4/91
42 1.1.4.2 nathanw */
43 1.1.4.2 nathanw
44 1.1.4.2 nathanw /*
45 1.1.4.2 nathanw * Emulex FAS216 scsi adaptor driver
46 1.1.4.2 nathanw */
47 1.1.4.2 nathanw
48 1.1.4.2 nathanw /*
49 1.1.4.2 nathanw * Modified for NetBSD/arm32 by Scott Stevens
50 1.1.4.2 nathanw */
51 1.1.4.2 nathanw
52 1.1.4.2 nathanw #include <sys/param.h>
53 1.1.4.2 nathanw #include <sys/systm.h>
54 1.1.4.2 nathanw #include <sys/device.h>
55 1.1.4.2 nathanw #include <sys/buf.h>
56 1.1.4.2 nathanw #include <sys/proc.h>
57 1.1.4.2 nathanw
58 1.1.4.2 nathanw #include <dev/scsipi/scsi_all.h>
59 1.1.4.2 nathanw #include <dev/scsipi/scsipi_all.h>
60 1.1.4.2 nathanw #include <dev/scsipi/scsiconf.h>
61 1.1.4.2 nathanw
62 1.1.4.2 nathanw #include <uvm/uvm_extern.h>
63 1.1.4.2 nathanw
64 1.1.4.2 nathanw #include <machine/pmap.h>
65 1.1.4.2 nathanw #include <machine/cpu.h>
66 1.1.4.2 nathanw #include <machine/io.h>
67 1.1.4.2 nathanw #include <machine/intr.h>
68 1.1.4.2 nathanw #include <arm/arm32/katelib.h>
69 1.1.4.2 nathanw #include <acorn32/podulebus/podulebus.h>
70 1.1.4.2 nathanw #include <acorn32/podulebus/sfasreg.h>
71 1.1.4.2 nathanw #include <acorn32/podulebus/sfasvar.h>
72 1.1.4.2 nathanw
73 1.1.4.2 nathanw /* Externs */
74 1.1.4.2 nathanw extern pt_entry_t *pmap_pte __P((pmap_t, vm_offset_t));
75 1.1.4.2 nathanw
76 1.1.4.2 nathanw void sfasinitialize __P((struct sfas_softc *));
77 1.1.4.2 nathanw void sfas_minphys __P((struct buf *bp));
78 1.1.4.2 nathanw void sfas_scsi_request __P((struct scsipi_channel *,
79 1.1.4.2 nathanw scsipi_adapter_req_t, void *));
80 1.1.4.2 nathanw void sfas_donextcmd __P((struct sfas_softc *dev, struct sfas_pending *pendp));
81 1.1.4.2 nathanw void sfas_scsidone __P((struct sfas_softc *dev, struct scsipi_xfer *xs,
82 1.1.4.2 nathanw int stat));
83 1.1.4.2 nathanw void sfasintr __P((struct sfas_softc *dev));
84 1.1.4.2 nathanw void sfasiwait __P((struct sfas_softc *dev));
85 1.1.4.2 nathanw void sfas_ixfer __P((struct sfas_softc *dev, int polling));
86 1.1.4.2 nathanw void sfasreset __P((struct sfas_softc *dev, int how));
87 1.1.4.2 nathanw int sfasselect __P((struct sfas_softc *dev, struct sfas_pending *pendp,
88 1.1.4.2 nathanw unsigned char *cbuf, int clen,
89 1.1.4.2 nathanw unsigned char *buf, int len, int mode));
90 1.1.4.2 nathanw void sfasicmd __P((struct sfas_softc *dev, struct sfas_pending *pendp));
91 1.1.4.2 nathanw void sfasgo __P((struct sfas_softc *dev, struct sfas_pending *pendp));
92 1.1.4.2 nathanw
93 1.1.4.2 nathanw /*
94 1.1.4.2 nathanw * Initialize these to make 'em patchable. Defaults to enable sync and discon.
95 1.1.4.2 nathanw */
96 1.1.4.2 nathanw u_char sfas_inhibit_sync[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
97 1.1.4.2 nathanw u_char sfas_inhibit_disc[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
98 1.1.4.2 nathanw
99 1.1.4.2 nathanw #define DEBUG
100 1.1.4.2 nathanw #ifdef DEBUG
101 1.1.4.2 nathanw #define QPRINTF(a) if (sfas_debug > 1) printf a
102 1.1.4.2 nathanw int sfas_debug = 2;
103 1.1.4.2 nathanw #else
104 1.1.4.2 nathanw #define QPRINTF
105 1.1.4.2 nathanw #endif
106 1.1.4.2 nathanw
107 1.1.4.2 nathanw /*
108 1.1.4.2 nathanw * default minphys routine for sfas based controllers
109 1.1.4.2 nathanw */
110 1.1.4.2 nathanw void
111 1.1.4.2 nathanw sfas_minphys(bp)
112 1.1.4.2 nathanw struct buf *bp;
113 1.1.4.2 nathanw {
114 1.1.4.2 nathanw
115 1.1.4.2 nathanw /*
116 1.1.4.2 nathanw * No max transfer at this level.
117 1.1.4.2 nathanw */
118 1.1.4.2 nathanw minphys(bp);
119 1.1.4.2 nathanw }
120 1.1.4.2 nathanw
121 1.1.4.2 nathanw /*
122 1.1.4.2 nathanw * Initialize the nexus structs.
123 1.1.4.2 nathanw */
124 1.1.4.2 nathanw void
125 1.1.4.2 nathanw sfas_init_nexus(dev, nexus)
126 1.1.4.2 nathanw struct sfas_softc *dev;
127 1.1.4.2 nathanw struct nexus *nexus;
128 1.1.4.2 nathanw {
129 1.1.4.2 nathanw bzero(nexus, sizeof(struct nexus));
130 1.1.4.2 nathanw
131 1.1.4.2 nathanw nexus->state = SFAS_NS_IDLE;
132 1.1.4.2 nathanw nexus->period = 200;
133 1.1.4.2 nathanw nexus->offset = 0;
134 1.1.4.2 nathanw nexus->syncper = 5;
135 1.1.4.2 nathanw nexus->syncoff = 0;
136 1.1.4.2 nathanw nexus->config3 = dev->sc_config3 & ~SFAS_CFG3_FASTSCSI;
137 1.1.4.2 nathanw }
138 1.1.4.2 nathanw
139 1.1.4.2 nathanw void
140 1.1.4.2 nathanw sfasinitialize(dev)
141 1.1.4.2 nathanw struct sfas_softc *dev;
142 1.1.4.2 nathanw {
143 1.1.4.2 nathanw u_int *pte;
144 1.1.4.2 nathanw int i;
145 1.1.4.2 nathanw
146 1.1.4.2 nathanw dev->sc_led_status = 0;
147 1.1.4.2 nathanw
148 1.1.4.2 nathanw TAILQ_INIT(&dev->sc_xs_pending);
149 1.1.4.2 nathanw TAILQ_INIT(&dev->sc_xs_free);
150 1.1.4.2 nathanw
151 1.1.4.2 nathanw /*
152 1.1.4.2 nathanw * Initialize the sfas_pending structs and link them into the free list. We
153 1.1.4.2 nathanw * have to set vm_link_data.pages to 0 or the vm FIX won't work.
154 1.1.4.2 nathanw */
155 1.1.4.2 nathanw for(i=0; i<MAXPENDING; i++) {
156 1.1.4.2 nathanw TAILQ_INSERT_TAIL(&dev->sc_xs_free, &dev->sc_xs_store[i],
157 1.1.4.2 nathanw link);
158 1.1.4.2 nathanw }
159 1.1.4.2 nathanw
160 1.1.4.2 nathanw /*
161 1.1.4.2 nathanw * Calculate the correct clock conversion factor 2 <= factor <= 8, i.e. set
162 1.1.4.2 nathanw * the factor to clock_freq / 5 (int).
163 1.1.4.2 nathanw */
164 1.1.4.2 nathanw if (dev->sc_clock_freq <= 10)
165 1.1.4.2 nathanw dev->sc_clock_conv_fact = 2;
166 1.1.4.2 nathanw if (dev->sc_clock_freq <= 40)
167 1.1.4.2 nathanw dev->sc_clock_conv_fact = 2+((dev->sc_clock_freq-10)/5);
168 1.1.4.2 nathanw else
169 1.1.4.2 nathanw panic("sfasinitialize: Clock frequence too high");
170 1.1.4.2 nathanw
171 1.1.4.2 nathanw /* Setup and save the basic configuration registers */
172 1.1.4.2 nathanw dev->sc_config1 = (dev->sc_host_id & SFAS_CFG1_BUS_ID_MASK);
173 1.1.4.2 nathanw dev->sc_config2 = SFAS_CFG2_FEATURES_ENABLE;
174 1.1.4.2 nathanw dev->sc_config3 = (dev->sc_clock_freq > 25 ? SFAS_CFG3_FASTCLK : 0);
175 1.1.4.2 nathanw
176 1.1.4.2 nathanw /* Precalculate timeout value and clock period. */
177 1.1.4.2 nathanw /* Ekkk ... floating point in the kernel !!!! */
178 1.1.4.2 nathanw /* dev->sc_timeout_val = 1+dev->sc_timeout*dev->sc_clock_freq/
179 1.1.4.2 nathanw (7.682*dev->sc_clock_conv_fact);*/
180 1.1.4.2 nathanw dev->sc_timeout_val = 1+dev->sc_timeout*dev->sc_clock_freq/
181 1.1.4.2 nathanw ((7682*dev->sc_clock_conv_fact)/1000);
182 1.1.4.2 nathanw dev->sc_clock_period = 1000/dev->sc_clock_freq;
183 1.1.4.2 nathanw
184 1.1.4.2 nathanw sfasreset(dev, 1 | 2); /* Reset Chip and Bus */
185 1.1.4.2 nathanw
186 1.1.4.2 nathanw dev->sc_units_disconnected = 0;
187 1.1.4.2 nathanw dev->sc_msg_in_len = 0;
188 1.1.4.2 nathanw dev->sc_msg_out_len = 0;
189 1.1.4.2 nathanw
190 1.1.4.2 nathanw dev->sc_flags = 0;
191 1.1.4.2 nathanw
192 1.1.4.2 nathanw for(i=0; i<8; i++)
193 1.1.4.2 nathanw sfas_init_nexus(dev, &dev->sc_nexus[i]);
194 1.1.4.2 nathanw
195 1.1.4.2 nathanw if (dev->sc_ixfer == NULL)
196 1.1.4.2 nathanw dev->sc_ixfer = sfas_ixfer;
197 1.1.4.2 nathanw
198 1.1.4.2 nathanw /*
199 1.1.4.2 nathanw * Setup bump buffer.
200 1.1.4.2 nathanw */
201 1.1.4.2 nathanw dev->sc_bump_va = (u_char *)uvm_km_zalloc(kernel_map, dev->sc_bump_sz);
202 1.1.4.2 nathanw (void) pmap_extract(pmap_kernel(), (vaddr_t)dev->sc_bump_va,
203 1.1.4.2 nathanw (paddr_t *)&dev->sc_bump_pa);
204 1.1.4.2 nathanw
205 1.1.4.2 nathanw /*
206 1.1.4.2 nathanw * Setup pages to noncachable, that way we don't have to flush the cache
207 1.1.4.2 nathanw * every time we need "bumped" transfer.
208 1.1.4.2 nathanw */
209 1.1.4.2 nathanw pte = pmap_pte(pmap_kernel(), (vm_offset_t)dev->sc_bump_va);
210 1.1.4.2 nathanw *pte &= ~(PT_C | PT_B);
211 1.1.4.2 nathanw cpu_tlb_flushD();
212 1.1.4.2 nathanw cpu_cache_purgeD_rng((vm_offset_t)dev->sc_bump_va, NBPG);
213 1.1.4.2 nathanw
214 1.1.4.2 nathanw printf(" dmabuf V0x%08x P0x%08x", (u_int)dev->sc_bump_va, (u_int)dev->sc_bump_pa);
215 1.1.4.2 nathanw }
216 1.1.4.2 nathanw
217 1.1.4.2 nathanw
218 1.1.4.2 nathanw /*
219 1.1.4.2 nathanw * used by specific sfas controller
220 1.1.4.2 nathanw */
221 1.1.4.2 nathanw void
222 1.1.4.2 nathanw sfas_scsi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req,
223 1.1.4.2 nathanw void *arg)
224 1.1.4.2 nathanw {
225 1.1.4.2 nathanw struct scsipi_xfer *xs;
226 1.1.4.2 nathanw struct sfas_softc *dev = (void *)chan->chan_adapter->adapt_dev;
227 1.1.4.2 nathanw struct scsipi_periph *periph;
228 1.1.4.2 nathanw struct sfas_pending *pendp;
229 1.1.4.2 nathanw int flags, s, target;
230 1.1.4.2 nathanw
231 1.1.4.2 nathanw switch (req) {
232 1.1.4.2 nathanw case ADAPTER_REQ_RUN_XFER:
233 1.1.4.2 nathanw xs = arg;
234 1.1.4.2 nathanw periph = xs->xs_periph;
235 1.1.4.2 nathanw flags = xs->xs_control;
236 1.1.4.2 nathanw target = periph->periph_target;
237 1.1.4.2 nathanw
238 1.1.4.2 nathanw if (flags & XS_CTL_DATA_UIO)
239 1.1.4.2 nathanw panic("sfas: scsi data uio requested");
240 1.1.4.2 nathanw
241 1.1.4.2 nathanw if ((flags & XS_CTL_POLL) && (dev->sc_flags & SFAS_ACTIVE))
242 1.1.4.2 nathanw panic("sfas_scsicmd: busy");
243 1.1.4.2 nathanw
244 1.1.4.2 nathanw /* Get hold of a sfas_pending block. */
245 1.1.4.2 nathanw s = splbio();
246 1.1.4.2 nathanw pendp = dev->sc_xs_free.tqh_first;
247 1.1.4.2 nathanw if (pendp == NULL) {
248 1.1.4.2 nathanw xs->error = XS_RESOURCE_SHORTAGE;
249 1.1.4.2 nathanw scsipi_done(xs);
250 1.1.4.2 nathanw splx(s);
251 1.1.4.2 nathanw return;
252 1.1.4.2 nathanw }
253 1.1.4.2 nathanw TAILQ_REMOVE(&dev->sc_xs_free, pendp, link);
254 1.1.4.2 nathanw pendp->xs = xs;
255 1.1.4.2 nathanw splx(s);
256 1.1.4.2 nathanw
257 1.1.4.2 nathanw
258 1.1.4.2 nathanw /* If the chip if busy OR the unit is busy, we have to wait for out turn. */
259 1.1.4.2 nathanw if ((dev->sc_flags & SFAS_ACTIVE) ||
260 1.1.4.2 nathanw (dev->sc_nexus[target].flags & SFAS_NF_UNIT_BUSY)) {
261 1.1.4.2 nathanw s = splbio();
262 1.1.4.2 nathanw TAILQ_INSERT_TAIL(&dev->sc_xs_pending, pendp, link);
263 1.1.4.2 nathanw splx(s);
264 1.1.4.2 nathanw } else
265 1.1.4.2 nathanw sfas_donextcmd(dev, pendp);
266 1.1.4.2 nathanw
267 1.1.4.2 nathanw return;
268 1.1.4.2 nathanw
269 1.1.4.2 nathanw case ADAPTER_REQ_GROW_RESOURCES:
270 1.1.4.2 nathanw case ADAPTER_REQ_SET_XFER_MODE:
271 1.1.4.2 nathanw /* XXX Not supported. */
272 1.1.4.2 nathanw return;
273 1.1.4.2 nathanw }
274 1.1.4.2 nathanw }
275 1.1.4.2 nathanw
276 1.1.4.2 nathanw /*
277 1.1.4.2 nathanw * Actually select the unit, whereby the whole scsi-process is started.
278 1.1.4.2 nathanw */
279 1.1.4.2 nathanw void
280 1.1.4.2 nathanw sfas_donextcmd(dev, pendp)
281 1.1.4.2 nathanw struct sfas_softc *dev;
282 1.1.4.2 nathanw struct sfas_pending *pendp;
283 1.1.4.2 nathanw {
284 1.1.4.2 nathanw int s;
285 1.1.4.2 nathanw
286 1.1.4.2 nathanw /*
287 1.1.4.2 nathanw * Special case for scsi unit reset. I think this is waterproof. We first
288 1.1.4.2 nathanw * select the unit during splbio. We then cycle through the generated
289 1.1.4.2 nathanw * interrupts until the interrupt routine signals that the unit has
290 1.1.4.2 nathanw * acknowledged the reset. After that we have to wait a reset to select
291 1.1.4.2 nathanw * delay before anything else can happend.
292 1.1.4.2 nathanw */
293 1.1.4.2 nathanw if (pendp->xs->xs_control & XS_CTL_RESET) {
294 1.1.4.2 nathanw struct nexus *nexus;
295 1.1.4.2 nathanw
296 1.1.4.2 nathanw s = splbio();
297 1.1.4.2 nathanw while(!sfasselect(dev, pendp, 0, 0, 0, 0, SFAS_SELECT_K)) {
298 1.1.4.2 nathanw splx(s);
299 1.1.4.2 nathanw delay(10);
300 1.1.4.2 nathanw s = splbio();
301 1.1.4.2 nathanw }
302 1.1.4.2 nathanw
303 1.1.4.2 nathanw nexus = dev->sc_cur_nexus;
304 1.1.4.2 nathanw while(nexus->flags & SFAS_NF_UNIT_BUSY) {
305 1.1.4.2 nathanw sfasiwait(dev);
306 1.1.4.2 nathanw sfasintr(dev);
307 1.1.4.2 nathanw }
308 1.1.4.2 nathanw
309 1.1.4.2 nathanw nexus->flags |= SFAS_NF_UNIT_BUSY;
310 1.1.4.2 nathanw splx(s);
311 1.1.4.2 nathanw
312 1.1.4.2 nathanw sfasreset(dev, 0);
313 1.1.4.2 nathanw
314 1.1.4.2 nathanw s = splbio();
315 1.1.4.2 nathanw nexus->flags &= ~SFAS_NF_UNIT_BUSY;
316 1.1.4.2 nathanw splx(s);
317 1.1.4.2 nathanw }
318 1.1.4.2 nathanw
319 1.1.4.2 nathanw /*
320 1.1.4.2 nathanw * If we are polling, go to splbio and perform the command, else we poke
321 1.1.4.2 nathanw * the scsi-bus via sfasgo to get the interrupt machine going.
322 1.1.4.2 nathanw */
323 1.1.4.2 nathanw if (pendp->xs->xs_control & XS_CTL_POLL) {
324 1.1.4.2 nathanw s = splbio();
325 1.1.4.2 nathanw sfasicmd(dev, pendp);
326 1.1.4.2 nathanw TAILQ_INSERT_TAIL(&dev->sc_xs_free, pendp, link);
327 1.1.4.2 nathanw splx(s);
328 1.1.4.2 nathanw } else {
329 1.1.4.2 nathanw sfasgo(dev, pendp);
330 1.1.4.2 nathanw }
331 1.1.4.2 nathanw }
332 1.1.4.2 nathanw
333 1.1.4.2 nathanw void
334 1.1.4.2 nathanw sfas_scsidone(dev, xs, stat)
335 1.1.4.2 nathanw struct sfas_softc *dev;
336 1.1.4.2 nathanw struct scsipi_xfer *xs;
337 1.1.4.2 nathanw int stat;
338 1.1.4.2 nathanw {
339 1.1.4.2 nathanw struct sfas_pending *pendp;
340 1.1.4.2 nathanw int s;
341 1.1.4.2 nathanw
342 1.1.4.2 nathanw xs->status = stat;
343 1.1.4.2 nathanw
344 1.1.4.2 nathanw if (stat == 0)
345 1.1.4.2 nathanw xs->resid = 0;
346 1.1.4.2 nathanw else {
347 1.1.4.2 nathanw switch(stat) {
348 1.1.4.2 nathanw case SCSI_CHECK:
349 1.1.4.2 nathanw case SCSI_BUSY:
350 1.1.4.2 nathanw xs->error = XS_BUSY;
351 1.1.4.2 nathanw break;
352 1.1.4.2 nathanw case -1:
353 1.1.4.2 nathanw xs->error = XS_DRIVER_STUFFUP;
354 1.1.4.2 nathanw QPRINTF(("sfas_scsicmd() bad %x\n", stat));
355 1.1.4.2 nathanw break;
356 1.1.4.2 nathanw default:
357 1.1.4.2 nathanw xs->error = XS_TIMEOUT;
358 1.1.4.2 nathanw break;
359 1.1.4.2 nathanw }
360 1.1.4.2 nathanw }
361 1.1.4.2 nathanw
362 1.1.4.2 nathanw /* Steal the next command from the queue so that one unit can't hog the bus. */
363 1.1.4.2 nathanw s = splbio();
364 1.1.4.2 nathanw pendp = dev->sc_xs_pending.tqh_first;
365 1.1.4.2 nathanw while(pendp) {
366 1.1.4.2 nathanw if (!(dev->sc_nexus[pendp->xs->xs_periph->periph_target].flags &
367 1.1.4.2 nathanw SFAS_NF_UNIT_BUSY))
368 1.1.4.2 nathanw break;
369 1.1.4.2 nathanw pendp = pendp->link.tqe_next;
370 1.1.4.2 nathanw }
371 1.1.4.2 nathanw
372 1.1.4.2 nathanw if (pendp != NULL) {
373 1.1.4.2 nathanw TAILQ_REMOVE(&dev->sc_xs_pending, pendp, link);
374 1.1.4.2 nathanw }
375 1.1.4.2 nathanw
376 1.1.4.2 nathanw splx(s);
377 1.1.4.2 nathanw scsipi_done(xs);
378 1.1.4.2 nathanw
379 1.1.4.2 nathanw if (pendp)
380 1.1.4.2 nathanw sfas_donextcmd(dev, pendp);
381 1.1.4.2 nathanw }
382 1.1.4.2 nathanw
383 1.1.4.2 nathanw /*
384 1.1.4.2 nathanw * There are two kinds of reset:
385 1.1.4.2 nathanw * 1) CHIP-bus reset. This also implies a SCSI-bus reset.
386 1.1.4.2 nathanw * 2) SCSI-bus reset.
387 1.1.4.2 nathanw * After the appropriate resets have been performed we wait a reset to select
388 1.1.4.2 nathanw * delay time.
389 1.1.4.2 nathanw */
390 1.1.4.2 nathanw void
391 1.1.4.2 nathanw sfasreset(dev, how)
392 1.1.4.2 nathanw struct sfas_softc *dev;
393 1.1.4.2 nathanw int how;
394 1.1.4.2 nathanw {
395 1.1.4.2 nathanw sfas_regmap_p rp;
396 1.1.4.2 nathanw int i, s;
397 1.1.4.2 nathanw
398 1.1.4.2 nathanw rp = dev->sc_fas;
399 1.1.4.2 nathanw
400 1.1.4.2 nathanw if (how & 1) {
401 1.1.4.2 nathanw for(i=0; i<8; i++)
402 1.1.4.2 nathanw sfas_init_nexus(dev, &dev->sc_nexus[i]);
403 1.1.4.2 nathanw
404 1.1.4.2 nathanw *rp->sfas_command = SFAS_CMD_RESET_CHIP;
405 1.1.4.2 nathanw delay(1);
406 1.1.4.2 nathanw *rp->sfas_command = SFAS_CMD_NOP;
407 1.1.4.2 nathanw
408 1.1.4.2 nathanw *rp->sfas_config1 = dev->sc_config1;
409 1.1.4.2 nathanw *rp->sfas_config2 = dev->sc_config2;
410 1.1.4.2 nathanw *rp->sfas_config3 = dev->sc_config3;
411 1.1.4.2 nathanw *rp->sfas_timeout = dev->sc_timeout_val;
412 1.1.4.2 nathanw *rp->sfas_clkconv = dev->sc_clock_conv_fact &
413 1.1.4.2 nathanw SFAS_CLOCK_CONVERSION_MASK;
414 1.1.4.2 nathanw }
415 1.1.4.2 nathanw
416 1.1.4.2 nathanw if (how & 2) {
417 1.1.4.2 nathanw for(i=0; i<8; i++)
418 1.1.4.2 nathanw sfas_init_nexus(dev, &dev->sc_nexus[i]);
419 1.1.4.2 nathanw
420 1.1.4.2 nathanw s = splbio();
421 1.1.4.2 nathanw
422 1.1.4.2 nathanw *rp->sfas_command = SFAS_CMD_RESET_SCSI_BUS;
423 1.1.4.2 nathanw delay(100);
424 1.1.4.2 nathanw
425 1.1.4.2 nathanw /* Skip interrupt generated by RESET_SCSI_BUS */
426 1.1.4.2 nathanw while(*rp->sfas_status & SFAS_STAT_INTERRUPT_PENDING) {
427 1.1.4.2 nathanw dev->sc_status = *rp->sfas_status;
428 1.1.4.2 nathanw dev->sc_interrupt = *rp->sfas_interrupt;
429 1.1.4.2 nathanw
430 1.1.4.2 nathanw delay(100);
431 1.1.4.2 nathanw }
432 1.1.4.2 nathanw
433 1.1.4.2 nathanw dev->sc_status = *rp->sfas_status;
434 1.1.4.2 nathanw dev->sc_interrupt = *rp->sfas_interrupt;
435 1.1.4.2 nathanw
436 1.1.4.2 nathanw splx(s);
437 1.1.4.2 nathanw }
438 1.1.4.2 nathanw
439 1.1.4.2 nathanw if (dev->sc_config_flags & SFAS_SLOW_START)
440 1.1.4.2 nathanw delay(4*250000); /* RESET to SELECT DELAY*4 for slow devices */
441 1.1.4.2 nathanw else
442 1.1.4.2 nathanw delay(250000); /* RESET to SELECT DELAY */
443 1.1.4.2 nathanw }
444 1.1.4.2 nathanw
445 1.1.4.2 nathanw /*
446 1.1.4.2 nathanw * Save active data pointers to the nexus block currently active.
447 1.1.4.2 nathanw */
448 1.1.4.2 nathanw void
449 1.1.4.2 nathanw sfas_save_pointers(dev)
450 1.1.4.2 nathanw struct sfas_softc *dev;
451 1.1.4.2 nathanw {
452 1.1.4.2 nathanw struct nexus *nx;
453 1.1.4.2 nathanw
454 1.1.4.2 nathanw nx = dev->sc_cur_nexus;
455 1.1.4.2 nathanw if (nx) {
456 1.1.4.2 nathanw nx->cur_link = dev->sc_cur_link;
457 1.1.4.2 nathanw nx->max_link = dev->sc_max_link;
458 1.1.4.2 nathanw nx->buf = dev->sc_buf;
459 1.1.4.2 nathanw nx->len = dev->sc_len;
460 1.1.4.2 nathanw nx->dma_len = dev->sc_dma_len;
461 1.1.4.2 nathanw nx->dma_buf = dev->sc_dma_buf;
462 1.1.4.2 nathanw nx->dma_blk_flg = dev->sc_dma_blk_flg;
463 1.1.4.2 nathanw nx->dma_blk_len = dev->sc_dma_blk_len;
464 1.1.4.2 nathanw nx->dma_blk_ptr = dev->sc_dma_blk_ptr;
465 1.1.4.2 nathanw }
466 1.1.4.2 nathanw }
467 1.1.4.2 nathanw
468 1.1.4.2 nathanw /*
469 1.1.4.2 nathanw * Restore data pointers from the currently active nexus block.
470 1.1.4.2 nathanw */
471 1.1.4.2 nathanw void
472 1.1.4.2 nathanw sfas_restore_pointers(dev)
473 1.1.4.2 nathanw struct sfas_softc *dev;
474 1.1.4.2 nathanw {
475 1.1.4.2 nathanw struct nexus *nx;
476 1.1.4.2 nathanw
477 1.1.4.2 nathanw nx = dev->sc_cur_nexus;
478 1.1.4.2 nathanw if (nx) {
479 1.1.4.2 nathanw dev->sc_cur_link = nx->cur_link;
480 1.1.4.2 nathanw dev->sc_max_link = nx->max_link;
481 1.1.4.2 nathanw dev->sc_buf = nx->buf;
482 1.1.4.2 nathanw dev->sc_len = nx->len;
483 1.1.4.2 nathanw dev->sc_dma_len = nx->dma_len;
484 1.1.4.2 nathanw dev->sc_dma_buf = nx->dma_buf;
485 1.1.4.2 nathanw dev->sc_dma_blk_flg = nx->dma_blk_flg;
486 1.1.4.2 nathanw dev->sc_dma_blk_len = nx->dma_blk_len;
487 1.1.4.2 nathanw dev->sc_dma_blk_ptr = nx->dma_blk_ptr;
488 1.1.4.2 nathanw dev->sc_chain = nx->dma;
489 1.1.4.2 nathanw dev->sc_unit = (nx->lun_unit & 0x0F);
490 1.1.4.2 nathanw dev->sc_lun = (nx->lun_unit & 0xF0) >> 4;
491 1.1.4.2 nathanw }
492 1.1.4.2 nathanw }
493 1.1.4.2 nathanw
494 1.1.4.2 nathanw /*
495 1.1.4.2 nathanw * sfasiwait is used during interrupt and polled IO to wait for an event from
496 1.1.4.2 nathanw * the FAS chip. This function MUST NOT BE CALLED without interrupt disabled.
497 1.1.4.2 nathanw */
498 1.1.4.2 nathanw void
499 1.1.4.2 nathanw sfasiwait(dev)
500 1.1.4.2 nathanw struct sfas_softc *dev;
501 1.1.4.2 nathanw {
502 1.1.4.2 nathanw sfas_regmap_p rp;
503 1.1.4.2 nathanw
504 1.1.4.2 nathanw /*
505 1.1.4.2 nathanw * If SFAS_DONT_WAIT is set, we have already grabbed the interrupt info
506 1.1.4.2 nathanw * elsewhere. So we don't have to wait for it.
507 1.1.4.2 nathanw */
508 1.1.4.2 nathanw if (dev->sc_flags & SFAS_DONT_WAIT) {
509 1.1.4.2 nathanw dev->sc_flags &= ~SFAS_DONT_WAIT;
510 1.1.4.2 nathanw return;
511 1.1.4.2 nathanw }
512 1.1.4.2 nathanw
513 1.1.4.2 nathanw rp = dev->sc_fas;
514 1.1.4.2 nathanw
515 1.1.4.2 nathanw /* Wait for FAS chip to signal an interrupt. */
516 1.1.4.2 nathanw while(!(*rp->sfas_status & SFAS_STAT_INTERRUPT_PENDING))
517 1.1.4.2 nathanw delay(1);
518 1.1.4.2 nathanw
519 1.1.4.2 nathanw /* Grab interrupt info from chip. */
520 1.1.4.2 nathanw dev->sc_status = *rp->sfas_status;
521 1.1.4.2 nathanw dev->sc_interrupt = *rp->sfas_interrupt;
522 1.1.4.2 nathanw if (dev->sc_interrupt & SFAS_INT_RESELECTED) {
523 1.1.4.2 nathanw dev->sc_resel[0] = *rp->sfas_fifo;
524 1.1.4.2 nathanw dev->sc_resel[1] = *rp->sfas_fifo;
525 1.1.4.2 nathanw }
526 1.1.4.2 nathanw }
527 1.1.4.2 nathanw
528 1.1.4.2 nathanw /*
529 1.1.4.2 nathanw * Transfer info to/from device. sfas_ixfer uses polled IO+sfasiwait so the
530 1.1.4.2 nathanw * rules that apply to sfasiwait also applies here.
531 1.1.4.2 nathanw */
532 1.1.4.2 nathanw void
533 1.1.4.2 nathanw sfas_ixfer(dev, polling)
534 1.1.4.2 nathanw struct sfas_softc *dev;
535 1.1.4.2 nathanw int polling;
536 1.1.4.2 nathanw {
537 1.1.4.2 nathanw sfas_regmap_p rp;
538 1.1.4.2 nathanw u_char *buf;
539 1.1.4.2 nathanw int len, mode, phase;
540 1.1.4.2 nathanw
541 1.1.4.2 nathanw rp = dev->sc_fas;
542 1.1.4.2 nathanw buf = dev->sc_buf;
543 1.1.4.2 nathanw len = dev->sc_len;
544 1.1.4.2 nathanw
545 1.1.4.2 nathanw /*
546 1.1.4.2 nathanw * Decode the scsi phase to determine whether we are reading or writing.
547 1.1.4.2 nathanw * mode == 1 => READ, mode == 0 => WRITE
548 1.1.4.2 nathanw */
549 1.1.4.2 nathanw phase = dev->sc_status & SFAS_STAT_PHASE_MASK;
550 1.1.4.2 nathanw mode = (phase == SFAS_PHASE_DATA_IN);
551 1.1.4.2 nathanw
552 1.1.4.2 nathanw while(len && ((dev->sc_status & SFAS_STAT_PHASE_MASK) == phase))
553 1.1.4.2 nathanw if (mode) {
554 1.1.4.2 nathanw *rp->sfas_command = SFAS_CMD_TRANSFER_INFO;
555 1.1.4.2 nathanw
556 1.1.4.2 nathanw sfasiwait(dev);
557 1.1.4.2 nathanw
558 1.1.4.2 nathanw *buf++ = *rp->sfas_fifo;
559 1.1.4.2 nathanw len--;
560 1.1.4.2 nathanw } else {
561 1.1.4.2 nathanw len--;
562 1.1.4.2 nathanw *rp->sfas_fifo = *buf++;
563 1.1.4.2 nathanw *rp->sfas_command = SFAS_CMD_TRANSFER_INFO;
564 1.1.4.2 nathanw
565 1.1.4.2 nathanw sfasiwait(dev);
566 1.1.4.2 nathanw }
567 1.1.4.2 nathanw
568 1.1.4.2 nathanw /* Update buffer pointers to reflect the sent/received data. */
569 1.1.4.2 nathanw dev->sc_buf = buf;
570 1.1.4.2 nathanw dev->sc_len = len;
571 1.1.4.2 nathanw
572 1.1.4.2 nathanw /*
573 1.1.4.2 nathanw * Since the last sfasiwait will be a phase-change, we can't wait for it
574 1.1.4.2 nathanw * again later, so we have to signal that.
575 1.1.4.2 nathanw * Since this may be called from an interrupt initiated routine then we
576 1.1.4.2 nathanw * must call sfasintr again to avoid losing an interrupt. Phew!
577 1.1.4.2 nathanw */
578 1.1.4.2 nathanw if(polling)
579 1.1.4.2 nathanw dev->sc_flags |= SFAS_DONT_WAIT;
580 1.1.4.2 nathanw else
581 1.1.4.2 nathanw sfasintr(dev);
582 1.1.4.2 nathanw }
583 1.1.4.2 nathanw
584 1.1.4.2 nathanw /*
585 1.1.4.2 nathanw * Build a Synchronous Data Transfer Request message
586 1.1.4.2 nathanw */
587 1.1.4.2 nathanw void
588 1.1.4.2 nathanw sfas_build_sdtrm(dev, period, offset)
589 1.1.4.2 nathanw struct sfas_softc *dev;
590 1.1.4.2 nathanw int period;
591 1.1.4.2 nathanw int offset;
592 1.1.4.2 nathanw {
593 1.1.4.2 nathanw dev->sc_msg_out[0] = 0x01;
594 1.1.4.2 nathanw dev->sc_msg_out[1] = 0x03;
595 1.1.4.2 nathanw dev->sc_msg_out[2] = 0x01;
596 1.1.4.2 nathanw dev->sc_msg_out[3] = period/4;
597 1.1.4.2 nathanw dev->sc_msg_out[4] = offset;
598 1.1.4.2 nathanw dev->sc_msg_out_len= 5;
599 1.1.4.2 nathanw }
600 1.1.4.2 nathanw
601 1.1.4.2 nathanw /*
602 1.1.4.2 nathanw * Arbitate the scsi bus and select the unit
603 1.1.4.2 nathanw */
604 1.1.4.2 nathanw int
605 1.1.4.2 nathanw sfas_select_unit(dev, target)
606 1.1.4.2 nathanw struct sfas_softc *dev;
607 1.1.4.2 nathanw short target;
608 1.1.4.2 nathanw {
609 1.1.4.2 nathanw sfas_regmap_p rp;
610 1.1.4.2 nathanw struct nexus *nexus;
611 1.1.4.2 nathanw int s, retcode, i;
612 1.1.4.2 nathanw u_char cmd;
613 1.1.4.2 nathanw
614 1.1.4.2 nathanw s = splbio(); /* Do this at splbio so that we won't be disturbed. */
615 1.1.4.2 nathanw
616 1.1.4.2 nathanw retcode = 0;
617 1.1.4.2 nathanw
618 1.1.4.2 nathanw nexus = &dev->sc_nexus[target];
619 1.1.4.2 nathanw
620 1.1.4.2 nathanw /*
621 1.1.4.2 nathanw * Check if the chip is busy. If not the we mark it as so and hope that nobody
622 1.1.4.2 nathanw * reselects us until we have grabbed the bus.
623 1.1.4.2 nathanw */
624 1.1.4.2 nathanw if (!(dev->sc_flags & SFAS_ACTIVE) && !dev->sc_sel_nexus) {
625 1.1.4.2 nathanw dev->sc_flags |= SFAS_ACTIVE;
626 1.1.4.2 nathanw
627 1.1.4.2 nathanw rp = dev->sc_fas;
628 1.1.4.2 nathanw
629 1.1.4.2 nathanw *rp->sfas_syncper = nexus->syncper;
630 1.1.4.2 nathanw *rp->sfas_syncoff = nexus->syncoff;
631 1.1.4.2 nathanw *rp->sfas_config3 = nexus->config3;
632 1.1.4.2 nathanw
633 1.1.4.2 nathanw *rp->sfas_config1 = dev->sc_config1;
634 1.1.4.2 nathanw *rp->sfas_timeout = dev->sc_timeout_val;
635 1.1.4.2 nathanw *rp->sfas_dest_id = target;
636 1.1.4.2 nathanw
637 1.1.4.2 nathanw /* If nobody has stolen the bus, we can send a select command to the chip. */
638 1.1.4.2 nathanw if (!(*rp->sfas_status & SFAS_STAT_INTERRUPT_PENDING)) {
639 1.1.4.2 nathanw *rp->sfas_fifo = nexus->ID;
640 1.1.4.2 nathanw if ((nexus->flags & (SFAS_NF_DO_SDTR | SFAS_NF_RESET))
641 1.1.4.2 nathanw || (dev->sc_msg_out_len != 0))
642 1.1.4.2 nathanw cmd = SFAS_CMD_SEL_ATN_STOP;
643 1.1.4.2 nathanw else {
644 1.1.4.2 nathanw for(i=0; i<nexus->clen; i++)
645 1.1.4.2 nathanw *rp->sfas_fifo = nexus->cbuf[i];
646 1.1.4.2 nathanw
647 1.1.4.2 nathanw cmd = SFAS_CMD_SEL_ATN;
648 1.1.4.2 nathanw }
649 1.1.4.2 nathanw
650 1.1.4.2 nathanw dev->sc_sel_nexus = nexus;
651 1.1.4.2 nathanw
652 1.1.4.2 nathanw *rp->sfas_command = cmd;
653 1.1.4.2 nathanw retcode = 1;
654 1.1.4.2 nathanw nexus->flags &= ~SFAS_NF_RETRY_SELECT;
655 1.1.4.2 nathanw } else
656 1.1.4.2 nathanw nexus->flags |= SFAS_NF_RETRY_SELECT;
657 1.1.4.2 nathanw } else
658 1.1.4.2 nathanw nexus->flags |= SFAS_NF_RETRY_SELECT;
659 1.1.4.2 nathanw
660 1.1.4.2 nathanw splx(s);
661 1.1.4.2 nathanw return(retcode);
662 1.1.4.2 nathanw }
663 1.1.4.2 nathanw
664 1.1.4.2 nathanw /*
665 1.1.4.2 nathanw * Grab the nexus if available else return 0.
666 1.1.4.2 nathanw */
667 1.1.4.2 nathanw struct nexus *
668 1.1.4.2 nathanw sfas_arbitate_target(dev, target)
669 1.1.4.2 nathanw struct sfas_softc *dev;
670 1.1.4.2 nathanw int target;
671 1.1.4.2 nathanw {
672 1.1.4.2 nathanw struct nexus *nexus;
673 1.1.4.2 nathanw int s;
674 1.1.4.2 nathanw
675 1.1.4.2 nathanw /*
676 1.1.4.2 nathanw * This is realy simple. Raise interrupt level to splbio. Grab the nexus and
677 1.1.4.2 nathanw * leave.
678 1.1.4.2 nathanw */
679 1.1.4.2 nathanw nexus = &dev->sc_nexus[target];
680 1.1.4.2 nathanw
681 1.1.4.2 nathanw s = splbio();
682 1.1.4.2 nathanw
683 1.1.4.2 nathanw if (nexus->flags & SFAS_NF_UNIT_BUSY)
684 1.1.4.2 nathanw nexus = 0;
685 1.1.4.2 nathanw else
686 1.1.4.2 nathanw nexus->flags |= SFAS_NF_UNIT_BUSY;
687 1.1.4.2 nathanw
688 1.1.4.2 nathanw splx(s);
689 1.1.4.2 nathanw return(nexus);
690 1.1.4.2 nathanw }
691 1.1.4.2 nathanw
692 1.1.4.2 nathanw /*
693 1.1.4.2 nathanw * Setup a nexus for use. Initializes command, buffer pointers and dma chain.
694 1.1.4.2 nathanw */
695 1.1.4.2 nathanw void
696 1.1.4.2 nathanw sfas_setup_nexus(dev, nexus, pendp, cbuf, clen, buf, len, mode)
697 1.1.4.2 nathanw struct sfas_softc *dev;
698 1.1.4.2 nathanw struct nexus *nexus;
699 1.1.4.2 nathanw struct sfas_pending *pendp;
700 1.1.4.2 nathanw unsigned char *cbuf;
701 1.1.4.2 nathanw int clen;
702 1.1.4.2 nathanw unsigned char *buf;
703 1.1.4.2 nathanw int len;
704 1.1.4.2 nathanw int mode;
705 1.1.4.2 nathanw {
706 1.1.4.2 nathanw char sync, target, lun;
707 1.1.4.2 nathanw
708 1.1.4.2 nathanw target = pendp->xs->xs_periph->periph_target;
709 1.1.4.2 nathanw lun = pendp->xs->xs_periph->periph_lun;
710 1.1.4.2 nathanw
711 1.1.4.2 nathanw /*
712 1.1.4.2 nathanw * Adopt mode to reflect the config flags.
713 1.1.4.2 nathanw * If we can't use DMA we can't use synch transfer. Also check the
714 1.1.4.2 nathanw * sfas_inhibit_xxx[target] flags.
715 1.1.4.2 nathanw */
716 1.1.4.2 nathanw if ((dev->sc_config_flags & (SFAS_NO_SYNCH | SFAS_NO_DMA)) ||
717 1.1.4.2 nathanw sfas_inhibit_sync[(int)target])
718 1.1.4.2 nathanw mode &= ~SFAS_SELECT_S;
719 1.1.4.2 nathanw
720 1.1.4.2 nathanw if ((dev->sc_config_flags & SFAS_NO_RESELECT) ||
721 1.1.4.2 nathanw sfas_inhibit_disc[(int)target])
722 1.1.4.2 nathanw mode &= ~SFAS_SELECT_R;
723 1.1.4.2 nathanw
724 1.1.4.2 nathanw nexus->xs = pendp->xs;
725 1.1.4.2 nathanw
726 1.1.4.2 nathanw /* Setup the nexus struct. */
727 1.1.4.2 nathanw nexus->ID = ((mode & SFAS_SELECT_R) ? 0xC0 : 0x80) | lun;
728 1.1.4.2 nathanw nexus->clen = clen;
729 1.1.4.2 nathanw bcopy(cbuf, nexus->cbuf, nexus->clen);
730 1.1.4.2 nathanw nexus->cbuf[1] |= lun << 5; /* Fix the lun bits */
731 1.1.4.2 nathanw nexus->cur_link = 0;
732 1.1.4.2 nathanw nexus->dma_len = 0;
733 1.1.4.2 nathanw nexus->dma_buf = 0;
734 1.1.4.2 nathanw nexus->dma_blk_len = 0;
735 1.1.4.2 nathanw nexus->dma_blk_ptr = 0;
736 1.1.4.2 nathanw nexus->len = len;
737 1.1.4.2 nathanw nexus->buf = buf;
738 1.1.4.2 nathanw nexus->lun_unit = (lun << 4) | target;
739 1.1.4.2 nathanw nexus->state = SFAS_NS_SELECTED;
740 1.1.4.2 nathanw
741 1.1.4.2 nathanw /* We must keep these flags. All else must be zero. */
742 1.1.4.2 nathanw nexus->flags &= SFAS_NF_UNIT_BUSY
743 1.1.4.2 nathanw | SFAS_NF_SYNC_TESTED | SFAS_NF_SELECT_ME;
744 1.1.4.2 nathanw
745 1.1.4.2 nathanw if (mode & SFAS_SELECT_I)
746 1.1.4.2 nathanw nexus->flags |= SFAS_NF_IMMEDIATE;
747 1.1.4.2 nathanw if (mode & SFAS_SELECT_K)
748 1.1.4.2 nathanw nexus->flags |= SFAS_NF_RESET;
749 1.1.4.2 nathanw
750 1.1.4.2 nathanw sync = ((mode & SFAS_SELECT_S) ? 1 : 0);
751 1.1.4.2 nathanw
752 1.1.4.2 nathanw /* We can't use sync during polled IO. */
753 1.1.4.2 nathanw if (sync && (mode & SFAS_SELECT_I))
754 1.1.4.2 nathanw sync = 0;
755 1.1.4.2 nathanw
756 1.1.4.2 nathanw if (!sync &&
757 1.1.4.2 nathanw ((nexus->flags & SFAS_NF_SYNC_TESTED) && (nexus->offset != 0))) {
758 1.1.4.2 nathanw /*
759 1.1.4.2 nathanw * If the scsi unit is set to synch transfer and we don't want
760 1.1.4.2 nathanw * that, we have to renegotiate.
761 1.1.4.2 nathanw */
762 1.1.4.2 nathanw
763 1.1.4.2 nathanw nexus->flags |= SFAS_NF_DO_SDTR;
764 1.1.4.2 nathanw nexus->period = 200;
765 1.1.4.2 nathanw nexus->offset = 0;
766 1.1.4.2 nathanw } else if (sync && !(nexus->flags & SFAS_NF_SYNC_TESTED)) {
767 1.1.4.2 nathanw /*
768 1.1.4.2 nathanw * If the scsi unit is not set to synch transfer and we want
769 1.1.4.2 nathanw * that, we have to negotiate. This should realy base the
770 1.1.4.2 nathanw * period on the clock frequence rather than just check if
771 1.1.4.2 nathanw * >25Mhz
772 1.1.4.2 nathanw */
773 1.1.4.2 nathanw
774 1.1.4.2 nathanw nexus->flags |= SFAS_NF_DO_SDTR;
775 1.1.4.2 nathanw nexus->period = ((dev->sc_clock_freq>25) ? 100 : 200);
776 1.1.4.2 nathanw nexus->offset = 8;
777 1.1.4.2 nathanw
778 1.1.4.2 nathanw /* If the user has a long cable, we want to limit the period */
779 1.1.4.2 nathanw if ((nexus->period == 100) &&
780 1.1.4.2 nathanw (dev->sc_config_flags & SFAS_SLOW_CABLE))
781 1.1.4.2 nathanw nexus->period = 200;
782 1.1.4.2 nathanw }
783 1.1.4.2 nathanw
784 1.1.4.2 nathanw /*
785 1.1.4.2 nathanw * Fake a dma-block for polled IO. This way we can use the same code to handle
786 1.1.4.2 nathanw * reselection. Much nicer this way.
787 1.1.4.2 nathanw */
788 1.1.4.2 nathanw if ((mode & SFAS_SELECT_I) || (dev->sc_config_flags & SFAS_NO_DMA)) {
789 1.1.4.2 nathanw nexus->dma[0].ptr = (vm_offset_t)buf;
790 1.1.4.2 nathanw nexus->dma[0].len = len;
791 1.1.4.2 nathanw nexus->dma[0].flg = SFAS_CHAIN_PRG;
792 1.1.4.2 nathanw nexus->max_link = 1;
793 1.1.4.2 nathanw } else {
794 1.1.4.2 nathanw nexus->max_link = dev->sc_build_dma_chain(dev, nexus->dma,
795 1.1.4.2 nathanw buf, len);
796 1.1.4.2 nathanw }
797 1.1.4.2 nathanw
798 1.1.4.2 nathanw /* Flush the caches. */
799 1.1.4.2 nathanw
800 1.1.4.2 nathanw if (len && !(mode & SFAS_SELECT_I))
801 1.1.4.2 nathanw cpu_cache_purgeD_rng((vm_offset_t)buf, len);
802 1.1.4.2 nathanw }
803 1.1.4.2 nathanw
804 1.1.4.2 nathanw int
805 1.1.4.2 nathanw sfasselect(dev, pendp, cbuf, clen, buf, len, mode)
806 1.1.4.2 nathanw struct sfas_softc *dev;
807 1.1.4.2 nathanw struct sfas_pending *pendp;
808 1.1.4.2 nathanw unsigned char *cbuf;
809 1.1.4.2 nathanw int clen;
810 1.1.4.2 nathanw unsigned char *buf;
811 1.1.4.2 nathanw int len;
812 1.1.4.2 nathanw int mode;
813 1.1.4.2 nathanw {
814 1.1.4.2 nathanw struct nexus *nexus;
815 1.1.4.2 nathanw
816 1.1.4.2 nathanw /* Get the nexus struct. */
817 1.1.4.2 nathanw nexus = sfas_arbitate_target(dev, pendp->xs->xs_periph->periph_target);
818 1.1.4.2 nathanw if (nexus == NULL)
819 1.1.4.2 nathanw return(0);
820 1.1.4.2 nathanw
821 1.1.4.2 nathanw /* Setup the nexus struct. */
822 1.1.4.2 nathanw sfas_setup_nexus(dev, nexus, pendp, cbuf, clen, buf, len, mode);
823 1.1.4.2 nathanw
824 1.1.4.2 nathanw /* Post it to the interrupt machine. */
825 1.1.4.2 nathanw sfas_select_unit(dev, pendp->xs->xs_periph->periph_target);
826 1.1.4.2 nathanw
827 1.1.4.2 nathanw return(1);
828 1.1.4.2 nathanw }
829 1.1.4.2 nathanw
830 1.1.4.2 nathanw void
831 1.1.4.2 nathanw sfasgo(dev, pendp)
832 1.1.4.2 nathanw struct sfas_softc *dev;
833 1.1.4.2 nathanw struct sfas_pending *pendp;
834 1.1.4.2 nathanw {
835 1.1.4.2 nathanw int s;
836 1.1.4.2 nathanw char *buf;
837 1.1.4.2 nathanw
838 1.1.4.2 nathanw buf = pendp->xs->data;
839 1.1.4.2 nathanw
840 1.1.4.2 nathanw if (sfasselect(dev, pendp, (char *)pendp->xs->cmd, pendp->xs->cmdlen,
841 1.1.4.2 nathanw buf, pendp->xs->datalen, SFAS_SELECT_RS)) {
842 1.1.4.2 nathanw /*
843 1.1.4.2 nathanw * We got the command going so the sfas_pending struct is now
844 1.1.4.2 nathanw * free to reuse.
845 1.1.4.2 nathanw */
846 1.1.4.2 nathanw
847 1.1.4.2 nathanw s = splbio();
848 1.1.4.2 nathanw TAILQ_INSERT_TAIL(&dev->sc_xs_free, pendp, link);
849 1.1.4.2 nathanw splx(s);
850 1.1.4.2 nathanw } else {
851 1.1.4.2 nathanw /*
852 1.1.4.2 nathanw * We couldn't make the command fly so we have to wait. The
853 1.1.4.2 nathanw * struct MUST be inserted at the head to keep the order of
854 1.1.4.2 nathanw * the commands.
855 1.1.4.2 nathanw */
856 1.1.4.2 nathanw
857 1.1.4.2 nathanw s = splbio();
858 1.1.4.2 nathanw TAILQ_INSERT_HEAD(&dev->sc_xs_pending, pendp, link);
859 1.1.4.2 nathanw splx(s);
860 1.1.4.2 nathanw }
861 1.1.4.2 nathanw
862 1.1.4.2 nathanw return;
863 1.1.4.2 nathanw }
864 1.1.4.2 nathanw
865 1.1.4.2 nathanw /*
866 1.1.4.2 nathanw * Part one of the interrupt machine. Error checks and reselection test.
867 1.1.4.2 nathanw * We don't know if we have an active nexus here!
868 1.1.4.2 nathanw */
869 1.1.4.2 nathanw int
870 1.1.4.2 nathanw sfas_pretests(dev, rp)
871 1.1.4.2 nathanw struct sfas_softc *dev;
872 1.1.4.2 nathanw sfas_regmap_p rp;
873 1.1.4.2 nathanw {
874 1.1.4.2 nathanw struct nexus *nexus;
875 1.1.4.2 nathanw int i, s;
876 1.1.4.2 nathanw
877 1.1.4.2 nathanw if (dev->sc_interrupt & SFAS_INT_SCSI_RESET_DETECTED) {
878 1.1.4.2 nathanw /*
879 1.1.4.2 nathanw * Cleanup and notify user. Lets hope that this is all we
880 1.1.4.2 nathanw * have to do
881 1.1.4.2 nathanw */
882 1.1.4.2 nathanw
883 1.1.4.2 nathanw for(i=0; i<8; i++) {
884 1.1.4.2 nathanw if (dev->sc_nexus[i].xs)
885 1.1.4.2 nathanw sfas_scsidone(dev, dev->sc_nexus[i].xs, -2);
886 1.1.4.2 nathanw
887 1.1.4.2 nathanw sfas_init_nexus(dev, &dev->sc_nexus[i]);
888 1.1.4.2 nathanw }
889 1.1.4.2 nathanw printf("sfasintr: SCSI-RESET detected!");
890 1.1.4.2 nathanw return(-1);
891 1.1.4.2 nathanw }
892 1.1.4.2 nathanw
893 1.1.4.2 nathanw if (dev->sc_interrupt & SFAS_INT_ILLEGAL_COMMAND) {
894 1.1.4.2 nathanw /* Something went terrible wrong! Dump some data and panic! */
895 1.1.4.2 nathanw
896 1.1.4.2 nathanw printf("FIFO:");
897 1.1.4.2 nathanw while(*rp->sfas_fifo_flags & SFAS_FIFO_COUNT_MASK)
898 1.1.4.2 nathanw printf(" %x", *rp->sfas_fifo);
899 1.1.4.2 nathanw printf("\n");
900 1.1.4.2 nathanw
901 1.1.4.2 nathanw printf("CMD: %x\n", *rp->sfas_command);
902 1.1.4.2 nathanw panic("sfasintr: ILLEGAL COMMAND!");
903 1.1.4.2 nathanw }
904 1.1.4.2 nathanw
905 1.1.4.2 nathanw if (dev->sc_interrupt & SFAS_INT_RESELECTED) {
906 1.1.4.2 nathanw /* We were reselected. Set the chip as busy */
907 1.1.4.2 nathanw
908 1.1.4.2 nathanw s = splbio();
909 1.1.4.2 nathanw dev->sc_flags |= SFAS_ACTIVE;
910 1.1.4.2 nathanw if (dev->sc_sel_nexus) {
911 1.1.4.2 nathanw dev->sc_sel_nexus->flags |= SFAS_NF_SELECT_ME;
912 1.1.4.2 nathanw dev->sc_sel_nexus = 0;
913 1.1.4.2 nathanw }
914 1.1.4.2 nathanw splx(s);
915 1.1.4.2 nathanw
916 1.1.4.2 nathanw if (dev->sc_units_disconnected) {
917 1.1.4.2 nathanw /* Find out who reselected us. */
918 1.1.4.2 nathanw
919 1.1.4.2 nathanw dev->sc_resel[0] &= ~(1<<dev->sc_host_id);
920 1.1.4.2 nathanw
921 1.1.4.2 nathanw for(i=0; i<8; i++)
922 1.1.4.2 nathanw if (dev->sc_resel[0] & (1<<i))
923 1.1.4.2 nathanw break;
924 1.1.4.2 nathanw
925 1.1.4.2 nathanw if (i == 8)
926 1.1.4.2 nathanw panic("Illegal reselection!");
927 1.1.4.2 nathanw
928 1.1.4.2 nathanw if (dev->sc_nexus[i].state == SFAS_NS_DISCONNECTED) {
929 1.1.4.2 nathanw /*
930 1.1.4.2 nathanw * This unit had disconnected, so we reconnect
931 1.1.4.2 nathanw * it.
932 1.1.4.2 nathanw */
933 1.1.4.2 nathanw
934 1.1.4.2 nathanw dev->sc_cur_nexus = &dev->sc_nexus[i];
935 1.1.4.2 nathanw nexus = dev->sc_cur_nexus;
936 1.1.4.2 nathanw
937 1.1.4.2 nathanw *rp->sfas_syncper = nexus->syncper;
938 1.1.4.2 nathanw *rp->sfas_syncoff = nexus->syncoff;
939 1.1.4.2 nathanw *rp->sfas_config3 = nexus->config3;
940 1.1.4.2 nathanw
941 1.1.4.2 nathanw *rp->sfas_dest_id = i & 7;
942 1.1.4.2 nathanw
943 1.1.4.2 nathanw dev->sc_units_disconnected--;
944 1.1.4.2 nathanw dev->sc_msg_in_len= 0;
945 1.1.4.2 nathanw
946 1.1.4.2 nathanw /* Restore active pointers. */
947 1.1.4.2 nathanw sfas_restore_pointers(dev);
948 1.1.4.2 nathanw
949 1.1.4.2 nathanw nexus->state = SFAS_NS_RESELECTED;
950 1.1.4.2 nathanw
951 1.1.4.2 nathanw *rp->sfas_command = SFAS_CMD_MESSAGE_ACCEPTED;
952 1.1.4.2 nathanw
953 1.1.4.2 nathanw return(1);
954 1.1.4.2 nathanw }
955 1.1.4.2 nathanw }
956 1.1.4.2 nathanw
957 1.1.4.2 nathanw /* Somehow we got an illegal reselection. Dump and panic. */
958 1.1.4.2 nathanw printf("sfasintr: resel[0] %x resel[1] %x disconnected %d\n",
959 1.1.4.2 nathanw dev->sc_resel[0], dev->sc_resel[1],
960 1.1.4.2 nathanw dev->sc_units_disconnected);
961 1.1.4.2 nathanw panic("sfasintr: Unexpected reselection!");
962 1.1.4.2 nathanw }
963 1.1.4.2 nathanw
964 1.1.4.2 nathanw return(0);
965 1.1.4.2 nathanw }
966 1.1.4.2 nathanw
967 1.1.4.2 nathanw /*
968 1.1.4.2 nathanw * Part two of the interrupt machine. Handle disconnection and post command
969 1.1.4.2 nathanw * processing. We know that we have an active nexus here.
970 1.1.4.2 nathanw */
971 1.1.4.2 nathanw int
972 1.1.4.2 nathanw sfas_midaction(dev, rp, nexus)
973 1.1.4.2 nathanw struct sfas_softc *dev;
974 1.1.4.2 nathanw sfas_regmap_p rp;
975 1.1.4.2 nathanw struct nexus *nexus;
976 1.1.4.2 nathanw {
977 1.1.4.2 nathanw int i, left, len, s;
978 1.1.4.2 nathanw u_char status, msg;
979 1.1.4.2 nathanw
980 1.1.4.2 nathanw if (dev->sc_interrupt & SFAS_INT_DISCONNECT) {
981 1.1.4.2 nathanw s = splbio();
982 1.1.4.2 nathanw dev->sc_cur_nexus = 0;
983 1.1.4.2 nathanw
984 1.1.4.2 nathanw /* Mark chip as busy and clean up the chip FIFO. */
985 1.1.4.2 nathanw dev->sc_flags &= ~SFAS_ACTIVE;
986 1.1.4.2 nathanw *rp->sfas_command = SFAS_CMD_FLUSH_FIFO;
987 1.1.4.2 nathanw
988 1.1.4.2 nathanw /* Let the nexus state reflect what we have to do. */
989 1.1.4.2 nathanw switch(nexus->state) {
990 1.1.4.2 nathanw case SFAS_NS_SELECTED:
991 1.1.4.2 nathanw dev->sc_sel_nexus = 0;
992 1.1.4.2 nathanw nexus->flags &= ~SFAS_NF_SELECT_ME;
993 1.1.4.2 nathanw
994 1.1.4.2 nathanw /*
995 1.1.4.2 nathanw * We were trying to select the unit. Probably no unit
996 1.1.4.2 nathanw * at this ID.
997 1.1.4.2 nathanw */
998 1.1.4.2 nathanw nexus->xs->resid = dev->sc_len;
999 1.1.4.2 nathanw
1000 1.1.4.2 nathanw nexus->status = -2;
1001 1.1.4.2 nathanw nexus->flags &= ~SFAS_NF_UNIT_BUSY;
1002 1.1.4.2 nathanw nexus->state = SFAS_NS_FINISHED;
1003 1.1.4.2 nathanw break;
1004 1.1.4.2 nathanw
1005 1.1.4.2 nathanw case SFAS_NS_DONE:
1006 1.1.4.2 nathanw /* All done. */
1007 1.1.4.2 nathanw nexus->xs->resid = dev->sc_len;
1008 1.1.4.2 nathanw
1009 1.1.4.2 nathanw nexus->flags &= ~SFAS_NF_UNIT_BUSY;
1010 1.1.4.2 nathanw nexus->state = SFAS_NS_FINISHED;
1011 1.1.4.2 nathanw dev->sc_led(dev, 0);
1012 1.1.4.2 nathanw break;
1013 1.1.4.2 nathanw
1014 1.1.4.2 nathanw case SFAS_NS_DISCONNECTING:
1015 1.1.4.2 nathanw /*
1016 1.1.4.2 nathanw * We have received a DISCONNECT message, so we are
1017 1.1.4.2 nathanw * doing a normal disconnection.
1018 1.1.4.2 nathanw */
1019 1.1.4.2 nathanw nexus->state = SFAS_NS_DISCONNECTED;
1020 1.1.4.2 nathanw
1021 1.1.4.2 nathanw dev->sc_units_disconnected++;
1022 1.1.4.2 nathanw break;
1023 1.1.4.2 nathanw
1024 1.1.4.2 nathanw case SFAS_NS_RESET:
1025 1.1.4.2 nathanw /*
1026 1.1.4.2 nathanw * We were reseting this SCSI-unit. Clean up the
1027 1.1.4.2 nathanw * nexus struct.
1028 1.1.4.2 nathanw */
1029 1.1.4.2 nathanw dev->sc_led(dev, 0);
1030 1.1.4.2 nathanw sfas_init_nexus(dev, nexus);
1031 1.1.4.2 nathanw break;
1032 1.1.4.2 nathanw
1033 1.1.4.2 nathanw default:
1034 1.1.4.2 nathanw /*
1035 1.1.4.2 nathanw * Unexpected disconnection! Cleanup and exit. This
1036 1.1.4.2 nathanw * shouldn't cause any problems.
1037 1.1.4.2 nathanw */
1038 1.1.4.2 nathanw printf("sfasintr: Unexpected disconnection\n");
1039 1.1.4.2 nathanw printf("sfasintr: u %x s %d p %d f %x c %x\n",
1040 1.1.4.2 nathanw nexus->lun_unit, nexus->state,
1041 1.1.4.2 nathanw dev->sc_status & SFAS_STAT_PHASE_MASK,
1042 1.1.4.2 nathanw nexus->flags, nexus->cbuf[0]);
1043 1.1.4.2 nathanw
1044 1.1.4.2 nathanw nexus->xs->resid = dev->sc_len;
1045 1.1.4.2 nathanw
1046 1.1.4.2 nathanw nexus->flags &= ~SFAS_NF_UNIT_BUSY;
1047 1.1.4.2 nathanw nexus->state = SFAS_NS_FINISHED;
1048 1.1.4.2 nathanw nexus->status = -3;
1049 1.1.4.2 nathanw
1050 1.1.4.2 nathanw dev->sc_led(dev, 0);
1051 1.1.4.2 nathanw break;
1052 1.1.4.2 nathanw }
1053 1.1.4.2 nathanw
1054 1.1.4.2 nathanw /*
1055 1.1.4.2 nathanw * If we have disconnected units, we MUST enable reselection
1056 1.1.4.2 nathanw * within 250ms.
1057 1.1.4.2 nathanw */
1058 1.1.4.2 nathanw if (dev->sc_units_disconnected &&
1059 1.1.4.2 nathanw !(dev->sc_flags & SFAS_ACTIVE))
1060 1.1.4.2 nathanw *rp->sfas_command = SFAS_CMD_ENABLE_RESEL;
1061 1.1.4.2 nathanw
1062 1.1.4.2 nathanw splx(s);
1063 1.1.4.2 nathanw
1064 1.1.4.2 nathanw /* Select the first pre-initialized nexus we find. */
1065 1.1.4.2 nathanw for(i=0; i<8; i++)
1066 1.1.4.2 nathanw if (dev->sc_nexus[i].flags & (SFAS_NF_SELECT_ME | SFAS_NF_RETRY_SELECT))
1067 1.1.4.2 nathanw if (sfas_select_unit(dev, i) == 2)
1068 1.1.4.2 nathanw break;
1069 1.1.4.2 nathanw
1070 1.1.4.2 nathanw /* We are done with this nexus! */
1071 1.1.4.2 nathanw if (nexus->state == SFAS_NS_FINISHED)
1072 1.1.4.2 nathanw sfas_scsidone(dev, nexus->xs, nexus->status);
1073 1.1.4.2 nathanw
1074 1.1.4.2 nathanw return(1);
1075 1.1.4.2 nathanw }
1076 1.1.4.2 nathanw
1077 1.1.4.2 nathanw switch(nexus->state) {
1078 1.1.4.2 nathanw case SFAS_NS_SELECTED:
1079 1.1.4.2 nathanw dev->sc_cur_nexus = nexus;
1080 1.1.4.2 nathanw dev->sc_sel_nexus = 0;
1081 1.1.4.2 nathanw
1082 1.1.4.2 nathanw nexus->flags &= ~SFAS_NF_SELECT_ME;
1083 1.1.4.2 nathanw
1084 1.1.4.2 nathanw /*
1085 1.1.4.2 nathanw * We have selected a unit. Setup chip, restore pointers and
1086 1.1.4.2 nathanw * light the led.
1087 1.1.4.2 nathanw */
1088 1.1.4.2 nathanw *rp->sfas_syncper = nexus->syncper;
1089 1.1.4.2 nathanw *rp->sfas_syncoff = nexus->syncoff;
1090 1.1.4.2 nathanw *rp->sfas_config3 = nexus->config3;
1091 1.1.4.2 nathanw
1092 1.1.4.2 nathanw sfas_restore_pointers(dev);
1093 1.1.4.2 nathanw
1094 1.1.4.2 nathanw nexus->status = 0xFF;
1095 1.1.4.2 nathanw dev->sc_msg_in[0] = 0xFF;
1096 1.1.4.2 nathanw dev->sc_msg_in_len= 0;
1097 1.1.4.2 nathanw
1098 1.1.4.2 nathanw dev->sc_led(dev, 1);
1099 1.1.4.2 nathanw
1100 1.1.4.2 nathanw break;
1101 1.1.4.2 nathanw
1102 1.1.4.2 nathanw case SFAS_NS_DATA_IN:
1103 1.1.4.2 nathanw case SFAS_NS_DATA_OUT:
1104 1.1.4.2 nathanw /* We have transfered data. */
1105 1.1.4.2 nathanw if (dev->sc_dma_len)
1106 1.1.4.2 nathanw if (dev->sc_cur_link < dev->sc_max_link) {
1107 1.1.4.2 nathanw /*
1108 1.1.4.2 nathanw * Clean up dma and at the same time get how
1109 1.1.4.2 nathanw * many bytes that were NOT transfered.
1110 1.1.4.2 nathanw */
1111 1.1.4.2 nathanw left = dev->sc_setup_dma(dev, 0, 0, SFAS_DMA_CLEAR);
1112 1.1.4.2 nathanw len = dev->sc_dma_len;
1113 1.1.4.2 nathanw
1114 1.1.4.2 nathanw if (nexus->state == SFAS_NS_DATA_IN) {
1115 1.1.4.2 nathanw /*
1116 1.1.4.2 nathanw * If we were bumping we may have had an odd length
1117 1.1.4.2 nathanw * which means that there may be bytes left in the
1118 1.1.4.2 nathanw * fifo. We also need to move the data from the
1119 1.1.4.2 nathanw * bump buffer to the actual memory.
1120 1.1.4.2 nathanw */
1121 1.1.4.2 nathanw if (dev->sc_dma_buf == dev->sc_bump_pa)
1122 1.1.4.2 nathanw {
1123 1.1.4.2 nathanw while((*rp->sfas_fifo_flags&SFAS_FIFO_COUNT_MASK)
1124 1.1.4.2 nathanw && left)
1125 1.1.4.2 nathanw dev->sc_bump_va[len-(left--)] = *rp->sfas_fifo;
1126 1.1.4.2 nathanw
1127 1.1.4.2 nathanw bcopy(dev->sc_bump_va, dev->sc_buf, len-left);
1128 1.1.4.2 nathanw }
1129 1.1.4.2 nathanw } else {
1130 1.1.4.2 nathanw /* Count any unsent bytes and flush them. */
1131 1.1.4.2 nathanw left+= *rp->sfas_fifo_flags & SFAS_FIFO_COUNT_MASK;
1132 1.1.4.2 nathanw *rp->sfas_command = SFAS_CMD_FLUSH_FIFO;
1133 1.1.4.2 nathanw }
1134 1.1.4.2 nathanw
1135 1.1.4.2 nathanw /*
1136 1.1.4.2 nathanw * Update pointers/length to reflect the transfered
1137 1.1.4.2 nathanw * data.
1138 1.1.4.2 nathanw */
1139 1.1.4.2 nathanw dev->sc_len -= len-left;
1140 1.1.4.2 nathanw dev->sc_buf += len-left;
1141 1.1.4.2 nathanw
1142 1.1.4.2 nathanw dev->sc_dma_buf += len-left;
1143 1.1.4.2 nathanw dev->sc_dma_len = left;
1144 1.1.4.2 nathanw
1145 1.1.4.2 nathanw dev->sc_dma_blk_ptr += len-left;
1146 1.1.4.2 nathanw dev->sc_dma_blk_len -= len-left;
1147 1.1.4.2 nathanw
1148 1.1.4.2 nathanw /*
1149 1.1.4.2 nathanw * If it was the end of a dma block, we select the
1150 1.1.4.2 nathanw * next to begin with.
1151 1.1.4.2 nathanw */
1152 1.1.4.2 nathanw if (!dev->sc_dma_blk_len)
1153 1.1.4.2 nathanw dev->sc_cur_link++;
1154 1.1.4.2 nathanw }
1155 1.1.4.2 nathanw break;
1156 1.1.4.2 nathanw
1157 1.1.4.2 nathanw case SFAS_NS_STATUS:
1158 1.1.4.2 nathanw /*
1159 1.1.4.2 nathanw * If we were not sensing, grab the status byte. If we were
1160 1.1.4.2 nathanw * sensing and we got a bad status, let the user know.
1161 1.1.4.2 nathanw */
1162 1.1.4.2 nathanw
1163 1.1.4.2 nathanw status = *rp->sfas_fifo;
1164 1.1.4.2 nathanw msg = *rp->sfas_fifo;
1165 1.1.4.2 nathanw
1166 1.1.4.2 nathanw nexus->status = status;
1167 1.1.4.2 nathanw if (status != 0)
1168 1.1.4.2 nathanw nexus->status = -1;
1169 1.1.4.2 nathanw
1170 1.1.4.2 nathanw /*
1171 1.1.4.2 nathanw * Preload the command complete message. Handeled in
1172 1.1.4.2 nathanw * sfas_postaction.
1173 1.1.4.2 nathanw */
1174 1.1.4.2 nathanw dev->sc_msg_in[0] = msg;
1175 1.1.4.2 nathanw dev->sc_msg_in_len = 1;
1176 1.1.4.2 nathanw nexus->flags |= SFAS_NF_HAS_MSG;
1177 1.1.4.2 nathanw break;
1178 1.1.4.2 nathanw
1179 1.1.4.2 nathanw default:
1180 1.1.4.2 nathanw break;
1181 1.1.4.2 nathanw }
1182 1.1.4.2 nathanw
1183 1.1.4.2 nathanw return(0);
1184 1.1.4.2 nathanw }
1185 1.1.4.2 nathanw
1186 1.1.4.2 nathanw /*
1187 1.1.4.2 nathanw * Part three of the interrupt machine. Handle phase changes (and repeated
1188 1.1.4.2 nathanw * phase passes). We know that we have an active nexus here.
1189 1.1.4.2 nathanw */
1190 1.1.4.2 nathanw int
1191 1.1.4.2 nathanw sfas_postaction(dev, rp, nexus)
1192 1.1.4.2 nathanw struct sfas_softc *dev;
1193 1.1.4.2 nathanw sfas_regmap_p rp;
1194 1.1.4.2 nathanw struct nexus *nexus;
1195 1.1.4.2 nathanw {
1196 1.1.4.2 nathanw int i, len;
1197 1.1.4.2 nathanw u_char cmd;
1198 1.1.4.2 nathanw short offset, period;
1199 1.1.4.2 nathanw
1200 1.1.4.2 nathanw cmd = 0;
1201 1.1.4.2 nathanw
1202 1.1.4.2 nathanw switch(dev->sc_status & SFAS_STAT_PHASE_MASK) {
1203 1.1.4.2 nathanw case SFAS_PHASE_DATA_OUT:
1204 1.1.4.2 nathanw case SFAS_PHASE_DATA_IN:
1205 1.1.4.2 nathanw if ((dev->sc_status & SFAS_STAT_PHASE_MASK) ==
1206 1.1.4.2 nathanw SFAS_PHASE_DATA_OUT)
1207 1.1.4.2 nathanw nexus->state = SFAS_NS_DATA_OUT;
1208 1.1.4.2 nathanw else
1209 1.1.4.2 nathanw nexus->state = SFAS_NS_DATA_IN;
1210 1.1.4.2 nathanw
1211 1.1.4.2 nathanw /* Make DMA ready to accept new data. Load active pointers
1212 1.1.4.2 nathanw * from the DMA block. */
1213 1.1.4.2 nathanw dev->sc_setup_dma(dev, 0, 0, SFAS_DMA_CLEAR);
1214 1.1.4.2 nathanw if (dev->sc_cur_link < dev->sc_max_link) {
1215 1.1.4.2 nathanw if (!dev->sc_dma_blk_len) {
1216 1.1.4.2 nathanw dev->sc_dma_blk_ptr = dev->sc_chain[dev->sc_cur_link].ptr;
1217 1.1.4.2 nathanw dev->sc_dma_blk_len = dev->sc_chain[dev->sc_cur_link].len;
1218 1.1.4.2 nathanw dev->sc_dma_blk_flg = dev->sc_chain[dev->sc_cur_link].flg;
1219 1.1.4.2 nathanw }
1220 1.1.4.2 nathanw
1221 1.1.4.2 nathanw /* We should use polled IO here. */
1222 1.1.4.2 nathanw if (dev->sc_dma_blk_flg == SFAS_CHAIN_PRG) {
1223 1.1.4.2 nathanw dev->sc_ixfer(dev, nexus->xs->xs_control & XS_CTL_POLL);
1224 1.1.4.2 nathanw dev->sc_cur_link++;
1225 1.1.4.2 nathanw dev->sc_dma_len = 0;
1226 1.1.4.2 nathanw break;
1227 1.1.4.2 nathanw }
1228 1.1.4.2 nathanw else if (dev->sc_dma_blk_flg == SFAS_CHAIN_BUMP)
1229 1.1.4.2 nathanw len = dev->sc_dma_blk_len;
1230 1.1.4.2 nathanw else
1231 1.1.4.2 nathanw len = dev->sc_need_bump(dev, dev->sc_dma_blk_ptr,
1232 1.1.4.2 nathanw dev->sc_dma_blk_len);
1233 1.1.4.2 nathanw
1234 1.1.4.2 nathanw /*
1235 1.1.4.2 nathanw * If len != 0 we must bump the data, else we just DMA it
1236 1.1.4.2 nathanw * straight into memory.
1237 1.1.4.2 nathanw */
1238 1.1.4.2 nathanw if (len) {
1239 1.1.4.2 nathanw dev->sc_dma_buf = dev->sc_bump_pa;
1240 1.1.4.2 nathanw dev->sc_dma_len = len;
1241 1.1.4.2 nathanw
1242 1.1.4.2 nathanw if (nexus->state == SFAS_NS_DATA_OUT)
1243 1.1.4.2 nathanw bcopy(dev->sc_buf, dev->sc_bump_va, dev->sc_dma_len);
1244 1.1.4.2 nathanw } else {
1245 1.1.4.2 nathanw dev->sc_dma_buf = dev->sc_dma_blk_ptr;
1246 1.1.4.2 nathanw dev->sc_dma_len = dev->sc_dma_blk_len;
1247 1.1.4.2 nathanw }
1248 1.1.4.2 nathanw
1249 1.1.4.2 nathanw /* Load DMA with adress and length of transfer. */
1250 1.1.4.2 nathanw dev->sc_setup_dma(dev, dev->sc_dma_buf, dev->sc_dma_len,
1251 1.1.4.2 nathanw ((nexus->state == SFAS_NS_DATA_OUT) ?
1252 1.1.4.2 nathanw SFAS_DMA_WRITE : SFAS_DMA_READ));
1253 1.1.4.2 nathanw
1254 1.1.4.2 nathanw /* printf("Using DMA !!!!\n");*/
1255 1.1.4.2 nathanw cmd = SFAS_CMD_TRANSFER_INFO | SFAS_CMD_DMA;
1256 1.1.4.2 nathanw } else {
1257 1.1.4.2 nathanw /*
1258 1.1.4.2 nathanw * Hmmm, the unit wants more info than we have or has
1259 1.1.4.2 nathanw * more than we want. Let the chip handle that.
1260 1.1.4.2 nathanw */
1261 1.1.4.2 nathanw
1262 1.1.4.2 nathanw *rp->sfas_tc_low = 0; /* was 256 but this does not make sense */
1263 1.1.4.2 nathanw *rp->sfas_tc_mid = 1;
1264 1.1.4.2 nathanw *rp->sfas_tc_high = 0;
1265 1.1.4.2 nathanw cmd = SFAS_CMD_TRANSFER_PAD;
1266 1.1.4.2 nathanw }
1267 1.1.4.2 nathanw break;
1268 1.1.4.2 nathanw
1269 1.1.4.2 nathanw case SFAS_PHASE_COMMAND:
1270 1.1.4.2 nathanw /* The scsi unit wants the command, send it. */
1271 1.1.4.2 nathanw nexus->state = SFAS_NS_SVC;
1272 1.1.4.2 nathanw
1273 1.1.4.2 nathanw *rp->sfas_command = SFAS_CMD_FLUSH_FIFO;
1274 1.1.4.2 nathanw for(i=0; i<5; i++);
1275 1.1.4.2 nathanw
1276 1.1.4.2 nathanw for(i=0; i<nexus->clen; i++)
1277 1.1.4.2 nathanw *rp->sfas_fifo = nexus->cbuf[i];
1278 1.1.4.2 nathanw cmd = SFAS_CMD_TRANSFER_INFO;
1279 1.1.4.2 nathanw break;
1280 1.1.4.2 nathanw
1281 1.1.4.2 nathanw case SFAS_PHASE_STATUS:
1282 1.1.4.2 nathanw /*
1283 1.1.4.2 nathanw * We've got status phase. Request status and command
1284 1.1.4.2 nathanw * complete message.
1285 1.1.4.2 nathanw */
1286 1.1.4.2 nathanw nexus->state = SFAS_NS_STATUS;
1287 1.1.4.2 nathanw cmd = SFAS_CMD_COMMAND_COMPLETE;
1288 1.1.4.2 nathanw break;
1289 1.1.4.2 nathanw
1290 1.1.4.2 nathanw case SFAS_PHASE_MESSAGE_OUT:
1291 1.1.4.2 nathanw /*
1292 1.1.4.2 nathanw * Either the scsi unit wants us to send a message or we have
1293 1.1.4.2 nathanw * asked for it by seting the ATN bit.
1294 1.1.4.2 nathanw */
1295 1.1.4.2 nathanw nexus->state = SFAS_NS_MSG_OUT;
1296 1.1.4.2 nathanw
1297 1.1.4.2 nathanw *rp->sfas_command = SFAS_CMD_FLUSH_FIFO;
1298 1.1.4.2 nathanw
1299 1.1.4.2 nathanw if (nexus->flags & SFAS_NF_DO_SDTR) {
1300 1.1.4.2 nathanw /* Send a Synchronous Data Transfer Request. */
1301 1.1.4.2 nathanw
1302 1.1.4.2 nathanw sfas_build_sdtrm(dev, nexus->period, nexus->offset);
1303 1.1.4.2 nathanw nexus->flags |= SFAS_NF_SDTR_SENT;
1304 1.1.4.2 nathanw nexus->flags &= ~SFAS_NF_DO_SDTR;
1305 1.1.4.2 nathanw } else if (nexus->flags & SFAS_NF_RESET) {
1306 1.1.4.2 nathanw /* Send a reset scsi unit message. */
1307 1.1.4.2 nathanw
1308 1.1.4.2 nathanw dev->sc_msg_out[0] = 0x0C;
1309 1.1.4.2 nathanw dev->sc_msg_out_len = 1;
1310 1.1.4.2 nathanw nexus->state = SFAS_NS_RESET;
1311 1.1.4.2 nathanw nexus->flags &= ~SFAS_NF_RESET;
1312 1.1.4.2 nathanw } else if (dev->sc_msg_out_len == 0) {
1313 1.1.4.2 nathanw /* Don't know what to send so we send a NOP message. */
1314 1.1.4.2 nathanw
1315 1.1.4.2 nathanw dev->sc_msg_out[0] = 0x08;
1316 1.1.4.2 nathanw dev->sc_msg_out_len = 1;
1317 1.1.4.2 nathanw }
1318 1.1.4.2 nathanw
1319 1.1.4.2 nathanw cmd = SFAS_CMD_TRANSFER_INFO;
1320 1.1.4.2 nathanw
1321 1.1.4.2 nathanw for(i=0; i<dev->sc_msg_out_len; i++)
1322 1.1.4.2 nathanw *rp->sfas_fifo = dev->sc_msg_out[i];
1323 1.1.4.2 nathanw dev->sc_msg_out_len = 0;
1324 1.1.4.2 nathanw
1325 1.1.4.2 nathanw break;
1326 1.1.4.2 nathanw
1327 1.1.4.2 nathanw case SFAS_PHASE_MESSAGE_IN:
1328 1.1.4.2 nathanw /* Receive a message from the scsi unit. */
1329 1.1.4.2 nathanw nexus->state = SFAS_NS_MSG_IN;
1330 1.1.4.2 nathanw
1331 1.1.4.2 nathanw while(!(nexus->flags & SFAS_NF_HAS_MSG)) {
1332 1.1.4.2 nathanw *rp->sfas_command = SFAS_CMD_TRANSFER_INFO;
1333 1.1.4.2 nathanw sfasiwait(dev);
1334 1.1.4.2 nathanw
1335 1.1.4.2 nathanw dev->sc_msg_in[dev->sc_msg_in_len++] = *rp->sfas_fifo;
1336 1.1.4.2 nathanw
1337 1.1.4.2 nathanw /* Check if we got all the bytes in the message. */
1338 1.1.4.2 nathanw if (dev->sc_msg_in[0] >= 0x80) ;
1339 1.1.4.2 nathanw else if (dev->sc_msg_in[0] >= 0x30) ;
1340 1.1.4.2 nathanw else if (((dev->sc_msg_in[0] >= 0x20) &&
1341 1.1.4.2 nathanw (dev->sc_msg_in_len == 2)) ||
1342 1.1.4.2 nathanw ((dev->sc_msg_in[0] != 0x01) &&
1343 1.1.4.2 nathanw (dev->sc_msg_in_len == 1))) {
1344 1.1.4.2 nathanw nexus->flags |= SFAS_NF_HAS_MSG;
1345 1.1.4.2 nathanw break;
1346 1.1.4.2 nathanw } else {
1347 1.1.4.2 nathanw if (dev->sc_msg_in_len >= 2)
1348 1.1.4.2 nathanw if ((dev->sc_msg_in[1]+2) == dev->sc_msg_in_len) {
1349 1.1.4.2 nathanw nexus->flags |= SFAS_NF_HAS_MSG;
1350 1.1.4.2 nathanw break;
1351 1.1.4.2 nathanw }
1352 1.1.4.2 nathanw }
1353 1.1.4.2 nathanw
1354 1.1.4.2 nathanw *rp->sfas_command = SFAS_CMD_MESSAGE_ACCEPTED;
1355 1.1.4.2 nathanw sfasiwait(dev);
1356 1.1.4.2 nathanw
1357 1.1.4.2 nathanw if ((dev->sc_status & SFAS_STAT_PHASE_MASK) !=
1358 1.1.4.2 nathanw SFAS_PHASE_MESSAGE_IN)
1359 1.1.4.2 nathanw break;
1360 1.1.4.2 nathanw }
1361 1.1.4.2 nathanw
1362 1.1.4.2 nathanw cmd = SFAS_CMD_MESSAGE_ACCEPTED;
1363 1.1.4.2 nathanw if (nexus->flags & SFAS_NF_HAS_MSG) {
1364 1.1.4.2 nathanw /* We have a message. Decode it. */
1365 1.1.4.2 nathanw
1366 1.1.4.2 nathanw switch(dev->sc_msg_in[0]) {
1367 1.1.4.2 nathanw case 0x00: /* COMMAND COMPLETE */
1368 1.1.4.2 nathanw nexus->state = SFAS_NS_DONE;
1369 1.1.4.2 nathanw break;
1370 1.1.4.2 nathanw case 0x04: /* DISCONNECT */
1371 1.1.4.2 nathanw nexus->state = SFAS_NS_DISCONNECTING;
1372 1.1.4.2 nathanw break;
1373 1.1.4.2 nathanw case 0x02: /* SAVE DATA POINTER */
1374 1.1.4.2 nathanw sfas_save_pointers(dev);
1375 1.1.4.2 nathanw break;
1376 1.1.4.2 nathanw case 0x03: /* RESTORE DATA POINTERS */
1377 1.1.4.2 nathanw sfas_restore_pointers(dev);
1378 1.1.4.2 nathanw break;
1379 1.1.4.2 nathanw case 0x07: /* MESSAGE REJECT */
1380 1.1.4.2 nathanw /*
1381 1.1.4.2 nathanw * If we had sent a SDTR and we got a message
1382 1.1.4.2 nathanw * reject, the scsi docs say that we must go
1383 1.1.4.2 nathanw * to async transfer.
1384 1.1.4.2 nathanw */
1385 1.1.4.2 nathanw if (nexus->flags & SFAS_NF_SDTR_SENT) {
1386 1.1.4.2 nathanw nexus->flags &= ~SFAS_NF_SDTR_SENT;
1387 1.1.4.2 nathanw
1388 1.1.4.2 nathanw nexus->config3 &= ~SFAS_CFG3_FASTSCSI;
1389 1.1.4.2 nathanw nexus->syncper = 5;
1390 1.1.4.2 nathanw nexus->syncoff = 0;
1391 1.1.4.2 nathanw
1392 1.1.4.2 nathanw *rp->sfas_syncper = nexus->syncper;
1393 1.1.4.2 nathanw *rp->sfas_syncoff = nexus->syncoff;
1394 1.1.4.2 nathanw *rp->sfas_config3 = nexus->config3;
1395 1.1.4.2 nathanw } else
1396 1.1.4.2 nathanw /*
1397 1.1.4.2 nathanw * Something was rejected but we don't know
1398 1.1.4.2 nathanw * what! PANIC!
1399 1.1.4.2 nathanw */
1400 1.1.4.2 nathanw panic("sfasintr: Unknown message rejected!");
1401 1.1.4.2 nathanw break;
1402 1.1.4.2 nathanw case 0x08: /* MO OPERATION */
1403 1.1.4.2 nathanw break;
1404 1.1.4.2 nathanw case 0x01: /* EXTENDED MESSAGE */
1405 1.1.4.2 nathanw switch(dev->sc_msg_in[2]) {
1406 1.1.4.2 nathanw case 0x01:/* SYNC. DATA TRANSFER REQUEST */
1407 1.1.4.2 nathanw /* Decode the SDTR message. */
1408 1.1.4.2 nathanw period = 4*dev->sc_msg_in[3];
1409 1.1.4.2 nathanw offset = dev->sc_msg_in[4];
1410 1.1.4.2 nathanw
1411 1.1.4.2 nathanw /*
1412 1.1.4.2 nathanw * Make sure that the specs are within
1413 1.1.4.2 nathanw * chip limits. Note that if we
1414 1.1.4.2 nathanw * initiated the negotiation the specs
1415 1.1.4.2 nathanw * WILL be withing chip limits. If it
1416 1.1.4.2 nathanw * was the scsi unit that initiated
1417 1.1.4.2 nathanw * the negotiation, the specs may be
1418 1.1.4.2 nathanw * to high.
1419 1.1.4.2 nathanw */
1420 1.1.4.2 nathanw if (offset > 16)
1421 1.1.4.2 nathanw offset = 16;
1422 1.1.4.2 nathanw if ((period < 200) &&
1423 1.1.4.2 nathanw (dev->sc_clock_freq <= 25))
1424 1.1.4.2 nathanw period = 200;
1425 1.1.4.2 nathanw
1426 1.1.4.2 nathanw if (offset == 0)
1427 1.1.4.2 nathanw period = 5*dev->sc_clock_period;
1428 1.1.4.2 nathanw
1429 1.1.4.2 nathanw nexus->syncper = period/
1430 1.1.4.2 nathanw dev->sc_clock_period;
1431 1.1.4.2 nathanw nexus->syncoff = offset;
1432 1.1.4.2 nathanw
1433 1.1.4.2 nathanw if (period < 200)
1434 1.1.4.2 nathanw nexus->config3 |= SFAS_CFG3_FASTSCSI;
1435 1.1.4.2 nathanw else
1436 1.1.4.2 nathanw nexus->config3 &=~SFAS_CFG3_FASTSCSI;
1437 1.1.4.2 nathanw
1438 1.1.4.2 nathanw nexus->flags |= SFAS_NF_SYNC_TESTED;
1439 1.1.4.2 nathanw
1440 1.1.4.2 nathanw *rp->sfas_syncper = nexus->syncper;
1441 1.1.4.2 nathanw *rp->sfas_syncoff = nexus->syncoff;
1442 1.1.4.2 nathanw *rp->sfas_config3 = nexus->config3;
1443 1.1.4.2 nathanw
1444 1.1.4.2 nathanw /*
1445 1.1.4.2 nathanw * Hmmm, it seems that the scsi unit
1446 1.1.4.2 nathanw * initiated sync negotiation, so lets
1447 1.1.4.2 nathanw * reply acording to scsi-2 standard.
1448 1.1.4.2 nathanw */
1449 1.1.4.2 nathanw if (!(nexus->flags& SFAS_NF_SDTR_SENT))
1450 1.1.4.2 nathanw {
1451 1.1.4.2 nathanw if ((dev->sc_config_flags &
1452 1.1.4.2 nathanw SFAS_NO_SYNCH) ||
1453 1.1.4.2 nathanw (dev->sc_config_flags &
1454 1.1.4.2 nathanw SFAS_NO_DMA) ||
1455 1.1.4.2 nathanw sfas_inhibit_sync[
1456 1.1.4.2 nathanw nexus->lun_unit & 7]) {
1457 1.1.4.2 nathanw period = 200;
1458 1.1.4.2 nathanw offset = 0;
1459 1.1.4.2 nathanw }
1460 1.1.4.2 nathanw
1461 1.1.4.2 nathanw nexus->offset = offset;
1462 1.1.4.2 nathanw nexus->period = period;
1463 1.1.4.2 nathanw nexus->flags |= SFAS_NF_DO_SDTR;
1464 1.1.4.2 nathanw *rp->sfas_command = SFAS_CMD_SET_ATN;
1465 1.1.4.2 nathanw }
1466 1.1.4.2 nathanw
1467 1.1.4.2 nathanw nexus->flags &= ~SFAS_NF_SDTR_SENT;
1468 1.1.4.2 nathanw break;
1469 1.1.4.2 nathanw
1470 1.1.4.2 nathanw case 0x00: /* MODIFY DATA POINTERS */
1471 1.1.4.2 nathanw case 0x02: /* EXTENDED IDENTIFY (SCSI-1) */
1472 1.1.4.2 nathanw case 0x03: /* WIDE DATA TRANSFER REQUEST */
1473 1.1.4.2 nathanw default:
1474 1.1.4.2 nathanw /* Reject any unhandeled messages. */
1475 1.1.4.2 nathanw
1476 1.1.4.2 nathanw dev->sc_msg_out[0] = 0x07;
1477 1.1.4.2 nathanw dev->sc_msg_out_len = 1;
1478 1.1.4.2 nathanw *rp->sfas_command = SFAS_CMD_SET_ATN;
1479 1.1.4.2 nathanw cmd = SFAS_CMD_MESSAGE_ACCEPTED;
1480 1.1.4.2 nathanw break;
1481 1.1.4.2 nathanw }
1482 1.1.4.2 nathanw break;
1483 1.1.4.2 nathanw
1484 1.1.4.2 nathanw default:
1485 1.1.4.2 nathanw /* Reject any unhandeled messages. */
1486 1.1.4.2 nathanw
1487 1.1.4.2 nathanw dev->sc_msg_out[0] = 0x07;
1488 1.1.4.2 nathanw dev->sc_msg_out_len = 1;
1489 1.1.4.2 nathanw *rp->sfas_command = SFAS_CMD_SET_ATN;
1490 1.1.4.2 nathanw cmd = SFAS_CMD_MESSAGE_ACCEPTED;
1491 1.1.4.2 nathanw break;
1492 1.1.4.2 nathanw }
1493 1.1.4.2 nathanw nexus->flags &= ~SFAS_NF_HAS_MSG;
1494 1.1.4.2 nathanw dev->sc_msg_in_len = 0;
1495 1.1.4.2 nathanw }
1496 1.1.4.2 nathanw break;
1497 1.1.4.2 nathanw default:
1498 1.1.4.2 nathanw printf("SFASINTR: UNKNOWN PHASE! phase: %d\n",
1499 1.1.4.2 nathanw dev->sc_status & SFAS_STAT_PHASE_MASK);
1500 1.1.4.2 nathanw dev->sc_led(dev, 0);
1501 1.1.4.2 nathanw sfas_scsidone(dev, nexus->xs, -4);
1502 1.1.4.2 nathanw
1503 1.1.4.2 nathanw return(-1);
1504 1.1.4.2 nathanw }
1505 1.1.4.2 nathanw
1506 1.1.4.2 nathanw if (cmd)
1507 1.1.4.2 nathanw *rp->sfas_command = cmd;
1508 1.1.4.2 nathanw
1509 1.1.4.2 nathanw return(0);
1510 1.1.4.2 nathanw }
1511 1.1.4.2 nathanw
1512 1.1.4.2 nathanw /*
1513 1.1.4.2 nathanw * Stub for interrupt machine.
1514 1.1.4.2 nathanw */
1515 1.1.4.2 nathanw void
1516 1.1.4.2 nathanw sfasintr(dev)
1517 1.1.4.2 nathanw struct sfas_softc *dev;
1518 1.1.4.2 nathanw {
1519 1.1.4.2 nathanw sfas_regmap_p rp;
1520 1.1.4.2 nathanw struct nexus *nexus;
1521 1.1.4.2 nathanw
1522 1.1.4.2 nathanw rp = dev->sc_fas;
1523 1.1.4.2 nathanw
1524 1.1.4.2 nathanw if (!sfas_pretests(dev, rp)) {
1525 1.1.4.2 nathanw
1526 1.1.4.2 nathanw nexus = dev->sc_cur_nexus;
1527 1.1.4.2 nathanw if (nexus == NULL)
1528 1.1.4.2 nathanw nexus = dev->sc_sel_nexus;
1529 1.1.4.2 nathanw
1530 1.1.4.2 nathanw if (nexus)
1531 1.1.4.2 nathanw if (!sfas_midaction(dev, rp, nexus))
1532 1.1.4.2 nathanw sfas_postaction(dev, rp, nexus);
1533 1.1.4.2 nathanw }
1534 1.1.4.2 nathanw }
1535 1.1.4.2 nathanw
1536 1.1.4.2 nathanw /*
1537 1.1.4.2 nathanw * sfasicmd is used to perform IO when we can't use interrupts. sfasicmd
1538 1.1.4.2 nathanw * emulates the normal environment by waiting for the chip and calling
1539 1.1.4.2 nathanw * sfasintr.
1540 1.1.4.2 nathanw */
1541 1.1.4.2 nathanw void
1542 1.1.4.2 nathanw sfasicmd(dev, pendp)
1543 1.1.4.2 nathanw struct sfas_softc *dev;
1544 1.1.4.2 nathanw struct sfas_pending *pendp;
1545 1.1.4.2 nathanw {
1546 1.1.4.2 nathanw sfas_regmap_p rp;
1547 1.1.4.2 nathanw struct nexus *nexus;
1548 1.1.4.2 nathanw
1549 1.1.4.2 nathanw nexus = &dev->sc_nexus[pendp->xs->xs_periph->periph_target];
1550 1.1.4.2 nathanw rp = dev->sc_fas;
1551 1.1.4.2 nathanw
1552 1.1.4.2 nathanw if (!sfasselect(dev, pendp, (char *)pendp->xs->cmd, pendp->xs->cmdlen,
1553 1.1.4.2 nathanw (char *)pendp->xs->data, pendp->xs->datalen,
1554 1.1.4.2 nathanw SFAS_SELECT_I))
1555 1.1.4.2 nathanw panic("sfasicmd: Couldn't select unit");
1556 1.1.4.2 nathanw
1557 1.1.4.2 nathanw while(nexus->state != SFAS_NS_FINISHED) {
1558 1.1.4.2 nathanw sfasiwait(dev);
1559 1.1.4.2 nathanw sfasintr(dev);
1560 1.1.4.2 nathanw }
1561 1.1.4.2 nathanw
1562 1.1.4.2 nathanw nexus->flags &= ~SFAS_NF_SYNC_TESTED;
1563 1.1.4.2 nathanw }
1564 1.1.4.2 nathanw
1565 1.1.4.2 nathanw
1566 1.1.4.2 nathanw #ifdef SFAS_DEBUG
1567 1.1.4.2 nathanw
1568 1.1.4.2 nathanw void
1569 1.1.4.2 nathanw dump_nexus(nexus)
1570 1.1.4.2 nathanw struct nexus *nexus;
1571 1.1.4.2 nathanw {
1572 1.1.4.2 nathanw int loop;
1573 1.1.4.2 nathanw
1574 1.1.4.2 nathanw printf("nexus=%08x\n", (u_int)nexus);
1575 1.1.4.2 nathanw printf("scsi_fer=%08x\n", (u_int)nexus->xs);
1576 1.1.4.2 nathanw printf("ID=%02x\n", nexus->ID);
1577 1.1.4.2 nathanw printf("clen=%02x\n", nexus->clen);
1578 1.1.4.2 nathanw printf("cbuf=");
1579 1.1.4.2 nathanw for (loop = 0; loop< 14; ++loop)
1580 1.1.4.2 nathanw printf(" %02x\n", nexus->cbuf[loop]);
1581 1.1.4.2 nathanw printf("\n");
1582 1.1.4.2 nathanw printf("dma:\n");
1583 1.1.4.2 nathanw for (loop = 0; loop < MAXCHAIN; ++loop)
1584 1.1.4.2 nathanw printf("dma_chain: %08x %04x %04x\n", nexus->dma[loop].ptr,
1585 1.1.4.2 nathanw nexus->dma[loop].len, nexus->dma[loop].flg);
1586 1.1.4.2 nathanw printf("\n");
1587 1.1.4.2 nathanw
1588 1.1.4.2 nathanw printf("max_link=%d\n", nexus->max_link);
1589 1.1.4.2 nathanw printf("cur_link=%d\n", nexus->cur_link);
1590 1.1.4.2 nathanw
1591 1.1.4.2 nathanw printf("buf=%08x\n", (u_int)nexus->buf);
1592 1.1.4.2 nathanw printf("len=%08x\n", nexus->len);
1593 1.1.4.2 nathanw printf("dma_buf=%08x\n", (u_int)nexus->dma_buf);
1594 1.1.4.2 nathanw printf("dma_len=%08x\n", nexus->dma_len);
1595 1.1.4.2 nathanw printf("dma_blk_ptr=%08x\n", (u_int)nexus->dma_blk_ptr);
1596 1.1.4.2 nathanw printf("dma_blk_len=%08x\n", nexus->dma_blk_len);
1597 1.1.4.2 nathanw printf("dma_blk_flag=%08x\n", nexus->dma_blk_flg);
1598 1.1.4.2 nathanw printf("state=%02x\n", nexus->state);
1599 1.1.4.2 nathanw printf("flags=%04x\n", nexus->flags);
1600 1.1.4.2 nathanw printf("period=%d\n", nexus->period);
1601 1.1.4.2 nathanw printf("offset=%d\n", nexus->offset);
1602 1.1.4.2 nathanw printf("syncper=%d\n", nexus->syncper);
1603 1.1.4.2 nathanw printf("syncoff=%d\n", nexus->syncoff);
1604 1.1.4.2 nathanw printf("config3=%02x\n", nexus->config3);
1605 1.1.4.2 nathanw printf("lun_unit=%d\n", nexus->lun_unit);
1606 1.1.4.2 nathanw printf("status=%02x\n", nexus->status);
1607 1.1.4.2 nathanw printf("\n");
1608 1.1.4.2 nathanw }
1609 1.1.4.2 nathanw
1610 1.1.4.2 nathanw void
1611 1.1.4.2 nathanw dump_nexii(sc)
1612 1.1.4.2 nathanw struct sfas_softc *sc;
1613 1.1.4.2 nathanw {
1614 1.1.4.2 nathanw int loop;
1615 1.1.4.2 nathanw
1616 1.1.4.2 nathanw for (loop = 0; loop < 8; ++loop) {
1617 1.1.4.2 nathanw dump_nexus(&sc->sc_nexus[loop]);
1618 1.1.4.2 nathanw }
1619 1.1.4.2 nathanw }
1620 1.1.4.2 nathanw
1621 1.1.4.2 nathanw void
1622 1.1.4.2 nathanw dump_sfassoftc(sc)
1623 1.1.4.2 nathanw struct sfas_softc *sc;
1624 1.1.4.2 nathanw {
1625 1.1.4.2 nathanw printf("sfassoftc @ 0x%08x\n", (u_int)sc);
1626 1.1.4.2 nathanw printf("clock_freq = %d\n", sc->sc_clock_freq);
1627 1.1.4.2 nathanw printf("timeout = %d\n", sc->sc_timeout);
1628 1.1.4.2 nathanw printf("host_id = %d\n", sc->sc_host_id);
1629 1.1.4.2 nathanw printf("config_flags = 0x%08x\n", sc->sc_config_flags);
1630 1.1.4.2 nathanw printf("led_status = %d\n", sc->sc_led_status);
1631 1.1.4.2 nathanw
1632 1.1.4.2 nathanw dump_nexii(sc);
1633 1.1.4.2 nathanw printf("cur_nexus = 0x%08x\n", (u_int)sc->sc_cur_nexus);
1634 1.1.4.2 nathanw printf("sel_nexus = 0x%08x\n", (u_int)sc->sc_sel_nexus);
1635 1.1.4.2 nathanw printf("\n");
1636 1.1.4.2 nathanw }
1637 1.1.4.2 nathanw
1638 1.1.4.2 nathanw #endif /* SFAS_DEBUG */
1639