sfas.c revision 1.1
1 /* $NetBSD: sfas.c,v 1.1 2001/10/05 22:27:59 reinoud Exp $ */ 2 3 /* 4 * Copyright (c) 1995 Scott Stevens 5 * Copyright (c) 1995 Daniel Widenfalk 6 * Copyright (c) 1994 Christian E. Hopps 7 * Copyright (c) 1990 The Regents of the University of California. 8 * All rights reserved. 9 * 10 * This code is derived from software contributed to Berkeley by 11 * Van Jacobson of Lawrence Berkeley Laboratory. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. All advertising materials mentioning features or use of this software 22 * must display the following acknowledgement: 23 * This product includes software developed by the University of 24 * California, Berkeley and its contributors. 25 * 4. Neither the name of the University nor the names of its contributors 26 * may be used to endorse or promote products derived from this software 27 * without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 30 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 32 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 35 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 39 * SUCH DAMAGE. 40 * 41 * @(#)scsi.c 7.5 (Berkeley) 5/4/91 42 */ 43 44 /* 45 * Emulex FAS216 scsi adaptor driver 46 */ 47 48 /* 49 * Modified for NetBSD/arm32 by Scott Stevens 50 */ 51 52 #include <sys/param.h> 53 #include <sys/systm.h> 54 #include <sys/device.h> 55 #include <sys/buf.h> 56 #include <sys/proc.h> 57 58 #include <dev/scsipi/scsi_all.h> 59 #include <dev/scsipi/scsipi_all.h> 60 #include <dev/scsipi/scsiconf.h> 61 62 #include <uvm/uvm_extern.h> 63 64 #include <machine/pmap.h> 65 #include <machine/cpu.h> 66 #include <machine/io.h> 67 #include <machine/irqhandler.h> 68 #include <machine/katelib.h> 69 #include <acorn32/podulebus/podulebus.h> 70 #include <acorn32/podulebus/sfasreg.h> 71 #include <acorn32/podulebus/sfasvar.h> 72 73 /* Externs */ 74 extern pt_entry_t *pmap_pte __P((pmap_t, vm_offset_t)); 75 76 void sfasinitialize __P((struct sfas_softc *)); 77 void sfas_minphys __P((struct buf *bp)); 78 void sfas_scsi_request __P((struct scsipi_channel *, 79 scsipi_adapter_req_t, void *)); 80 void sfas_donextcmd __P((struct sfas_softc *dev, struct sfas_pending *pendp)); 81 void sfas_scsidone __P((struct sfas_softc *dev, struct scsipi_xfer *xs, 82 int stat)); 83 void sfasintr __P((struct sfas_softc *dev)); 84 void sfasiwait __P((struct sfas_softc *dev)); 85 void sfas_ixfer __P((struct sfas_softc *dev, int polling)); 86 void sfasreset __P((struct sfas_softc *dev, int how)); 87 int sfasselect __P((struct sfas_softc *dev, struct sfas_pending *pendp, 88 unsigned char *cbuf, int clen, 89 unsigned char *buf, int len, int mode)); 90 void sfasicmd __P((struct sfas_softc *dev, struct sfas_pending *pendp)); 91 void sfasgo __P((struct sfas_softc *dev, struct sfas_pending *pendp)); 92 93 /* 94 * Initialize these to make 'em patchable. Defaults to enable sync and discon. 95 */ 96 u_char sfas_inhibit_sync[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; 97 u_char sfas_inhibit_disc[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; 98 99 #define DEBUG 100 #ifdef DEBUG 101 #define QPRINTF(a) if (sfas_debug > 1) printf a 102 int sfas_debug = 2; 103 #else 104 #define QPRINTF 105 #endif 106 107 /* 108 * default minphys routine for sfas based controllers 109 */ 110 void 111 sfas_minphys(bp) 112 struct buf *bp; 113 { 114 115 /* 116 * No max transfer at this level. 117 */ 118 minphys(bp); 119 } 120 121 /* 122 * Initialize the nexus structs. 123 */ 124 void 125 sfas_init_nexus(dev, nexus) 126 struct sfas_softc *dev; 127 struct nexus *nexus; 128 { 129 bzero(nexus, sizeof(struct nexus)); 130 131 nexus->state = SFAS_NS_IDLE; 132 nexus->period = 200; 133 nexus->offset = 0; 134 nexus->syncper = 5; 135 nexus->syncoff = 0; 136 nexus->config3 = dev->sc_config3 & ~SFAS_CFG3_FASTSCSI; 137 } 138 139 void 140 sfasinitialize(dev) 141 struct sfas_softc *dev; 142 { 143 u_int *pte; 144 int i; 145 146 dev->sc_led_status = 0; 147 148 TAILQ_INIT(&dev->sc_xs_pending); 149 TAILQ_INIT(&dev->sc_xs_free); 150 151 /* 152 * Initialize the sfas_pending structs and link them into the free list. We 153 * have to set vm_link_data.pages to 0 or the vm FIX won't work. 154 */ 155 for(i=0; i<MAXPENDING; i++) { 156 TAILQ_INSERT_TAIL(&dev->sc_xs_free, &dev->sc_xs_store[i], 157 link); 158 } 159 160 /* 161 * Calculate the correct clock conversion factor 2 <= factor <= 8, i.e. set 162 * the factor to clock_freq / 5 (int). 163 */ 164 if (dev->sc_clock_freq <= 10) 165 dev->sc_clock_conv_fact = 2; 166 if (dev->sc_clock_freq <= 40) 167 dev->sc_clock_conv_fact = 2+((dev->sc_clock_freq-10)/5); 168 else 169 panic("sfasinitialize: Clock frequence too high"); 170 171 /* Setup and save the basic configuration registers */ 172 dev->sc_config1 = (dev->sc_host_id & SFAS_CFG1_BUS_ID_MASK); 173 dev->sc_config2 = SFAS_CFG2_FEATURES_ENABLE; 174 dev->sc_config3 = (dev->sc_clock_freq > 25 ? SFAS_CFG3_FASTCLK : 0); 175 176 /* Precalculate timeout value and clock period. */ 177 /* Ekkk ... floating point in the kernel !!!! */ 178 /* dev->sc_timeout_val = 1+dev->sc_timeout*dev->sc_clock_freq/ 179 (7.682*dev->sc_clock_conv_fact);*/ 180 dev->sc_timeout_val = 1+dev->sc_timeout*dev->sc_clock_freq/ 181 ((7682*dev->sc_clock_conv_fact)/1000); 182 dev->sc_clock_period = 1000/dev->sc_clock_freq; 183 184 sfasreset(dev, 1 | 2); /* Reset Chip and Bus */ 185 186 dev->sc_units_disconnected = 0; 187 dev->sc_msg_in_len = 0; 188 dev->sc_msg_out_len = 0; 189 190 dev->sc_flags = 0; 191 192 for(i=0; i<8; i++) 193 sfas_init_nexus(dev, &dev->sc_nexus[i]); 194 195 if (dev->sc_ixfer == NULL) 196 dev->sc_ixfer = sfas_ixfer; 197 198 /* 199 * Setup bump buffer. 200 */ 201 dev->sc_bump_va = (u_char *)uvm_km_zalloc(kernel_map, dev->sc_bump_sz); 202 (void) pmap_extract(pmap_kernel(), (vaddr_t)dev->sc_bump_va, 203 (paddr_t *)&dev->sc_bump_pa); 204 205 /* 206 * Setup pages to noncachable, that way we don't have to flush the cache 207 * every time we need "bumped" transfer. 208 */ 209 pte = pmap_pte(pmap_kernel(), (vm_offset_t)dev->sc_bump_va); 210 *pte &= ~(PT_C | PT_B); 211 cpu_tlb_flushD(); 212 cpu_cache_purgeD_rng((vm_offset_t)dev->sc_bump_va, NBPG); 213 214 printf(" dmabuf V0x%08x P0x%08x", (u_int)dev->sc_bump_va, (u_int)dev->sc_bump_pa); 215 } 216 217 218 /* 219 * used by specific sfas controller 220 */ 221 void 222 sfas_scsi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 223 void *arg) 224 { 225 struct scsipi_xfer *xs; 226 struct sfas_softc *dev = (void *)chan->chan_adapter->adapt_dev; 227 struct scsipi_periph *periph; 228 struct sfas_pending *pendp; 229 int flags, s, target; 230 231 switch (req) { 232 case ADAPTER_REQ_RUN_XFER: 233 xs = arg; 234 periph = xs->xs_periph; 235 flags = xs->xs_control; 236 target = periph->periph_target; 237 238 if (flags & XS_CTL_DATA_UIO) 239 panic("sfas: scsi data uio requested"); 240 241 if ((flags & XS_CTL_POLL) && (dev->sc_flags & SFAS_ACTIVE)) 242 panic("sfas_scsicmd: busy"); 243 244 /* Get hold of a sfas_pending block. */ 245 s = splbio(); 246 pendp = dev->sc_xs_free.tqh_first; 247 if (pendp == NULL) { 248 xs->error = XS_RESOURCE_SHORTAGE; 249 scsipi_done(xs); 250 splx(s); 251 return; 252 } 253 TAILQ_REMOVE(&dev->sc_xs_free, pendp, link); 254 pendp->xs = xs; 255 splx(s); 256 257 258 /* If the chip if busy OR the unit is busy, we have to wait for out turn. */ 259 if ((dev->sc_flags & SFAS_ACTIVE) || 260 (dev->sc_nexus[target].flags & SFAS_NF_UNIT_BUSY)) { 261 s = splbio(); 262 TAILQ_INSERT_TAIL(&dev->sc_xs_pending, pendp, link); 263 splx(s); 264 } else 265 sfas_donextcmd(dev, pendp); 266 267 return; 268 269 case ADAPTER_REQ_GROW_RESOURCES: 270 case ADAPTER_REQ_SET_XFER_MODE: 271 /* XXX Not supported. */ 272 return; 273 } 274 } 275 276 /* 277 * Actually select the unit, whereby the whole scsi-process is started. 278 */ 279 void 280 sfas_donextcmd(dev, pendp) 281 struct sfas_softc *dev; 282 struct sfas_pending *pendp; 283 { 284 int s; 285 286 /* 287 * Special case for scsi unit reset. I think this is waterproof. We first 288 * select the unit during splbio. We then cycle through the generated 289 * interrupts until the interrupt routine signals that the unit has 290 * acknowledged the reset. After that we have to wait a reset to select 291 * delay before anything else can happend. 292 */ 293 if (pendp->xs->xs_control & XS_CTL_RESET) { 294 struct nexus *nexus; 295 296 s = splbio(); 297 while(!sfasselect(dev, pendp, 0, 0, 0, 0, SFAS_SELECT_K)) { 298 splx(s); 299 delay(10); 300 s = splbio(); 301 } 302 303 nexus = dev->sc_cur_nexus; 304 while(nexus->flags & SFAS_NF_UNIT_BUSY) { 305 sfasiwait(dev); 306 sfasintr(dev); 307 } 308 309 nexus->flags |= SFAS_NF_UNIT_BUSY; 310 splx(s); 311 312 sfasreset(dev, 0); 313 314 s = splbio(); 315 nexus->flags &= ~SFAS_NF_UNIT_BUSY; 316 splx(s); 317 } 318 319 /* 320 * If we are polling, go to splbio and perform the command, else we poke 321 * the scsi-bus via sfasgo to get the interrupt machine going. 322 */ 323 if (pendp->xs->xs_control & XS_CTL_POLL) { 324 s = splbio(); 325 sfasicmd(dev, pendp); 326 TAILQ_INSERT_TAIL(&dev->sc_xs_free, pendp, link); 327 splx(s); 328 } else { 329 sfasgo(dev, pendp); 330 } 331 } 332 333 void 334 sfas_scsidone(dev, xs, stat) 335 struct sfas_softc *dev; 336 struct scsipi_xfer *xs; 337 int stat; 338 { 339 struct sfas_pending *pendp; 340 int s; 341 342 xs->status = stat; 343 344 if (stat == 0) 345 xs->resid = 0; 346 else { 347 switch(stat) { 348 case SCSI_CHECK: 349 case SCSI_BUSY: 350 xs->error = XS_BUSY; 351 break; 352 case -1: 353 xs->error = XS_DRIVER_STUFFUP; 354 QPRINTF(("sfas_scsicmd() bad %x\n", stat)); 355 break; 356 default: 357 xs->error = XS_TIMEOUT; 358 break; 359 } 360 } 361 362 /* Steal the next command from the queue so that one unit can't hog the bus. */ 363 s = splbio(); 364 pendp = dev->sc_xs_pending.tqh_first; 365 while(pendp) { 366 if (!(dev->sc_nexus[pendp->xs->xs_periph->periph_target].flags & 367 SFAS_NF_UNIT_BUSY)) 368 break; 369 pendp = pendp->link.tqe_next; 370 } 371 372 if (pendp != NULL) { 373 TAILQ_REMOVE(&dev->sc_xs_pending, pendp, link); 374 } 375 376 splx(s); 377 scsipi_done(xs); 378 379 if (pendp) 380 sfas_donextcmd(dev, pendp); 381 } 382 383 /* 384 * There are two kinds of reset: 385 * 1) CHIP-bus reset. This also implies a SCSI-bus reset. 386 * 2) SCSI-bus reset. 387 * After the appropriate resets have been performed we wait a reset to select 388 * delay time. 389 */ 390 void 391 sfasreset(dev, how) 392 struct sfas_softc *dev; 393 int how; 394 { 395 sfas_regmap_p rp; 396 int i, s; 397 398 rp = dev->sc_fas; 399 400 if (how & 1) { 401 for(i=0; i<8; i++) 402 sfas_init_nexus(dev, &dev->sc_nexus[i]); 403 404 *rp->sfas_command = SFAS_CMD_RESET_CHIP; 405 delay(1); 406 *rp->sfas_command = SFAS_CMD_NOP; 407 408 *rp->sfas_config1 = dev->sc_config1; 409 *rp->sfas_config2 = dev->sc_config2; 410 *rp->sfas_config3 = dev->sc_config3; 411 *rp->sfas_timeout = dev->sc_timeout_val; 412 *rp->sfas_clkconv = dev->sc_clock_conv_fact & 413 SFAS_CLOCK_CONVERSION_MASK; 414 } 415 416 if (how & 2) { 417 for(i=0; i<8; i++) 418 sfas_init_nexus(dev, &dev->sc_nexus[i]); 419 420 s = splbio(); 421 422 *rp->sfas_command = SFAS_CMD_RESET_SCSI_BUS; 423 delay(100); 424 425 /* Skip interrupt generated by RESET_SCSI_BUS */ 426 while(*rp->sfas_status & SFAS_STAT_INTERRUPT_PENDING) { 427 dev->sc_status = *rp->sfas_status; 428 dev->sc_interrupt = *rp->sfas_interrupt; 429 430 delay(100); 431 } 432 433 dev->sc_status = *rp->sfas_status; 434 dev->sc_interrupt = *rp->sfas_interrupt; 435 436 splx(s); 437 } 438 439 if (dev->sc_config_flags & SFAS_SLOW_START) 440 delay(4*250000); /* RESET to SELECT DELAY*4 for slow devices */ 441 else 442 delay(250000); /* RESET to SELECT DELAY */ 443 } 444 445 /* 446 * Save active data pointers to the nexus block currently active. 447 */ 448 void 449 sfas_save_pointers(dev) 450 struct sfas_softc *dev; 451 { 452 struct nexus *nx; 453 454 nx = dev->sc_cur_nexus; 455 if (nx) { 456 nx->cur_link = dev->sc_cur_link; 457 nx->max_link = dev->sc_max_link; 458 nx->buf = dev->sc_buf; 459 nx->len = dev->sc_len; 460 nx->dma_len = dev->sc_dma_len; 461 nx->dma_buf = dev->sc_dma_buf; 462 nx->dma_blk_flg = dev->sc_dma_blk_flg; 463 nx->dma_blk_len = dev->sc_dma_blk_len; 464 nx->dma_blk_ptr = dev->sc_dma_blk_ptr; 465 } 466 } 467 468 /* 469 * Restore data pointers from the currently active nexus block. 470 */ 471 void 472 sfas_restore_pointers(dev) 473 struct sfas_softc *dev; 474 { 475 struct nexus *nx; 476 477 nx = dev->sc_cur_nexus; 478 if (nx) { 479 dev->sc_cur_link = nx->cur_link; 480 dev->sc_max_link = nx->max_link; 481 dev->sc_buf = nx->buf; 482 dev->sc_len = nx->len; 483 dev->sc_dma_len = nx->dma_len; 484 dev->sc_dma_buf = nx->dma_buf; 485 dev->sc_dma_blk_flg = nx->dma_blk_flg; 486 dev->sc_dma_blk_len = nx->dma_blk_len; 487 dev->sc_dma_blk_ptr = nx->dma_blk_ptr; 488 dev->sc_chain = nx->dma; 489 dev->sc_unit = (nx->lun_unit & 0x0F); 490 dev->sc_lun = (nx->lun_unit & 0xF0) >> 4; 491 } 492 } 493 494 /* 495 * sfasiwait is used during interrupt and polled IO to wait for an event from 496 * the FAS chip. This function MUST NOT BE CALLED without interrupt disabled. 497 */ 498 void 499 sfasiwait(dev) 500 struct sfas_softc *dev; 501 { 502 sfas_regmap_p rp; 503 504 /* 505 * If SFAS_DONT_WAIT is set, we have already grabbed the interrupt info 506 * elsewhere. So we don't have to wait for it. 507 */ 508 if (dev->sc_flags & SFAS_DONT_WAIT) { 509 dev->sc_flags &= ~SFAS_DONT_WAIT; 510 return; 511 } 512 513 rp = dev->sc_fas; 514 515 /* Wait for FAS chip to signal an interrupt. */ 516 while(!(*rp->sfas_status & SFAS_STAT_INTERRUPT_PENDING)) 517 delay(1); 518 519 /* Grab interrupt info from chip. */ 520 dev->sc_status = *rp->sfas_status; 521 dev->sc_interrupt = *rp->sfas_interrupt; 522 if (dev->sc_interrupt & SFAS_INT_RESELECTED) { 523 dev->sc_resel[0] = *rp->sfas_fifo; 524 dev->sc_resel[1] = *rp->sfas_fifo; 525 } 526 } 527 528 /* 529 * Transfer info to/from device. sfas_ixfer uses polled IO+sfasiwait so the 530 * rules that apply to sfasiwait also applies here. 531 */ 532 void 533 sfas_ixfer(dev, polling) 534 struct sfas_softc *dev; 535 int polling; 536 { 537 sfas_regmap_p rp; 538 u_char *buf; 539 int len, mode, phase; 540 541 rp = dev->sc_fas; 542 buf = dev->sc_buf; 543 len = dev->sc_len; 544 545 /* 546 * Decode the scsi phase to determine whether we are reading or writing. 547 * mode == 1 => READ, mode == 0 => WRITE 548 */ 549 phase = dev->sc_status & SFAS_STAT_PHASE_MASK; 550 mode = (phase == SFAS_PHASE_DATA_IN); 551 552 while(len && ((dev->sc_status & SFAS_STAT_PHASE_MASK) == phase)) 553 if (mode) { 554 *rp->sfas_command = SFAS_CMD_TRANSFER_INFO; 555 556 sfasiwait(dev); 557 558 *buf++ = *rp->sfas_fifo; 559 len--; 560 } else { 561 len--; 562 *rp->sfas_fifo = *buf++; 563 *rp->sfas_command = SFAS_CMD_TRANSFER_INFO; 564 565 sfasiwait(dev); 566 } 567 568 /* Update buffer pointers to reflect the sent/received data. */ 569 dev->sc_buf = buf; 570 dev->sc_len = len; 571 572 /* 573 * Since the last sfasiwait will be a phase-change, we can't wait for it 574 * again later, so we have to signal that. 575 * Since this may be called from an interrupt initiated routine then we 576 * must call sfasintr again to avoid losing an interrupt. Phew! 577 */ 578 if(polling) 579 dev->sc_flags |= SFAS_DONT_WAIT; 580 else 581 sfasintr(dev); 582 } 583 584 /* 585 * Build a Synchronous Data Transfer Request message 586 */ 587 void 588 sfas_build_sdtrm(dev, period, offset) 589 struct sfas_softc *dev; 590 int period; 591 int offset; 592 { 593 dev->sc_msg_out[0] = 0x01; 594 dev->sc_msg_out[1] = 0x03; 595 dev->sc_msg_out[2] = 0x01; 596 dev->sc_msg_out[3] = period/4; 597 dev->sc_msg_out[4] = offset; 598 dev->sc_msg_out_len= 5; 599 } 600 601 /* 602 * Arbitate the scsi bus and select the unit 603 */ 604 int 605 sfas_select_unit(dev, target) 606 struct sfas_softc *dev; 607 short target; 608 { 609 sfas_regmap_p rp; 610 struct nexus *nexus; 611 int s, retcode, i; 612 u_char cmd; 613 614 s = splbio(); /* Do this at splbio so that we won't be disturbed. */ 615 616 retcode = 0; 617 618 nexus = &dev->sc_nexus[target]; 619 620 /* 621 * Check if the chip is busy. If not the we mark it as so and hope that nobody 622 * reselects us until we have grabbed the bus. 623 */ 624 if (!(dev->sc_flags & SFAS_ACTIVE) && !dev->sc_sel_nexus) { 625 dev->sc_flags |= SFAS_ACTIVE; 626 627 rp = dev->sc_fas; 628 629 *rp->sfas_syncper = nexus->syncper; 630 *rp->sfas_syncoff = nexus->syncoff; 631 *rp->sfas_config3 = nexus->config3; 632 633 *rp->sfas_config1 = dev->sc_config1; 634 *rp->sfas_timeout = dev->sc_timeout_val; 635 *rp->sfas_dest_id = target; 636 637 /* If nobody has stolen the bus, we can send a select command to the chip. */ 638 if (!(*rp->sfas_status & SFAS_STAT_INTERRUPT_PENDING)) { 639 *rp->sfas_fifo = nexus->ID; 640 if ((nexus->flags & (SFAS_NF_DO_SDTR | SFAS_NF_RESET)) 641 || (dev->sc_msg_out_len != 0)) 642 cmd = SFAS_CMD_SEL_ATN_STOP; 643 else { 644 for(i=0; i<nexus->clen; i++) 645 *rp->sfas_fifo = nexus->cbuf[i]; 646 647 cmd = SFAS_CMD_SEL_ATN; 648 } 649 650 dev->sc_sel_nexus = nexus; 651 652 *rp->sfas_command = cmd; 653 retcode = 1; 654 nexus->flags &= ~SFAS_NF_RETRY_SELECT; 655 } else 656 nexus->flags |= SFAS_NF_RETRY_SELECT; 657 } else 658 nexus->flags |= SFAS_NF_RETRY_SELECT; 659 660 splx(s); 661 return(retcode); 662 } 663 664 /* 665 * Grab the nexus if available else return 0. 666 */ 667 struct nexus * 668 sfas_arbitate_target(dev, target) 669 struct sfas_softc *dev; 670 int target; 671 { 672 struct nexus *nexus; 673 int s; 674 675 /* 676 * This is realy simple. Raise interrupt level to splbio. Grab the nexus and 677 * leave. 678 */ 679 nexus = &dev->sc_nexus[target]; 680 681 s = splbio(); 682 683 if (nexus->flags & SFAS_NF_UNIT_BUSY) 684 nexus = 0; 685 else 686 nexus->flags |= SFAS_NF_UNIT_BUSY; 687 688 splx(s); 689 return(nexus); 690 } 691 692 /* 693 * Setup a nexus for use. Initializes command, buffer pointers and dma chain. 694 */ 695 void 696 sfas_setup_nexus(dev, nexus, pendp, cbuf, clen, buf, len, mode) 697 struct sfas_softc *dev; 698 struct nexus *nexus; 699 struct sfas_pending *pendp; 700 unsigned char *cbuf; 701 int clen; 702 unsigned char *buf; 703 int len; 704 int mode; 705 { 706 char sync, target, lun; 707 708 target = pendp->xs->xs_periph->periph_target; 709 lun = pendp->xs->xs_periph->periph_lun; 710 711 /* 712 * Adopt mode to reflect the config flags. 713 * If we can't use DMA we can't use synch transfer. Also check the 714 * sfas_inhibit_xxx[target] flags. 715 */ 716 if ((dev->sc_config_flags & (SFAS_NO_SYNCH | SFAS_NO_DMA)) || 717 sfas_inhibit_sync[(int)target]) 718 mode &= ~SFAS_SELECT_S; 719 720 if ((dev->sc_config_flags & SFAS_NO_RESELECT) || 721 sfas_inhibit_disc[(int)target]) 722 mode &= ~SFAS_SELECT_R; 723 724 nexus->xs = pendp->xs; 725 726 /* Setup the nexus struct. */ 727 nexus->ID = ((mode & SFAS_SELECT_R) ? 0xC0 : 0x80) | lun; 728 nexus->clen = clen; 729 bcopy(cbuf, nexus->cbuf, nexus->clen); 730 nexus->cbuf[1] |= lun << 5; /* Fix the lun bits */ 731 nexus->cur_link = 0; 732 nexus->dma_len = 0; 733 nexus->dma_buf = 0; 734 nexus->dma_blk_len = 0; 735 nexus->dma_blk_ptr = 0; 736 nexus->len = len; 737 nexus->buf = buf; 738 nexus->lun_unit = (lun << 4) | target; 739 nexus->state = SFAS_NS_SELECTED; 740 741 /* We must keep these flags. All else must be zero. */ 742 nexus->flags &= SFAS_NF_UNIT_BUSY 743 | SFAS_NF_SYNC_TESTED | SFAS_NF_SELECT_ME; 744 745 if (mode & SFAS_SELECT_I) 746 nexus->flags |= SFAS_NF_IMMEDIATE; 747 if (mode & SFAS_SELECT_K) 748 nexus->flags |= SFAS_NF_RESET; 749 750 sync = ((mode & SFAS_SELECT_S) ? 1 : 0); 751 752 /* We can't use sync during polled IO. */ 753 if (sync && (mode & SFAS_SELECT_I)) 754 sync = 0; 755 756 if (!sync && 757 ((nexus->flags & SFAS_NF_SYNC_TESTED) && (nexus->offset != 0))) { 758 /* 759 * If the scsi unit is set to synch transfer and we don't want 760 * that, we have to renegotiate. 761 */ 762 763 nexus->flags |= SFAS_NF_DO_SDTR; 764 nexus->period = 200; 765 nexus->offset = 0; 766 } else if (sync && !(nexus->flags & SFAS_NF_SYNC_TESTED)) { 767 /* 768 * If the scsi unit is not set to synch transfer and we want 769 * that, we have to negotiate. This should realy base the 770 * period on the clock frequence rather than just check if 771 * >25Mhz 772 */ 773 774 nexus->flags |= SFAS_NF_DO_SDTR; 775 nexus->period = ((dev->sc_clock_freq>25) ? 100 : 200); 776 nexus->offset = 8; 777 778 /* If the user has a long cable, we want to limit the period */ 779 if ((nexus->period == 100) && 780 (dev->sc_config_flags & SFAS_SLOW_CABLE)) 781 nexus->period = 200; 782 } 783 784 /* 785 * Fake a dma-block for polled IO. This way we can use the same code to handle 786 * reselection. Much nicer this way. 787 */ 788 if ((mode & SFAS_SELECT_I) || (dev->sc_config_flags & SFAS_NO_DMA)) { 789 nexus->dma[0].ptr = (vm_offset_t)buf; 790 nexus->dma[0].len = len; 791 nexus->dma[0].flg = SFAS_CHAIN_PRG; 792 nexus->max_link = 1; 793 } else { 794 nexus->max_link = dev->sc_build_dma_chain(dev, nexus->dma, 795 buf, len); 796 } 797 798 /* Flush the caches. */ 799 800 if (len && !(mode & SFAS_SELECT_I)) 801 cpu_cache_purgeD_rng((vm_offset_t)buf, len); 802 } 803 804 int 805 sfasselect(dev, pendp, cbuf, clen, buf, len, mode) 806 struct sfas_softc *dev; 807 struct sfas_pending *pendp; 808 unsigned char *cbuf; 809 int clen; 810 unsigned char *buf; 811 int len; 812 int mode; 813 { 814 struct nexus *nexus; 815 816 /* Get the nexus struct. */ 817 nexus = sfas_arbitate_target(dev, pendp->xs->xs_periph->periph_target); 818 if (nexus == NULL) 819 return(0); 820 821 /* Setup the nexus struct. */ 822 sfas_setup_nexus(dev, nexus, pendp, cbuf, clen, buf, len, mode); 823 824 /* Post it to the interrupt machine. */ 825 sfas_select_unit(dev, pendp->xs->xs_periph->periph_target); 826 827 return(1); 828 } 829 830 void 831 sfasgo(dev, pendp) 832 struct sfas_softc *dev; 833 struct sfas_pending *pendp; 834 { 835 int s; 836 char *buf; 837 838 buf = pendp->xs->data; 839 840 if (sfasselect(dev, pendp, (char *)pendp->xs->cmd, pendp->xs->cmdlen, 841 buf, pendp->xs->datalen, SFAS_SELECT_RS)) { 842 /* 843 * We got the command going so the sfas_pending struct is now 844 * free to reuse. 845 */ 846 847 s = splbio(); 848 TAILQ_INSERT_TAIL(&dev->sc_xs_free, pendp, link); 849 splx(s); 850 } else { 851 /* 852 * We couldn't make the command fly so we have to wait. The 853 * struct MUST be inserted at the head to keep the order of 854 * the commands. 855 */ 856 857 s = splbio(); 858 TAILQ_INSERT_HEAD(&dev->sc_xs_pending, pendp, link); 859 splx(s); 860 } 861 862 return; 863 } 864 865 /* 866 * Part one of the interrupt machine. Error checks and reselection test. 867 * We don't know if we have an active nexus here! 868 */ 869 int 870 sfas_pretests(dev, rp) 871 struct sfas_softc *dev; 872 sfas_regmap_p rp; 873 { 874 struct nexus *nexus; 875 int i, s; 876 877 if (dev->sc_interrupt & SFAS_INT_SCSI_RESET_DETECTED) { 878 /* 879 * Cleanup and notify user. Lets hope that this is all we 880 * have to do 881 */ 882 883 for(i=0; i<8; i++) { 884 if (dev->sc_nexus[i].xs) 885 sfas_scsidone(dev, dev->sc_nexus[i].xs, -2); 886 887 sfas_init_nexus(dev, &dev->sc_nexus[i]); 888 } 889 printf("sfasintr: SCSI-RESET detected!"); 890 return(-1); 891 } 892 893 if (dev->sc_interrupt & SFAS_INT_ILLEGAL_COMMAND) { 894 /* Something went terrible wrong! Dump some data and panic! */ 895 896 printf("FIFO:"); 897 while(*rp->sfas_fifo_flags & SFAS_FIFO_COUNT_MASK) 898 printf(" %x", *rp->sfas_fifo); 899 printf("\n"); 900 901 printf("CMD: %x\n", *rp->sfas_command); 902 panic("sfasintr: ILLEGAL COMMAND!"); 903 } 904 905 if (dev->sc_interrupt & SFAS_INT_RESELECTED) { 906 /* We were reselected. Set the chip as busy */ 907 908 s = splbio(); 909 dev->sc_flags |= SFAS_ACTIVE; 910 if (dev->sc_sel_nexus) { 911 dev->sc_sel_nexus->flags |= SFAS_NF_SELECT_ME; 912 dev->sc_sel_nexus = 0; 913 } 914 splx(s); 915 916 if (dev->sc_units_disconnected) { 917 /* Find out who reselected us. */ 918 919 dev->sc_resel[0] &= ~(1<<dev->sc_host_id); 920 921 for(i=0; i<8; i++) 922 if (dev->sc_resel[0] & (1<<i)) 923 break; 924 925 if (i == 8) 926 panic("Illegal reselection!"); 927 928 if (dev->sc_nexus[i].state == SFAS_NS_DISCONNECTED) { 929 /* 930 * This unit had disconnected, so we reconnect 931 * it. 932 */ 933 934 dev->sc_cur_nexus = &dev->sc_nexus[i]; 935 nexus = dev->sc_cur_nexus; 936 937 *rp->sfas_syncper = nexus->syncper; 938 *rp->sfas_syncoff = nexus->syncoff; 939 *rp->sfas_config3 = nexus->config3; 940 941 *rp->sfas_dest_id = i & 7; 942 943 dev->sc_units_disconnected--; 944 dev->sc_msg_in_len= 0; 945 946 /* Restore active pointers. */ 947 sfas_restore_pointers(dev); 948 949 nexus->state = SFAS_NS_RESELECTED; 950 951 *rp->sfas_command = SFAS_CMD_MESSAGE_ACCEPTED; 952 953 return(1); 954 } 955 } 956 957 /* Somehow we got an illegal reselection. Dump and panic. */ 958 printf("sfasintr: resel[0] %x resel[1] %x disconnected %d\n", 959 dev->sc_resel[0], dev->sc_resel[1], 960 dev->sc_units_disconnected); 961 panic("sfasintr: Unexpected reselection!"); 962 } 963 964 return(0); 965 } 966 967 /* 968 * Part two of the interrupt machine. Handle disconnection and post command 969 * processing. We know that we have an active nexus here. 970 */ 971 int 972 sfas_midaction(dev, rp, nexus) 973 struct sfas_softc *dev; 974 sfas_regmap_p rp; 975 struct nexus *nexus; 976 { 977 int i, left, len, s; 978 u_char status, msg; 979 980 if (dev->sc_interrupt & SFAS_INT_DISCONNECT) { 981 s = splbio(); 982 dev->sc_cur_nexus = 0; 983 984 /* Mark chip as busy and clean up the chip FIFO. */ 985 dev->sc_flags &= ~SFAS_ACTIVE; 986 *rp->sfas_command = SFAS_CMD_FLUSH_FIFO; 987 988 /* Let the nexus state reflect what we have to do. */ 989 switch(nexus->state) { 990 case SFAS_NS_SELECTED: 991 dev->sc_sel_nexus = 0; 992 nexus->flags &= ~SFAS_NF_SELECT_ME; 993 994 /* 995 * We were trying to select the unit. Probably no unit 996 * at this ID. 997 */ 998 nexus->xs->resid = dev->sc_len; 999 1000 nexus->status = -2; 1001 nexus->flags &= ~SFAS_NF_UNIT_BUSY; 1002 nexus->state = SFAS_NS_FINISHED; 1003 break; 1004 1005 case SFAS_NS_DONE: 1006 /* All done. */ 1007 nexus->xs->resid = dev->sc_len; 1008 1009 nexus->flags &= ~SFAS_NF_UNIT_BUSY; 1010 nexus->state = SFAS_NS_FINISHED; 1011 dev->sc_led(dev, 0); 1012 break; 1013 1014 case SFAS_NS_DISCONNECTING: 1015 /* 1016 * We have received a DISCONNECT message, so we are 1017 * doing a normal disconnection. 1018 */ 1019 nexus->state = SFAS_NS_DISCONNECTED; 1020 1021 dev->sc_units_disconnected++; 1022 break; 1023 1024 case SFAS_NS_RESET: 1025 /* 1026 * We were reseting this SCSI-unit. Clean up the 1027 * nexus struct. 1028 */ 1029 dev->sc_led(dev, 0); 1030 sfas_init_nexus(dev, nexus); 1031 break; 1032 1033 default: 1034 /* 1035 * Unexpected disconnection! Cleanup and exit. This 1036 * shouldn't cause any problems. 1037 */ 1038 printf("sfasintr: Unexpected disconnection\n"); 1039 printf("sfasintr: u %x s %d p %d f %x c %x\n", 1040 nexus->lun_unit, nexus->state, 1041 dev->sc_status & SFAS_STAT_PHASE_MASK, 1042 nexus->flags, nexus->cbuf[0]); 1043 1044 nexus->xs->resid = dev->sc_len; 1045 1046 nexus->flags &= ~SFAS_NF_UNIT_BUSY; 1047 nexus->state = SFAS_NS_FINISHED; 1048 nexus->status = -3; 1049 1050 dev->sc_led(dev, 0); 1051 break; 1052 } 1053 1054 /* 1055 * If we have disconnected units, we MUST enable reselection 1056 * within 250ms. 1057 */ 1058 if (dev->sc_units_disconnected && 1059 !(dev->sc_flags & SFAS_ACTIVE)) 1060 *rp->sfas_command = SFAS_CMD_ENABLE_RESEL; 1061 1062 splx(s); 1063 1064 /* Select the first pre-initialized nexus we find. */ 1065 for(i=0; i<8; i++) 1066 if (dev->sc_nexus[i].flags & (SFAS_NF_SELECT_ME | SFAS_NF_RETRY_SELECT)) 1067 if (sfas_select_unit(dev, i) == 2) 1068 break; 1069 1070 /* We are done with this nexus! */ 1071 if (nexus->state == SFAS_NS_FINISHED) 1072 sfas_scsidone(dev, nexus->xs, nexus->status); 1073 1074 return(1); 1075 } 1076 1077 switch(nexus->state) { 1078 case SFAS_NS_SELECTED: 1079 dev->sc_cur_nexus = nexus; 1080 dev->sc_sel_nexus = 0; 1081 1082 nexus->flags &= ~SFAS_NF_SELECT_ME; 1083 1084 /* 1085 * We have selected a unit. Setup chip, restore pointers and 1086 * light the led. 1087 */ 1088 *rp->sfas_syncper = nexus->syncper; 1089 *rp->sfas_syncoff = nexus->syncoff; 1090 *rp->sfas_config3 = nexus->config3; 1091 1092 sfas_restore_pointers(dev); 1093 1094 nexus->status = 0xFF; 1095 dev->sc_msg_in[0] = 0xFF; 1096 dev->sc_msg_in_len= 0; 1097 1098 dev->sc_led(dev, 1); 1099 1100 break; 1101 1102 case SFAS_NS_DATA_IN: 1103 case SFAS_NS_DATA_OUT: 1104 /* We have transfered data. */ 1105 if (dev->sc_dma_len) 1106 if (dev->sc_cur_link < dev->sc_max_link) { 1107 /* 1108 * Clean up dma and at the same time get how 1109 * many bytes that were NOT transfered. 1110 */ 1111 left = dev->sc_setup_dma(dev, 0, 0, SFAS_DMA_CLEAR); 1112 len = dev->sc_dma_len; 1113 1114 if (nexus->state == SFAS_NS_DATA_IN) { 1115 /* 1116 * If we were bumping we may have had an odd length 1117 * which means that there may be bytes left in the 1118 * fifo. We also need to move the data from the 1119 * bump buffer to the actual memory. 1120 */ 1121 if (dev->sc_dma_buf == dev->sc_bump_pa) 1122 { 1123 while((*rp->sfas_fifo_flags&SFAS_FIFO_COUNT_MASK) 1124 && left) 1125 dev->sc_bump_va[len-(left--)] = *rp->sfas_fifo; 1126 1127 bcopy(dev->sc_bump_va, dev->sc_buf, len-left); 1128 } 1129 } else { 1130 /* Count any unsent bytes and flush them. */ 1131 left+= *rp->sfas_fifo_flags & SFAS_FIFO_COUNT_MASK; 1132 *rp->sfas_command = SFAS_CMD_FLUSH_FIFO; 1133 } 1134 1135 /* 1136 * Update pointers/length to reflect the transfered 1137 * data. 1138 */ 1139 dev->sc_len -= len-left; 1140 dev->sc_buf += len-left; 1141 1142 dev->sc_dma_buf += len-left; 1143 dev->sc_dma_len = left; 1144 1145 dev->sc_dma_blk_ptr += len-left; 1146 dev->sc_dma_blk_len -= len-left; 1147 1148 /* 1149 * If it was the end of a dma block, we select the 1150 * next to begin with. 1151 */ 1152 if (!dev->sc_dma_blk_len) 1153 dev->sc_cur_link++; 1154 } 1155 break; 1156 1157 case SFAS_NS_STATUS: 1158 /* 1159 * If we were not sensing, grab the status byte. If we were 1160 * sensing and we got a bad status, let the user know. 1161 */ 1162 1163 status = *rp->sfas_fifo; 1164 msg = *rp->sfas_fifo; 1165 1166 nexus->status = status; 1167 if (status != 0) 1168 nexus->status = -1; 1169 1170 /* 1171 * Preload the command complete message. Handeled in 1172 * sfas_postaction. 1173 */ 1174 dev->sc_msg_in[0] = msg; 1175 dev->sc_msg_in_len = 1; 1176 nexus->flags |= SFAS_NF_HAS_MSG; 1177 break; 1178 1179 default: 1180 break; 1181 } 1182 1183 return(0); 1184 } 1185 1186 /* 1187 * Part three of the interrupt machine. Handle phase changes (and repeated 1188 * phase passes). We know that we have an active nexus here. 1189 */ 1190 int 1191 sfas_postaction(dev, rp, nexus) 1192 struct sfas_softc *dev; 1193 sfas_regmap_p rp; 1194 struct nexus *nexus; 1195 { 1196 int i, len; 1197 u_char cmd; 1198 short offset, period; 1199 1200 cmd = 0; 1201 1202 switch(dev->sc_status & SFAS_STAT_PHASE_MASK) { 1203 case SFAS_PHASE_DATA_OUT: 1204 case SFAS_PHASE_DATA_IN: 1205 if ((dev->sc_status & SFAS_STAT_PHASE_MASK) == 1206 SFAS_PHASE_DATA_OUT) 1207 nexus->state = SFAS_NS_DATA_OUT; 1208 else 1209 nexus->state = SFAS_NS_DATA_IN; 1210 1211 /* Make DMA ready to accept new data. Load active pointers 1212 * from the DMA block. */ 1213 dev->sc_setup_dma(dev, 0, 0, SFAS_DMA_CLEAR); 1214 if (dev->sc_cur_link < dev->sc_max_link) { 1215 if (!dev->sc_dma_blk_len) { 1216 dev->sc_dma_blk_ptr = dev->sc_chain[dev->sc_cur_link].ptr; 1217 dev->sc_dma_blk_len = dev->sc_chain[dev->sc_cur_link].len; 1218 dev->sc_dma_blk_flg = dev->sc_chain[dev->sc_cur_link].flg; 1219 } 1220 1221 /* We should use polled IO here. */ 1222 if (dev->sc_dma_blk_flg == SFAS_CHAIN_PRG) { 1223 dev->sc_ixfer(dev, nexus->xs->xs_control & XS_CTL_POLL); 1224 dev->sc_cur_link++; 1225 dev->sc_dma_len = 0; 1226 break; 1227 } 1228 else if (dev->sc_dma_blk_flg == SFAS_CHAIN_BUMP) 1229 len = dev->sc_dma_blk_len; 1230 else 1231 len = dev->sc_need_bump(dev, dev->sc_dma_blk_ptr, 1232 dev->sc_dma_blk_len); 1233 1234 /* 1235 * If len != 0 we must bump the data, else we just DMA it 1236 * straight into memory. 1237 */ 1238 if (len) { 1239 dev->sc_dma_buf = dev->sc_bump_pa; 1240 dev->sc_dma_len = len; 1241 1242 if (nexus->state == SFAS_NS_DATA_OUT) 1243 bcopy(dev->sc_buf, dev->sc_bump_va, dev->sc_dma_len); 1244 } else { 1245 dev->sc_dma_buf = dev->sc_dma_blk_ptr; 1246 dev->sc_dma_len = dev->sc_dma_blk_len; 1247 } 1248 1249 /* Load DMA with adress and length of transfer. */ 1250 dev->sc_setup_dma(dev, dev->sc_dma_buf, dev->sc_dma_len, 1251 ((nexus->state == SFAS_NS_DATA_OUT) ? 1252 SFAS_DMA_WRITE : SFAS_DMA_READ)); 1253 1254 /* printf("Using DMA !!!!\n");*/ 1255 cmd = SFAS_CMD_TRANSFER_INFO | SFAS_CMD_DMA; 1256 } else { 1257 /* 1258 * Hmmm, the unit wants more info than we have or has 1259 * more than we want. Let the chip handle that. 1260 */ 1261 1262 *rp->sfas_tc_low = 0; /* was 256 but this does not make sense */ 1263 *rp->sfas_tc_mid = 1; 1264 *rp->sfas_tc_high = 0; 1265 cmd = SFAS_CMD_TRANSFER_PAD; 1266 } 1267 break; 1268 1269 case SFAS_PHASE_COMMAND: 1270 /* The scsi unit wants the command, send it. */ 1271 nexus->state = SFAS_NS_SVC; 1272 1273 *rp->sfas_command = SFAS_CMD_FLUSH_FIFO; 1274 for(i=0; i<5; i++); 1275 1276 for(i=0; i<nexus->clen; i++) 1277 *rp->sfas_fifo = nexus->cbuf[i]; 1278 cmd = SFAS_CMD_TRANSFER_INFO; 1279 break; 1280 1281 case SFAS_PHASE_STATUS: 1282 /* 1283 * We've got status phase. Request status and command 1284 * complete message. 1285 */ 1286 nexus->state = SFAS_NS_STATUS; 1287 cmd = SFAS_CMD_COMMAND_COMPLETE; 1288 break; 1289 1290 case SFAS_PHASE_MESSAGE_OUT: 1291 /* 1292 * Either the scsi unit wants us to send a message or we have 1293 * asked for it by seting the ATN bit. 1294 */ 1295 nexus->state = SFAS_NS_MSG_OUT; 1296 1297 *rp->sfas_command = SFAS_CMD_FLUSH_FIFO; 1298 1299 if (nexus->flags & SFAS_NF_DO_SDTR) { 1300 /* Send a Synchronous Data Transfer Request. */ 1301 1302 sfas_build_sdtrm(dev, nexus->period, nexus->offset); 1303 nexus->flags |= SFAS_NF_SDTR_SENT; 1304 nexus->flags &= ~SFAS_NF_DO_SDTR; 1305 } else if (nexus->flags & SFAS_NF_RESET) { 1306 /* Send a reset scsi unit message. */ 1307 1308 dev->sc_msg_out[0] = 0x0C; 1309 dev->sc_msg_out_len = 1; 1310 nexus->state = SFAS_NS_RESET; 1311 nexus->flags &= ~SFAS_NF_RESET; 1312 } else if (dev->sc_msg_out_len == 0) { 1313 /* Don't know what to send so we send a NOP message. */ 1314 1315 dev->sc_msg_out[0] = 0x08; 1316 dev->sc_msg_out_len = 1; 1317 } 1318 1319 cmd = SFAS_CMD_TRANSFER_INFO; 1320 1321 for(i=0; i<dev->sc_msg_out_len; i++) 1322 *rp->sfas_fifo = dev->sc_msg_out[i]; 1323 dev->sc_msg_out_len = 0; 1324 1325 break; 1326 1327 case SFAS_PHASE_MESSAGE_IN: 1328 /* Receive a message from the scsi unit. */ 1329 nexus->state = SFAS_NS_MSG_IN; 1330 1331 while(!(nexus->flags & SFAS_NF_HAS_MSG)) { 1332 *rp->sfas_command = SFAS_CMD_TRANSFER_INFO; 1333 sfasiwait(dev); 1334 1335 dev->sc_msg_in[dev->sc_msg_in_len++] = *rp->sfas_fifo; 1336 1337 /* Check if we got all the bytes in the message. */ 1338 if (dev->sc_msg_in[0] >= 0x80) ; 1339 else if (dev->sc_msg_in[0] >= 0x30) ; 1340 else if (((dev->sc_msg_in[0] >= 0x20) && 1341 (dev->sc_msg_in_len == 2)) || 1342 ((dev->sc_msg_in[0] != 0x01) && 1343 (dev->sc_msg_in_len == 1))) { 1344 nexus->flags |= SFAS_NF_HAS_MSG; 1345 break; 1346 } else { 1347 if (dev->sc_msg_in_len >= 2) 1348 if ((dev->sc_msg_in[1]+2) == dev->sc_msg_in_len) { 1349 nexus->flags |= SFAS_NF_HAS_MSG; 1350 break; 1351 } 1352 } 1353 1354 *rp->sfas_command = SFAS_CMD_MESSAGE_ACCEPTED; 1355 sfasiwait(dev); 1356 1357 if ((dev->sc_status & SFAS_STAT_PHASE_MASK) != 1358 SFAS_PHASE_MESSAGE_IN) 1359 break; 1360 } 1361 1362 cmd = SFAS_CMD_MESSAGE_ACCEPTED; 1363 if (nexus->flags & SFAS_NF_HAS_MSG) { 1364 /* We have a message. Decode it. */ 1365 1366 switch(dev->sc_msg_in[0]) { 1367 case 0x00: /* COMMAND COMPLETE */ 1368 nexus->state = SFAS_NS_DONE; 1369 break; 1370 case 0x04: /* DISCONNECT */ 1371 nexus->state = SFAS_NS_DISCONNECTING; 1372 break; 1373 case 0x02: /* SAVE DATA POINTER */ 1374 sfas_save_pointers(dev); 1375 break; 1376 case 0x03: /* RESTORE DATA POINTERS */ 1377 sfas_restore_pointers(dev); 1378 break; 1379 case 0x07: /* MESSAGE REJECT */ 1380 /* 1381 * If we had sent a SDTR and we got a message 1382 * reject, the scsi docs say that we must go 1383 * to async transfer. 1384 */ 1385 if (nexus->flags & SFAS_NF_SDTR_SENT) { 1386 nexus->flags &= ~SFAS_NF_SDTR_SENT; 1387 1388 nexus->config3 &= ~SFAS_CFG3_FASTSCSI; 1389 nexus->syncper = 5; 1390 nexus->syncoff = 0; 1391 1392 *rp->sfas_syncper = nexus->syncper; 1393 *rp->sfas_syncoff = nexus->syncoff; 1394 *rp->sfas_config3 = nexus->config3; 1395 } else 1396 /* 1397 * Something was rejected but we don't know 1398 * what! PANIC! 1399 */ 1400 panic("sfasintr: Unknown message rejected!"); 1401 break; 1402 case 0x08: /* MO OPERATION */ 1403 break; 1404 case 0x01: /* EXTENDED MESSAGE */ 1405 switch(dev->sc_msg_in[2]) { 1406 case 0x01:/* SYNC. DATA TRANSFER REQUEST */ 1407 /* Decode the SDTR message. */ 1408 period = 4*dev->sc_msg_in[3]; 1409 offset = dev->sc_msg_in[4]; 1410 1411 /* 1412 * Make sure that the specs are within 1413 * chip limits. Note that if we 1414 * initiated the negotiation the specs 1415 * WILL be withing chip limits. If it 1416 * was the scsi unit that initiated 1417 * the negotiation, the specs may be 1418 * to high. 1419 */ 1420 if (offset > 16) 1421 offset = 16; 1422 if ((period < 200) && 1423 (dev->sc_clock_freq <= 25)) 1424 period = 200; 1425 1426 if (offset == 0) 1427 period = 5*dev->sc_clock_period; 1428 1429 nexus->syncper = period/ 1430 dev->sc_clock_period; 1431 nexus->syncoff = offset; 1432 1433 if (period < 200) 1434 nexus->config3 |= SFAS_CFG3_FASTSCSI; 1435 else 1436 nexus->config3 &=~SFAS_CFG3_FASTSCSI; 1437 1438 nexus->flags |= SFAS_NF_SYNC_TESTED; 1439 1440 *rp->sfas_syncper = nexus->syncper; 1441 *rp->sfas_syncoff = nexus->syncoff; 1442 *rp->sfas_config3 = nexus->config3; 1443 1444 /* 1445 * Hmmm, it seems that the scsi unit 1446 * initiated sync negotiation, so lets 1447 * reply acording to scsi-2 standard. 1448 */ 1449 if (!(nexus->flags& SFAS_NF_SDTR_SENT)) 1450 { 1451 if ((dev->sc_config_flags & 1452 SFAS_NO_SYNCH) || 1453 (dev->sc_config_flags & 1454 SFAS_NO_DMA) || 1455 sfas_inhibit_sync[ 1456 nexus->lun_unit & 7]) { 1457 period = 200; 1458 offset = 0; 1459 } 1460 1461 nexus->offset = offset; 1462 nexus->period = period; 1463 nexus->flags |= SFAS_NF_DO_SDTR; 1464 *rp->sfas_command = SFAS_CMD_SET_ATN; 1465 } 1466 1467 nexus->flags &= ~SFAS_NF_SDTR_SENT; 1468 break; 1469 1470 case 0x00: /* MODIFY DATA POINTERS */ 1471 case 0x02: /* EXTENDED IDENTIFY (SCSI-1) */ 1472 case 0x03: /* WIDE DATA TRANSFER REQUEST */ 1473 default: 1474 /* Reject any unhandeled messages. */ 1475 1476 dev->sc_msg_out[0] = 0x07; 1477 dev->sc_msg_out_len = 1; 1478 *rp->sfas_command = SFAS_CMD_SET_ATN; 1479 cmd = SFAS_CMD_MESSAGE_ACCEPTED; 1480 break; 1481 } 1482 break; 1483 1484 default: 1485 /* Reject any unhandeled messages. */ 1486 1487 dev->sc_msg_out[0] = 0x07; 1488 dev->sc_msg_out_len = 1; 1489 *rp->sfas_command = SFAS_CMD_SET_ATN; 1490 cmd = SFAS_CMD_MESSAGE_ACCEPTED; 1491 break; 1492 } 1493 nexus->flags &= ~SFAS_NF_HAS_MSG; 1494 dev->sc_msg_in_len = 0; 1495 } 1496 break; 1497 default: 1498 printf("SFASINTR: UNKNOWN PHASE! phase: %d\n", 1499 dev->sc_status & SFAS_STAT_PHASE_MASK); 1500 dev->sc_led(dev, 0); 1501 sfas_scsidone(dev, nexus->xs, -4); 1502 1503 return(-1); 1504 } 1505 1506 if (cmd) 1507 *rp->sfas_command = cmd; 1508 1509 return(0); 1510 } 1511 1512 /* 1513 * Stub for interrupt machine. 1514 */ 1515 void 1516 sfasintr(dev) 1517 struct sfas_softc *dev; 1518 { 1519 sfas_regmap_p rp; 1520 struct nexus *nexus; 1521 1522 rp = dev->sc_fas; 1523 1524 if (!sfas_pretests(dev, rp)) { 1525 1526 nexus = dev->sc_cur_nexus; 1527 if (nexus == NULL) 1528 nexus = dev->sc_sel_nexus; 1529 1530 if (nexus) 1531 if (!sfas_midaction(dev, rp, nexus)) 1532 sfas_postaction(dev, rp, nexus); 1533 } 1534 } 1535 1536 /* 1537 * sfasicmd is used to perform IO when we can't use interrupts. sfasicmd 1538 * emulates the normal environment by waiting for the chip and calling 1539 * sfasintr. 1540 */ 1541 void 1542 sfasicmd(dev, pendp) 1543 struct sfas_softc *dev; 1544 struct sfas_pending *pendp; 1545 { 1546 sfas_regmap_p rp; 1547 struct nexus *nexus; 1548 1549 nexus = &dev->sc_nexus[pendp->xs->xs_periph->periph_target]; 1550 rp = dev->sc_fas; 1551 1552 if (!sfasselect(dev, pendp, (char *)pendp->xs->cmd, pendp->xs->cmdlen, 1553 (char *)pendp->xs->data, pendp->xs->datalen, 1554 SFAS_SELECT_I)) 1555 panic("sfasicmd: Couldn't select unit"); 1556 1557 while(nexus->state != SFAS_NS_FINISHED) { 1558 sfasiwait(dev); 1559 sfasintr(dev); 1560 } 1561 1562 nexus->flags &= ~SFAS_NF_SYNC_TESTED; 1563 } 1564 1565 1566 #ifdef SFAS_DEBUG 1567 1568 void 1569 dump_nexus(nexus) 1570 struct nexus *nexus; 1571 { 1572 int loop; 1573 1574 printf("nexus=%08x\n", (u_int)nexus); 1575 printf("scsi_fer=%08x\n", (u_int)nexus->xs); 1576 printf("ID=%02x\n", nexus->ID); 1577 printf("clen=%02x\n", nexus->clen); 1578 printf("cbuf="); 1579 for (loop = 0; loop< 14; ++loop) 1580 printf(" %02x\n", nexus->cbuf[loop]); 1581 printf("\n"); 1582 printf("dma:\n"); 1583 for (loop = 0; loop < MAXCHAIN; ++loop) 1584 printf("dma_chain: %08x %04x %04x\n", nexus->dma[loop].ptr, 1585 nexus->dma[loop].len, nexus->dma[loop].flg); 1586 printf("\n"); 1587 1588 printf("max_link=%d\n", nexus->max_link); 1589 printf("cur_link=%d\n", nexus->cur_link); 1590 1591 printf("buf=%08x\n", (u_int)nexus->buf); 1592 printf("len=%08x\n", nexus->len); 1593 printf("dma_buf=%08x\n", (u_int)nexus->dma_buf); 1594 printf("dma_len=%08x\n", nexus->dma_len); 1595 printf("dma_blk_ptr=%08x\n", (u_int)nexus->dma_blk_ptr); 1596 printf("dma_blk_len=%08x\n", nexus->dma_blk_len); 1597 printf("dma_blk_flag=%08x\n", nexus->dma_blk_flg); 1598 printf("state=%02x\n", nexus->state); 1599 printf("flags=%04x\n", nexus->flags); 1600 printf("period=%d\n", nexus->period); 1601 printf("offset=%d\n", nexus->offset); 1602 printf("syncper=%d\n", nexus->syncper); 1603 printf("syncoff=%d\n", nexus->syncoff); 1604 printf("config3=%02x\n", nexus->config3); 1605 printf("lun_unit=%d\n", nexus->lun_unit); 1606 printf("status=%02x\n", nexus->status); 1607 printf("\n"); 1608 } 1609 1610 void 1611 dump_nexii(sc) 1612 struct sfas_softc *sc; 1613 { 1614 int loop; 1615 1616 for (loop = 0; loop < 8; ++loop) { 1617 dump_nexus(&sc->sc_nexus[loop]); 1618 } 1619 } 1620 1621 void 1622 dump_sfassoftc(sc) 1623 struct sfas_softc *sc; 1624 { 1625 printf("sfassoftc @ 0x%08x\n", (u_int)sc); 1626 printf("clock_freq = %d\n", sc->sc_clock_freq); 1627 printf("timeout = %d\n", sc->sc_timeout); 1628 printf("host_id = %d\n", sc->sc_host_id); 1629 printf("config_flags = 0x%08x\n", sc->sc_config_flags); 1630 printf("led_status = %d\n", sc->sc_led_status); 1631 1632 dump_nexii(sc); 1633 printf("cur_nexus = 0x%08x\n", (u_int)sc->sc_cur_nexus); 1634 printf("sel_nexus = 0x%08x\n", (u_int)sc->sc_sel_nexus); 1635 printf("\n"); 1636 } 1637 1638 #endif /* SFAS_DEBUG */ 1639
Indexes created Thu Oct 16 14:10:15 GMT 2025