sfas.c revision 1.10
1 /* $NetBSD: sfas.c,v 1.10 2003/05/03 18:10:41 wiz Exp $ */ 2 3 /* 4 * Copyright (c) 1995 Scott Stevens 5 * Copyright (c) 1995 Daniel Widenfalk 6 * Copyright (c) 1994 Christian E. Hopps 7 * Copyright (c) 1990 The Regents of the University of California. 8 * All rights reserved. 9 * 10 * This code is derived from software contributed to Berkeley by 11 * Van Jacobson of Lawrence Berkeley Laboratory. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. All advertising materials mentioning features or use of this software 22 * must display the following acknowledgement: 23 * This product includes software developed by the University of 24 * California, Berkeley and its contributors. 25 * 4. Neither the name of the University nor the names of its contributors 26 * may be used to endorse or promote products derived from this software 27 * without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 30 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 32 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 35 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 39 * SUCH DAMAGE. 40 * 41 * @(#)scsi.c 7.5 (Berkeley) 5/4/91 42 */ 43 44 /* 45 * Emulex FAS216 scsi adaptor driver 46 */ 47 48 /* 49 * Modified for NetBSD/arm32 by Scott Stevens 50 */ 51 52 #include <sys/param.h> 53 #include <sys/systm.h> 54 #include <sys/device.h> 55 #include <sys/buf.h> 56 #include <sys/proc.h> 57 58 #include <dev/scsipi/scsi_all.h> 59 #include <dev/scsipi/scsipi_all.h> 60 #include <dev/scsipi/scsiconf.h> 61 62 #include <uvm/uvm_extern.h> 63 64 #include <machine/pmap.h> 65 #include <machine/cpu.h> 66 #include <machine/io.h> 67 #include <machine/intr.h> 68 #include <arm/arm32/katelib.h> 69 #include <acorn32/podulebus/podulebus.h> 70 #include <acorn32/podulebus/sfasreg.h> 71 #include <acorn32/podulebus/sfasvar.h> 72 73 void sfas_minphys(struct buf *); 74 void sfas_init_nexus(struct sfas_softc *, struct nexus *); 75 void sfasinitialize(struct sfas_softc *); 76 void sfas_scsi_request(struct scsipi_channel *, scsipi_adapter_req_t, void *); 77 void sfas_donextcmd(struct sfas_softc *, struct sfas_pending *); 78 void sfas_scsidone(struct sfas_softc *, struct scsipi_xfer *, int); 79 void sfasintr(struct sfas_softc *); 80 void sfasiwait(struct sfas_softc *); 81 void sfas_ixfer(void *, int); 82 void sfasreset(struct sfas_softc *, int); 83 int sfasselect(struct sfas_softc *, struct sfas_pending *, unsigned char *, 84 int, unsigned char *, int, int); 85 void sfasicmd(struct sfas_softc *, struct sfas_pending *); 86 void sfasgo(struct sfas_softc *, struct sfas_pending *); 87 void sfas_save_pointers(struct sfas_softc *); 88 void sfas_restore_pointers(struct sfas_softc *); 89 void sfas_build_sdtrm(struct sfas_softc *, int, int); 90 int sfas_select_unit(struct sfas_softc *, short); 91 struct nexus *sfas_arbitate_target(struct sfas_softc *, int); 92 void sfas_setup_nexus(struct sfas_softc *, struct nexus *, 93 struct sfas_pending *, unsigned char *, int, 94 unsigned char *, int, int); 95 int sfas_pretests(struct sfas_softc *, sfas_regmap_p); 96 int sfas_midaction(struct sfas_softc *, sfas_regmap_p, struct nexus *); 97 int sfas_postaction(struct sfas_softc *, sfas_regmap_p, struct nexus *); 98 99 /* 100 * Initialize these to make 'em patchable. Defaults to enable sync and discon. 101 */ 102 u_char sfas_inhibit_sync[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; 103 u_char sfas_inhibit_disc[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; 104 105 #define DEBUG 106 #ifdef DEBUG 107 #define QPRINTF(a) if (sfas_debug > 1) printf a 108 int sfas_debug = 2; 109 #else 110 #define QPRINTF 111 #endif 112 113 /* 114 * default minphys routine for sfas based controllers 115 */ 116 void 117 sfas_minphys(bp) 118 struct buf *bp; 119 { 120 121 /* 122 * No max transfer at this level. 123 */ 124 minphys(bp); 125 } 126 127 /* 128 * Initialize the nexus structs. 129 */ 130 void 131 sfas_init_nexus(dev, nexus) 132 struct sfas_softc *dev; 133 struct nexus *nexus; 134 { 135 bzero(nexus, sizeof(struct nexus)); 136 137 nexus->state = SFAS_NS_IDLE; 138 nexus->period = 200; 139 nexus->offset = 0; 140 nexus->syncper = 5; 141 nexus->syncoff = 0; 142 nexus->config3 = dev->sc_config3 & ~SFAS_CFG3_FASTSCSI; 143 } 144 145 void 146 sfasinitialize(dev) 147 struct sfas_softc *dev; 148 { 149 u_int *pte; 150 int i; 151 152 dev->sc_led_status = 0; 153 154 TAILQ_INIT(&dev->sc_xs_pending); 155 TAILQ_INIT(&dev->sc_xs_free); 156 157 /* 158 * Initialize the sfas_pending structs and link them into the free list. We 159 * have to set vm_link_data.pages to 0 or the vm FIX won't work. 160 */ 161 for(i=0; i<MAXPENDING; i++) { 162 TAILQ_INSERT_TAIL(&dev->sc_xs_free, &dev->sc_xs_store[i], 163 link); 164 } 165 166 /* 167 * Calculate the correct clock conversion factor 2 <= factor <= 8, i.e. set 168 * the factor to clock_freq / 5 (int). 169 */ 170 if (dev->sc_clock_freq <= 10) 171 dev->sc_clock_conv_fact = 2; 172 if (dev->sc_clock_freq <= 40) 173 dev->sc_clock_conv_fact = 2+((dev->sc_clock_freq-10)/5); 174 else 175 panic("sfasinitialize: Clock frequence too high"); 176 177 /* Setup and save the basic configuration registers */ 178 dev->sc_config1 = (dev->sc_host_id & SFAS_CFG1_BUS_ID_MASK); 179 dev->sc_config2 = SFAS_CFG2_FEATURES_ENABLE; 180 dev->sc_config3 = (dev->sc_clock_freq > 25 ? SFAS_CFG3_FASTCLK : 0); 181 182 /* Precalculate timeout value and clock period. */ 183 /* Ekkk ... floating point in the kernel !!!! */ 184 /* dev->sc_timeout_val = 1+dev->sc_timeout*dev->sc_clock_freq/ 185 (7.682*dev->sc_clock_conv_fact);*/ 186 dev->sc_timeout_val = 1+dev->sc_timeout*dev->sc_clock_freq/ 187 ((7682*dev->sc_clock_conv_fact)/1000); 188 dev->sc_clock_period = 1000/dev->sc_clock_freq; 189 190 sfasreset(dev, 1 | 2); /* Reset Chip and Bus */ 191 192 dev->sc_units_disconnected = 0; 193 dev->sc_msg_in_len = 0; 194 dev->sc_msg_out_len = 0; 195 196 dev->sc_flags = 0; 197 198 for(i=0; i<8; i++) 199 sfas_init_nexus(dev, &dev->sc_nexus[i]); 200 201 if (dev->sc_ixfer == NULL) 202 dev->sc_ixfer = sfas_ixfer; 203 204 /* 205 * Setup bump buffer. 206 */ 207 dev->sc_bump_va = (u_char *)uvm_km_zalloc(kernel_map, dev->sc_bump_sz); 208 (void) pmap_extract(pmap_kernel(), (vaddr_t)dev->sc_bump_va, 209 (paddr_t *)&dev->sc_bump_pa); 210 211 /* 212 * Setup pages to noncachable, that way we don't have to flush the cache 213 * every time we need "bumped" transfer. 214 */ 215 pte = vtopte((vaddr_t) dev->sc_bump_va); 216 *pte &= ~(L2_C | L2_B); 217 PTE_SYNC(pte); 218 cpu_tlb_flushD(); 219 cpu_dcache_wbinv_range((vm_offset_t)dev->sc_bump_va, PAGE_SIZE); 220 221 printf(" dmabuf V0x%08x P0x%08x", (u_int)dev->sc_bump_va, (u_int)dev->sc_bump_pa); 222 } 223 224 225 /* 226 * used by specific sfas controller 227 */ 228 void 229 sfas_scsi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 230 void *arg) 231 { 232 struct scsipi_xfer *xs; 233 struct sfas_softc *dev = (void *)chan->chan_adapter->adapt_dev; 234 struct scsipi_periph *periph; 235 struct sfas_pending *pendp; 236 int flags, s, target; 237 238 switch (req) { 239 case ADAPTER_REQ_RUN_XFER: 240 xs = arg; 241 periph = xs->xs_periph; 242 flags = xs->xs_control; 243 target = periph->periph_target; 244 245 if (flags & XS_CTL_DATA_UIO) 246 panic("sfas: scsi data uio requested"); 247 248 if ((flags & XS_CTL_POLL) && (dev->sc_flags & SFAS_ACTIVE)) 249 panic("sfas_scsicmd: busy"); 250 251 /* Get hold of a sfas_pending block. */ 252 s = splbio(); 253 pendp = dev->sc_xs_free.tqh_first; 254 if (pendp == NULL) { 255 xs->error = XS_RESOURCE_SHORTAGE; 256 scsipi_done(xs); 257 splx(s); 258 return; 259 } 260 TAILQ_REMOVE(&dev->sc_xs_free, pendp, link); 261 pendp->xs = xs; 262 splx(s); 263 264 265 /* If the chip if busy OR the unit is busy, we have to wait for out turn. */ 266 if ((dev->sc_flags & SFAS_ACTIVE) || 267 (dev->sc_nexus[target].flags & SFAS_NF_UNIT_BUSY)) { 268 s = splbio(); 269 TAILQ_INSERT_TAIL(&dev->sc_xs_pending, pendp, link); 270 splx(s); 271 } else 272 sfas_donextcmd(dev, pendp); 273 274 return; 275 276 case ADAPTER_REQ_GROW_RESOURCES: 277 case ADAPTER_REQ_SET_XFER_MODE: 278 /* XXX Not supported. */ 279 return; 280 } 281 } 282 283 /* 284 * Actually select the unit, whereby the whole scsi-process is started. 285 */ 286 void 287 sfas_donextcmd(dev, pendp) 288 struct sfas_softc *dev; 289 struct sfas_pending *pendp; 290 { 291 int s; 292 293 /* 294 * Special case for scsi unit reset. I think this is waterproof. We first 295 * select the unit during splbio. We then cycle through the generated 296 * interrupts until the interrupt routine signals that the unit has 297 * acknowledged the reset. After that we have to wait a reset to select 298 * delay before anything else can happend. 299 */ 300 if (pendp->xs->xs_control & XS_CTL_RESET) { 301 struct nexus *nexus; 302 303 s = splbio(); 304 while(!sfasselect(dev, pendp, 0, 0, 0, 0, SFAS_SELECT_K)) { 305 splx(s); 306 delay(10); 307 s = splbio(); 308 } 309 310 nexus = dev->sc_cur_nexus; 311 while(nexus->flags & SFAS_NF_UNIT_BUSY) { 312 sfasiwait(dev); 313 sfasintr(dev); 314 } 315 316 nexus->flags |= SFAS_NF_UNIT_BUSY; 317 splx(s); 318 319 sfasreset(dev, 0); 320 321 s = splbio(); 322 nexus->flags &= ~SFAS_NF_UNIT_BUSY; 323 splx(s); 324 } 325 326 /* 327 * If we are polling, go to splbio and perform the command, else we poke 328 * the scsi-bus via sfasgo to get the interrupt machine going. 329 */ 330 if (pendp->xs->xs_control & XS_CTL_POLL) { 331 s = splbio(); 332 sfasicmd(dev, pendp); 333 TAILQ_INSERT_TAIL(&dev->sc_xs_free, pendp, link); 334 splx(s); 335 } else { 336 sfasgo(dev, pendp); 337 } 338 } 339 340 void 341 sfas_scsidone(dev, xs, stat) 342 struct sfas_softc *dev; 343 struct scsipi_xfer *xs; 344 int stat; 345 { 346 struct sfas_pending *pendp; 347 int s; 348 349 xs->status = stat; 350 351 if (stat == 0) 352 xs->resid = 0; 353 else { 354 switch(stat) { 355 case SCSI_CHECK: 356 case SCSI_BUSY: 357 xs->error = XS_BUSY; 358 break; 359 case -1: 360 xs->error = XS_DRIVER_STUFFUP; 361 QPRINTF(("sfas_scsicmd() bad %x\n", stat)); 362 break; 363 default: 364 xs->error = XS_TIMEOUT; 365 break; 366 } 367 } 368 369 /* Steal the next command from the queue so that one unit can't hog the bus. */ 370 s = splbio(); 371 pendp = dev->sc_xs_pending.tqh_first; 372 while(pendp) { 373 if (!(dev->sc_nexus[pendp->xs->xs_periph->periph_target].flags & 374 SFAS_NF_UNIT_BUSY)) 375 break; 376 pendp = pendp->link.tqe_next; 377 } 378 379 if (pendp != NULL) { 380 TAILQ_REMOVE(&dev->sc_xs_pending, pendp, link); 381 } 382 383 splx(s); 384 scsipi_done(xs); 385 386 if (pendp) 387 sfas_donextcmd(dev, pendp); 388 } 389 390 /* 391 * There are two kinds of reset: 392 * 1) CHIP-bus reset. This also implies a SCSI-bus reset. 393 * 2) SCSI-bus reset. 394 * After the appropriate resets have been performed we wait a reset to select 395 * delay time. 396 */ 397 void 398 sfasreset(dev, how) 399 struct sfas_softc *dev; 400 int how; 401 { 402 sfas_regmap_p rp; 403 int i, s; 404 405 rp = dev->sc_fas; 406 407 if (how & 1) { 408 for(i=0; i<8; i++) 409 sfas_init_nexus(dev, &dev->sc_nexus[i]); 410 411 *rp->sfas_command = SFAS_CMD_RESET_CHIP; 412 delay(1); 413 *rp->sfas_command = SFAS_CMD_NOP; 414 415 *rp->sfas_config1 = dev->sc_config1; 416 *rp->sfas_config2 = dev->sc_config2; 417 *rp->sfas_config3 = dev->sc_config3; 418 *rp->sfas_timeout = dev->sc_timeout_val; 419 *rp->sfas_clkconv = dev->sc_clock_conv_fact & 420 SFAS_CLOCK_CONVERSION_MASK; 421 } 422 423 if (how & 2) { 424 for(i=0; i<8; i++) 425 sfas_init_nexus(dev, &dev->sc_nexus[i]); 426 427 s = splbio(); 428 429 *rp->sfas_command = SFAS_CMD_RESET_SCSI_BUS; 430 delay(100); 431 432 /* Skip interrupt generated by RESET_SCSI_BUS */ 433 while(*rp->sfas_status & SFAS_STAT_INTERRUPT_PENDING) { 434 dev->sc_status = *rp->sfas_status; 435 dev->sc_interrupt = *rp->sfas_interrupt; 436 437 delay(100); 438 } 439 440 dev->sc_status = *rp->sfas_status; 441 dev->sc_interrupt = *rp->sfas_interrupt; 442 443 splx(s); 444 } 445 446 if (dev->sc_config_flags & SFAS_SLOW_START) 447 delay(4*250000); /* RESET to SELECT DELAY*4 for slow devices */ 448 else 449 delay(250000); /* RESET to SELECT DELAY */ 450 } 451 452 /* 453 * Save active data pointers to the nexus block currently active. 454 */ 455 void 456 sfas_save_pointers(dev) 457 struct sfas_softc *dev; 458 { 459 struct nexus *nx; 460 461 nx = dev->sc_cur_nexus; 462 if (nx) { 463 nx->cur_link = dev->sc_cur_link; 464 nx->max_link = dev->sc_max_link; 465 nx->buf = dev->sc_buf; 466 nx->len = dev->sc_len; 467 nx->dma_len = dev->sc_dma_len; 468 nx->dma_buf = dev->sc_dma_buf; 469 nx->dma_blk_flg = dev->sc_dma_blk_flg; 470 nx->dma_blk_len = dev->sc_dma_blk_len; 471 nx->dma_blk_ptr = dev->sc_dma_blk_ptr; 472 } 473 } 474 475 /* 476 * Restore data pointers from the currently active nexus block. 477 */ 478 void 479 sfas_restore_pointers(dev) 480 struct sfas_softc *dev; 481 { 482 struct nexus *nx; 483 484 nx = dev->sc_cur_nexus; 485 if (nx) { 486 dev->sc_cur_link = nx->cur_link; 487 dev->sc_max_link = nx->max_link; 488 dev->sc_buf = nx->buf; 489 dev->sc_len = nx->len; 490 dev->sc_dma_len = nx->dma_len; 491 dev->sc_dma_buf = nx->dma_buf; 492 dev->sc_dma_blk_flg = nx->dma_blk_flg; 493 dev->sc_dma_blk_len = nx->dma_blk_len; 494 dev->sc_dma_blk_ptr = nx->dma_blk_ptr; 495 dev->sc_chain = nx->dma; 496 dev->sc_unit = (nx->lun_unit & 0x0F); 497 dev->sc_lun = (nx->lun_unit & 0xF0) >> 4; 498 } 499 } 500 501 /* 502 * sfasiwait is used during interrupt and polled IO to wait for an event from 503 * the FAS chip. This function MUST NOT BE CALLED without interrupt disabled. 504 */ 505 void 506 sfasiwait(dev) 507 struct sfas_softc *dev; 508 { 509 sfas_regmap_p rp; 510 511 /* 512 * If SFAS_DONT_WAIT is set, we have already grabbed the interrupt info 513 * elsewhere. So we don't have to wait for it. 514 */ 515 if (dev->sc_flags & SFAS_DONT_WAIT) { 516 dev->sc_flags &= ~SFAS_DONT_WAIT; 517 return; 518 } 519 520 rp = dev->sc_fas; 521 522 /* Wait for FAS chip to signal an interrupt. */ 523 while(!(*rp->sfas_status & SFAS_STAT_INTERRUPT_PENDING)) 524 delay(1); 525 526 /* Grab interrupt info from chip. */ 527 dev->sc_status = *rp->sfas_status; 528 dev->sc_interrupt = *rp->sfas_interrupt; 529 if (dev->sc_interrupt & SFAS_INT_RESELECTED) { 530 dev->sc_resel[0] = *rp->sfas_fifo; 531 dev->sc_resel[1] = *rp->sfas_fifo; 532 } 533 } 534 535 /* 536 * Transfer info to/from device. sfas_ixfer uses polled IO+sfasiwait so the 537 * rules that apply to sfasiwait also applies here. 538 */ 539 void 540 sfas_ixfer(v, polling) 541 void *v; 542 int polling; 543 { 544 struct sfas_softc *dev = v; 545 sfas_regmap_p rp; 546 u_char *buf; 547 int len, mode, phase; 548 549 rp = dev->sc_fas; 550 buf = dev->sc_buf; 551 len = dev->sc_len; 552 553 /* 554 * Decode the scsi phase to determine whether we are reading or writing. 555 * mode == 1 => READ, mode == 0 => WRITE 556 */ 557 phase = dev->sc_status & SFAS_STAT_PHASE_MASK; 558 mode = (phase == SFAS_PHASE_DATA_IN); 559 560 while(len && ((dev->sc_status & SFAS_STAT_PHASE_MASK) == phase)) 561 if (mode) { 562 *rp->sfas_command = SFAS_CMD_TRANSFER_INFO; 563 564 sfasiwait(dev); 565 566 *buf++ = *rp->sfas_fifo; 567 len--; 568 } else { 569 len--; 570 *rp->sfas_fifo = *buf++; 571 *rp->sfas_command = SFAS_CMD_TRANSFER_INFO; 572 573 sfasiwait(dev); 574 } 575 576 /* Update buffer pointers to reflect the sent/received data. */ 577 dev->sc_buf = buf; 578 dev->sc_len = len; 579 580 /* 581 * Since the last sfasiwait will be a phase-change, we can't wait for it 582 * again later, so we have to signal that. 583 * Since this may be called from an interrupt initiated routine then we 584 * must call sfasintr again to avoid losing an interrupt. Phew! 585 */ 586 if(polling) 587 dev->sc_flags |= SFAS_DONT_WAIT; 588 else 589 sfasintr(dev); 590 } 591 592 /* 593 * Build a Synchronous Data Transfer Request message 594 */ 595 void 596 sfas_build_sdtrm(dev, period, offset) 597 struct sfas_softc *dev; 598 int period; 599 int offset; 600 { 601 dev->sc_msg_out[0] = 0x01; 602 dev->sc_msg_out[1] = 0x03; 603 dev->sc_msg_out[2] = 0x01; 604 dev->sc_msg_out[3] = period/4; 605 dev->sc_msg_out[4] = offset; 606 dev->sc_msg_out_len= 5; 607 } 608 609 /* 610 * Arbitate the scsi bus and select the unit 611 */ 612 int 613 sfas_select_unit(dev, target) 614 struct sfas_softc *dev; 615 short target; 616 { 617 sfas_regmap_p rp; 618 struct nexus *nexus; 619 int s, retcode, i; 620 u_char cmd; 621 622 s = splbio(); /* Do this at splbio so that we won't be disturbed. */ 623 624 retcode = 0; 625 626 nexus = &dev->sc_nexus[target]; 627 628 /* 629 * Check if the chip is busy. If not the we mark it as so and hope that nobody 630 * reselects us until we have grabbed the bus. 631 */ 632 if (!(dev->sc_flags & SFAS_ACTIVE) && !dev->sc_sel_nexus) { 633 dev->sc_flags |= SFAS_ACTIVE; 634 635 rp = dev->sc_fas; 636 637 *rp->sfas_syncper = nexus->syncper; 638 *rp->sfas_syncoff = nexus->syncoff; 639 *rp->sfas_config3 = nexus->config3; 640 641 *rp->sfas_config1 = dev->sc_config1; 642 *rp->sfas_timeout = dev->sc_timeout_val; 643 *rp->sfas_dest_id = target; 644 645 /* If nobody has stolen the bus, we can send a select command to the chip. */ 646 if (!(*rp->sfas_status & SFAS_STAT_INTERRUPT_PENDING)) { 647 *rp->sfas_fifo = nexus->ID; 648 if ((nexus->flags & (SFAS_NF_DO_SDTR | SFAS_NF_RESET)) 649 || (dev->sc_msg_out_len != 0)) 650 cmd = SFAS_CMD_SEL_ATN_STOP; 651 else { 652 for(i=0; i<nexus->clen; i++) 653 *rp->sfas_fifo = nexus->cbuf[i]; 654 655 cmd = SFAS_CMD_SEL_ATN; 656 } 657 658 dev->sc_sel_nexus = nexus; 659 660 *rp->sfas_command = cmd; 661 retcode = 1; 662 nexus->flags &= ~SFAS_NF_RETRY_SELECT; 663 } else 664 nexus->flags |= SFAS_NF_RETRY_SELECT; 665 } else 666 nexus->flags |= SFAS_NF_RETRY_SELECT; 667 668 splx(s); 669 return(retcode); 670 } 671 672 /* 673 * Grab the nexus if available else return 0. 674 */ 675 struct nexus * 676 sfas_arbitate_target(dev, target) 677 struct sfas_softc *dev; 678 int target; 679 { 680 struct nexus *nexus; 681 int s; 682 683 /* 684 * This is realy simple. Raise interrupt level to splbio. Grab the nexus and 685 * leave. 686 */ 687 nexus = &dev->sc_nexus[target]; 688 689 s = splbio(); 690 691 if (nexus->flags & SFAS_NF_UNIT_BUSY) 692 nexus = 0; 693 else 694 nexus->flags |= SFAS_NF_UNIT_BUSY; 695 696 splx(s); 697 return(nexus); 698 } 699 700 /* 701 * Setup a nexus for use. Initializes command, buffer pointers and DMA chain. 702 */ 703 void 704 sfas_setup_nexus(dev, nexus, pendp, cbuf, clen, buf, len, mode) 705 struct sfas_softc *dev; 706 struct nexus *nexus; 707 struct sfas_pending *pendp; 708 unsigned char *cbuf; 709 int clen; 710 unsigned char *buf; 711 int len; 712 int mode; 713 { 714 char sync, target, lun; 715 716 target = pendp->xs->xs_periph->periph_target; 717 lun = pendp->xs->xs_periph->periph_lun; 718 719 /* 720 * Adopt mode to reflect the config flags. 721 * If we can't use DMA we can't use synch transfer. Also check the 722 * sfas_inhibit_xxx[target] flags. 723 */ 724 if ((dev->sc_config_flags & (SFAS_NO_SYNCH | SFAS_NO_DMA)) || 725 sfas_inhibit_sync[(int)target]) 726 mode &= ~SFAS_SELECT_S; 727 728 if ((dev->sc_config_flags & SFAS_NO_RESELECT) || 729 sfas_inhibit_disc[(int)target]) 730 mode &= ~SFAS_SELECT_R; 731 732 nexus->xs = pendp->xs; 733 734 /* Setup the nexus struct. */ 735 nexus->ID = ((mode & SFAS_SELECT_R) ? 0xC0 : 0x80) | lun; 736 nexus->clen = clen; 737 bcopy(cbuf, nexus->cbuf, nexus->clen); 738 nexus->cbuf[1] |= lun << 5; /* Fix the lun bits */ 739 nexus->cur_link = 0; 740 nexus->dma_len = 0; 741 nexus->dma_buf = 0; 742 nexus->dma_blk_len = 0; 743 nexus->dma_blk_ptr = 0; 744 nexus->len = len; 745 nexus->buf = buf; 746 nexus->lun_unit = (lun << 4) | target; 747 nexus->state = SFAS_NS_SELECTED; 748 749 /* We must keep these flags. All else must be zero. */ 750 nexus->flags &= SFAS_NF_UNIT_BUSY 751 | SFAS_NF_SYNC_TESTED | SFAS_NF_SELECT_ME; 752 753 if (mode & SFAS_SELECT_I) 754 nexus->flags |= SFAS_NF_IMMEDIATE; 755 if (mode & SFAS_SELECT_K) 756 nexus->flags |= SFAS_NF_RESET; 757 758 sync = ((mode & SFAS_SELECT_S) ? 1 : 0); 759 760 /* We can't use sync during polled IO. */ 761 if (sync && (mode & SFAS_SELECT_I)) 762 sync = 0; 763 764 if (!sync && 765 ((nexus->flags & SFAS_NF_SYNC_TESTED) && (nexus->offset != 0))) { 766 /* 767 * If the scsi unit is set to synch transfer and we don't want 768 * that, we have to renegotiate. 769 */ 770 771 nexus->flags |= SFAS_NF_DO_SDTR; 772 nexus->period = 200; 773 nexus->offset = 0; 774 } else if (sync && !(nexus->flags & SFAS_NF_SYNC_TESTED)) { 775 /* 776 * If the scsi unit is not set to synch transfer and we want 777 * that, we have to negotiate. This should realy base the 778 * period on the clock frequence rather than just check if 779 * >25Mhz 780 */ 781 782 nexus->flags |= SFAS_NF_DO_SDTR; 783 nexus->period = ((dev->sc_clock_freq>25) ? 100 : 200); 784 nexus->offset = 8; 785 786 /* If the user has a long cable, we want to limit the period */ 787 if ((nexus->period == 100) && 788 (dev->sc_config_flags & SFAS_SLOW_CABLE)) 789 nexus->period = 200; 790 } 791 792 /* 793 * Fake a DMA-block for polled IO. This way we can use the same code to handle 794 * reselection. Much nicer this way. 795 */ 796 if ((mode & SFAS_SELECT_I) || (dev->sc_config_flags & SFAS_NO_DMA)) { 797 nexus->dma[0].ptr = buf; 798 nexus->dma[0].len = len; 799 nexus->dma[0].flg = SFAS_CHAIN_PRG; 800 nexus->max_link = 1; 801 } else { 802 nexus->max_link = dev->sc_build_dma_chain(dev, nexus->dma, 803 buf, len); 804 } 805 806 /* Flush the caches. */ 807 808 if (len && !(mode & SFAS_SELECT_I)) 809 cpu_dcache_wbinv_range((vm_offset_t)buf, len); 810 } 811 812 int 813 sfasselect(dev, pendp, cbuf, clen, buf, len, mode) 814 struct sfas_softc *dev; 815 struct sfas_pending *pendp; 816 unsigned char *cbuf; 817 int clen; 818 unsigned char *buf; 819 int len; 820 int mode; 821 { 822 struct nexus *nexus; 823 824 /* Get the nexus struct. */ 825 nexus = sfas_arbitate_target(dev, pendp->xs->xs_periph->periph_target); 826 if (nexus == NULL) 827 return(0); 828 829 /* Setup the nexus struct. */ 830 sfas_setup_nexus(dev, nexus, pendp, cbuf, clen, buf, len, mode); 831 832 /* Post it to the interrupt machine. */ 833 sfas_select_unit(dev, pendp->xs->xs_periph->periph_target); 834 835 return(1); 836 } 837 838 void 839 sfasgo(dev, pendp) 840 struct sfas_softc *dev; 841 struct sfas_pending *pendp; 842 { 843 int s; 844 char *buf; 845 846 buf = pendp->xs->data; 847 848 if (sfasselect(dev, pendp, (char *)pendp->xs->cmd, pendp->xs->cmdlen, 849 buf, pendp->xs->datalen, SFAS_SELECT_RS)) { 850 /* 851 * We got the command going so the sfas_pending struct is now 852 * free to reuse. 853 */ 854 855 s = splbio(); 856 TAILQ_INSERT_TAIL(&dev->sc_xs_free, pendp, link); 857 splx(s); 858 } else { 859 /* 860 * We couldn't make the command fly so we have to wait. The 861 * struct MUST be inserted at the head to keep the order of 862 * the commands. 863 */ 864 865 s = splbio(); 866 TAILQ_INSERT_HEAD(&dev->sc_xs_pending, pendp, link); 867 splx(s); 868 } 869 870 return; 871 } 872 873 /* 874 * Part one of the interrupt machine. Error checks and reselection test. 875 * We don't know if we have an active nexus here! 876 */ 877 int 878 sfas_pretests(dev, rp) 879 struct sfas_softc *dev; 880 sfas_regmap_p rp; 881 { 882 struct nexus *nexus; 883 int i, s; 884 885 if (dev->sc_interrupt & SFAS_INT_SCSI_RESET_DETECTED) { 886 /* 887 * Cleanup and notify user. Lets hope that this is all we 888 * have to do 889 */ 890 891 for(i=0; i<8; i++) { 892 if (dev->sc_nexus[i].xs) 893 sfas_scsidone(dev, dev->sc_nexus[i].xs, -2); 894 895 sfas_init_nexus(dev, &dev->sc_nexus[i]); 896 } 897 printf("sfasintr: SCSI-RESET detected!"); 898 return(-1); 899 } 900 901 if (dev->sc_interrupt & SFAS_INT_ILLEGAL_COMMAND) { 902 /* Something went terrible wrong! Dump some data and panic! */ 903 904 printf("FIFO:"); 905 while(*rp->sfas_fifo_flags & SFAS_FIFO_COUNT_MASK) 906 printf(" %x", *rp->sfas_fifo); 907 printf("\n"); 908 909 printf("CMD: %x\n", *rp->sfas_command); 910 panic("sfasintr: ILLEGAL COMMAND!"); 911 } 912 913 if (dev->sc_interrupt & SFAS_INT_RESELECTED) { 914 /* We were reselected. Set the chip as busy */ 915 916 s = splbio(); 917 dev->sc_flags |= SFAS_ACTIVE; 918 if (dev->sc_sel_nexus) { 919 dev->sc_sel_nexus->flags |= SFAS_NF_SELECT_ME; 920 dev->sc_sel_nexus = 0; 921 } 922 splx(s); 923 924 if (dev->sc_units_disconnected) { 925 /* Find out who reselected us. */ 926 927 dev->sc_resel[0] &= ~(1<<dev->sc_host_id); 928 929 for(i=0; i<8; i++) 930 if (dev->sc_resel[0] & (1<<i)) 931 break; 932 933 if (i == 8) 934 panic("Illegal reselection!"); 935 936 if (dev->sc_nexus[i].state == SFAS_NS_DISCONNECTED) { 937 /* 938 * This unit had disconnected, so we reconnect 939 * it. 940 */ 941 942 dev->sc_cur_nexus = &dev->sc_nexus[i]; 943 nexus = dev->sc_cur_nexus; 944 945 *rp->sfas_syncper = nexus->syncper; 946 *rp->sfas_syncoff = nexus->syncoff; 947 *rp->sfas_config3 = nexus->config3; 948 949 *rp->sfas_dest_id = i & 7; 950 951 dev->sc_units_disconnected--; 952 dev->sc_msg_in_len= 0; 953 954 /* Restore active pointers. */ 955 sfas_restore_pointers(dev); 956 957 nexus->state = SFAS_NS_RESELECTED; 958 959 *rp->sfas_command = SFAS_CMD_MESSAGE_ACCEPTED; 960 961 return(1); 962 } 963 } 964 965 /* Somehow we got an illegal reselection. Dump and panic. */ 966 printf("sfasintr: resel[0] %x resel[1] %x disconnected %d\n", 967 dev->sc_resel[0], dev->sc_resel[1], 968 dev->sc_units_disconnected); 969 panic("sfasintr: Unexpected reselection!"); 970 } 971 972 return(0); 973 } 974 975 /* 976 * Part two of the interrupt machine. Handle disconnection and post command 977 * processing. We know that we have an active nexus here. 978 */ 979 int 980 sfas_midaction(dev, rp, nexus) 981 struct sfas_softc *dev; 982 sfas_regmap_p rp; 983 struct nexus *nexus; 984 { 985 int i, left, len, s; 986 u_char status, msg; 987 988 if (dev->sc_interrupt & SFAS_INT_DISCONNECT) { 989 s = splbio(); 990 dev->sc_cur_nexus = 0; 991 992 /* Mark chip as busy and clean up the chip FIFO. */ 993 dev->sc_flags &= ~SFAS_ACTIVE; 994 *rp->sfas_command = SFAS_CMD_FLUSH_FIFO; 995 996 /* Let the nexus state reflect what we have to do. */ 997 switch(nexus->state) { 998 case SFAS_NS_SELECTED: 999 dev->sc_sel_nexus = 0; 1000 nexus->flags &= ~SFAS_NF_SELECT_ME; 1001 1002 /* 1003 * We were trying to select the unit. Probably no unit 1004 * at this ID. 1005 */ 1006 nexus->xs->resid = dev->sc_len; 1007 1008 nexus->status = -2; 1009 nexus->flags &= ~SFAS_NF_UNIT_BUSY; 1010 nexus->state = SFAS_NS_FINISHED; 1011 break; 1012 1013 case SFAS_NS_DONE: 1014 /* All done. */ 1015 nexus->xs->resid = dev->sc_len; 1016 1017 nexus->flags &= ~SFAS_NF_UNIT_BUSY; 1018 nexus->state = SFAS_NS_FINISHED; 1019 dev->sc_led(dev, 0); 1020 break; 1021 1022 case SFAS_NS_DISCONNECTING: 1023 /* 1024 * We have received a DISCONNECT message, so we are 1025 * doing a normal disconnection. 1026 */ 1027 nexus->state = SFAS_NS_DISCONNECTED; 1028 1029 dev->sc_units_disconnected++; 1030 break; 1031 1032 case SFAS_NS_RESET: 1033 /* 1034 * We were reseting this SCSI-unit. Clean up the 1035 * nexus struct. 1036 */ 1037 dev->sc_led(dev, 0); 1038 sfas_init_nexus(dev, nexus); 1039 break; 1040 1041 default: 1042 /* 1043 * Unexpected disconnection! Cleanup and exit. This 1044 * shouldn't cause any problems. 1045 */ 1046 printf("sfasintr: Unexpected disconnection\n"); 1047 printf("sfasintr: u %x s %d p %d f %x c %x\n", 1048 nexus->lun_unit, nexus->state, 1049 dev->sc_status & SFAS_STAT_PHASE_MASK, 1050 nexus->flags, nexus->cbuf[0]); 1051 1052 nexus->xs->resid = dev->sc_len; 1053 1054 nexus->flags &= ~SFAS_NF_UNIT_BUSY; 1055 nexus->state = SFAS_NS_FINISHED; 1056 nexus->status = -3; 1057 1058 dev->sc_led(dev, 0); 1059 break; 1060 } 1061 1062 /* 1063 * If we have disconnected units, we MUST enable reselection 1064 * within 250ms. 1065 */ 1066 if (dev->sc_units_disconnected && 1067 !(dev->sc_flags & SFAS_ACTIVE)) 1068 *rp->sfas_command = SFAS_CMD_ENABLE_RESEL; 1069 1070 splx(s); 1071 1072 /* Select the first pre-initialized nexus we find. */ 1073 for(i=0; i<8; i++) 1074 if (dev->sc_nexus[i].flags & (SFAS_NF_SELECT_ME | SFAS_NF_RETRY_SELECT)) 1075 if (sfas_select_unit(dev, i) == 2) 1076 break; 1077 1078 /* We are done with this nexus! */ 1079 if (nexus->state == SFAS_NS_FINISHED) 1080 sfas_scsidone(dev, nexus->xs, nexus->status); 1081 1082 return(1); 1083 } 1084 1085 switch(nexus->state) { 1086 case SFAS_NS_SELECTED: 1087 dev->sc_cur_nexus = nexus; 1088 dev->sc_sel_nexus = 0; 1089 1090 nexus->flags &= ~SFAS_NF_SELECT_ME; 1091 1092 /* 1093 * We have selected a unit. Setup chip, restore pointers and 1094 * light the led. 1095 */ 1096 *rp->sfas_syncper = nexus->syncper; 1097 *rp->sfas_syncoff = nexus->syncoff; 1098 *rp->sfas_config3 = nexus->config3; 1099 1100 sfas_restore_pointers(dev); 1101 1102 nexus->status = 0xFF; 1103 dev->sc_msg_in[0] = 0xFF; 1104 dev->sc_msg_in_len= 0; 1105 1106 dev->sc_led(dev, 1); 1107 1108 break; 1109 1110 case SFAS_NS_DATA_IN: 1111 case SFAS_NS_DATA_OUT: 1112 /* We have transfered data. */ 1113 if (dev->sc_dma_len) 1114 if (dev->sc_cur_link < dev->sc_max_link) { 1115 /* 1116 * Clean up DMA and at the same time get how 1117 * many bytes that were NOT transfered. 1118 */ 1119 left = dev->sc_setup_dma(dev, 0, 0, SFAS_DMA_CLEAR); 1120 len = dev->sc_dma_len; 1121 1122 if (nexus->state == SFAS_NS_DATA_IN) { 1123 /* 1124 * If we were bumping we may have had an odd length 1125 * which means that there may be bytes left in the 1126 * fifo. We also need to move the data from the 1127 * bump buffer to the actual memory. 1128 */ 1129 if (dev->sc_dma_buf == dev->sc_bump_pa) 1130 { 1131 while((*rp->sfas_fifo_flags&SFAS_FIFO_COUNT_MASK) 1132 && left) 1133 dev->sc_bump_va[len-(left--)] = *rp->sfas_fifo; 1134 1135 bcopy(dev->sc_bump_va, dev->sc_buf, len-left); 1136 } 1137 } else { 1138 /* Count any unsent bytes and flush them. */ 1139 left+= *rp->sfas_fifo_flags & SFAS_FIFO_COUNT_MASK; 1140 *rp->sfas_command = SFAS_CMD_FLUSH_FIFO; 1141 } 1142 1143 /* 1144 * Update pointers/length to reflect the transfered 1145 * data. 1146 */ 1147 dev->sc_len -= len-left; 1148 dev->sc_buf += len-left; 1149 1150 dev->sc_dma_buf = (char *)dev->sc_dma_buf + len-left; 1151 dev->sc_dma_len = left; 1152 1153 dev->sc_dma_blk_ptr = (char *)dev->sc_dma_blk_ptr + 1154 len-left; 1155 dev->sc_dma_blk_len -= len-left; 1156 1157 /* 1158 * If it was the end of a DMA block, we select the 1159 * next to begin with. 1160 */ 1161 if (!dev->sc_dma_blk_len) 1162 dev->sc_cur_link++; 1163 } 1164 break; 1165 1166 case SFAS_NS_STATUS: 1167 /* 1168 * If we were not sensing, grab the status byte. If we were 1169 * sensing and we got a bad status, let the user know. 1170 */ 1171 1172 status = *rp->sfas_fifo; 1173 msg = *rp->sfas_fifo; 1174 1175 nexus->status = status; 1176 if (status != 0) 1177 nexus->status = -1; 1178 1179 /* 1180 * Preload the command complete message. Handeled in 1181 * sfas_postaction. 1182 */ 1183 dev->sc_msg_in[0] = msg; 1184 dev->sc_msg_in_len = 1; 1185 nexus->flags |= SFAS_NF_HAS_MSG; 1186 break; 1187 1188 default: 1189 break; 1190 } 1191 1192 return(0); 1193 } 1194 1195 /* 1196 * Part three of the interrupt machine. Handle phase changes (and repeated 1197 * phase passes). We know that we have an active nexus here. 1198 */ 1199 int 1200 sfas_postaction(dev, rp, nexus) 1201 struct sfas_softc *dev; 1202 sfas_regmap_p rp; 1203 struct nexus *nexus; 1204 { 1205 int i, len; 1206 u_char cmd; 1207 short offset, period; 1208 1209 cmd = 0; 1210 1211 switch(dev->sc_status & SFAS_STAT_PHASE_MASK) { 1212 case SFAS_PHASE_DATA_OUT: 1213 case SFAS_PHASE_DATA_IN: 1214 if ((dev->sc_status & SFAS_STAT_PHASE_MASK) == 1215 SFAS_PHASE_DATA_OUT) 1216 nexus->state = SFAS_NS_DATA_OUT; 1217 else 1218 nexus->state = SFAS_NS_DATA_IN; 1219 1220 /* Make DMA ready to accept new data. Load active pointers 1221 * from the DMA block. */ 1222 dev->sc_setup_dma(dev, 0, 0, SFAS_DMA_CLEAR); 1223 if (dev->sc_cur_link < dev->sc_max_link) { 1224 if (!dev->sc_dma_blk_len) { 1225 dev->sc_dma_blk_ptr = dev->sc_chain[dev->sc_cur_link].ptr; 1226 dev->sc_dma_blk_len = dev->sc_chain[dev->sc_cur_link].len; 1227 dev->sc_dma_blk_flg = dev->sc_chain[dev->sc_cur_link].flg; 1228 } 1229 1230 /* We should use polled IO here. */ 1231 if (dev->sc_dma_blk_flg == SFAS_CHAIN_PRG) { 1232 dev->sc_ixfer(dev, nexus->xs->xs_control & XS_CTL_POLL); 1233 dev->sc_cur_link++; 1234 dev->sc_dma_len = 0; 1235 break; 1236 } 1237 else if (dev->sc_dma_blk_flg == SFAS_CHAIN_BUMP) 1238 len = dev->sc_dma_blk_len; 1239 else 1240 len = dev->sc_need_bump(dev, dev->sc_dma_blk_ptr, 1241 dev->sc_dma_blk_len); 1242 1243 /* 1244 * If len != 0 we must bump the data, else we just DMA it 1245 * straight into memory. 1246 */ 1247 if (len) { 1248 dev->sc_dma_buf = dev->sc_bump_pa; 1249 dev->sc_dma_len = len; 1250 1251 if (nexus->state == SFAS_NS_DATA_OUT) 1252 bcopy(dev->sc_buf, dev->sc_bump_va, dev->sc_dma_len); 1253 } else { 1254 dev->sc_dma_buf = dev->sc_dma_blk_ptr; 1255 dev->sc_dma_len = dev->sc_dma_blk_len; 1256 } 1257 1258 /* Load DMA with adress and length of transfer. */ 1259 dev->sc_setup_dma(dev, dev->sc_dma_buf, dev->sc_dma_len, 1260 ((nexus->state == SFAS_NS_DATA_OUT) ? 1261 SFAS_DMA_WRITE : SFAS_DMA_READ)); 1262 1263 /* printf("Using DMA !!!!\n");*/ 1264 cmd = SFAS_CMD_TRANSFER_INFO | SFAS_CMD_DMA; 1265 } else { 1266 /* 1267 * Hmmm, the unit wants more info than we have or has 1268 * more than we want. Let the chip handle that. 1269 */ 1270 1271 *rp->sfas_tc_low = 0; /* was 256 but this does not make sense */ 1272 *rp->sfas_tc_mid = 1; 1273 *rp->sfas_tc_high = 0; 1274 cmd = SFAS_CMD_TRANSFER_PAD; 1275 } 1276 break; 1277 1278 case SFAS_PHASE_COMMAND: 1279 /* The scsi unit wants the command, send it. */ 1280 nexus->state = SFAS_NS_SVC; 1281 1282 *rp->sfas_command = SFAS_CMD_FLUSH_FIFO; 1283 for(i=0; i<5; i++); 1284 1285 for(i=0; i<nexus->clen; i++) 1286 *rp->sfas_fifo = nexus->cbuf[i]; 1287 cmd = SFAS_CMD_TRANSFER_INFO; 1288 break; 1289 1290 case SFAS_PHASE_STATUS: 1291 /* 1292 * We've got status phase. Request status and command 1293 * complete message. 1294 */ 1295 nexus->state = SFAS_NS_STATUS; 1296 cmd = SFAS_CMD_COMMAND_COMPLETE; 1297 break; 1298 1299 case SFAS_PHASE_MESSAGE_OUT: 1300 /* 1301 * Either the scsi unit wants us to send a message or we have 1302 * asked for it by seting the ATN bit. 1303 */ 1304 nexus->state = SFAS_NS_MSG_OUT; 1305 1306 *rp->sfas_command = SFAS_CMD_FLUSH_FIFO; 1307 1308 if (nexus->flags & SFAS_NF_DO_SDTR) { 1309 /* Send a Synchronous Data Transfer Request. */ 1310 1311 sfas_build_sdtrm(dev, nexus->period, nexus->offset); 1312 nexus->flags |= SFAS_NF_SDTR_SENT; 1313 nexus->flags &= ~SFAS_NF_DO_SDTR; 1314 } else if (nexus->flags & SFAS_NF_RESET) { 1315 /* Send a reset scsi unit message. */ 1316 1317 dev->sc_msg_out[0] = 0x0C; 1318 dev->sc_msg_out_len = 1; 1319 nexus->state = SFAS_NS_RESET; 1320 nexus->flags &= ~SFAS_NF_RESET; 1321 } else if (dev->sc_msg_out_len == 0) { 1322 /* Don't know what to send so we send a NOP message. */ 1323 1324 dev->sc_msg_out[0] = 0x08; 1325 dev->sc_msg_out_len = 1; 1326 } 1327 1328 cmd = SFAS_CMD_TRANSFER_INFO; 1329 1330 for(i=0; i<dev->sc_msg_out_len; i++) 1331 *rp->sfas_fifo = dev->sc_msg_out[i]; 1332 dev->sc_msg_out_len = 0; 1333 1334 break; 1335 1336 case SFAS_PHASE_MESSAGE_IN: 1337 /* Receive a message from the scsi unit. */ 1338 nexus->state = SFAS_NS_MSG_IN; 1339 1340 while(!(nexus->flags & SFAS_NF_HAS_MSG)) { 1341 *rp->sfas_command = SFAS_CMD_TRANSFER_INFO; 1342 sfasiwait(dev); 1343 1344 dev->sc_msg_in[dev->sc_msg_in_len++] = *rp->sfas_fifo; 1345 1346 /* Check if we got all the bytes in the message. */ 1347 if (dev->sc_msg_in[0] >= 0x80) ; 1348 else if (dev->sc_msg_in[0] >= 0x30) ; 1349 else if (((dev->sc_msg_in[0] >= 0x20) && 1350 (dev->sc_msg_in_len == 2)) || 1351 ((dev->sc_msg_in[0] != 0x01) && 1352 (dev->sc_msg_in_len == 1))) { 1353 nexus->flags |= SFAS_NF_HAS_MSG; 1354 break; 1355 } else { 1356 if (dev->sc_msg_in_len >= 2) 1357 if ((dev->sc_msg_in[1]+2) == dev->sc_msg_in_len) { 1358 nexus->flags |= SFAS_NF_HAS_MSG; 1359 break; 1360 } 1361 } 1362 1363 *rp->sfas_command = SFAS_CMD_MESSAGE_ACCEPTED; 1364 sfasiwait(dev); 1365 1366 if ((dev->sc_status & SFAS_STAT_PHASE_MASK) != 1367 SFAS_PHASE_MESSAGE_IN) 1368 break; 1369 } 1370 1371 cmd = SFAS_CMD_MESSAGE_ACCEPTED; 1372 if (nexus->flags & SFAS_NF_HAS_MSG) { 1373 /* We have a message. Decode it. */ 1374 1375 switch(dev->sc_msg_in[0]) { 1376 case 0x00: /* COMMAND COMPLETE */ 1377 nexus->state = SFAS_NS_DONE; 1378 break; 1379 case 0x04: /* DISCONNECT */ 1380 nexus->state = SFAS_NS_DISCONNECTING; 1381 break; 1382 case 0x02: /* SAVE DATA POINTER */ 1383 sfas_save_pointers(dev); 1384 break; 1385 case 0x03: /* RESTORE DATA POINTERS */ 1386 sfas_restore_pointers(dev); 1387 break; 1388 case 0x07: /* MESSAGE REJECT */ 1389 /* 1390 * If we had sent a SDTR and we got a message 1391 * reject, the scsi docs say that we must go 1392 * to async transfer. 1393 */ 1394 if (nexus->flags & SFAS_NF_SDTR_SENT) { 1395 nexus->flags &= ~SFAS_NF_SDTR_SENT; 1396 1397 nexus->config3 &= ~SFAS_CFG3_FASTSCSI; 1398 nexus->syncper = 5; 1399 nexus->syncoff = 0; 1400 1401 *rp->sfas_syncper = nexus->syncper; 1402 *rp->sfas_syncoff = nexus->syncoff; 1403 *rp->sfas_config3 = nexus->config3; 1404 } else 1405 /* 1406 * Something was rejected but we don't know 1407 * what! PANIC! 1408 */ 1409 panic("sfasintr: Unknown message rejected!"); 1410 break; 1411 case 0x08: /* MO OPERATION */ 1412 break; 1413 case 0x01: /* EXTENDED MESSAGE */ 1414 switch(dev->sc_msg_in[2]) { 1415 case 0x01:/* SYNC. DATA TRANSFER REQUEST */ 1416 /* Decode the SDTR message. */ 1417 period = 4*dev->sc_msg_in[3]; 1418 offset = dev->sc_msg_in[4]; 1419 1420 /* 1421 * Make sure that the specs are within 1422 * chip limits. Note that if we 1423 * initiated the negotiation the specs 1424 * WILL be withing chip limits. If it 1425 * was the scsi unit that initiated 1426 * the negotiation, the specs may be 1427 * to high. 1428 */ 1429 if (offset > 16) 1430 offset = 16; 1431 if ((period < 200) && 1432 (dev->sc_clock_freq <= 25)) 1433 period = 200; 1434 1435 if (offset == 0) 1436 period = 5*dev->sc_clock_period; 1437 1438 nexus->syncper = period/ 1439 dev->sc_clock_period; 1440 nexus->syncoff = offset; 1441 1442 if (period < 200) 1443 nexus->config3 |= SFAS_CFG3_FASTSCSI; 1444 else 1445 nexus->config3 &=~SFAS_CFG3_FASTSCSI; 1446 1447 nexus->flags |= SFAS_NF_SYNC_TESTED; 1448 1449 *rp->sfas_syncper = nexus->syncper; 1450 *rp->sfas_syncoff = nexus->syncoff; 1451 *rp->sfas_config3 = nexus->config3; 1452 1453 /* 1454 * Hmmm, it seems that the scsi unit 1455 * initiated sync negotiation, so lets 1456 * reply acording to scsi-2 standard. 1457 */ 1458 if (!(nexus->flags& SFAS_NF_SDTR_SENT)) 1459 { 1460 if ((dev->sc_config_flags & 1461 SFAS_NO_SYNCH) || 1462 (dev->sc_config_flags & 1463 SFAS_NO_DMA) || 1464 sfas_inhibit_sync[ 1465 nexus->lun_unit & 7]) { 1466 period = 200; 1467 offset = 0; 1468 } 1469 1470 nexus->offset = offset; 1471 nexus->period = period; 1472 nexus->flags |= SFAS_NF_DO_SDTR; 1473 *rp->sfas_command = SFAS_CMD_SET_ATN; 1474 } 1475 1476 nexus->flags &= ~SFAS_NF_SDTR_SENT; 1477 break; 1478 1479 case 0x00: /* MODIFY DATA POINTERS */ 1480 case 0x02: /* EXTENDED IDENTIFY (SCSI-1) */ 1481 case 0x03: /* WIDE DATA TRANSFER REQUEST */ 1482 default: 1483 /* Reject any unhandeled messages. */ 1484 1485 dev->sc_msg_out[0] = 0x07; 1486 dev->sc_msg_out_len = 1; 1487 *rp->sfas_command = SFAS_CMD_SET_ATN; 1488 cmd = SFAS_CMD_MESSAGE_ACCEPTED; 1489 break; 1490 } 1491 break; 1492 1493 default: 1494 /* Reject any unhandeled messages. */ 1495 1496 dev->sc_msg_out[0] = 0x07; 1497 dev->sc_msg_out_len = 1; 1498 *rp->sfas_command = SFAS_CMD_SET_ATN; 1499 cmd = SFAS_CMD_MESSAGE_ACCEPTED; 1500 break; 1501 } 1502 nexus->flags &= ~SFAS_NF_HAS_MSG; 1503 dev->sc_msg_in_len = 0; 1504 } 1505 break; 1506 default: 1507 printf("SFASINTR: UNKNOWN PHASE! phase: %d\n", 1508 dev->sc_status & SFAS_STAT_PHASE_MASK); 1509 dev->sc_led(dev, 0); 1510 sfas_scsidone(dev, nexus->xs, -4); 1511 1512 return(-1); 1513 } 1514 1515 if (cmd) 1516 *rp->sfas_command = cmd; 1517 1518 return(0); 1519 } 1520 1521 /* 1522 * Stub for interrupt machine. 1523 */ 1524 void 1525 sfasintr(dev) 1526 struct sfas_softc *dev; 1527 { 1528 sfas_regmap_p rp; 1529 struct nexus *nexus; 1530 1531 rp = dev->sc_fas; 1532 1533 if (!sfas_pretests(dev, rp)) { 1534 1535 nexus = dev->sc_cur_nexus; 1536 if (nexus == NULL) 1537 nexus = dev->sc_sel_nexus; 1538 1539 if (nexus) 1540 if (!sfas_midaction(dev, rp, nexus)) 1541 sfas_postaction(dev, rp, nexus); 1542 } 1543 } 1544 1545 /* 1546 * sfasicmd is used to perform IO when we can't use interrupts. sfasicmd 1547 * emulates the normal environment by waiting for the chip and calling 1548 * sfasintr. 1549 */ 1550 void 1551 sfasicmd(dev, pendp) 1552 struct sfas_softc *dev; 1553 struct sfas_pending *pendp; 1554 { 1555 sfas_regmap_p rp; 1556 struct nexus *nexus; 1557 1558 nexus = &dev->sc_nexus[pendp->xs->xs_periph->periph_target]; 1559 rp = dev->sc_fas; 1560 1561 if (!sfasselect(dev, pendp, (char *)pendp->xs->cmd, pendp->xs->cmdlen, 1562 (char *)pendp->xs->data, pendp->xs->datalen, 1563 SFAS_SELECT_I)) 1564 panic("sfasicmd: Couldn't select unit"); 1565 1566 while(nexus->state != SFAS_NS_FINISHED) { 1567 sfasiwait(dev); 1568 sfasintr(dev); 1569 } 1570 1571 nexus->flags &= ~SFAS_NF_SYNC_TESTED; 1572 } 1573 1574 1575 #ifdef SFAS_DEBUG 1576 1577 void 1578 dump_nexus(nexus) 1579 struct nexus *nexus; 1580 { 1581 int loop; 1582 1583 printf("nexus=%08x\n", (u_int)nexus); 1584 printf("scsi_fer=%08x\n", (u_int)nexus->xs); 1585 printf("ID=%02x\n", nexus->ID); 1586 printf("clen=%02x\n", nexus->clen); 1587 printf("cbuf="); 1588 for (loop = 0; loop< 14; ++loop) 1589 printf(" %02x\n", nexus->cbuf[loop]); 1590 printf("\n"); 1591 printf("DMA:\n"); 1592 for (loop = 0; loop < MAXCHAIN; ++loop) 1593 printf("dma_chain: %08x %04x %04x\n", nexus->dma[loop].ptr, 1594 nexus->dma[loop].len, nexus->dma[loop].flg); 1595 printf("\n"); 1596 1597 printf("max_link=%d\n", nexus->max_link); 1598 printf("cur_link=%d\n", nexus->cur_link); 1599 1600 printf("buf=%08x\n", (u_int)nexus->buf); 1601 printf("len=%08x\n", nexus->len); 1602 printf("dma_buf=%08x\n", (u_int)nexus->dma_buf); 1603 printf("dma_len=%08x\n", nexus->dma_len); 1604 printf("dma_blk_ptr=%08x\n", (u_int)nexus->dma_blk_ptr); 1605 printf("dma_blk_len=%08x\n", nexus->dma_blk_len); 1606 printf("dma_blk_flag=%08x\n", nexus->dma_blk_flg); 1607 printf("state=%02x\n", nexus->state); 1608 printf("flags=%04x\n", nexus->flags); 1609 printf("period=%d\n", nexus->period); 1610 printf("offset=%d\n", nexus->offset); 1611 printf("syncper=%d\n", nexus->syncper); 1612 printf("syncoff=%d\n", nexus->syncoff); 1613 printf("config3=%02x\n", nexus->config3); 1614 printf("lun_unit=%d\n", nexus->lun_unit); 1615 printf("status=%02x\n", nexus->status); 1616 printf("\n"); 1617 } 1618 1619 void 1620 dump_nexii(sc) 1621 struct sfas_softc *sc; 1622 { 1623 int loop; 1624 1625 for (loop = 0; loop < 8; ++loop) { 1626 dump_nexus(&sc->sc_nexus[loop]); 1627 } 1628 } 1629 1630 void 1631 dump_sfassoftc(sc) 1632 struct sfas_softc *sc; 1633 { 1634 printf("sfassoftc @ 0x%08x\n", (u_int)sc); 1635 printf("clock_freq = %d\n", sc->sc_clock_freq); 1636 printf("timeout = %d\n", sc->sc_timeout); 1637 printf("host_id = %d\n", sc->sc_host_id); 1638 printf("config_flags = 0x%08x\n", sc->sc_config_flags); 1639 printf("led_status = %d\n", sc->sc_led_status); 1640 1641 dump_nexii(sc); 1642 printf("cur_nexus = 0x%08x\n", (u_int)sc->sc_cur_nexus); 1643 printf("sel_nexus = 0x%08x\n", (u_int)sc->sc_sel_nexus); 1644 printf("\n"); 1645 } 1646 1647 #endif /* SFAS_DEBUG */ 1648
Indexes created Mon Oct 20 20:10:13 GMT 2025