sfas.c revision 1.7
1 /* $NetBSD: sfas.c,v 1.7 2002/08/22 01:13:54 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1995 Scott Stevens 5 * Copyright (c) 1995 Daniel Widenfalk 6 * Copyright (c) 1994 Christian E. Hopps 7 * Copyright (c) 1990 The Regents of the University of California. 8 * All rights reserved. 9 * 10 * This code is derived from software contributed to Berkeley by 11 * Van Jacobson of Lawrence Berkeley Laboratory. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. All advertising materials mentioning features or use of this software 22 * must display the following acknowledgement: 23 * This product includes software developed by the University of 24 * California, Berkeley and its contributors. 25 * 4. Neither the name of the University nor the names of its contributors 26 * may be used to endorse or promote products derived from this software 27 * without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 30 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 32 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 35 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 39 * SUCH DAMAGE. 40 * 41 * @(#)scsi.c 7.5 (Berkeley) 5/4/91 42 */ 43 44 /* 45 * Emulex FAS216 scsi adaptor driver 46 */ 47 48 /* 49 * Modified for NetBSD/arm32 by Scott Stevens 50 */ 51 52 #include <sys/param.h> 53 #include <sys/systm.h> 54 #include <sys/device.h> 55 #include <sys/buf.h> 56 #include <sys/proc.h> 57 58 #include <dev/scsipi/scsi_all.h> 59 #include <dev/scsipi/scsipi_all.h> 60 #include <dev/scsipi/scsiconf.h> 61 62 #include <uvm/uvm_extern.h> 63 64 #include <machine/pmap.h> 65 #include <machine/cpu.h> 66 #include <machine/io.h> 67 #include <machine/intr.h> 68 #include <arm/arm32/katelib.h> 69 #include <acorn32/podulebus/podulebus.h> 70 #include <acorn32/podulebus/sfasreg.h> 71 #include <acorn32/podulebus/sfasvar.h> 72 73 void sfasinitialize __P((struct sfas_softc *)); 74 void sfas_minphys __P((struct buf *bp)); 75 void sfas_scsi_request __P((struct scsipi_channel *, 76 scsipi_adapter_req_t, void *)); 77 void sfas_donextcmd __P((struct sfas_softc *dev, struct sfas_pending *pendp)); 78 void sfas_scsidone __P((struct sfas_softc *dev, struct scsipi_xfer *xs, 79 int stat)); 80 void sfasintr __P((struct sfas_softc *dev)); 81 void sfasiwait __P((struct sfas_softc *dev)); 82 void sfas_ixfer __P((struct sfas_softc *dev, int polling)); 83 void sfasreset __P((struct sfas_softc *dev, int how)); 84 int sfasselect __P((struct sfas_softc *dev, struct sfas_pending *pendp, 85 unsigned char *cbuf, int clen, 86 unsigned char *buf, int len, int mode)); 87 void sfasicmd __P((struct sfas_softc *dev, struct sfas_pending *pendp)); 88 void sfasgo __P((struct sfas_softc *dev, struct sfas_pending *pendp)); 89 90 /* 91 * Initialize these to make 'em patchable. Defaults to enable sync and discon. 92 */ 93 u_char sfas_inhibit_sync[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; 94 u_char sfas_inhibit_disc[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; 95 96 #define DEBUG 97 #ifdef DEBUG 98 #define QPRINTF(a) if (sfas_debug > 1) printf a 99 int sfas_debug = 2; 100 #else 101 #define QPRINTF 102 #endif 103 104 /* 105 * default minphys routine for sfas based controllers 106 */ 107 void 108 sfas_minphys(bp) 109 struct buf *bp; 110 { 111 112 /* 113 * No max transfer at this level. 114 */ 115 minphys(bp); 116 } 117 118 /* 119 * Initialize the nexus structs. 120 */ 121 void 122 sfas_init_nexus(dev, nexus) 123 struct sfas_softc *dev; 124 struct nexus *nexus; 125 { 126 bzero(nexus, sizeof(struct nexus)); 127 128 nexus->state = SFAS_NS_IDLE; 129 nexus->period = 200; 130 nexus->offset = 0; 131 nexus->syncper = 5; 132 nexus->syncoff = 0; 133 nexus->config3 = dev->sc_config3 & ~SFAS_CFG3_FASTSCSI; 134 } 135 136 void 137 sfasinitialize(dev) 138 struct sfas_softc *dev; 139 { 140 u_int *pte; 141 int i; 142 143 dev->sc_led_status = 0; 144 145 TAILQ_INIT(&dev->sc_xs_pending); 146 TAILQ_INIT(&dev->sc_xs_free); 147 148 /* 149 * Initialize the sfas_pending structs and link them into the free list. We 150 * have to set vm_link_data.pages to 0 or the vm FIX won't work. 151 */ 152 for(i=0; i<MAXPENDING; i++) { 153 TAILQ_INSERT_TAIL(&dev->sc_xs_free, &dev->sc_xs_store[i], 154 link); 155 } 156 157 /* 158 * Calculate the correct clock conversion factor 2 <= factor <= 8, i.e. set 159 * the factor to clock_freq / 5 (int). 160 */ 161 if (dev->sc_clock_freq <= 10) 162 dev->sc_clock_conv_fact = 2; 163 if (dev->sc_clock_freq <= 40) 164 dev->sc_clock_conv_fact = 2+((dev->sc_clock_freq-10)/5); 165 else 166 panic("sfasinitialize: Clock frequence too high"); 167 168 /* Setup and save the basic configuration registers */ 169 dev->sc_config1 = (dev->sc_host_id & SFAS_CFG1_BUS_ID_MASK); 170 dev->sc_config2 = SFAS_CFG2_FEATURES_ENABLE; 171 dev->sc_config3 = (dev->sc_clock_freq > 25 ? SFAS_CFG3_FASTCLK : 0); 172 173 /* Precalculate timeout value and clock period. */ 174 /* Ekkk ... floating point in the kernel !!!! */ 175 /* dev->sc_timeout_val = 1+dev->sc_timeout*dev->sc_clock_freq/ 176 (7.682*dev->sc_clock_conv_fact);*/ 177 dev->sc_timeout_val = 1+dev->sc_timeout*dev->sc_clock_freq/ 178 ((7682*dev->sc_clock_conv_fact)/1000); 179 dev->sc_clock_period = 1000/dev->sc_clock_freq; 180 181 sfasreset(dev, 1 | 2); /* Reset Chip and Bus */ 182 183 dev->sc_units_disconnected = 0; 184 dev->sc_msg_in_len = 0; 185 dev->sc_msg_out_len = 0; 186 187 dev->sc_flags = 0; 188 189 for(i=0; i<8; i++) 190 sfas_init_nexus(dev, &dev->sc_nexus[i]); 191 192 if (dev->sc_ixfer == NULL) 193 dev->sc_ixfer = sfas_ixfer; 194 195 /* 196 * Setup bump buffer. 197 */ 198 dev->sc_bump_va = (u_char *)uvm_km_zalloc(kernel_map, dev->sc_bump_sz); 199 (void) pmap_extract(pmap_kernel(), (vaddr_t)dev->sc_bump_va, 200 (paddr_t *)&dev->sc_bump_pa); 201 202 /* 203 * Setup pages to noncachable, that way we don't have to flush the cache 204 * every time we need "bumped" transfer. 205 */ 206 pte = vtopte((vaddr_t) dev->sc_bump_va); 207 *pte &= ~(L2_C | L2_B); 208 PTE_SYNC(pte); 209 cpu_tlb_flushD(); 210 cpu_dcache_wbinv_range((vm_offset_t)dev->sc_bump_va, NBPG); 211 212 printf(" dmabuf V0x%08x P0x%08x", (u_int)dev->sc_bump_va, (u_int)dev->sc_bump_pa); 213 } 214 215 216 /* 217 * used by specific sfas controller 218 */ 219 void 220 sfas_scsi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 221 void *arg) 222 { 223 struct scsipi_xfer *xs; 224 struct sfas_softc *dev = (void *)chan->chan_adapter->adapt_dev; 225 struct scsipi_periph *periph; 226 struct sfas_pending *pendp; 227 int flags, s, target; 228 229 switch (req) { 230 case ADAPTER_REQ_RUN_XFER: 231 xs = arg; 232 periph = xs->xs_periph; 233 flags = xs->xs_control; 234 target = periph->periph_target; 235 236 if (flags & XS_CTL_DATA_UIO) 237 panic("sfas: scsi data uio requested"); 238 239 if ((flags & XS_CTL_POLL) && (dev->sc_flags & SFAS_ACTIVE)) 240 panic("sfas_scsicmd: busy"); 241 242 /* Get hold of a sfas_pending block. */ 243 s = splbio(); 244 pendp = dev->sc_xs_free.tqh_first; 245 if (pendp == NULL) { 246 xs->error = XS_RESOURCE_SHORTAGE; 247 scsipi_done(xs); 248 splx(s); 249 return; 250 } 251 TAILQ_REMOVE(&dev->sc_xs_free, pendp, link); 252 pendp->xs = xs; 253 splx(s); 254 255 256 /* If the chip if busy OR the unit is busy, we have to wait for out turn. */ 257 if ((dev->sc_flags & SFAS_ACTIVE) || 258 (dev->sc_nexus[target].flags & SFAS_NF_UNIT_BUSY)) { 259 s = splbio(); 260 TAILQ_INSERT_TAIL(&dev->sc_xs_pending, pendp, link); 261 splx(s); 262 } else 263 sfas_donextcmd(dev, pendp); 264 265 return; 266 267 case ADAPTER_REQ_GROW_RESOURCES: 268 case ADAPTER_REQ_SET_XFER_MODE: 269 /* XXX Not supported. */ 270 return; 271 } 272 } 273 274 /* 275 * Actually select the unit, whereby the whole scsi-process is started. 276 */ 277 void 278 sfas_donextcmd(dev, pendp) 279 struct sfas_softc *dev; 280 struct sfas_pending *pendp; 281 { 282 int s; 283 284 /* 285 * Special case for scsi unit reset. I think this is waterproof. We first 286 * select the unit during splbio. We then cycle through the generated 287 * interrupts until the interrupt routine signals that the unit has 288 * acknowledged the reset. After that we have to wait a reset to select 289 * delay before anything else can happend. 290 */ 291 if (pendp->xs->xs_control & XS_CTL_RESET) { 292 struct nexus *nexus; 293 294 s = splbio(); 295 while(!sfasselect(dev, pendp, 0, 0, 0, 0, SFAS_SELECT_K)) { 296 splx(s); 297 delay(10); 298 s = splbio(); 299 } 300 301 nexus = dev->sc_cur_nexus; 302 while(nexus->flags & SFAS_NF_UNIT_BUSY) { 303 sfasiwait(dev); 304 sfasintr(dev); 305 } 306 307 nexus->flags |= SFAS_NF_UNIT_BUSY; 308 splx(s); 309 310 sfasreset(dev, 0); 311 312 s = splbio(); 313 nexus->flags &= ~SFAS_NF_UNIT_BUSY; 314 splx(s); 315 } 316 317 /* 318 * If we are polling, go to splbio and perform the command, else we poke 319 * the scsi-bus via sfasgo to get the interrupt machine going. 320 */ 321 if (pendp->xs->xs_control & XS_CTL_POLL) { 322 s = splbio(); 323 sfasicmd(dev, pendp); 324 TAILQ_INSERT_TAIL(&dev->sc_xs_free, pendp, link); 325 splx(s); 326 } else { 327 sfasgo(dev, pendp); 328 } 329 } 330 331 void 332 sfas_scsidone(dev, xs, stat) 333 struct sfas_softc *dev; 334 struct scsipi_xfer *xs; 335 int stat; 336 { 337 struct sfas_pending *pendp; 338 int s; 339 340 xs->status = stat; 341 342 if (stat == 0) 343 xs->resid = 0; 344 else { 345 switch(stat) { 346 case SCSI_CHECK: 347 case SCSI_BUSY: 348 xs->error = XS_BUSY; 349 break; 350 case -1: 351 xs->error = XS_DRIVER_STUFFUP; 352 QPRINTF(("sfas_scsicmd() bad %x\n", stat)); 353 break; 354 default: 355 xs->error = XS_TIMEOUT; 356 break; 357 } 358 } 359 360 /* Steal the next command from the queue so that one unit can't hog the bus. */ 361 s = splbio(); 362 pendp = dev->sc_xs_pending.tqh_first; 363 while(pendp) { 364 if (!(dev->sc_nexus[pendp->xs->xs_periph->periph_target].flags & 365 SFAS_NF_UNIT_BUSY)) 366 break; 367 pendp = pendp->link.tqe_next; 368 } 369 370 if (pendp != NULL) { 371 TAILQ_REMOVE(&dev->sc_xs_pending, pendp, link); 372 } 373 374 splx(s); 375 scsipi_done(xs); 376 377 if (pendp) 378 sfas_donextcmd(dev, pendp); 379 } 380 381 /* 382 * There are two kinds of reset: 383 * 1) CHIP-bus reset. This also implies a SCSI-bus reset. 384 * 2) SCSI-bus reset. 385 * After the appropriate resets have been performed we wait a reset to select 386 * delay time. 387 */ 388 void 389 sfasreset(dev, how) 390 struct sfas_softc *dev; 391 int how; 392 { 393 sfas_regmap_p rp; 394 int i, s; 395 396 rp = dev->sc_fas; 397 398 if (how & 1) { 399 for(i=0; i<8; i++) 400 sfas_init_nexus(dev, &dev->sc_nexus[i]); 401 402 *rp->sfas_command = SFAS_CMD_RESET_CHIP; 403 delay(1); 404 *rp->sfas_command = SFAS_CMD_NOP; 405 406 *rp->sfas_config1 = dev->sc_config1; 407 *rp->sfas_config2 = dev->sc_config2; 408 *rp->sfas_config3 = dev->sc_config3; 409 *rp->sfas_timeout = dev->sc_timeout_val; 410 *rp->sfas_clkconv = dev->sc_clock_conv_fact & 411 SFAS_CLOCK_CONVERSION_MASK; 412 } 413 414 if (how & 2) { 415 for(i=0; i<8; i++) 416 sfas_init_nexus(dev, &dev->sc_nexus[i]); 417 418 s = splbio(); 419 420 *rp->sfas_command = SFAS_CMD_RESET_SCSI_BUS; 421 delay(100); 422 423 /* Skip interrupt generated by RESET_SCSI_BUS */ 424 while(*rp->sfas_status & SFAS_STAT_INTERRUPT_PENDING) { 425 dev->sc_status = *rp->sfas_status; 426 dev->sc_interrupt = *rp->sfas_interrupt; 427 428 delay(100); 429 } 430 431 dev->sc_status = *rp->sfas_status; 432 dev->sc_interrupt = *rp->sfas_interrupt; 433 434 splx(s); 435 } 436 437 if (dev->sc_config_flags & SFAS_SLOW_START) 438 delay(4*250000); /* RESET to SELECT DELAY*4 for slow devices */ 439 else 440 delay(250000); /* RESET to SELECT DELAY */ 441 } 442 443 /* 444 * Save active data pointers to the nexus block currently active. 445 */ 446 void 447 sfas_save_pointers(dev) 448 struct sfas_softc *dev; 449 { 450 struct nexus *nx; 451 452 nx = dev->sc_cur_nexus; 453 if (nx) { 454 nx->cur_link = dev->sc_cur_link; 455 nx->max_link = dev->sc_max_link; 456 nx->buf = dev->sc_buf; 457 nx->len = dev->sc_len; 458 nx->dma_len = dev->sc_dma_len; 459 nx->dma_buf = dev->sc_dma_buf; 460 nx->dma_blk_flg = dev->sc_dma_blk_flg; 461 nx->dma_blk_len = dev->sc_dma_blk_len; 462 nx->dma_blk_ptr = dev->sc_dma_blk_ptr; 463 } 464 } 465 466 /* 467 * Restore data pointers from the currently active nexus block. 468 */ 469 void 470 sfas_restore_pointers(dev) 471 struct sfas_softc *dev; 472 { 473 struct nexus *nx; 474 475 nx = dev->sc_cur_nexus; 476 if (nx) { 477 dev->sc_cur_link = nx->cur_link; 478 dev->sc_max_link = nx->max_link; 479 dev->sc_buf = nx->buf; 480 dev->sc_len = nx->len; 481 dev->sc_dma_len = nx->dma_len; 482 dev->sc_dma_buf = nx->dma_buf; 483 dev->sc_dma_blk_flg = nx->dma_blk_flg; 484 dev->sc_dma_blk_len = nx->dma_blk_len; 485 dev->sc_dma_blk_ptr = nx->dma_blk_ptr; 486 dev->sc_chain = nx->dma; 487 dev->sc_unit = (nx->lun_unit & 0x0F); 488 dev->sc_lun = (nx->lun_unit & 0xF0) >> 4; 489 } 490 } 491 492 /* 493 * sfasiwait is used during interrupt and polled IO to wait for an event from 494 * the FAS chip. This function MUST NOT BE CALLED without interrupt disabled. 495 */ 496 void 497 sfasiwait(dev) 498 struct sfas_softc *dev; 499 { 500 sfas_regmap_p rp; 501 502 /* 503 * If SFAS_DONT_WAIT is set, we have already grabbed the interrupt info 504 * elsewhere. So we don't have to wait for it. 505 */ 506 if (dev->sc_flags & SFAS_DONT_WAIT) { 507 dev->sc_flags &= ~SFAS_DONT_WAIT; 508 return; 509 } 510 511 rp = dev->sc_fas; 512 513 /* Wait for FAS chip to signal an interrupt. */ 514 while(!(*rp->sfas_status & SFAS_STAT_INTERRUPT_PENDING)) 515 delay(1); 516 517 /* Grab interrupt info from chip. */ 518 dev->sc_status = *rp->sfas_status; 519 dev->sc_interrupt = *rp->sfas_interrupt; 520 if (dev->sc_interrupt & SFAS_INT_RESELECTED) { 521 dev->sc_resel[0] = *rp->sfas_fifo; 522 dev->sc_resel[1] = *rp->sfas_fifo; 523 } 524 } 525 526 /* 527 * Transfer info to/from device. sfas_ixfer uses polled IO+sfasiwait so the 528 * rules that apply to sfasiwait also applies here. 529 */ 530 void 531 sfas_ixfer(dev, polling) 532 struct sfas_softc *dev; 533 int polling; 534 { 535 sfas_regmap_p rp; 536 u_char *buf; 537 int len, mode, phase; 538 539 rp = dev->sc_fas; 540 buf = dev->sc_buf; 541 len = dev->sc_len; 542 543 /* 544 * Decode the scsi phase to determine whether we are reading or writing. 545 * mode == 1 => READ, mode == 0 => WRITE 546 */ 547 phase = dev->sc_status & SFAS_STAT_PHASE_MASK; 548 mode = (phase == SFAS_PHASE_DATA_IN); 549 550 while(len && ((dev->sc_status & SFAS_STAT_PHASE_MASK) == phase)) 551 if (mode) { 552 *rp->sfas_command = SFAS_CMD_TRANSFER_INFO; 553 554 sfasiwait(dev); 555 556 *buf++ = *rp->sfas_fifo; 557 len--; 558 } else { 559 len--; 560 *rp->sfas_fifo = *buf++; 561 *rp->sfas_command = SFAS_CMD_TRANSFER_INFO; 562 563 sfasiwait(dev); 564 } 565 566 /* Update buffer pointers to reflect the sent/received data. */ 567 dev->sc_buf = buf; 568 dev->sc_len = len; 569 570 /* 571 * Since the last sfasiwait will be a phase-change, we can't wait for it 572 * again later, so we have to signal that. 573 * Since this may be called from an interrupt initiated routine then we 574 * must call sfasintr again to avoid losing an interrupt. Phew! 575 */ 576 if(polling) 577 dev->sc_flags |= SFAS_DONT_WAIT; 578 else 579 sfasintr(dev); 580 } 581 582 /* 583 * Build a Synchronous Data Transfer Request message 584 */ 585 void 586 sfas_build_sdtrm(dev, period, offset) 587 struct sfas_softc *dev; 588 int period; 589 int offset; 590 { 591 dev->sc_msg_out[0] = 0x01; 592 dev->sc_msg_out[1] = 0x03; 593 dev->sc_msg_out[2] = 0x01; 594 dev->sc_msg_out[3] = period/4; 595 dev->sc_msg_out[4] = offset; 596 dev->sc_msg_out_len= 5; 597 } 598 599 /* 600 * Arbitate the scsi bus and select the unit 601 */ 602 int 603 sfas_select_unit(dev, target) 604 struct sfas_softc *dev; 605 short target; 606 { 607 sfas_regmap_p rp; 608 struct nexus *nexus; 609 int s, retcode, i; 610 u_char cmd; 611 612 s = splbio(); /* Do this at splbio so that we won't be disturbed. */ 613 614 retcode = 0; 615 616 nexus = &dev->sc_nexus[target]; 617 618 /* 619 * Check if the chip is busy. If not the we mark it as so and hope that nobody 620 * reselects us until we have grabbed the bus. 621 */ 622 if (!(dev->sc_flags & SFAS_ACTIVE) && !dev->sc_sel_nexus) { 623 dev->sc_flags |= SFAS_ACTIVE; 624 625 rp = dev->sc_fas; 626 627 *rp->sfas_syncper = nexus->syncper; 628 *rp->sfas_syncoff = nexus->syncoff; 629 *rp->sfas_config3 = nexus->config3; 630 631 *rp->sfas_config1 = dev->sc_config1; 632 *rp->sfas_timeout = dev->sc_timeout_val; 633 *rp->sfas_dest_id = target; 634 635 /* If nobody has stolen the bus, we can send a select command to the chip. */ 636 if (!(*rp->sfas_status & SFAS_STAT_INTERRUPT_PENDING)) { 637 *rp->sfas_fifo = nexus->ID; 638 if ((nexus->flags & (SFAS_NF_DO_SDTR | SFAS_NF_RESET)) 639 || (dev->sc_msg_out_len != 0)) 640 cmd = SFAS_CMD_SEL_ATN_STOP; 641 else { 642 for(i=0; i<nexus->clen; i++) 643 *rp->sfas_fifo = nexus->cbuf[i]; 644 645 cmd = SFAS_CMD_SEL_ATN; 646 } 647 648 dev->sc_sel_nexus = nexus; 649 650 *rp->sfas_command = cmd; 651 retcode = 1; 652 nexus->flags &= ~SFAS_NF_RETRY_SELECT; 653 } else 654 nexus->flags |= SFAS_NF_RETRY_SELECT; 655 } else 656 nexus->flags |= SFAS_NF_RETRY_SELECT; 657 658 splx(s); 659 return(retcode); 660 } 661 662 /* 663 * Grab the nexus if available else return 0. 664 */ 665 struct nexus * 666 sfas_arbitate_target(dev, target) 667 struct sfas_softc *dev; 668 int target; 669 { 670 struct nexus *nexus; 671 int s; 672 673 /* 674 * This is realy simple. Raise interrupt level to splbio. Grab the nexus and 675 * leave. 676 */ 677 nexus = &dev->sc_nexus[target]; 678 679 s = splbio(); 680 681 if (nexus->flags & SFAS_NF_UNIT_BUSY) 682 nexus = 0; 683 else 684 nexus->flags |= SFAS_NF_UNIT_BUSY; 685 686 splx(s); 687 return(nexus); 688 } 689 690 /* 691 * Setup a nexus for use. Initializes command, buffer pointers and dma chain. 692 */ 693 void 694 sfas_setup_nexus(dev, nexus, pendp, cbuf, clen, buf, len, mode) 695 struct sfas_softc *dev; 696 struct nexus *nexus; 697 struct sfas_pending *pendp; 698 unsigned char *cbuf; 699 int clen; 700 unsigned char *buf; 701 int len; 702 int mode; 703 { 704 char sync, target, lun; 705 706 target = pendp->xs->xs_periph->periph_target; 707 lun = pendp->xs->xs_periph->periph_lun; 708 709 /* 710 * Adopt mode to reflect the config flags. 711 * If we can't use DMA we can't use synch transfer. Also check the 712 * sfas_inhibit_xxx[target] flags. 713 */ 714 if ((dev->sc_config_flags & (SFAS_NO_SYNCH | SFAS_NO_DMA)) || 715 sfas_inhibit_sync[(int)target]) 716 mode &= ~SFAS_SELECT_S; 717 718 if ((dev->sc_config_flags & SFAS_NO_RESELECT) || 719 sfas_inhibit_disc[(int)target]) 720 mode &= ~SFAS_SELECT_R; 721 722 nexus->xs = pendp->xs; 723 724 /* Setup the nexus struct. */ 725 nexus->ID = ((mode & SFAS_SELECT_R) ? 0xC0 : 0x80) | lun; 726 nexus->clen = clen; 727 bcopy(cbuf, nexus->cbuf, nexus->clen); 728 nexus->cbuf[1] |= lun << 5; /* Fix the lun bits */ 729 nexus->cur_link = 0; 730 nexus->dma_len = 0; 731 nexus->dma_buf = 0; 732 nexus->dma_blk_len = 0; 733 nexus->dma_blk_ptr = 0; 734 nexus->len = len; 735 nexus->buf = buf; 736 nexus->lun_unit = (lun << 4) | target; 737 nexus->state = SFAS_NS_SELECTED; 738 739 /* We must keep these flags. All else must be zero. */ 740 nexus->flags &= SFAS_NF_UNIT_BUSY 741 | SFAS_NF_SYNC_TESTED | SFAS_NF_SELECT_ME; 742 743 if (mode & SFAS_SELECT_I) 744 nexus->flags |= SFAS_NF_IMMEDIATE; 745 if (mode & SFAS_SELECT_K) 746 nexus->flags |= SFAS_NF_RESET; 747 748 sync = ((mode & SFAS_SELECT_S) ? 1 : 0); 749 750 /* We can't use sync during polled IO. */ 751 if (sync && (mode & SFAS_SELECT_I)) 752 sync = 0; 753 754 if (!sync && 755 ((nexus->flags & SFAS_NF_SYNC_TESTED) && (nexus->offset != 0))) { 756 /* 757 * If the scsi unit is set to synch transfer and we don't want 758 * that, we have to renegotiate. 759 */ 760 761 nexus->flags |= SFAS_NF_DO_SDTR; 762 nexus->period = 200; 763 nexus->offset = 0; 764 } else if (sync && !(nexus->flags & SFAS_NF_SYNC_TESTED)) { 765 /* 766 * If the scsi unit is not set to synch transfer and we want 767 * that, we have to negotiate. This should realy base the 768 * period on the clock frequence rather than just check if 769 * >25Mhz 770 */ 771 772 nexus->flags |= SFAS_NF_DO_SDTR; 773 nexus->period = ((dev->sc_clock_freq>25) ? 100 : 200); 774 nexus->offset = 8; 775 776 /* If the user has a long cable, we want to limit the period */ 777 if ((nexus->period == 100) && 778 (dev->sc_config_flags & SFAS_SLOW_CABLE)) 779 nexus->period = 200; 780 } 781 782 /* 783 * Fake a dma-block for polled IO. This way we can use the same code to handle 784 * reselection. Much nicer this way. 785 */ 786 if ((mode & SFAS_SELECT_I) || (dev->sc_config_flags & SFAS_NO_DMA)) { 787 nexus->dma[0].ptr = (vm_offset_t)buf; 788 nexus->dma[0].len = len; 789 nexus->dma[0].flg = SFAS_CHAIN_PRG; 790 nexus->max_link = 1; 791 } else { 792 nexus->max_link = dev->sc_build_dma_chain(dev, nexus->dma, 793 buf, len); 794 } 795 796 /* Flush the caches. */ 797 798 if (len && !(mode & SFAS_SELECT_I)) 799 cpu_dcache_wbinv_range((vm_offset_t)buf, len); 800 } 801 802 int 803 sfasselect(dev, pendp, cbuf, clen, buf, len, mode) 804 struct sfas_softc *dev; 805 struct sfas_pending *pendp; 806 unsigned char *cbuf; 807 int clen; 808 unsigned char *buf; 809 int len; 810 int mode; 811 { 812 struct nexus *nexus; 813 814 /* Get the nexus struct. */ 815 nexus = sfas_arbitate_target(dev, pendp->xs->xs_periph->periph_target); 816 if (nexus == NULL) 817 return(0); 818 819 /* Setup the nexus struct. */ 820 sfas_setup_nexus(dev, nexus, pendp, cbuf, clen, buf, len, mode); 821 822 /* Post it to the interrupt machine. */ 823 sfas_select_unit(dev, pendp->xs->xs_periph->periph_target); 824 825 return(1); 826 } 827 828 void 829 sfasgo(dev, pendp) 830 struct sfas_softc *dev; 831 struct sfas_pending *pendp; 832 { 833 int s; 834 char *buf; 835 836 buf = pendp->xs->data; 837 838 if (sfasselect(dev, pendp, (char *)pendp->xs->cmd, pendp->xs->cmdlen, 839 buf, pendp->xs->datalen, SFAS_SELECT_RS)) { 840 /* 841 * We got the command going so the sfas_pending struct is now 842 * free to reuse. 843 */ 844 845 s = splbio(); 846 TAILQ_INSERT_TAIL(&dev->sc_xs_free, pendp, link); 847 splx(s); 848 } else { 849 /* 850 * We couldn't make the command fly so we have to wait. The 851 * struct MUST be inserted at the head to keep the order of 852 * the commands. 853 */ 854 855 s = splbio(); 856 TAILQ_INSERT_HEAD(&dev->sc_xs_pending, pendp, link); 857 splx(s); 858 } 859 860 return; 861 } 862 863 /* 864 * Part one of the interrupt machine. Error checks and reselection test. 865 * We don't know if we have an active nexus here! 866 */ 867 int 868 sfas_pretests(dev, rp) 869 struct sfas_softc *dev; 870 sfas_regmap_p rp; 871 { 872 struct nexus *nexus; 873 int i, s; 874 875 if (dev->sc_interrupt & SFAS_INT_SCSI_RESET_DETECTED) { 876 /* 877 * Cleanup and notify user. Lets hope that this is all we 878 * have to do 879 */ 880 881 for(i=0; i<8; i++) { 882 if (dev->sc_nexus[i].xs) 883 sfas_scsidone(dev, dev->sc_nexus[i].xs, -2); 884 885 sfas_init_nexus(dev, &dev->sc_nexus[i]); 886 } 887 printf("sfasintr: SCSI-RESET detected!"); 888 return(-1); 889 } 890 891 if (dev->sc_interrupt & SFAS_INT_ILLEGAL_COMMAND) { 892 /* Something went terrible wrong! Dump some data and panic! */ 893 894 printf("FIFO:"); 895 while(*rp->sfas_fifo_flags & SFAS_FIFO_COUNT_MASK) 896 printf(" %x", *rp->sfas_fifo); 897 printf("\n"); 898 899 printf("CMD: %x\n", *rp->sfas_command); 900 panic("sfasintr: ILLEGAL COMMAND!"); 901 } 902 903 if (dev->sc_interrupt & SFAS_INT_RESELECTED) { 904 /* We were reselected. Set the chip as busy */ 905 906 s = splbio(); 907 dev->sc_flags |= SFAS_ACTIVE; 908 if (dev->sc_sel_nexus) { 909 dev->sc_sel_nexus->flags |= SFAS_NF_SELECT_ME; 910 dev->sc_sel_nexus = 0; 911 } 912 splx(s); 913 914 if (dev->sc_units_disconnected) { 915 /* Find out who reselected us. */ 916 917 dev->sc_resel[0] &= ~(1<<dev->sc_host_id); 918 919 for(i=0; i<8; i++) 920 if (dev->sc_resel[0] & (1<<i)) 921 break; 922 923 if (i == 8) 924 panic("Illegal reselection!"); 925 926 if (dev->sc_nexus[i].state == SFAS_NS_DISCONNECTED) { 927 /* 928 * This unit had disconnected, so we reconnect 929 * it. 930 */ 931 932 dev->sc_cur_nexus = &dev->sc_nexus[i]; 933 nexus = dev->sc_cur_nexus; 934 935 *rp->sfas_syncper = nexus->syncper; 936 *rp->sfas_syncoff = nexus->syncoff; 937 *rp->sfas_config3 = nexus->config3; 938 939 *rp->sfas_dest_id = i & 7; 940 941 dev->sc_units_disconnected--; 942 dev->sc_msg_in_len= 0; 943 944 /* Restore active pointers. */ 945 sfas_restore_pointers(dev); 946 947 nexus->state = SFAS_NS_RESELECTED; 948 949 *rp->sfas_command = SFAS_CMD_MESSAGE_ACCEPTED; 950 951 return(1); 952 } 953 } 954 955 /* Somehow we got an illegal reselection. Dump and panic. */ 956 printf("sfasintr: resel[0] %x resel[1] %x disconnected %d\n", 957 dev->sc_resel[0], dev->sc_resel[1], 958 dev->sc_units_disconnected); 959 panic("sfasintr: Unexpected reselection!"); 960 } 961 962 return(0); 963 } 964 965 /* 966 * Part two of the interrupt machine. Handle disconnection and post command 967 * processing. We know that we have an active nexus here. 968 */ 969 int 970 sfas_midaction(dev, rp, nexus) 971 struct sfas_softc *dev; 972 sfas_regmap_p rp; 973 struct nexus *nexus; 974 { 975 int i, left, len, s; 976 u_char status, msg; 977 978 if (dev->sc_interrupt & SFAS_INT_DISCONNECT) { 979 s = splbio(); 980 dev->sc_cur_nexus = 0; 981 982 /* Mark chip as busy and clean up the chip FIFO. */ 983 dev->sc_flags &= ~SFAS_ACTIVE; 984 *rp->sfas_command = SFAS_CMD_FLUSH_FIFO; 985 986 /* Let the nexus state reflect what we have to do. */ 987 switch(nexus->state) { 988 case SFAS_NS_SELECTED: 989 dev->sc_sel_nexus = 0; 990 nexus->flags &= ~SFAS_NF_SELECT_ME; 991 992 /* 993 * We were trying to select the unit. Probably no unit 994 * at this ID. 995 */ 996 nexus->xs->resid = dev->sc_len; 997 998 nexus->status = -2; 999 nexus->flags &= ~SFAS_NF_UNIT_BUSY; 1000 nexus->state = SFAS_NS_FINISHED; 1001 break; 1002 1003 case SFAS_NS_DONE: 1004 /* All done. */ 1005 nexus->xs->resid = dev->sc_len; 1006 1007 nexus->flags &= ~SFAS_NF_UNIT_BUSY; 1008 nexus->state = SFAS_NS_FINISHED; 1009 dev->sc_led(dev, 0); 1010 break; 1011 1012 case SFAS_NS_DISCONNECTING: 1013 /* 1014 * We have received a DISCONNECT message, so we are 1015 * doing a normal disconnection. 1016 */ 1017 nexus->state = SFAS_NS_DISCONNECTED; 1018 1019 dev->sc_units_disconnected++; 1020 break; 1021 1022 case SFAS_NS_RESET: 1023 /* 1024 * We were reseting this SCSI-unit. Clean up the 1025 * nexus struct. 1026 */ 1027 dev->sc_led(dev, 0); 1028 sfas_init_nexus(dev, nexus); 1029 break; 1030 1031 default: 1032 /* 1033 * Unexpected disconnection! Cleanup and exit. This 1034 * shouldn't cause any problems. 1035 */ 1036 printf("sfasintr: Unexpected disconnection\n"); 1037 printf("sfasintr: u %x s %d p %d f %x c %x\n", 1038 nexus->lun_unit, nexus->state, 1039 dev->sc_status & SFAS_STAT_PHASE_MASK, 1040 nexus->flags, nexus->cbuf[0]); 1041 1042 nexus->xs->resid = dev->sc_len; 1043 1044 nexus->flags &= ~SFAS_NF_UNIT_BUSY; 1045 nexus->state = SFAS_NS_FINISHED; 1046 nexus->status = -3; 1047 1048 dev->sc_led(dev, 0); 1049 break; 1050 } 1051 1052 /* 1053 * If we have disconnected units, we MUST enable reselection 1054 * within 250ms. 1055 */ 1056 if (dev->sc_units_disconnected && 1057 !(dev->sc_flags & SFAS_ACTIVE)) 1058 *rp->sfas_command = SFAS_CMD_ENABLE_RESEL; 1059 1060 splx(s); 1061 1062 /* Select the first pre-initialized nexus we find. */ 1063 for(i=0; i<8; i++) 1064 if (dev->sc_nexus[i].flags & (SFAS_NF_SELECT_ME | SFAS_NF_RETRY_SELECT)) 1065 if (sfas_select_unit(dev, i) == 2) 1066 break; 1067 1068 /* We are done with this nexus! */ 1069 if (nexus->state == SFAS_NS_FINISHED) 1070 sfas_scsidone(dev, nexus->xs, nexus->status); 1071 1072 return(1); 1073 } 1074 1075 switch(nexus->state) { 1076 case SFAS_NS_SELECTED: 1077 dev->sc_cur_nexus = nexus; 1078 dev->sc_sel_nexus = 0; 1079 1080 nexus->flags &= ~SFAS_NF_SELECT_ME; 1081 1082 /* 1083 * We have selected a unit. Setup chip, restore pointers and 1084 * light the led. 1085 */ 1086 *rp->sfas_syncper = nexus->syncper; 1087 *rp->sfas_syncoff = nexus->syncoff; 1088 *rp->sfas_config3 = nexus->config3; 1089 1090 sfas_restore_pointers(dev); 1091 1092 nexus->status = 0xFF; 1093 dev->sc_msg_in[0] = 0xFF; 1094 dev->sc_msg_in_len= 0; 1095 1096 dev->sc_led(dev, 1); 1097 1098 break; 1099 1100 case SFAS_NS_DATA_IN: 1101 case SFAS_NS_DATA_OUT: 1102 /* We have transfered data. */ 1103 if (dev->sc_dma_len) 1104 if (dev->sc_cur_link < dev->sc_max_link) { 1105 /* 1106 * Clean up dma and at the same time get how 1107 * many bytes that were NOT transfered. 1108 */ 1109 left = dev->sc_setup_dma(dev, 0, 0, SFAS_DMA_CLEAR); 1110 len = dev->sc_dma_len; 1111 1112 if (nexus->state == SFAS_NS_DATA_IN) { 1113 /* 1114 * If we were bumping we may have had an odd length 1115 * which means that there may be bytes left in the 1116 * fifo. We also need to move the data from the 1117 * bump buffer to the actual memory. 1118 */ 1119 if (dev->sc_dma_buf == dev->sc_bump_pa) 1120 { 1121 while((*rp->sfas_fifo_flags&SFAS_FIFO_COUNT_MASK) 1122 && left) 1123 dev->sc_bump_va[len-(left--)] = *rp->sfas_fifo; 1124 1125 bcopy(dev->sc_bump_va, dev->sc_buf, len-left); 1126 } 1127 } else { 1128 /* Count any unsent bytes and flush them. */ 1129 left+= *rp->sfas_fifo_flags & SFAS_FIFO_COUNT_MASK; 1130 *rp->sfas_command = SFAS_CMD_FLUSH_FIFO; 1131 } 1132 1133 /* 1134 * Update pointers/length to reflect the transfered 1135 * data. 1136 */ 1137 dev->sc_len -= len-left; 1138 dev->sc_buf += len-left; 1139 1140 dev->sc_dma_buf += len-left; 1141 dev->sc_dma_len = left; 1142 1143 dev->sc_dma_blk_ptr += len-left; 1144 dev->sc_dma_blk_len -= len-left; 1145 1146 /* 1147 * If it was the end of a dma block, we select the 1148 * next to begin with. 1149 */ 1150 if (!dev->sc_dma_blk_len) 1151 dev->sc_cur_link++; 1152 } 1153 break; 1154 1155 case SFAS_NS_STATUS: 1156 /* 1157 * If we were not sensing, grab the status byte. If we were 1158 * sensing and we got a bad status, let the user know. 1159 */ 1160 1161 status = *rp->sfas_fifo; 1162 msg = *rp->sfas_fifo; 1163 1164 nexus->status = status; 1165 if (status != 0) 1166 nexus->status = -1; 1167 1168 /* 1169 * Preload the command complete message. Handeled in 1170 * sfas_postaction. 1171 */ 1172 dev->sc_msg_in[0] = msg; 1173 dev->sc_msg_in_len = 1; 1174 nexus->flags |= SFAS_NF_HAS_MSG; 1175 break; 1176 1177 default: 1178 break; 1179 } 1180 1181 return(0); 1182 } 1183 1184 /* 1185 * Part three of the interrupt machine. Handle phase changes (and repeated 1186 * phase passes). We know that we have an active nexus here. 1187 */ 1188 int 1189 sfas_postaction(dev, rp, nexus) 1190 struct sfas_softc *dev; 1191 sfas_regmap_p rp; 1192 struct nexus *nexus; 1193 { 1194 int i, len; 1195 u_char cmd; 1196 short offset, period; 1197 1198 cmd = 0; 1199 1200 switch(dev->sc_status & SFAS_STAT_PHASE_MASK) { 1201 case SFAS_PHASE_DATA_OUT: 1202 case SFAS_PHASE_DATA_IN: 1203 if ((dev->sc_status & SFAS_STAT_PHASE_MASK) == 1204 SFAS_PHASE_DATA_OUT) 1205 nexus->state = SFAS_NS_DATA_OUT; 1206 else 1207 nexus->state = SFAS_NS_DATA_IN; 1208 1209 /* Make DMA ready to accept new data. Load active pointers 1210 * from the DMA block. */ 1211 dev->sc_setup_dma(dev, 0, 0, SFAS_DMA_CLEAR); 1212 if (dev->sc_cur_link < dev->sc_max_link) { 1213 if (!dev->sc_dma_blk_len) { 1214 dev->sc_dma_blk_ptr = dev->sc_chain[dev->sc_cur_link].ptr; 1215 dev->sc_dma_blk_len = dev->sc_chain[dev->sc_cur_link].len; 1216 dev->sc_dma_blk_flg = dev->sc_chain[dev->sc_cur_link].flg; 1217 } 1218 1219 /* We should use polled IO here. */ 1220 if (dev->sc_dma_blk_flg == SFAS_CHAIN_PRG) { 1221 dev->sc_ixfer(dev, nexus->xs->xs_control & XS_CTL_POLL); 1222 dev->sc_cur_link++; 1223 dev->sc_dma_len = 0; 1224 break; 1225 } 1226 else if (dev->sc_dma_blk_flg == SFAS_CHAIN_BUMP) 1227 len = dev->sc_dma_blk_len; 1228 else 1229 len = dev->sc_need_bump(dev, dev->sc_dma_blk_ptr, 1230 dev->sc_dma_blk_len); 1231 1232 /* 1233 * If len != 0 we must bump the data, else we just DMA it 1234 * straight into memory. 1235 */ 1236 if (len) { 1237 dev->sc_dma_buf = dev->sc_bump_pa; 1238 dev->sc_dma_len = len; 1239 1240 if (nexus->state == SFAS_NS_DATA_OUT) 1241 bcopy(dev->sc_buf, dev->sc_bump_va, dev->sc_dma_len); 1242 } else { 1243 dev->sc_dma_buf = dev->sc_dma_blk_ptr; 1244 dev->sc_dma_len = dev->sc_dma_blk_len; 1245 } 1246 1247 /* Load DMA with adress and length of transfer. */ 1248 dev->sc_setup_dma(dev, dev->sc_dma_buf, dev->sc_dma_len, 1249 ((nexus->state == SFAS_NS_DATA_OUT) ? 1250 SFAS_DMA_WRITE : SFAS_DMA_READ)); 1251 1252 /* printf("Using DMA !!!!\n");*/ 1253 cmd = SFAS_CMD_TRANSFER_INFO | SFAS_CMD_DMA; 1254 } else { 1255 /* 1256 * Hmmm, the unit wants more info than we have or has 1257 * more than we want. Let the chip handle that. 1258 */ 1259 1260 *rp->sfas_tc_low = 0; /* was 256 but this does not make sense */ 1261 *rp->sfas_tc_mid = 1; 1262 *rp->sfas_tc_high = 0; 1263 cmd = SFAS_CMD_TRANSFER_PAD; 1264 } 1265 break; 1266 1267 case SFAS_PHASE_COMMAND: 1268 /* The scsi unit wants the command, send it. */ 1269 nexus->state = SFAS_NS_SVC; 1270 1271 *rp->sfas_command = SFAS_CMD_FLUSH_FIFO; 1272 for(i=0; i<5; i++); 1273 1274 for(i=0; i<nexus->clen; i++) 1275 *rp->sfas_fifo = nexus->cbuf[i]; 1276 cmd = SFAS_CMD_TRANSFER_INFO; 1277 break; 1278 1279 case SFAS_PHASE_STATUS: 1280 /* 1281 * We've got status phase. Request status and command 1282 * complete message. 1283 */ 1284 nexus->state = SFAS_NS_STATUS; 1285 cmd = SFAS_CMD_COMMAND_COMPLETE; 1286 break; 1287 1288 case SFAS_PHASE_MESSAGE_OUT: 1289 /* 1290 * Either the scsi unit wants us to send a message or we have 1291 * asked for it by seting the ATN bit. 1292 */ 1293 nexus->state = SFAS_NS_MSG_OUT; 1294 1295 *rp->sfas_command = SFAS_CMD_FLUSH_FIFO; 1296 1297 if (nexus->flags & SFAS_NF_DO_SDTR) { 1298 /* Send a Synchronous Data Transfer Request. */ 1299 1300 sfas_build_sdtrm(dev, nexus->period, nexus->offset); 1301 nexus->flags |= SFAS_NF_SDTR_SENT; 1302 nexus->flags &= ~SFAS_NF_DO_SDTR; 1303 } else if (nexus->flags & SFAS_NF_RESET) { 1304 /* Send a reset scsi unit message. */ 1305 1306 dev->sc_msg_out[0] = 0x0C; 1307 dev->sc_msg_out_len = 1; 1308 nexus->state = SFAS_NS_RESET; 1309 nexus->flags &= ~SFAS_NF_RESET; 1310 } else if (dev->sc_msg_out_len == 0) { 1311 /* Don't know what to send so we send a NOP message. */ 1312 1313 dev->sc_msg_out[0] = 0x08; 1314 dev->sc_msg_out_len = 1; 1315 } 1316 1317 cmd = SFAS_CMD_TRANSFER_INFO; 1318 1319 for(i=0; i<dev->sc_msg_out_len; i++) 1320 *rp->sfas_fifo = dev->sc_msg_out[i]; 1321 dev->sc_msg_out_len = 0; 1322 1323 break; 1324 1325 case SFAS_PHASE_MESSAGE_IN: 1326 /* Receive a message from the scsi unit. */ 1327 nexus->state = SFAS_NS_MSG_IN; 1328 1329 while(!(nexus->flags & SFAS_NF_HAS_MSG)) { 1330 *rp->sfas_command = SFAS_CMD_TRANSFER_INFO; 1331 sfasiwait(dev); 1332 1333 dev->sc_msg_in[dev->sc_msg_in_len++] = *rp->sfas_fifo; 1334 1335 /* Check if we got all the bytes in the message. */ 1336 if (dev->sc_msg_in[0] >= 0x80) ; 1337 else if (dev->sc_msg_in[0] >= 0x30) ; 1338 else if (((dev->sc_msg_in[0] >= 0x20) && 1339 (dev->sc_msg_in_len == 2)) || 1340 ((dev->sc_msg_in[0] != 0x01) && 1341 (dev->sc_msg_in_len == 1))) { 1342 nexus->flags |= SFAS_NF_HAS_MSG; 1343 break; 1344 } else { 1345 if (dev->sc_msg_in_len >= 2) 1346 if ((dev->sc_msg_in[1]+2) == dev->sc_msg_in_len) { 1347 nexus->flags |= SFAS_NF_HAS_MSG; 1348 break; 1349 } 1350 } 1351 1352 *rp->sfas_command = SFAS_CMD_MESSAGE_ACCEPTED; 1353 sfasiwait(dev); 1354 1355 if ((dev->sc_status & SFAS_STAT_PHASE_MASK) != 1356 SFAS_PHASE_MESSAGE_IN) 1357 break; 1358 } 1359 1360 cmd = SFAS_CMD_MESSAGE_ACCEPTED; 1361 if (nexus->flags & SFAS_NF_HAS_MSG) { 1362 /* We have a message. Decode it. */ 1363 1364 switch(dev->sc_msg_in[0]) { 1365 case 0x00: /* COMMAND COMPLETE */ 1366 nexus->state = SFAS_NS_DONE; 1367 break; 1368 case 0x04: /* DISCONNECT */ 1369 nexus->state = SFAS_NS_DISCONNECTING; 1370 break; 1371 case 0x02: /* SAVE DATA POINTER */ 1372 sfas_save_pointers(dev); 1373 break; 1374 case 0x03: /* RESTORE DATA POINTERS */ 1375 sfas_restore_pointers(dev); 1376 break; 1377 case 0x07: /* MESSAGE REJECT */ 1378 /* 1379 * If we had sent a SDTR and we got a message 1380 * reject, the scsi docs say that we must go 1381 * to async transfer. 1382 */ 1383 if (nexus->flags & SFAS_NF_SDTR_SENT) { 1384 nexus->flags &= ~SFAS_NF_SDTR_SENT; 1385 1386 nexus->config3 &= ~SFAS_CFG3_FASTSCSI; 1387 nexus->syncper = 5; 1388 nexus->syncoff = 0; 1389 1390 *rp->sfas_syncper = nexus->syncper; 1391 *rp->sfas_syncoff = nexus->syncoff; 1392 *rp->sfas_config3 = nexus->config3; 1393 } else 1394 /* 1395 * Something was rejected but we don't know 1396 * what! PANIC! 1397 */ 1398 panic("sfasintr: Unknown message rejected!"); 1399 break; 1400 case 0x08: /* MO OPERATION */ 1401 break; 1402 case 0x01: /* EXTENDED MESSAGE */ 1403 switch(dev->sc_msg_in[2]) { 1404 case 0x01:/* SYNC. DATA TRANSFER REQUEST */ 1405 /* Decode the SDTR message. */ 1406 period = 4*dev->sc_msg_in[3]; 1407 offset = dev->sc_msg_in[4]; 1408 1409 /* 1410 * Make sure that the specs are within 1411 * chip limits. Note that if we 1412 * initiated the negotiation the specs 1413 * WILL be withing chip limits. If it 1414 * was the scsi unit that initiated 1415 * the negotiation, the specs may be 1416 * to high. 1417 */ 1418 if (offset > 16) 1419 offset = 16; 1420 if ((period < 200) && 1421 (dev->sc_clock_freq <= 25)) 1422 period = 200; 1423 1424 if (offset == 0) 1425 period = 5*dev->sc_clock_period; 1426 1427 nexus->syncper = period/ 1428 dev->sc_clock_period; 1429 nexus->syncoff = offset; 1430 1431 if (period < 200) 1432 nexus->config3 |= SFAS_CFG3_FASTSCSI; 1433 else 1434 nexus->config3 &=~SFAS_CFG3_FASTSCSI; 1435 1436 nexus->flags |= SFAS_NF_SYNC_TESTED; 1437 1438 *rp->sfas_syncper = nexus->syncper; 1439 *rp->sfas_syncoff = nexus->syncoff; 1440 *rp->sfas_config3 = nexus->config3; 1441 1442 /* 1443 * Hmmm, it seems that the scsi unit 1444 * initiated sync negotiation, so lets 1445 * reply acording to scsi-2 standard. 1446 */ 1447 if (!(nexus->flags& SFAS_NF_SDTR_SENT)) 1448 { 1449 if ((dev->sc_config_flags & 1450 SFAS_NO_SYNCH) || 1451 (dev->sc_config_flags & 1452 SFAS_NO_DMA) || 1453 sfas_inhibit_sync[ 1454 nexus->lun_unit & 7]) { 1455 period = 200; 1456 offset = 0; 1457 } 1458 1459 nexus->offset = offset; 1460 nexus->period = period; 1461 nexus->flags |= SFAS_NF_DO_SDTR; 1462 *rp->sfas_command = SFAS_CMD_SET_ATN; 1463 } 1464 1465 nexus->flags &= ~SFAS_NF_SDTR_SENT; 1466 break; 1467 1468 case 0x00: /* MODIFY DATA POINTERS */ 1469 case 0x02: /* EXTENDED IDENTIFY (SCSI-1) */ 1470 case 0x03: /* WIDE DATA TRANSFER REQUEST */ 1471 default: 1472 /* Reject any unhandeled messages. */ 1473 1474 dev->sc_msg_out[0] = 0x07; 1475 dev->sc_msg_out_len = 1; 1476 *rp->sfas_command = SFAS_CMD_SET_ATN; 1477 cmd = SFAS_CMD_MESSAGE_ACCEPTED; 1478 break; 1479 } 1480 break; 1481 1482 default: 1483 /* Reject any unhandeled messages. */ 1484 1485 dev->sc_msg_out[0] = 0x07; 1486 dev->sc_msg_out_len = 1; 1487 *rp->sfas_command = SFAS_CMD_SET_ATN; 1488 cmd = SFAS_CMD_MESSAGE_ACCEPTED; 1489 break; 1490 } 1491 nexus->flags &= ~SFAS_NF_HAS_MSG; 1492 dev->sc_msg_in_len = 0; 1493 } 1494 break; 1495 default: 1496 printf("SFASINTR: UNKNOWN PHASE! phase: %d\n", 1497 dev->sc_status & SFAS_STAT_PHASE_MASK); 1498 dev->sc_led(dev, 0); 1499 sfas_scsidone(dev, nexus->xs, -4); 1500 1501 return(-1); 1502 } 1503 1504 if (cmd) 1505 *rp->sfas_command = cmd; 1506 1507 return(0); 1508 } 1509 1510 /* 1511 * Stub for interrupt machine. 1512 */ 1513 void 1514 sfasintr(dev) 1515 struct sfas_softc *dev; 1516 { 1517 sfas_regmap_p rp; 1518 struct nexus *nexus; 1519 1520 rp = dev->sc_fas; 1521 1522 if (!sfas_pretests(dev, rp)) { 1523 1524 nexus = dev->sc_cur_nexus; 1525 if (nexus == NULL) 1526 nexus = dev->sc_sel_nexus; 1527 1528 if (nexus) 1529 if (!sfas_midaction(dev, rp, nexus)) 1530 sfas_postaction(dev, rp, nexus); 1531 } 1532 } 1533 1534 /* 1535 * sfasicmd is used to perform IO when we can't use interrupts. sfasicmd 1536 * emulates the normal environment by waiting for the chip and calling 1537 * sfasintr. 1538 */ 1539 void 1540 sfasicmd(dev, pendp) 1541 struct sfas_softc *dev; 1542 struct sfas_pending *pendp; 1543 { 1544 sfas_regmap_p rp; 1545 struct nexus *nexus; 1546 1547 nexus = &dev->sc_nexus[pendp->xs->xs_periph->periph_target]; 1548 rp = dev->sc_fas; 1549 1550 if (!sfasselect(dev, pendp, (char *)pendp->xs->cmd, pendp->xs->cmdlen, 1551 (char *)pendp->xs->data, pendp->xs->datalen, 1552 SFAS_SELECT_I)) 1553 panic("sfasicmd: Couldn't select unit"); 1554 1555 while(nexus->state != SFAS_NS_FINISHED) { 1556 sfasiwait(dev); 1557 sfasintr(dev); 1558 } 1559 1560 nexus->flags &= ~SFAS_NF_SYNC_TESTED; 1561 } 1562 1563 1564 #ifdef SFAS_DEBUG 1565 1566 void 1567 dump_nexus(nexus) 1568 struct nexus *nexus; 1569 { 1570 int loop; 1571 1572 printf("nexus=%08x\n", (u_int)nexus); 1573 printf("scsi_fer=%08x\n", (u_int)nexus->xs); 1574 printf("ID=%02x\n", nexus->ID); 1575 printf("clen=%02x\n", nexus->clen); 1576 printf("cbuf="); 1577 for (loop = 0; loop< 14; ++loop) 1578 printf(" %02x\n", nexus->cbuf[loop]); 1579 printf("\n"); 1580 printf("dma:\n"); 1581 for (loop = 0; loop < MAXCHAIN; ++loop) 1582 printf("dma_chain: %08x %04x %04x\n", nexus->dma[loop].ptr, 1583 nexus->dma[loop].len, nexus->dma[loop].flg); 1584 printf("\n"); 1585 1586 printf("max_link=%d\n", nexus->max_link); 1587 printf("cur_link=%d\n", nexus->cur_link); 1588 1589 printf("buf=%08x\n", (u_int)nexus->buf); 1590 printf("len=%08x\n", nexus->len); 1591 printf("dma_buf=%08x\n", (u_int)nexus->dma_buf); 1592 printf("dma_len=%08x\n", nexus->dma_len); 1593 printf("dma_blk_ptr=%08x\n", (u_int)nexus->dma_blk_ptr); 1594 printf("dma_blk_len=%08x\n", nexus->dma_blk_len); 1595 printf("dma_blk_flag=%08x\n", nexus->dma_blk_flg); 1596 printf("state=%02x\n", nexus->state); 1597 printf("flags=%04x\n", nexus->flags); 1598 printf("period=%d\n", nexus->period); 1599 printf("offset=%d\n", nexus->offset); 1600 printf("syncper=%d\n", nexus->syncper); 1601 printf("syncoff=%d\n", nexus->syncoff); 1602 printf("config3=%02x\n", nexus->config3); 1603 printf("lun_unit=%d\n", nexus->lun_unit); 1604 printf("status=%02x\n", nexus->status); 1605 printf("\n"); 1606 } 1607 1608 void 1609 dump_nexii(sc) 1610 struct sfas_softc *sc; 1611 { 1612 int loop; 1613 1614 for (loop = 0; loop < 8; ++loop) { 1615 dump_nexus(&sc->sc_nexus[loop]); 1616 } 1617 } 1618 1619 void 1620 dump_sfassoftc(sc) 1621 struct sfas_softc *sc; 1622 { 1623 printf("sfassoftc @ 0x%08x\n", (u_int)sc); 1624 printf("clock_freq = %d\n", sc->sc_clock_freq); 1625 printf("timeout = %d\n", sc->sc_timeout); 1626 printf("host_id = %d\n", sc->sc_host_id); 1627 printf("config_flags = 0x%08x\n", sc->sc_config_flags); 1628 printf("led_status = %d\n", sc->sc_led_status); 1629 1630 dump_nexii(sc); 1631 printf("cur_nexus = 0x%08x\n", (u_int)sc->sc_cur_nexus); 1632 printf("sel_nexus = 0x%08x\n", (u_int)sc->sc_sel_nexus); 1633 printf("\n"); 1634 } 1635 1636 #endif /* SFAS_DEBUG */ 1637
Indexes created Fri Oct 17 03:10:13 GMT 2025